; bdiGDB configuration for ARM PID7T with ARM940T daugther card
; -------------------------------------------------------------
;
[INIT]
WM32    0x0B000020  0x00000000  ;Clear Reset Map
;
;Setup protection and enable cache
WCP15   0x0010      0x0000003F  ;data background region 0
WCP15   0x0110      0x0000003F  ;inst background region 0
WCP15   0x0011      0x0000002B  ;data region 1 (@0x00000000,4MB)
WCP15   0x0111      0x0000002B  ;inst region 1 (@0x00000000,4MB)
WCP15   0x0002      0x00000002  ;data region 1 cacheable
WCP15   0x0102      0x00000002  ;inst region 1 cacheable
WCP15   0x0003      0x00000002  ;data region 1 bufferable
WCP15   0x0005      0x0000000F  ;data region 0/1 full access
WCP15   0x0105      0x0000000F  ;inst region 0/1 full access
WCP15   0x0001      0x0000107D  ;enable protection and caches
;
;Setup other regions but do not enable
WCP15   0x0012      0x2d000000  ;data region 2
WCP15   0x0112      0x2c000000  ;inst region 2
WCP15   0x0013      0x3d000000  ;data region 3
WCP15   0x0113      0x3c000000  ;inst region 3
WCP15   0x0014      0x4d000000  ;data region 4
WCP15   0x0114      0x4c000000  ;inst region 4
WCP15   0x0015      0x5d000000  ;data region 5
WCP15   0x0115      0x5c000000  ;inst region 5
WCP15   0x0016      0x6d000000  ;data region 6
WCP15   0x0116      0x6c000000  ;inst region 6
WCP15   0x0017      0x7d000000  ;data region 7
WCP15   0x0117      0x7c000000  ;inst region 7
;
WGPR    11          0x00000020  ;set frame pointer to free RAM
WM32    0x00000020  0x00000028  ;dummy stack frame
;

[TARGET]
CPUTYPE     ARM940T
CLOCK       1                   ;JTAG clock (0=Adaptive, 1=8MHz, 2=4MHz, 3=2MHz)
ENDIAN      LITTLE              ;memory model (LITTLE | BIG)
VECTOR      CATCH 0x1f          ;catch D_Abort, P_Abort, SWI, Undef and Reset
;BREAKMODE   SOFT                ;SOFT or HARD
BREAKMODE   SOFT 0xDFFFDFFF     ;SOFT or HARD, ARM / Thumb break code
;BREAKMODE   SOFT 0xef180000     ;SOFT or HARD (X-Tools V1.0 break code)
;SIO         7 9600              ;TCP port for serial IO
;DCC         7                   ;TCP port for DCC I/O

[HOST]
IP          151.120.25.119
FILE        E:\cygwin\home\bdidemo\arm\vxworks
FORMAT      COFF
;FILE        E:\cygwin\home\bdidemo\arm\bin_sem0.exe
;FILE        E:\cygwin\home\bdidemo\arm\test0.elf
;FORMAT      ELF
LOAD        MANUAL      ;load VxWorks code MANUAL or AUTO after reset

[FLASH]
WORKSPACE   0x00001000  ;workspace in target RAM for fast programming algorithm
CHIPTYPE    AM29F       ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
CHIPSIZE    0x20000     ;The size of one flash chip in bytes (e.g. AM29F010 = 0x20000)
BUSWIDTH    8           ;The width of the flash memory bus in bits (8 | 16 | 32)
FORMAT      SREC
FILE        e:\tornado\target\proj\arm7_gtw\rom_resident\vxWorks_romCompress.hex  ;The file to program
ERASE       0x04000000  ;erase sector 0 of flash in U12 (AM29F010)
ERASE       0x04004000  ;erase sector 1 of flash
ERASE       0x04008000  ;erase sector 2 of flash
ERASE       0x0400C000  ;erase sector 3 of flash
ERASE       0x04010000  ;erase sector 4 of flash
ERASE       0x04014000  ;erase sector 5 of flash
ERASE       0x04018000  ;erase sector 6 of flash
ERASE       0x0401C000  ;erase sector 7 of flash

[REGS]
FILE	E:\cygwin\home\bdidemo\arm\reg940t.def