; bdiGDB configuration file for AT91EB63 / Evaluator-7T board
; -----------------------------------------------------------
;
[INIT]
;core #0 is AT91EB63
#0 WM32    0xFFE00020  0x00000001  ;Cancel reset remapping
#0 WM32    0xFFE00024  0x00000006  ;enable A0..A20
#0 WM32    0xFFE00000  0x01002529  ;Flash at 0x01000000
#0 WM32    0xFFE00004  0x02002121  ;SRAM  at 0x02000000
#0 WM32    0xFFFFF124  0xFFFFFFFF  ;disable all interrupts
;
#0 WGPR    11          0x00000020  ;set frame pointer to free RAM
#0 WM32    0x00000020  0x00000028  ;dummy stack frame
;
;core #1 is Evaluator-7T
#1 WM32    0x03FF0000  0x07FFFFA0  ;SYSCFG: no cache,SRAM=0x03FE0000,SFR=0x03FF0000
#1 WM32    0x03FF3010  0x0000003E  ;EXTDBWTH: DSR0=16, DSR1/2=32
#1 WM32    0x03FF3014  0x18860030  ;ROMCON0: Flash, 0x01800000-0x0187FFFF, 4 wait
#1 WM32    0x03FF3018  0x00400010  ;ROMCON1: SRAM, 0x00000000-0x0003FFFF, 2 wait
#1 WM32    0x03FF301C  0x00801010  ;ROMCON2: SRAM, 0x00040000-0x0007FFFF, 2 wait
#1 WM32    0x03FF303C  0x00008360  ;REFEXTCON: Ext.I/O @ 0x03600000
;
#1 WGPR    11          0x00000020  ;set frame pointer to free RAM
#1 WM32    0x00000020  0x00000028  ;dummy stack frame;


[TARGET]
CLOCK       1           ;JTAG clock (0=Adaptive, 1=8MHz, 2=4MHz, 3=2MHz)
RESET       HARD 500    ;assert reset oin for 0.5 seconds
WAKEUP      500         ;wakeup time after reset

#0 CPUTYPE     ARM7TDMI
#0 SCANPRED    0 0              ;JTAG devices connected before this core
#0 SCANSUCC    1 4              ;JTAG devices connected after this core
#0 VECTOR      CATCH            ;catch unhandled exceptions
#0 BREAKMODE   SOFT 0xDFFFDFFF  ;SOFT or HARD, ARM / Thumb break code
#0 DCC         8                ;DCC I/O via TCP port 8

#1 CPUTYPE     ARM7TDMI
#1 SCANPRED    1 4              ;JTAG devices connected before this core
#1 SCANSUCC    0 0              ;JTAG devices connected after this core
#1 VECTOR      CATCH            ;catch unhandled exceptions
#1 BREAKMODE   SOFT 0xDFFFDFFF  ;SOFT or HARD, ARM / Thumb break code
#1 DCC         7                ;DCC I/O via TCP port 7


[HOST]
#0 IP          151.120.25.119
#0 FILE        E:\cygwin\home\bdidemo\at91\vxworks
#0 FORMAT      COFF
#0 LOAD        MANUAL      ;load code MANUAL or AUTO after reset
#0 PROMPT      AT91>     ;new Telnet prompt

#1 IP          151.120.25.119
#1 FILE        E:\cygwin\home\bdidemo\arm\vxworks
#1 FORMAT      COFF
#1 LOAD        MANUAL    ;load code MANUAL or AUTO after reset
#1 PROMPT      EV7T>     ;new Telnet prompt


[FLASH]
#0 WORKSPACE   0x00000000  ;workspace in target RAM for fast programming algorithm
#0 CHIPTYPE    AT49X16     ;Flash type is Atmel AT49BV1604 in 16bit mode
#0 CHIPSIZE    0x200000    ;The size of one flash chip in bytes (e.g. AM29F010 = 0x20000)
#0 BUSWIDTH    16          ;The width of the flash memory bus in bits (8 | 16 | 32)
#0 FILE        E:\cygwin\home\bdidemo\arm\vxWorks  ;The file to program
#0 FORMAT      BIN 0x01100000
#0 ERASE       0x01100000  ;erase sector 24 of flash
#0 ERASE       0x01110000  ;erase sector 25 of flash
#0 ERASE       0x01120000  ;erase sector 26 of flash
#0 ERASE       0x01130000  ;erase sector 27 of flash
#0 ERASE       0x01140000  ;erase sector 28 of flash
#0 ERASE       0x01150000  ;erase sector 29 of flash
#0 ERASE       0x01160000  ;erase sector 30 of flash
#0 ERASE       0x01170000  ;erase sector 31 of flash

#1 WORKSPACE   0x00000000  ;workspace in target RAM for fast programming algorithm
#1 CHIPTYPE    AT49X16     ;Flash type is SST39VF400A
#1 CHIPSIZE    0x80000     ;The size of one flash chip in bytes
#1 BUSWIDTH    16          ;The width of the flash memory bus in bits (8 | 16 | 32)
#1 FILE        E:\cygwin\home\bdidemo\arm\test0.elf  ;The file to program
#1 FORMAT      BIN 0x01840000
#1 ERASE       0x01840000 BLOCK  ;erase a 64kB block
#1 ERASE       0x01850000 BLOCK  ;erase a 64kB block
#1 ERASE       0x01860000 BLOCK  ;erase a 64kB block
#1 ERASE       0x01870000 BLOCK  ;erase a 64kB block

[REGS]
#0 FILE E:\cygwin\home\bdidemo\at91\reg40400.def

