; bdiGDB configuration for Innovator 1610 ; --------------------------------------- ; Because the RESET signal is not routed to the Multi-ICE ; connector, it is not possible for the BDI to force a reset. ; Also it is not possible to stop the target immediatelly at ; the reset vector. To get control of the board, power-cycle it ; or press the reset button on the Processor Module and then ; enter reset at the BDI2000 Telnet interface. ; ; [INIT] ; WREG CPSR 0x000000d3 ;set superviser mode WGPR 15 0x00000000 ;set PC = 0 WCP15 0x0001 0x00050078 ;CP15 Control : disable caches ; WM16 0xfffecf00 0x0010 ;PLL lock ; WM16 0xfffece08 0x4 ;Enable ARM peripheral clock WM16 0xfffece14 0x1 ;Release OMAP CLKM reset ; WM16 0xFFFEC808 0x00F5 ;Disable ARM9 Watchdog Timer WM16 0xFFFEC808 0x00A0 ; ; ; Configure Memory Interface EMIFS for default processor pll freq @12MHz ;WM32 0xfffecc10 0x002130b0 ;EMIFS CS0 configuration WM32 0xfffecc14 0x00003339 ;EMIFS CS1 configuration WM32 0xfffecc18 0x00003339 ;EMIFS CS2 configuration WM32 0xfffecc1c 0x88011131 ;EMIFS CS3 configuration WM32 0xfffecc80 0x00000007 ;Set operations register WM32 0xfffecc20 0x0000bbf4 ;EMIFF CS4 configuration - DDR ; ; Initialize Mobile DDR SDRAM WM32 0xfffecc84 0x00000007 ;Set CKE high via manual command register DELAY 10 ;Delay for min. 200 us WM32 0xfffecc84 0x00000001 ;Precharge all banks via manual command register WM32 0xfffecc84 0x00000002 ;Issue 2+ AUTOREFRESH commands WM32 0xfffecc84 0x00000002 WM32 0xfffecc70 0x00000033 ;MRS initialization - DDR ; WBST (9): write burst - must be 0 ; CASL (6:4): CAS Latency - must be 2 ; S/I (3): Serial - must be 0 ; PGBL (2:0): Burst length - set to burst of 8 WM32 0xfffecc78 0x00000000 ;EMRS1 refresh all banks WM32 0xfffeccc0 0x00800002 ;DDR DDL registers URD WM32 0xfffecccc 0x00800002 ;DDR DDL registers LRD WM32 0xfffecc64 0x03F00002 ;DDR DDL registers WRD; ; WM16 0xfffece10 0x0002 ;Release the DSP from reset ;WM32 0xfffecc0c 0x00000001 ;Disable flash WP ; ; MMAP 0x00000000 0x01FFFFFF ;enable access to CS0 MMAP 0x04000000 0x05FFFFFF ;enable access to CS1 MMAP 0x08000000 0x09FFFFFF ;enable access to CS2 MMAP 0x0C000000 0x0DFFFFFF ;enable access to CS3 MMAP 0x10000000 0x1FFFFFFF ;enable access to SDRAM MMAP 0xFFFB0000 0xFFFEFFFF ;enable access to peripheral ; [TARGET] CPUTYPE ARM926E CLOCK 0 4 ;JTAG clock : start with 1 MHz then use adaptive ; to use adaptive clocking you need the correct ; target cable and you have to use the JTAG adapter ; board on the Innovator Break-out-board. ;CLOCK 4 ;JTAG clock : without adaptive clocking cable SCANPRED 1 8 ;JTAG devices connected before this core SCANSUCC 1 38 ;JTAG devices connected after this core TRST OPENDRAIN ;TRST driver type (OPENDRAIN | PUSHPULL) RESET NONE ;NONE | HARD (ms) ENDIAN LITTLE ;memory model (LITTLE | BIG) VECTOR CATCH 0x1f ;catch D_Abort, P_Abort, SWI, Undef and Reset ;BREAKMODE HARD ;SOFT or HARD, ARM / Thumb break code BREAKMODE SOFT 0xDFFFDFFF ;SOFT or HARD, ARM / Thumb break code ;DCC 7 ;DCC I/O via TCP port 7 [HOST] IP 151.120.25.119 FILE E:\cygwin\home\bdidemo\arm\bin_sem0.exe ; for download test only FORMAT BIN 0x10000000 LOAD MANUAL ;load code MANUAL or AUTO after reset [FLASH] ; The flash used is an Intel 28F256L18T, 16Mx16 Strata flash. ; This flash power-up with all sectors (blocks) locked. ; Use the Telnet unlock command or add some init list entries to ; unlock the blocks you plan to erase/program. ; Core#0> unlock 0x0c000000 0x20000 255 ; Core#0> unlock 0x0dfe0000 0x08000 4 ; If the flash CS3 is mapped to 0x00000000 change the addresses ; WORKSPACE 0x10000000 ;workspace in target RAM for fast programming algorithm CHIPTYPE STRATAX16 CHIPSIZE 0x02000000 BUSWIDTH 16 FILE E:\cygwin\home\bdidemo\arm\omap1610.cfg FORMAT BIN 0x0c000000 ERASE 0x0c000000 ;erase block 0 ERASE 0x0c020000 ;erase block 1 ERASE 0x0c040000 ;erase block 2 ERASE 0x0c060000 ;erase block 3 ERASE 0x0c080000 ;erase block 4 ERASE 0x0c0a0000 ;erase block 5 ERASE 0x0c0c0000 ;erase block 6 ERASE 0x0c0e0000 ;erase block 7 [REGS] FILE E:\cygwin\home\bdidemo\arm\reg926e.def