library ieee;
use ieee.std_logic_1164.all;

package globals is	 
	constant CommandRegisterAddress			: std_logic_vector( 3 downto 0) := X"0"; -- Write Only
	constant StatusRegisterAddress			: std_logic_vector( 3 downto 0) := X"0"; -- Read Only
	constant PeriodRegisterAddress			: std_logic_vector( 3 downto 0) := X"1";	   
	constant FlashOnRegisterAddress			: std_logic_vector( 3 downto 0) := X"2";	
	constant FlashOffRegisterAddress		: std_logic_vector( 3 downto 0) := X"3";	
	constant SampleOnRegisterAddress		: std_logic_vector( 3 downto 0) := X"4";	
	constant SampleOffRegisterAddress		: std_logic_vector( 3 downto 0) := X"5";	
	constant FlashesRegisterAddress			: std_logic_vector( 3 downto 0) := X"6";	
	constant RevisionRegisterAddress		: std_logic_vector( 3 downto 0) := X"F";		 
	constant ChipRevision					: std_logic_vector(15 downto 0) := X"BEEF";
	constant vdd                    		: std_logic := '1';
	constant gnd                    		: std_logic := '0';
end package	globals;