library ieee;
library analog_io; 

use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;  

use analog_io.test_pkg.all;
use analog_io.ks8695px_bfm_pkg.all;
use analog_io.ks8695px_signals_pkg.all; 

use work.globals.all;

entity ks8695px_tst1 is
end ks8695px_tst1;

architecture ks8695px_tst1_hdl of ks8695px_tst1 is

   -- drive reset_n signal X number of clocks
   procedure reset (
      constant p_cnt    : in integer;
      signal p_reset_n  : out std_logic
   ) is
   begin
      p_reset_n <= '1';
      resetloop: for i in 1 to p_cnt loop
         wait on bfm_clock until bfm_clock = '1';
         p_reset_n <= '0';
      end loop resetloop;
      p_reset_n <= '1';	
	  for i in 1 to 10 loop	   
         wait until rising_edge(bfm_clock);
	  end loop;
   end reset;  

begin

   ---------------------------------------------------------------
   -- Test process where all our BFM commands will be executed
   -- from.  In this example, reset is driven from the test
   -- and only one process can execute cycles to the IBC BFM.  
   ---------------------------------------------------------------

   test: process  
   	  variable data_returned : std_logic_vector(15 downto 0);
   begin

      -----------------------------------------------------------
      -- This signal is located in the ibc_bfm_pkg.vhd file,
      -- used to issue debugging cycle information from the BFM
      -----------------------------------------------------------
      --ibc_debug <= true;

      -- reset sequence
      reset(10,async_reset_n);

      ---------------------------------------------------------------
      -- basic read/write cycles using either std_logic or 
      -- string input format (overloaded in the ibc_bfm_pkg.vhd file)
      ---------------------------------------------------------------	  
	  
	  
 	  rd(MotherboardFpgaRevisionRegisterAddress	,X"BEEF",cmd);	
	   
	  -- Test a single byte write to Mxfe
	  wr(MxfeInstructionRegisterAddress			,X"002A",cmd);		   
	  wr(MxfeRegister_1_Address					,X"00A5",cmd);		
	  wr(MxfeRegister_2_Address					,X"00FF",cmd); 	
	  
	  -- Read back register that were just written
	  rd(MxfeInstructionRegisterAddress			,X"002A",cmd);		   
	  rd(MxfeRegister_1_Address					,X"00A5",cmd);		
	  rd(MxfeRegister_2_Address					,X"00FF",cmd); 
	  
	  wr(MxfeConfigurationCommandRegisterAddress,X"0001",cmd);	  
	  -- Wait until the write completes
	  polling_loop_1 : loop  	
		  rd(MxfeConfigurationStatusRegisterAddress  ,X"0000",cmd);
		  get_rdata(data_returned, cmd);
		  exit when data_returned(0) = '0';
	  end loop polling_loop_1;   
	  
	  
	  -- Test a two byte write to Mxfe
	  wr(MxfeInstructionRegisterAddress			,X"006A",cmd);		   
	  wr(MxfeRegister_1_Address					,X"00BA",cmd);		
	  wr(MxfeRegister_2_Address					,X"00BE",cmd);
	  wr(MxfeConfigurationCommandRegisterAddress,X"0001",cmd);	  
	  -- Wait until the write completes
	  polling_loop_2 : loop  	
		  rd(MxfeConfigurationStatusRegisterAddress  ,X"0000",cmd);
		  get_rdata(data_returned, cmd);
		  exit when data_returned(0) = '0';
	  end loop polling_loop_2;   	  
	  

	  -- Test a single byte read from Mxfe
	  wr(MxfeInstructionRegisterAddress			,X"009A",cmd);		   
	  wr(MxfeRegister_1_Address					,X"00A5",cmd);		
	  wr(MxfeRegister_2_Address					,X"0000",cmd);
	  wr(MxfeConfigurationCommandRegisterAddress,X"0001",cmd);	  
	  -- Wait until the write completes
	  polling_loop_3 : loop  	
		  rd(MxfeConfigurationStatusRegisterAddress  ,X"0000",cmd);
		  get_rdata(data_returned, cmd);
		  exit when data_returned(0) = '0';
	  end loop polling_loop_3;	  
	  
	  -- Read the data returned from the Mixed Signal Front End(Mxfe)
	  rd(MxfeResultRegisterAddress              ,X"00A5",cmd);	   
	  
	  -- Write data to the LTC2604 DAC 
	  wr(DAC_DataRegisterAddress				,X"CAFE",cmd);		   
	  wr(DAC_CommandRegisterAddress				,X"00A5",cmd);	  
	  -- Wait until the write completes
	  polling_loop_4 : loop  	
		  rd(DAC_StatusRegisterAddress  ,X"0000",cmd);
		  get_rdata(data_returned, cmd);
		  exit when data_returned(0) = '0';
	  end loop polling_loop_4;	  

	  idle(cmd);

--	   wait for 10 ms;
      -----------------------------------------------------------------
      -------------- END OF TEST routine, do not edit! ----------------
      -----------------------------------------------------------------
      assert false report "*** TEST IS FINISHED ***" severity failure;
      wait for 1 ns;    -- required so compiler doesn't complain!
      -----------------------------------------------------------------

   end process test;

end ks8695px_tst1_hdl;