1 # 1 "crt0.S" 2 # 1 "" 1 .global main // int main(void) 0 0 2 /* 3 * Some defines for the program status registers 4 */ 5 ARM_MODE_USER = 0x10 /* Normal User Mode */ 6 ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */ 7 ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */ 8 ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */ 9 ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */ 10 ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */ 11 ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */ 12 ARM_MODE_MASK = 0x1F 13 14 I_BIT = 0x80 /* disable IRQ when I bit is set */ 15 F_BIT = 0x40 /* disable IRQ when I bit is set */ 16 17 .text 18 .code 32 19 .align 2 20 .func _boot 21 _boot: 22 23 // Runtime Interrupt Vectors 24 // ------------------------- 25 Vectors: 26 0000 FEFFFFEA b _start // reset - _start 27 0004 14F09FE5 ldr pc, _undf 28 0008 14F09FE5 ldr pc, _swi 29 000c 14F09FE5 ldr pc, _pabt 30 0010 14F09FE5 ldr pc, _dabt 31 0014 0000A0E1 nop 32 0018 10F09FE5 ldr pc, _irq 33 001c 10F09FE5 ldr pc, _fiq 34 35 // Use this group for development 36 0020 38000000 _undf: .word __undf // undefined 37 0024 3C000000 _swi: .word __swi // SWI 38 0028 40000000 _pabt: .word __pabt // program abort 39 002c 44000000 _dabt: .word __dabt // data abort 40 0030 4C000000 _irq: .word __irq // IRQ 41 0034 48000000 _fiq: .word __fiq // FIQ 42 43 0038 FEFFFFEA __undf: b . // undefined 44 003c FEFFFFEA __swi: b . // SWI 45 0040 FEFFFFEA __pabt: b . // program abort 46 0044 FEFFFFEA __dabt: b . // data abort 47 0048 FEFFFFEA __fiq: b . // FIQ 48 004c FEFFFFEA __irq: b . // enter InterruptHandler 49 50 52 .endfunc 53 54 55 // Setup the operating mode & stack. 56 // --------------------------------- 57 .global _start 58 .func _start 59 60 _start: 61 62 //***************************************************************************** 63 // Disable MMU and caches 64 //*****************************************************************************/ 65 0050 0000A0E3 mov r0, #0 66 0054 170F07EE mcr p15, 0, r0, c7, c7, 0 // Invalidate ICache and DCache 67 0058 9A0F07EE mcr p15, 0, r0, c7, c10, 4 // Drain write buffer 68 005c 170F08EE mcr p15, 0, r0, c8, c7, 0 // Invalidate I & D TLBs 69 0060 100F11EE mrc p15, 0, r0, c1, c0, 0 // Read MMU control register 70 0064 010AC0E3 bic r0, r0, #0x00001000 // Disable ICache 71 0068 0700C0E3 bic r0, r0, #0x00000007 // Disable DCache, MMU and alignment fault 72 #ifdef __BIG_ENDIAN 73 orr r0, r0, #0x00000080 // Set B bit 74 #else 75 006c 8000C0E3 bic r0, r0, #0x00000080 // Clear B bit 76 #endif 77 0070 100F01EE mcr p15, 0, r0, c1, c0, 0 // Write MMU control register 78 79 80 // Initialize Interrupt System 81 // - Set stack location for each mode 82 // - Leave in System Mode with Interrupts Disabled 83 0074 DBF021E3 msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */ 84 0078 80D09FE5 ldr sp, =__stack_und_end 85 86 007c D7F021E3 msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */ 87 0080 7CD09FE5 ldr sp, =__stack_abt_end 88 89 0084 D1F021E3 msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */ 90 0088 78D09FE5 ldr sp, =__stack_fiq_end 91 92 008c D2F021E3 msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */ 93 0090 74D09FE5 ldr sp, =__stack_irq_end 94 95 0094 D3F021E3 msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */ 96 0098 70D09FE5 ldr sp, =__stack_svc_end 97 98 // Copy initialized data to its execution address in RAM 99 // ----------------------------------------------------- 100 #ifdef ROM_RUN 101 ldr r1,=_etext // -> ROM data start 102 ldr r2,=_data // -> data start 103 ldr r3,=_edata // -> end of data 104 1: cmp r2,r3 // check if data to move 105 ldrlo r0,[r1],#4 // copy it 106 strlo r0,[r2],#4 107 blo 1b // loop until done 108 #endif 109 // Clear .bss 110 // ---------- 111 009c 0000A0E3 mov r0,#0 // get a zero 112 00a0 6C109FE5 ldr r1,=__bss_start__ // -> bss start 113 00a4 6C209FE5 ldr r2,=__bss_end__ // -> bss end 114 00a8 020051E1 2: cmp r1,r2 // check if data to clear 115 00ac 04008134 strlo r0,[r1],#4 // clear 4 bytes 116 00b0 FCFFFF3A blo 2b // loop until done 117 118 00b4 60009FE5 ldr r0, =__ctors_start__ 119 00b8 60109FE5 ldr r1, =__ctors_end__ 120 ctor_loop: 121 00bc 010050E1 cmp r0, r1 122 00c0 0500000A beq ctor_end 123 00c4 042090E4 ldr r2, [r0], #4 124 00c8 03002DE9 stmfd sp!, {r0-r1} 125 00cc 0FE0A0E1 mov lr, pc 126 00d0 02F0A0E1 mov pc, r2 127 00d4 0300BDE8 ldm sp!, {r0-r1} 128 00d8 F7FFFFEA b ctor_loop 129 ctor_end: 130 131 // Call main program: main(0) 132 // -------------------------- 133 00dc 0000A0E3 mov r0,#0 // no arguments (argc = 0) 134 00e0 0010A0E1 mov r1,r0 135 00e4 0020A0E1 mov r2,r0 136 00e8 00B0A0E1 mov fp,r0 // null frame pointer 137 00ec 0070A0E1 mov r7,r0 // null frame pointer for thumb 138 00f0 2CA09FE5 ldr r10,=main 139 00f4 0FE0A0E1 mov lr,pc 140 00f8 1AFF2FE1 bx r10 // enter main() 141 142 /* "global object"-dtors are never called and it should not be 143 needed since there is no OS to exit to. */ 144 145 .endfunc 146 147 .global _reset 148 .func _reset 149 _reset: 150 00fc FEFFFFEA b . // loop until reset 151 152 .endfunc 153 154 0100 00000000 .end 154 00000000 154 00000000 154 00000000 154 00000000 DEFINED SYMBOLS *ABS*:00000000 crt0.S crt0.S:5 *ABS*:00000010 ARM_MODE_USER crt0.S:6 *ABS*:00000011 ARM_MODE_FIQ crt0.S:7 *ABS*:00000012 ARM_MODE_IRQ crt0.S:8 *ABS*:00000013 ARM_MODE_SVC crt0.S:9 *ABS*:00000017 ARM_MODE_ABORT crt0.S:10 *ABS*:0000001b ARM_MODE_UNDEF crt0.S:11 *ABS*:0000001f ARM_MODE_SYS crt0.S:12 *ABS*:0000001f ARM_MODE_MASK crt0.S:14 *ABS*:00000080 I_BIT crt0.S:15 *ABS*:00000040 F_BIT crt0.S:18 .text:00000000 $a crt0.S:21 .text:00000000 _boot crt0.S:25 .text:00000000 Vectors crt0.S:60 .text:00000050 _start crt0.S:36 .text:00000020 _undf crt0.S:37 .text:00000024 _swi crt0.S:38 .text:00000028 _pabt crt0.S:39 .text:0000002c _dabt crt0.S:40 .text:00000030 _irq crt0.S:41 .text:00000034 _fiq crt0.S:36 .text:00000020 $d crt0.S:43 .text:00000038 __undf crt0.S:44 .text:0000003c __swi crt0.S:45 .text:00000040 __pabt crt0.S:46 .text:00000044 __dabt crt0.S:48 .text:0000004c __irq crt0.S:47 .text:00000048 __fiq crt0.S:43 .text:00000038 $a crt0.S:120 .text:000000bc ctor_loop crt0.S:129 .text:000000dc ctor_end crt0.S:149 .text:000000fc _reset crt0.S:154 .text:00000100 $d UNDEFINED SYMBOLS main __stack_und_end __stack_abt_end __stack_fiq_end __stack_irq_end __stack_svc_end __bss_start__ __bss_end__ __ctors_start__ __ctors_end__