#ifndef __INTERRUPT_REGISTERS_H__
#define __INTERRUPT_REGISTERS_H__

#include <stdint.h>
#include "platform.h"

namespace INTERRUPT
{
	static const uint32_t BaseAddress = (KS8695PX_IO_BASE + KS8695PX_INTERRUPT_OFFSET);
	
	enum Registers
	{
		INTMC	= 0x0000,		// 0x00	- Interrupt Mode Control Register (rw)
		INTEN	= 0x0004,		// 0x04 - Interrupt Enable Register (rw)
		INTST	= 0x0008,		// 0x08 - Interrupt Status Register	(rw)
		INTPW	= 0x000C,		// 0x0C - Interrupt Priority Register for WAN DMA (rw)
		INTPL	= 0x0014,		// 0x14 - Interrupt Priority Register for LAN DMA (rw)		
		INTPT	= 0x0018,		// 0x18 - Interrupt Priority Register for the Timer (rw)
		INTPU	= 0x001C,		// 0x1C - Interrupt Priority Register for the UART (rw)		
		INTPE	= 0x0020,		// 0x20 - Interrupt Priority Register for external interrupts (rw)	
		INTPC	= 0x0024,		// 0x24 - Interrupt Priority Register for the comm channel (rw)		
		INTBE	= 0x0028,		// 0x28 - Interrupt Priority Register for bus errors (rw)
		INTMS	= 0x002C,		// 0x2C - Interrupt Mask Status Register 
		INTHPF	= 0x0030,		// 0x30 - Interrupt Pending Highest Priority Register for FIQ (rw)
		INTHPI	= 0x0034		// 0x34 - Interrupt Pending Highest Priority Register for IRQ (rw)
	};
	
	inline volatile uint32_t *regAddress(Registers reg)
	{
	    return reinterpret_cast<volatile uint32_t*>(BaseAddress + reg);
	}
	
	inline uint32_t regRead(Registers reg)
	{
	    return *regAddress(reg);
	}
	
	inline void regWrite(Registers reg, uint32_t value)
	{
	    *regAddress(reg) = value;
	}

}

#endif // __INTERRUPT_REGISTER_H__