1              		.file	"timer.cpp"
   9              	.Ltext0:
  10              		.section	.text._ZN6TIMERS10regAddressENS_9RegistersE,"axG",%progbits,_ZN6TIMERS10regAddressENS_9Re
  11              		.align	2
  12              		.weak	_ZN6TIMERS10regAddressENS_9RegistersE
  14              	_ZN6TIMERS10regAddressENS_9RegistersE:
  15              	.LFB2:
  16              		.file 1 "timer_registers.h"
   1:timer_registers.h **** #ifndef __TIMER_REGISTERS_H__
   2:timer_registers.h **** #define __TIMER_REGISTERS_H__
   3:timer_registers.h **** 
   4:timer_registers.h **** #include <stdint.h>
   5:timer_registers.h **** #include "platform.h"
   6:timer_registers.h **** 
   7:timer_registers.h **** namespace TIMERS
   8:timer_registers.h **** {
   9:timer_registers.h **** 	static const uint32_t BaseAddress = (KS8695PX_IO_BASE + KS8695PX_TIMER_OFFSET);
  10:timer_registers.h **** 	
  11:timer_registers.h **** 	enum Registers
  12:timer_registers.h **** 	{
  13:timer_registers.h **** 		TMCON	= 0x0000,	// 0x00	- Timer Control Register (rw)
  14:timer_registers.h **** 		T1TC	= 0x0004,	// 0x04	- Timer 1 Timeout Count Register (rw)
  15:timer_registers.h **** 		T0TC	= 0x0008,	// 0x08	- Timer 0 Timeout Count Register (rw)
  16:timer_registers.h **** 		T1PD	= 0x000C,	// 0x0c	- Timer 1 Pulse Count Register (rw)
  17:timer_registers.h **** 		T0PD	= 0x0010	// 0x10	- Timer 0 Pulse Count Register (rw)
  18:timer_registers.h **** 	};
  19:timer_registers.h **** 	
  20:timer_registers.h **** 	inline volatile uint32_t *regAddress(Registers reg)
  17              	args = 0, pretend = 0, frame = 4
  18              		@ frame_needed = 1, uses_anonymous_args = 0
  19              		mov	ip, sp
  20 0000 0DC0A0E1 	.LCFI0:
  21              		stmfd	sp!, {fp, ip, lr, pc}
  22 0004 00D82DE9 	.LCFI1:
  23              		sub	fp, ip, #4
  24 0008 04B04CE2 	.LCFI2:
  25              		sub	sp, sp, #4
  26 000c 04D04DE2 	.LCFI3:
  27              		str	r0, [fp, #-16]
  28 0010 10000BE5 		.loc 1 22 0
  21:timer_registers.h **** 	{
  22:timer_registers.h **** 	    return reinterpret_cast<volatile uint32_t*>(BaseAddress + reg);
  29              	, #-16]
  30 0014 10301BE5 		add	r3, r3, #66846720
  31 0018 FF3783E2 		add	r3, r3, #254976
  32 001c F93B83E2 		.loc 1 23 0
  23:timer_registers.h **** 	}
  33              		r0, r3
  34 0020 0300A0E1 		ldmfd	sp, {r3, fp, sp, pc}
  35 0024 08A89DE8 	.LFE2:
  37              		.section	.text._ZN6TIMERS7regReadENS_9RegistersE,"axG",%progbits,_ZN6TIMERS7regReadENS_9RegistersE
  38              		.align	2
  39              		.weak	_ZN6TIMERS7regReadENS_9RegistersE
  41              	_ZN6TIMERS7regReadENS_9RegistersE:
  42              	.LFB3:
  43              		.loc 1 25 0
  24:timer_registers.h **** 	
  25:timer_registers.h **** 	inline uint32_t regRead(Registers reg)
  44              	, pretend = 0, frame = 4
  45              		@ frame_needed = 1, uses_anonymous_args = 0
  46              		mov	ip, sp
  47 0000 0DC0A0E1 	.LCFI4:
  48              		stmfd	sp!, {fp, ip, lr, pc}
  49 0004 00D82DE9 	.LCFI5:
  50              		sub	fp, ip, #4
  51 0008 04B04CE2 	.LCFI6:
  52              		sub	sp, sp, #4
  53 000c 04D04DE2 	.LCFI7:
  54              		str	r0, [fp, #-16]
  55 0010 10000BE5 		.loc 1 27 0
  26:timer_registers.h **** 	{
  27:timer_registers.h **** 	    return *regAddress(reg);
  56              	, #-16]
  57 0014 10001BE5 		ldr	r3, .L5
  58 0018 14309FE5 		mov	lr, pc
  59 001c 0FE0A0E1 		bx	r3
  60 0020 13FF2FE1 		mov	r3, r0
  61 0024 0030A0E1 		ldr	r3, [r3, #0]
  62 0028 003093E5 		.loc 1 28 0
  28:timer_registers.h **** 	}
  63              	, r3
  64 002c 0300A0E1 		ldmfd	sp, {r3, fp, sp, pc}
  65 0030 08A89DE8 	.L6:
  66              		.align	2
  67              	.L5:
  68              		.word	_ZN6TIMERS10regAddressENS_9RegistersE
  69 0034 00000000 	.LFE3:
  71              		.section	.text._ZN6TIMERS8regWriteENS_9RegistersEm,"axG",%progbits,_ZN6TIMERS8regWriteENS_9Registe
  72              		.align	2
  73              		.weak	_ZN6TIMERS8regWriteENS_9RegistersEm
  75              	_ZN6TIMERS8regWriteENS_9RegistersEm:
  76              	.LFB4:
  77              		.loc 1 30 0
  29:timer_registers.h **** 	
  30:timer_registers.h **** 	inline void regWrite(Registers reg, uint32_t value)
  78              	etend = 0, frame = 8
  79              		@ frame_needed = 1, uses_anonymous_args = 0
  80              		mov	ip, sp
  81 0000 0DC0A0E1 	.LCFI8:
  82              		stmfd	sp!, {fp, ip, lr, pc}
  83 0004 00D82DE9 	.LCFI9:
  84              		sub	fp, ip, #4
  85 0008 04B04CE2 	.LCFI10:
  86              		sub	sp, sp, #8
  87 000c 08D04DE2 	.LCFI11:
  88              		str	r0, [fp, #-16]
  89 0010 10000BE5 		str	r1, [fp, #-20]
  90 0014 14100BE5 		.loc 1 32 0
  31:timer_registers.h **** 	{
  32:timer_registers.h **** 	    *regAddress(reg) = value;
  91              	 #-16]
  92 0018 10001BE5 		ldr	r3, .L9
  93 001c 18309FE5 		mov	lr, pc
  94 0020 0FE0A0E1 		bx	r3
  95 0024 13FF2FE1 		mov	r2, r0
  96 0028 0020A0E1 		ldr	r3, [fp, #-20]
  97 002c 14301BE5 		str	r3, [r2, #0]
  98 0030 003082E5 		.loc 1 33 0
  33:timer_registers.h **** 	}
  99              	 fp, #12
 100 0034 0CD04BE2 		ldmfd	sp, {fp, sp, pc}
 101 0038 00A89DE8 	.L10:
 102              		.align	2
 103              	.L9:
 104              		.word	_ZN6TIMERS10regAddressENS_9RegistersE
 105 003c 00000000 	.LFE4:
 107              		.section	.text._ZN9INTERRUPT10regAddressENS_9RegistersE,"axG",%progbits,_ZN9INTERRUPT10regAddressE
 108              		.align	2
 109              		.weak	_ZN9INTERRUPT10regAddressENS_9RegistersE
 111              	_ZN9INTERRUPT10regAddressENS_9RegistersE:
 112              	.LFB7:
 113              		.file 2 "interrupt_registers.h"
 114              		.loc 2 28 0
   1:interrupt_registers.h **** #ifndef __INTERRUPT_REGISTERS_H__
   2:interrupt_registers.h **** #define __INTERRUPT_REGISTERS_H__
   3:interrupt_registers.h **** 
   4:interrupt_registers.h **** #include <stdint.h>
   5:interrupt_registers.h **** #include "platform.h"
   6:interrupt_registers.h **** 
   7:interrupt_registers.h **** namespace INTERRUPT
   8:interrupt_registers.h **** {
   9:interrupt_registers.h **** 	static const uint32_t BaseAddress = (KS8695PX_IO_BASE + KS8695PX_INTERRUPT_OFFSET);
  10:interrupt_registers.h **** 	
  11:interrupt_registers.h **** 	enum Registers
  12:interrupt_registers.h **** 	{
  13:interrupt_registers.h **** 		INTMC	= 0x0000,		// 0x00	- Interrupt Mode Control Register (rw)
  14:interrupt_registers.h **** 		INTEN	= 0x0004,		// 0x04 - Interrupt Enable Register (rw)
  15:interrupt_registers.h **** 		INTST	= 0x0008,		// 0x08 - Interrupt Status Register	(rw)
  16:interrupt_registers.h **** 		INTPW	= 0x000C,		// 0x0C - Interrupt Priority Register for WAN DMA (rw)
  17:interrupt_registers.h **** 		INTPL	= 0x0014,		// 0x14 - Interrupt Priority Register for LAN DMA (rw)		
  18:interrupt_registers.h **** 		INTPT	= 0x0018,		// 0x18 - Interrupt Priority Register for the Timer (rw)
  19:interrupt_registers.h **** 		INTPU	= 0x001C,		// 0x1C - Interrupt Priority Register for the UART (rw)		
  20:interrupt_registers.h **** 		INTPE	= 0x0020,		// 0x20 - Interrupt Priority Register for external interrupts (rw)	
  21:interrupt_registers.h **** 		INTPC	= 0x0024,		// 0x24 - Interrupt Priority Register for the comm channel (rw)		
  22:interrupt_registers.h **** 		INTBE	= 0x0028,		// 0x28 - Interrupt Priority Register for bus errors (rw)
  23:interrupt_registers.h **** 		INTMS	= 0x002C,		// 0x2C - Interrupt Mask Status Register 
  24:interrupt_registers.h **** 		INTHPF	= 0x0030,		// 0x30 - Interrupt Pending Highest Priority Register for FIQ (rw)
  25:interrupt_registers.h **** 		INTHPI	= 0x0034		// 0x34 - Interrupt Pending Highest Priority Register for IRQ (rw)
  26:interrupt_registers.h **** 	};
  27:interrupt_registers.h **** 	
  28:interrupt_registers.h **** 	inline volatile uint32_t *regAddress(Registers reg)
 115              	tend = 0, frame = 4
 116              		@ frame_needed = 1, uses_anonymous_args = 0
 117              		mov	ip, sp
 118 0000 0DC0A0E1 	.LCFI12:
 119              		stmfd	sp!, {fp, ip, lr, pc}
 120 0004 00D82DE9 	.LCFI13:
 121              		sub	fp, ip, #4
 122 0008 04B04CE2 	.LCFI14:
 123              		sub	sp, sp, #4
 124 000c 04D04DE2 	.LCFI15:
 125              		str	r0, [fp, #-16]
 126 0010 10000BE5 		.loc 2 30 0
  29:interrupt_registers.h **** 	{
  30:interrupt_registers.h **** 	    return reinterpret_cast<volatile uint32_t*>(BaseAddress + reg);
 127              	, #-16]
 128 0014 10301BE5 		mov	r2, r3
 129 0018 0320A0E1 		ldr	r3, .L13
 130 001c 08309FE5 		add	r3, r2, r3
 131 0020 033082E0 		.loc 2 31 0
  31:interrupt_registers.h **** 	}
 132              	r0, r3
 133 0024 0300A0E1 		ldmfd	sp, {r3, fp, sp, pc}
 134 0028 08A89DE8 	.L14:
 135              		.align	2
 136              	.L13:
 137              		.word	67101184
 138 002c 00E2FF03 	.LFE7:
 140              		.section	.text._ZN9INTERRUPT7regReadENS_9RegistersE,"axG",%progbits,_ZN9INTERRUPT7regReadENS_9Regi
 141              		.align	2
 142              		.weak	_ZN9INTERRUPT7regReadENS_9RegistersE
 144              	_ZN9INTERRUPT7regReadENS_9RegistersE:
 145              	.LFB8:
 146              		.loc 2 33 0
  32:interrupt_registers.h **** 	
  33:interrupt_registers.h **** 	inline uint32_t regRead(Registers reg)
 147              	etend = 0, frame = 4
 148              		@ frame_needed = 1, uses_anonymous_args = 0
 149              		mov	ip, sp
 150 0000 0DC0A0E1 	.LCFI16:
 151              		stmfd	sp!, {fp, ip, lr, pc}
 152 0004 00D82DE9 	.LCFI17:
 153              		sub	fp, ip, #4
 154 0008 04B04CE2 	.LCFI18:
 155              		sub	sp, sp, #4
 156 000c 04D04DE2 	.LCFI19:
 157              		str	r0, [fp, #-16]
 158 0010 10000BE5 		.loc 2 35 0
  34:interrupt_registers.h **** 	{
  35:interrupt_registers.h **** 	    return *regAddress(reg);
 159              	, #-16]
 160 0014 10001BE5 		ldr	r3, .L17
 161 0018 14309FE5 		mov	lr, pc
 162 001c 0FE0A0E1 		bx	r3
 163 0020 13FF2FE1 		mov	r3, r0
 164 0024 0030A0E1 		ldr	r3, [r3, #0]
 165 0028 003093E5 		.loc 2 36 0
  36:interrupt_registers.h **** 	}
 166              	, r3
 167 002c 0300A0E1 		ldmfd	sp, {r3, fp, sp, pc}
 168 0030 08A89DE8 	.L18:
 169              		.align	2
 170              	.L17:
 171              		.word	_ZN9INTERRUPT10regAddressENS_9RegistersE
 172 0034 00000000 	.LFE8:
 174              		.section	.text._ZN9INTERRUPT8regWriteENS_9RegistersEm,"axG",%progbits,_ZN9INTERRUPT8regWriteENS_9R
 175              		.align	2
 176              		.weak	_ZN9INTERRUPT8regWriteENS_9RegistersEm
 178              	_ZN9INTERRUPT8regWriteENS_9RegistersEm:
 179              	.LFB9:
 180              		.loc 2 38 0
  37:interrupt_registers.h **** 	
  38:interrupt_registers.h **** 	inline void regWrite(Registers reg, uint32_t value)
 181              	etend = 0, frame = 8
 182              		@ frame_needed = 1, uses_anonymous_args = 0
 183              		mov	ip, sp
 184 0000 0DC0A0E1 	.LCFI20:
 185              		stmfd	sp!, {fp, ip, lr, pc}
 186 0004 00D82DE9 	.LCFI21:
 187              		sub	fp, ip, #4
 188 0008 04B04CE2 	.LCFI22:
 189              		sub	sp, sp, #8
 190 000c 08D04DE2 	.LCFI23:
 191              		str	r0, [fp, #-16]
 192 0010 10000BE5 		str	r1, [fp, #-20]
 193 0014 14100BE5 		.loc 2 40 0
  39:interrupt_registers.h **** 	{
  40:interrupt_registers.h **** 	    *regAddress(reg) = value;
 194              	 #-16]
 195 0018 10001BE5 		ldr	r3, .L21
 196 001c 18309FE5 		mov	lr, pc
 197 0020 0FE0A0E1 		bx	r3
 198 0024 13FF2FE1 		mov	r2, r0
 199 0028 0020A0E1 		ldr	r3, [fp, #-20]
 200 002c 14301BE5 		str	r3, [r2, #0]
 201 0030 003082E5 		.loc 2 41 0
  41:interrupt_registers.h **** 	}
 202              	 fp, #12
 203 0034 0CD04BE2 		ldmfd	sp, {fp, sp, pc}
 204 0038 00A89DE8 	.L22:
 205              		.align	2
 206              	.L21:
 207              		.word	_ZN9INTERRUPT10regAddressENS_9RegistersE
 208 003c 00000000 	.LFE9:
 210              		.text
 211              		.align	2
 212              		.global	_ZN5Timer9ConfigureEmm
 214              	_ZN5Timer9ConfigureEmm:
 215              	.LFB11:
 216              		.file 3 "timer.cpp"
 217              		.loc 3 15 0
   1:timer.cpp     **** #include "timer.h"
   2:timer.cpp     **** #include "timer_registers.h"
   3:timer.cpp     **** #include "interrupt.h"
   4:timer.cpp     **** #include "interrupt_registers.h"
   5:timer.cpp     **** 
   6:timer.cpp     **** const uint32_t Timer_Enable				= (1 << 1);
   7:timer.cpp     **** 
   8:timer.cpp     **** void Timer::Initialize (void)
   9:timer.cpp     **** {
  10:timer.cpp     **** 	Disable();
  11:timer.cpp     **** 	regWrite(TIMERS::T1TC, 1);
  12:timer.cpp     **** 	regWrite(TIMERS::T1PD, 0);
  13:timer.cpp     **** }
  14:timer.cpp     **** 
  15:timer.cpp     **** void Timer::Configure(uint32_t periodInMicroSeconds, uint32_t tout0_HighTimeInMicroseconds)
 218              	tend = 0, frame = 16
 219              		@ frame_needed = 1, uses_anonymous_args = 0
 220              		mov	ip, sp
 221 0000 0DC0A0E1 	.LCFI24:
 222              		stmfd	sp!, {fp, ip, lr, pc}
 223 0004 00D82DE9 	.LCFI25:
 224              		sub	fp, ip, #4
 225 0008 04B04CE2 	.LCFI26:
 226              		sub	sp, sp, #16
 227 000c 10D04DE2 	.LCFI27:
 228              		str	r0, [fp, #-24]
 229 0010 18000BE5 		str	r1, [fp, #-28]
 230 0014 1C100BE5 	.LBB2:
 231              		.loc 3 17 0
  16:timer.cpp     **** {
  17:timer.cpp     **** 	uint32_t periodInTicks 		= (periodInMicroSeconds * TicksPerMicrosecond);
 232              	#-24]
 233 0018 18201BE5 		mov	r3, r2
 234 001c 0230A0E1 		mov	r3, r3, asl #2
 235 0020 0331A0E1 		add	r3, r3, r2
 236 0024 023083E0 		mov	r2, r3, asl #2
 237 0028 0321A0E1 		add	r3, r3, r2
 238 002c 023083E0 		str	r3, [fp, #-20]
 239 0030 14300BE5 		.loc 3 18 0
  18:timer.cpp     **** 	uint32_t highTimeInTicks	= (tout0_HighTimeInMicroseconds * TicksPerMicrosecond);
 240              	 [fp, #-28]
 241 0034 1C201BE5 		mov	r3, r2
 242 0038 0230A0E1 		mov	r3, r3, asl #2
 243 003c 0331A0E1 		add	r3, r3, r2
 244 0040 023083E0 		mov	r2, r3, asl #2
 245 0044 0321A0E1 		add	r3, r3, r2
 246 0048 023083E0 		str	r3, [fp, #-16]
 247 004c 10300BE5 		.loc 3 20 0
  19:timer.cpp     **** 	
  20:timer.cpp     **** 	regWrite(TIMERS::T1TC, (periodInTicks - highTimeInTicks));
 248              	 [fp, #-20]
 249 0050 14201BE5 		ldr	r3, [fp, #-16]
 250 0054 10301BE5 		rsb	r3, r3, r2
 251 0058 023063E0 		mov	r0, #4
 252 005c 0400A0E3 		mov	r1, r3
 253 0060 0310A0E1 		ldr	r3, .L25
 254 0064 20309FE5 		mov	lr, pc
 255 0068 0FE0A0E1 		bx	r3
 256 006c 13FF2FE1 		.loc 3 21 0
  21:timer.cpp     **** 	regWrite(TIMERS::T1PD, highTimeInTicks);
 257              	#12
 258 0070 0C00A0E3 		ldr	r1, [fp, #-16]
 259 0074 10101BE5 		ldr	r3, .L25
 260 0078 0C309FE5 		mov	lr, pc
 261 007c 0FE0A0E1 		bx	r3
 262 0080 13FF2FE1 	.LBE2:
 263              		.loc 3 22 0
  22:timer.cpp     **** }
 264              	, fp, #12
 265 0084 0CD04BE2 		ldmfd	sp, {fp, sp, pc}
 266 0088 00A89DE8 	.L26:
 267              		.align	2
 268              	.L25:
 269              		.word	_ZN6TIMERS8regWriteENS_9RegistersEm
 270 008c 00000000 	.LFE11:
 272              		.align	2
 273              		.global	_ZN5Timer6EnableEv
 275              	_ZN5Timer6EnableEv:
 276              	.LFB12:
 277              		.loc 3 24 0
  23:timer.cpp     **** 
  24:timer.cpp     **** void Timer::Enable(void)
 278              	retend = 0, frame = 0
 279              		@ frame_needed = 1, uses_anonymous_args = 0
 280              		mov	ip, sp
 281 0090 0DC0A0E1 	.LCFI28:
 282              		stmfd	sp!, {fp, ip, lr, pc}
 283 0094 00D82DE9 	.LCFI29:
 284              		sub	fp, ip, #4
 285 0098 04B04CE2 	.LCFI30:
 286              		.loc 3 26 0
  25:timer.cpp     **** {
  26:timer.cpp     **** 	regWrite(TIMERS::TMCON, (regRead(TIMERS::TMCON) |  Timer_Enable));
 287              	#0
 288 009c 0000A0E3 		ldr	r3, .L29
 289 00a0 24309FE5 		mov	lr, pc
 290 00a4 0FE0A0E1 		bx	r3
 291 00a8 13FF2FE1 		mov	r3, r0
 292 00ac 0030A0E1 		orr	r3, r3, #2
 293 00b0 023083E3 		mov	r0, #0
 294 00b4 0000A0E3 		mov	r1, r3
 295 00b8 0310A0E1 		ldr	r3, .L29+4
 296 00bc 0C309FE5 		mov	lr, pc
 297 00c0 0FE0A0E1 		bx	r3
 298 00c4 13FF2FE1 		.loc 3 27 0
  27:timer.cpp     **** }
 299              	fp, sp, pc}
 300 00c8 00A89DE8 	.L30:
 301              		.align	2
 302              	.L29:
 303              		.word	_ZN6TIMERS7regReadENS_9RegistersE
 304 00cc 00000000 		.word	_ZN6TIMERS8regWriteENS_9RegistersEm
 305 00d0 00000000 	.LFE12:
 307              		.align	2
 308              		.global	_ZN5Timer7DisableEv
 310              	_ZN5Timer7DisableEv:
 311              	.LFB13:
 312              		.loc 3 29 0
  28:timer.cpp     **** 		
  29:timer.cpp     **** void Timer::Disable(void)
 313              	retend = 0, frame = 0
 314              		@ frame_needed = 1, uses_anonymous_args = 0
 315              		mov	ip, sp
 316 00d4 0DC0A0E1 	.LCFI31:
 317              		stmfd	sp!, {fp, ip, lr, pc}
 318 00d8 00D82DE9 	.LCFI32:
 319              		sub	fp, ip, #4
 320 00dc 04B04CE2 	.LCFI33:
 321              		.loc 3 31 0
  30:timer.cpp     **** {
  31:timer.cpp     **** 	regWrite(TIMERS::TMCON, (regRead(TIMERS::TMCON) & ~Timer_Enable));
 322              	#0
 323 00e0 0000A0E3 		ldr	r3, .L33
 324 00e4 24309FE5 		mov	lr, pc
 325 00e8 0FE0A0E1 		bx	r3
 326 00ec 13FF2FE1 		mov	r3, r0
 327 00f0 0030A0E1 		bic	r3, r3, #2
 328 00f4 0230C3E3 		mov	r0, #0
 329 00f8 0000A0E3 		mov	r1, r3
 330 00fc 0310A0E1 		ldr	r3, .L33+4
 331 0100 0C309FE5 		mov	lr, pc
 332 0104 0FE0A0E1 		bx	r3
 333 0108 13FF2FE1 		.loc 3 32 0
  32:timer.cpp     **** }
 334              	fp, sp, pc}
 335 010c 00A89DE8 	.L34:
 336              		.align	2
 337              	.L33:
 338              		.word	_ZN6TIMERS7regReadENS_9RegistersE
 339 0110 00000000 		.word	_ZN6TIMERS8regWriteENS_9RegistersEm
 340 0114 00000000 	.LFE13:
 342              		.align	2
 343              		.global	_ZN5Timer10InitializeEv
 345              	_ZN5Timer10InitializeEv:
 346              	.LFB10:
 347              		.loc 3 8 0
 348              		@ args = 0, pretend = 0, frame = 0
 349              		@ frame_needed = 1, uses_anonymous_args = 0
 350              		mov	ip, sp
 351 0118 0DC0A0E1 	.LCFI34:
 352              		stmfd	sp!, {fp, ip, lr, pc}
 353 011c 00D82DE9 	.LCFI35:
 354              		sub	fp, ip, #4
 355 0120 04B04CE2 	.LCFI36:
 356              		.loc 3 10 0
 357              		bl	_ZN5Timer7DisableEv
 358 0124 FEFFFFEB 		.loc 3 11 0
 359              		mov	r0, #4
 360 0128 0400A0E3 		mov	r1, #1
 361 012c 0110A0E3 		ldr	r3, .L37
 362 0130 1C309FE5 		mov	lr, pc
 363 0134 0FE0A0E1 		bx	r3
 364 0138 13FF2FE1 		.loc 3 12 0
 365              		mov	r0, #12
 366 013c 0C00A0E3 		mov	r1, #0
 367 0140 0010A0E3 		ldr	r3, .L37
 368 0144 08309FE5 		mov	lr, pc
 369 0148 0FE0A0E1 		bx	r3
 370 014c 13FF2FE1 		.loc 3 13 0
 371              		ldmfd	sp, {fp, sp, pc}
 372 0150 00A89DE8 	.L38:
 373              		.align	2
 374              	.L37:
 375              		.word	_ZN6TIMERS8regWriteENS_9RegistersEm
 376 0154 00000000 	.LFE10:
 378              		.align	2
 379              		.global	_ZN5Timer10PolledWaitEm
 381              	_ZN5Timer10PolledWaitEm:
 382              	.LFB14:
 383              		.loc 3 34 0
  33:timer.cpp     **** 
  34:timer.cpp     **** void Timer::PolledWait(uint32_t waitForMicroseconds)
 384              	d = 1, uses_anonymous_args = 0
 385              		mov	ip, sp
 386              	.LCFI37:
 387 0158 0DC0A0E1 		stmfd	sp!, {fp, ip, lr, pc}
 388              	.LCFI38:
 389 015c 00D82DE9 		sub	fp, ip, #4
 390              	.LCFI39:
 391 0160 04B04CE2 		sub	sp, sp, #8
 392              	.LCFI40:
 393 0164 08D04DE2 		str	r0, [fp, #-20]
 394              	.LBB3:
 395 0168 14000BE5 		.loc 3 37 0
 396              		bl	_ZN5Timer10InitializeEv
  35:timer.cpp     **** {
  36:timer.cpp     **** 	bool done;
  37:timer.cpp     **** 	Initialize();
 397              		ldr	r0, [fp, #-20]
 398 016c FEFFFFEB 		mov	r1, #10
  38:timer.cpp     **** 	Configure(waitForMicroseconds, 10);
 399              	l	_ZN5Timer9ConfigureEmm
 400 0170 14001BE5 		.loc 3 39 0
 401 0174 0A10A0E3 		mov	r0, #8
 402 0178 FEFFFFEB 		mov	r1, #128
  39:timer.cpp     **** 	regWrite(INTERRUPT::INTST, (1 << Timer1));
 403              		r3, .L43
 404 017c 0800A0E3 		mov	lr, pc
 405 0180 8010A0E3 		bx	r3
 406 0184 4C309FE5 		.loc 3 40 0
 407 0188 0FE0A0E1 		bl	_ZN5Timer6EnableEv
 408 018c 13FF2FE1 	.L40:
  40:timer.cpp     **** 	Enable();	
 409              	3 42 0
 410 0190 FEFFFFEB 		mov	r0, #8
 411              		ldr	r3, .L43+4
  41:timer.cpp     ****     do 
  42:timer.cpp     ****     	done = (regRead(INTERRUPT::INTST) & (1 << Timer1)) ? true : false;
 412              	v	lr, pc
 413 0194 0800A0E3 		bx	r3
 414 0198 3C309FE5 		mov	r3, r0
 415 019c 0FE0A0E1 		and	r3, r3, #128
 416 01a0 13FF2FE1 		cmp	r3, #0
 417 01a4 0030A0E1 		moveq	r3, #0
 418 01a8 803003E2 		movne	r3, #1
 419 01ac 000053E3 		strb	r3, [fp, #-13]
 420 01b0 0030A003 		.loc 3 41 0
 421 01b4 0130A013 		ldrb	r3, [fp, #-13]
 422 01b8 0D304BE5 		eor	r3, r3, #1
 423              		and	r3, r3, #255
 424 01bc 0D305BE5 		cmp	r3, #0
 425 01c0 013023E2 		bne	.L40
 426 01c4 FF3003E2 	.LBE3:
 427 01c8 000053E3 		.loc 3 44 0
 428 01cc F0FFFF1A 		sub	sp, fp, #12
 429              		ldmfd	sp, {fp, sp, pc}
  43:timer.cpp     ****     while (!done);
  44:timer.cpp     **** }
 430              	43:
 431 01d0 0CD04BE2 		.word	_ZN9INTERRUPT8regWriteENS_9RegistersEm
 432 01d4 00A89DE8 		.word	_ZN9INTERRUPT7regReadENS_9RegistersE
 433              	.LFE14:
 435              		.section	.debug_frame,"",%progbits
 436 01d8 00000000 	.Lframe0:
 437 01dc 00000000 		.4byte	.LECIE0-.LSCIE0
 438              	.LSCIE0:
 439              		.4byte	0xffffffff
 735              		.4byte	.LCFI0
DEFINED SYMBOLS
                            *ABS*:00000000 timer.cpp
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:14     .text._ZN6TIMERS10regAddressENS_9RegistersE:00000000 _ZN6TIMERS10regAddressENS_9RegistersE
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:20     .text._ZN6TIMERS10regAddressENS_9RegistersE:00000000 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:42     .text._ZN6TIMERS7regReadENS_9RegistersE:00000000 _ZN6TIMERS7regReadENS_9RegistersE
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:47     .text._ZN6TIMERS7regReadENS_9RegistersE:00000000 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:69     .text._ZN6TIMERS7regReadENS_9RegistersE:00000034 $d
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:76     .text._ZN6TIMERS8regWriteENS_9RegistersEm:00000000 _ZN6TIMERS8regWriteENS_9RegistersEm
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:81     .text._ZN6TIMERS8regWriteENS_9RegistersEm:00000000 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:105    .text._ZN6TIMERS8regWriteENS_9RegistersEm:0000003c $d
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:112    .text._ZN9INTERRUPT10regAddressENS_9RegistersE:00000000 _ZN9INTERRUPT10regAddressENS_9RegistersE
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:118    .text._ZN9INTERRUPT10regAddressENS_9RegistersE:00000000 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:138    .text._ZN9INTERRUPT10regAddressENS_9RegistersE:0000002c $d
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:145    .text._ZN9INTERRUPT7regReadENS_9RegistersE:00000000 _ZN9INTERRUPT7regReadENS_9RegistersE
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:150    .text._ZN9INTERRUPT7regReadENS_9RegistersE:00000000 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:172    .text._ZN9INTERRUPT7regReadENS_9RegistersE:00000034 $d
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:179    .text._ZN9INTERRUPT8regWriteENS_9RegistersEm:00000000 _ZN9INTERRUPT8regWriteENS_9RegistersEm
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:184    .text._ZN9INTERRUPT8regWriteENS_9RegistersEm:00000000 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:208    .text._ZN9INTERRUPT8regWriteENS_9RegistersEm:0000003c $d
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:215    .text:00000000 _ZN5Timer9ConfigureEmm
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:221    .text:00000000 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:270    .text:0000008c $d
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:276    .text:00000090 _ZN5Timer6EnableEv
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:281    .text:00000090 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:304    .text:000000cc $d
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:311    .text:000000d4 _ZN5Timer7DisableEv
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:316    .text:000000d4 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:339    .text:00000110 $d
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:346    .text:00000118 _ZN5Timer10InitializeEv
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:351    .text:00000118 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:376    .text:00000154 $d
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:382    .text:00000158 _ZN5Timer10PolledWaitEm
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:387    .text:00000158 $a
C:\DOCUME~1\RAWA~1.LAG\LOCALS~1\Temp/ccsJgaaa.s:436    .text:000001d8 $d

NO UNDEFINED SYMBOLS