Protel Design System Design Rule Check
PCB File : \Taff\Protel\Me\CANbrickPCBTemplate.PcbDoc
Date     : 6/2/2003
Time     : 4:04:34 PM

Processing Rule : Clearance Constraint (Gap=13mil) (All),(All)
Rule Violations :0

Processing Rule : Width Constraint (Min=8mil) (Max=250mil) (Preferred=12mil) (All)
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=1mil) (Max=152mil) (All)
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0


Violations Detected : 0
Time Elapsed        : 00:00:01