Protel Design System Design Rule Check PCB File : \\Polarbear\docking\Schematics\CANbrick\CANbrick R2\CANbrickPCB.PcbDoc Date : 7/18/2003 Time : 3:54:39 PM WARNING: Split plane(s) intersect Keepout object(s) Internal Plane 1 Internal Plane 2 Processing Rule : Clearance Constraint (Gap=13mil) (All),(All) Violation between Track (795mil,575mil)(881.795mil,575mil) Top Layer and Pad Q1-7(881.795mil,575mil) Top Layer Violation between Track (1098.204mil,625mil)(1165mil,625mil) Top Layer and Pad Q1-3(1098.204mil,625mil) Top Layer Violation between Track (1200mil,660mil)(1200mil,740mil) Top Layer and Pad R3-1(1200mil,740mil) Top Layer Violation between Track (980mil,260mil)(980mil,430mil) Top Layer and Track (950mil,400mil)(980mil,430mil) Top Layer Violation between Via (980mil,430mil) Top Layer to Bottom Layer and Track (950mil,400mil)(980mil,430mil) Top Layer Violation between Track (980mil,260mil)(980mil,430mil) Top Layer and Track (800mil,400mil)(950mil,400mil) Top Layer Violation between Pad TP36-0(800mil,400mil) Multi-Layer and Track (800mil,400mil)(950mil,400mil) Top Layer Violation between Via (980mil,430mil) Top Layer to Bottom Layer and Track (800mil,400mil)(950mil,400mil) Top Layer Violation between Pad TP36-0(800mil,400mil) Multi-Layer and Track (795mil,405mil)(800mil,400mil) Top Layer Violation between Pad TP36-0(800mil,400mil) Multi-Layer and Track (795mil,405mil)(795mil,575mil) Top Layer Violation between Track (902mil,575mil)(902mil,625mil) Top Layer and Track (795mil,575mil)(881.795mil,575mil) Top Layer Violation between Pad TP41-0(1360mil,620mil) Multi-Layer and Track (1335mil,645mil)(1360mil,620mil) Top Layer Violation between Pad TP41-0(1360mil,620mil) Multi-Layer and Track (1335mil,645mil)(1335mil,740mil) Top Layer Rule Violations :13 Processing Rule : Width Constraint (Min=6mil) (Max=15mil) (Preferred=8mil) (All) Violation Track (950mil,400mil)(980mil,430mil) Top Layer Actual Width = 20mil Violation Track (800mil,400mil)(950mil,400mil) Top Layer Actual Width = 20mil Violation Track (795mil,405mil)(795mil,575mil) Top Layer Actual Width = 20mil Violation Track (795mil,575mil)(881.795mil,575mil) Top Layer Actual Width = 20mil Rule Violations :4 Processing Rule : Hole Size Constraint (Min=1mil) (Max=152mil) (All) Rule Violations :0 Processing Rule : Component Clearance Constraint (Gap=10mil) (All),(All) Violation between Component U14(1276mil,1979mil) on Bottom Layer and SMT Small Component C1(976mil,2019mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and SMT Small Component C2(1436mil,2099mil) on Top Layer Violation between Component U14(1276mil,1979mil) on Bottom Layer and SMT Small Component C2(1436mil,2099mil) on Top Layer Violation between SIP Component U13(1626.236mil,2709mil) on Bottom Layer and SMT Small Component C2(1436mil,2099mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and SMT Small Component C4(1436mil,2419mil) on Top Layer Violation between Component U14(1276mil,1979mil) on Bottom Layer and SMT Small Component C4(1436mil,2419mil) on Top Layer Violation between SIP Component U13(1626.236mil,2709mil) on Bottom Layer and SMT Small Component C4(1436mil,2419mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and SMT Small Component C6(320mil,1660mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and SMT Small Component C7(1796mil,1699mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and SMT Small Component C11(880mil,940mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and SMT Small Component C20(816mil,1739mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and DIP Component C21(220mil,780mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and Small Component JP3(336mil,1079mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and SMT SIP Component Q1(1098.204mil,525mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and Small Component TP6(1280mil,2420mil) on Top Layer Violation between Component U14(1276mil,1979mil) on Bottom Layer and Small Component TP6(1280mil,2420mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and Small Component TP8(2196mil,1779mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and Small Component TP13(1116mil,1499mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and Small Component TP14(2060mil,1660mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and Small Component TP18(2196mil,1579mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and Small Component TP20(2060mil,1820mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and Small Component TP21(2200mil,2200mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and Small Component TP22(2196mil,1999mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and Small Component TP24(600mil,960mil) on Top Layer Violation between Component U9(1576mil,1799mil) on Bottom Layer and Small Component TP29(2060mil,2000mil) on Top Layer Violation between PGA Component U7(2696mil,1479mil) on Top Layer and Small Component TP37(3036mil,1159mil) on Top Layer Violation between Component U14(1276mil,1979mil) on Bottom Layer and SOIC Component U2(1016mil,2279mil) on Top Layer Violation between Component U14(1276mil,1979mil) on Bottom Layer and SOIC Component U3(1016mil,2639mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and SIP Component U8(636mil,1299mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and SMT Small Component R3(1200mil,740mil) on Top Layer Violation between Small Component TP41(1360mil,620mil) on Top Layer and SMT Small Component R3(1200mil,740mil) on Top Layer Violation between Small Component PS1(540mil,1640mil) on Bottom Layer and Component U9(1576mil,1799mil) on Bottom Layer Violation between Component U14(1276mil,1979mil) on Bottom Layer and Component U9(1576mil,1799mil) on Bottom Layer Violation between SIP Component U13(1626.236mil,2709mil) on Bottom Layer and Component U9(1576mil,1799mil) on Bottom Layer Violation between Component U14(1276mil,1979mil) on Bottom Layer and SIP Component U13(1626.236mil,2709mil) on Bottom Layer Rule Violations :35 Processing Rule : Broken-Net Constraint ( (All) ) Violation Net VCCPROFET is broken into 2 sub-nets. Routed To 91.67% Subnet : TP36-0 C25-1 U9-1 U14-23 U14-22 U13-2 C22-2 C22-2 C22-2 C22-2 C22-2 Subnet : Q1-7 Q1-6 Violation Net NetQ1_3 is broken into 2 sub-nets. Routed To 0.00% Subnet : Q1-3 Subnet : R3-1 Rule Violations :2 Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All) Violation between Track (795mil,575mil)(881.795mil,575mil) Top Layer and Pad Q1-7(881.795mil,575mil) Top Layer Violation between Track (1098.204mil,625mil)(1165mil,625mil) Top Layer and Pad Q1-3(1098.204mil,625mil) Top Layer Violation between Track (1200mil,660mil)(1200mil,740mil) Top Layer and Pad R3-1(1200mil,740mil) Top Layer Violation between Track (1335mil,645mil)(1335mil,740mil) Top Layer and Pad R3-2(1335mil,740mil) Top Layer Violation between Track (980mil,260mil)(980mil,430mil) Top Layer and Track (950mil,400mil)(980mil,430mil) Top Layer Violation between Via (980mil,430mil) Top Layer to Bottom Layer and Track (950mil,400mil)(980mil,430mil) Top Layer Violation between Pad TP36-0(800mil,400mil) Multi-Layer and Track (800mil,400mil)(950mil,400mil) Top Layer Violation between Pad TP36-0(800mil,400mil) Multi-Layer and Track (795mil,405mil)(800mil,400mil) Top Layer Violation between Pad TP36-0(800mil,400mil) Multi-Layer and Track (795mil,405mil)(795mil,575mil) Top Layer Violation between Pad TP41-0(1360mil,620mil) Multi-Layer and Track (1335mil,645mil)(1360mil,620mil) Top Layer Rule Violations :10 Processing Rule : Width Constraint (Min=6mil) (Max=50mil) (Preferred=20mil) ((InNet('GND') OR InNet('GNDBUS') OR InNet('ISO-VCC-5V-NDL') OR InNet('VCC-5V-5101') OR InNet('VCCBUS') OR InNet('VCCPROFET'))) Rule Violations :0 Processing Rule : Width Constraint (Min=6mil) (Max=50mil) (Preferred=30mil) ((InNet('ISO-VCC-12V'))) Rule Violations :0 Violations Detected : 64 Time Elapsed : 00:00:01