ADM-XRC Windows 2000/XP Driver Changelog
========================================

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Changes from version 3.7 to 3.8

- Added support for ADP-XRCII-N and ADP-XRCII-EMP.

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Changes from version 3.6 to 3.7

- Fixed problem with PCI writes being merged when accessing clock generator
  on some platforms (applies to PCI9080/PCI9656-based models).

- Support for ADM-XRCIIPro-Lite Bridge rev. 01 added, including DMA
  transfers. Use of LEOT# (end-of-transfer) in DMA transfers is not yet
  supported.

- Fixed a nonfatal application thread-hang when target FPGA's DONE, PROG#
  and INIT# pins are grossly faulty. No longer requires a CTRL-C to recover.

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Changes from version 3.5 to 3.6

- Added space configuration API functions (to support cards with 64 bit
  local bus):

  o ADMXRC2_GetSpaceConfig
  o ADMXRC2_SetSpaceConfig

- Support for ADM-XRCIIPro-Lite Bridge revision 0 added.

  - DMA transfers are not supported on ADM-XRCIIPro-Lite with Bridge
    revision 0.

  - ADMXRC2_ProgramBytes is not supported on ADM-XRCIIPro-Lite. Use
    ADMXRC2_XxxFlash functions intead.

- Added Flash API functions (supersede ADMXRC2_ProgramBytes):

  o ADMXRC2_EraseFlash
  o ADMXRC2_GetFlashInfo
  o ADMXRC2_GetFlashBlockInfo
  o ADMXRC2_ReadFlash
  o ADMXRC2_WriteFlash

  These may be used for Flash programming on all cards that have Flash
  memory for holding FPGA bitstreams. See <admxrc2/flash.h> in
  ADM-XRC SDK 4.3.1.

- Added a debugging option:

  - Use of PCI9656/PCI9080 chained mode in the driver can be disabled via the
    registry key:

      HKLM\SYSTEM\CurrentControlSet\Services\admxrc\Parameters\MaxPlxDesc

    Setting this value to 1 disables chained mode. Setting this value to
    greater than 1 enables use of chained mode. Note that disabling chained
    mode will reduce DMA performance for large transfers.

    A reboot is required in order for a change to this value take effect.

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Changes from version 3.4 to 3.5

- Performance enhancements:

  - PCI read multiple command now used for DMA and Direct Master transfers.
    May be enabled/disabled via a registry key (1 => enable, 0 => disable):

      HKLM\SYSTEM\CurrentControlSet\Services\admxrc\Parameters\PCIReadMultiple

    A reboot is required in order for a change to this value take effect.

  - PCI write and invalidate command now used for DMA transfers. May be
    enabled/disabled via a registry key (1 => enable, 0 => disable):

      HKLM\SYSTEM\CurrentControlSet\Services\admxrc\Parameters\PCIWriteAndInvalidate

    A reboot is required in order for a change to this value take effect.

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Changes from version 3.3 to 3.4

- Fixed a spinlock bug in an IOCTL handler that is only used in the legacy
  interface (ADMXRC_xxx functions).

- Enhancement: DMA functions no longer reject "use EOT#" in the DMA mode
  word.

- Fixed a problem where ADMXRC2_DoDMA and ADMXRC2_DoDMAImmediate routines
  could fail in a PC with a large amount of memory (1GB or more) installed.

- Fixed a memory leak in ADMXRC2_SetupDMA where an MDL was not freed in
  certain cases when the call failed.

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Changes from version 3.2 to 3.3

- Fixed potential user thread hang problem when FPGA configuration fails
  (due to corrupt bitstream or hardware problem)

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Changes from version 3.1 to 3.2

- Driver now supports the ADM-XRCII card.

- When reading/writing the 9080/9656 registers using ADMXRC2_Read/ADMXRC_Write,
  driver is now aware of size of the register file (0x100 for 9080, 0x200 for
  9656).

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Changes from version 3.0 to 3.1

- Changed all MmCreateMdl (legacy) calls to IoAllocateMDL calls.

- Fixed bug in IOCTL handler for MapDirectMaster where wrong MDL is
  unlocked.

- Redone WDM PNP code in line with 'Toaster' example from October 2000
  edition of Win2K SDK.

- IOCTL handler for SetClock now queues concurrent requests to set the
  clock and processes in order, instead of returning busy error.

- Added IOCTL handlers:

  - ADMXRC_IOCTL_DODMAIMMEDIATE
  - ADMXRC_IOCTL_LOADFPGADMA

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Changes from version 2.9 to 3.0

- Now supports the ADM-XRCII-L card

- Added the ADMXRC2 interface API functions

- Added new IOCTLs to support the ADMXRC2 interface:

  - ADMXRC2_IOCTL_GETCARDINFO
  - ADMXRC2_IOCTL_GETBANKINFO
  - ADMXRC2_IOCTL_OPENCARD
  - ADMXRC2_IOCTL_SETCLOCK
  - ADMXRC2_IOCTL_GETSPACEINFO
  - ADMXRC2_IOCTL_OPENCARDBYINDEX
  - ADMXRC2_IOCTL_READCONFIG
  - ADMXRC2_IOCTL_WRITECONFIG

  - Modified manner in which card ownership is acquired and enforced in
    order to support the ADMXRC2_EnumerateCards API function.

- Got rid of messages that can appear on kernel debugger when aborting
  DMA transfer because of device cleanup or IRP cancellation.

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Changes from version 2.8 to 2.9

- Fixed bug in ADMXRC_LoadFpgaFile() where file handle of bitstream was
  not closed.

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Changes from version 2.7 to 2.8

- Added IOCTL handlers to driver for

  - ADMXRC_IOCTL_MAPDIRECTMASTER
  - ADMXRC_IOCTL_SYNCDIRECTMASTER

- API function for ADMXRC_ConfigureFromBufferDMA() now checks that logic
  revision on card is 0.8 or higher. If not, returns "not supported"
  error.

- The driver now returns the PCI base address of the FPGA space in
  ADMXRC_IOCTL_GETCARDINFO. Previously, 0 was returned.

- When handling ADMXRC_IOCTL_SETCLOCK, the driver now performs the
  programming atomically to avoid the possibility of an ICD2061 timeout.
  If timeout occurs, the routine now retries 10 times before giving up
  with an ADMXRC_FAILED status.

- Fixed memory size detection code. Now returns correct bank size in card
  info as determined by EEPROM word 0x3A.

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Changes from version 2.6 to 2.7

- API DLLs that are installed with driver are now XCV405E aware

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Changes from version 2.5 to 2.6

- IRP cancellation code redone in line with example code in Windows 2000 DDK

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Changes in version 2.5

- added driver routines to allow DMA driven FPGA configuration:

  - ADMXRC_IOCTL_UNCONFIGUREFPGA
  - ADMXRC_IOCTL_CHECKFPGACONFIGURED

  These routines are not present in driver versions lower than 2.5

- fixed driver bug causing application hang when using DMA when
  ADMXRC_DMACHAN_ANY specified in "channel" parameter.

- changed local bus address range checking in driver routine for
  ADMXRC_IOCTL_DODMA,, so that 0x0 to 0xffffff is valid (previously
  0x0 to 0x7fffff).

