Protel Design System Design Rule Check
PCB File : C:\Rob\Scanner\Sch\Scantrans.PCB
Date     : 18-Sep-2000
Time     : 15:43:10

Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed)  Scope=Board - Different Nets Only
Rule Violations :0

Processing Rule : Broken-Net Constraint (  Scope=Board )
Rule Violations :0

Processing Rule : Width Constraint (Min=10mil) (Max=100mil)  Scope=Board
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=8mil)  Scope=Board - Different Nets Only
Rule Violations :0


Violations Detected : 0
Time Elapsed        : 00:02:00
