;:ts=8 far code far data ;/* TT8 specific includes */ ;#include /* Tattletale Model 8 Definitions */ ;#include /* 68332 Tattletale (7,8) Hardware Definitions */ ;#include /* 68332 System Integration Module Definitions */ ;#include /* 68332 Queued Serial Module Definitions */ ;#include /* 68332 Digital I/O Port Pin Definitions */ ;#include /* definitions and prototypes for Model 8 library */ ; ;/* general C includes */ ;#include ;#include ;#include ; ;// our includes ;#include "ASSERT.h" ;#include "MAX186.h" ; ;// subroutine not for external use ;void MAX186_SPI_rupt_handler (void); ; ;// used in setting the SP registers ;#define MAX186_BAUD 0x04 ;#define MAX186_DSCKL 15 ;#define MAX186_DTL 0 ; ;short int MAX186_SPI_finished; ; ; ;// MAX186_power_on_init (void) ;// ;// Completes all initialization to put the 186 in a low power mode ;// ;void MAX186_power_on_init (void) { # 33 'max186.c' 649357058 | .2 xdef _MAX186_power_on_init _MAX186_power_on_init: ; MAX186_shutdown (-1); ^ move.w #-1,-(sp) jsr _MAX186_shutdown ; MAX186_power_up (); ^ jsr _MAX186_power_up ; MAX186_power_down (); ^ jsr _MAX186_power_down ; MAX186_shutdown (0); ^ clr.w -(sp) jsr _MAX186_shutdown ;} ^ add.w #4,sp .3 rts .2 ; ; ; ; ;// MAX186_shutdown (int state) ;// ;// Sets the MAX186 shutdown pin to the requested state. ;// The MAX186 is is controlled by pin 7 of PORT F. It may ;// be set to 0 to shut down, set to 1 to turn on with internal ;// compensation, or left floating to turn on with external ;// compensation. ;// ;void MAX186_shutdown (int state) { # 51 | .4 xdef _MAX186_shutdown _MAX186_shutdown: ; ASSERT ((state == 0) || (state == 1) || (state == -1)); ~~ state 8 "i" ^; ; switch (state) { ^^ move.w 4(sp),d0 bra .10001 ; case 0: ^.10003 ; PConfOutp (F, 7); ^; PConfOutpF7 dc.w $8b8 dc.w $7 dc.w $fa1f dc.w $8f8 dc.w $7 dc.w $fa1d ; PClear (F, 7); ^; PClearF7 dc.w $8b8 dc.w $7 dc.w $fa19 ; return; ^.5 rts ; ; case 1: ^^.10004 ; PConfOutp (F, 7); ^; PConfOutpF7 dc.w $8b8 dc.w $7 dc.w $fa1f dc.w $8f8 dc.w $7 dc.w $fa1d ; PSet (F, 7); ^; PSetF7 dc.w $8f8 dc.w $7 dc.w $fa19 ; return; ^ bra .5 ; ; case -1: ^^.10005 ; PConfInp (F, 7); ^; PConfInpF7 dc.w $8b8 dc.w $7 dc.w $fa1f dc.w $8b8 dc.w $7 dc.w $fa1d ; return; ^ bra .5 ; ; default: ^^.10006 ; ASSERT (0); ^; return; ^ bra .5 ; } ^.10001 sub.w #-1,d0 beq .10005 sub.w #1,d0 beq .10003 sub.w #1,d0 beq .10004 bra .10006 .10002 ; ASSERT (0); ^;} ^ bra .5 .4 ; ; ; ;// MAX186_power_down (void) ;// ;// Implements a full software power down of the MAX186. ;// ;// SPI assignments: ;// QPDR-7 = TxD (used by SCI) ;// QPDR-6 = PCS3 (user by TT8's on-board MAXIM A/D converter) ;// QPDR-5 = PCS2 (connected to AD7716 RESET - active high) ;// QPDR-4 = PCS1 (connected to AD7716 TFS) ;// QPDR-3 = PCS0 (connected to AD7716 RFS) ;// QPDR-2 = SCK (SPI clock) ;// QPDR-1 = MOSI (master out, slave in) ;// QPDR-0 = MISO (master in, slave out) ;// ;void MAX186_power_down (void) { # 92 | .6 xdef _MAX186_power_down _MAX186_power_down: ; // set all the SPI registers for access to the MAX 186 ; MAX186_init_SPI (); ^^ jsr _MAX186_init_SPI ; ; // MAX186 command implements full power down mode ; SPIXMT[0] = 0x80; ^^^ move.w #128,-736 ; ; // 68332 QSPI command controls PCS and various parameters ; SPICMD[0] = 0x3 // Set PCS3 low, RESET low, TFS, RFS high ^^^; | M_CONT & SET // 1=keep CS active between cmds ; | M_BITSE & CLR // 0=8 bits, 1=use SPCR0 ; | M_DT & SET // 0=no delay after, 1=use SPCR1 ; | M_DSCK & SET // 0=1/2SCK, 1=use SPCR1 ; ; move.b #179,-704 ; ; // Control register specifies one command and interrupt when complete ; *SPCR2 = 0x0 // NEWQP ^^^^^^^^; | (0x0 << 8) // ENDQP ; | M_SPIFIE & SET // SPI finished rupt enable = 1 ; | M_WREN & CLR // wraparound enabled if = 1 ; | M_WRTO & CLR // wrap to enabled if = 1 ; ; move.w #32768,-996 ; ; MAX186_SPI_finished = 0; ^^^^^^^ clr.w _MAX186_SPI_finished ; _SPSR->SPIF = 0; // clear any old results (intrpt flag) ^ and.w #-129,-994 ; _SPCR1->SPE = 1; // start QSPI ^ or.w #32768,-998 ; while (MAX186_SPI_finished == 0) ^.10007 tst.w _MAX186_SPI_finished bne .10008 ; {;} ^ bra .10007 .10008 ; return; ^.7 rts ;} ^.6 ; ; ; ; ; ;// MAX186_power_up (void) ;// ;// Implements the power up sequence. The system will require ;// 20 mSec to recover before it can accurately convert again. ;// This is the time required to charge the reference capacitor ;// ;void MAX186_power_up (void) { # 133 | .8 xdef _MAX186_power_up _MAX186_power_up: ; int result; ;// result = MAX186_read_channel (0); ;// printf ("Value %d = 0x%04X\n", result, result); ;// return; ; ; // set all the SPI registers for access to the MAX 186 ; MAX186_init_SPI (); ^^^^^^^ jsr _MAX186_init_SPI ; ; // MAX186 command implements fast power down mode, which seems ; // to mean it powers up the reference. The user who calls this ; // routine must wait an appropriate number of time constants for ; // the RC network on the reference output to stabilize. Typical ; // time constant would require a 2 mS wait. ; SPIXMT[0] = 0x81; ^^^^^^^ move.w #129,-736 ; ; // 68332 QSPI command controls PCS and various parameters ; SPICMD[0] = 0x3 // Set PCS3 low, RESET low, TFS, RFS high ^^^; | M_CONT & SET // 1=keep CS active between cmds ; | M_BITSE & SET // 0=8 bits, 1=use SPCR0 ; | M_DT & SET // 0=no delay after, 1=use SPCR1 ; | M_DSCK & SET // 0=1/2SCK, 1=use SPCR1 ; ; move.b #243,-704 ; ; // Control register specifies one command and interrupt when complete ; *SPCR2 = 0x0 // NEWQP ^^^^^^^^; | (0x0 << 8) // ENDQP ; | M_SPIFIE & SET // SPI finished rupt enable = 1 ; | M_WREN & CLR // wraparound enabled if = 1 ; | M_WRTO & CLR // wrap to enabled if = 1 ; ; move.w #32768,-996 ; ; MAX186_SPI_finished = 0; ^^^^^^^ clr.w _MAX186_SPI_finished ; _SPSR->SPIF = 0; // clear any old results (intrpt flag) ^ and.w #-129,-994 ; _SPCR1->SPE = 1; // start QSPI ^ or.w #32768,-998 ; while (MAX186_SPI_finished == 0) ^.10009 tst.w _MAX186_SPI_finished bne .10010 ; {;} ^ bra .10009 .10010 ; return; ^.9 rts ;} ^.8 ; ; ;// array to match a channel number with the bit pattern that the ;// MAX186 uses ;static short channel_pattern[] = { dseg ds 0 _channel_pattern: ; 0x0, dc.w 0 ; 0x40, dc.w 64 ; 0x10, dc.w 16 ; 0x50, dc.w 80 ; 0x20, dc.w 32 ; 0x60, dc.w 96 ; 0x30, dc.w 48 ; 0x70 ;}; dc.w 112 cseg ; ; ; ; ;short MAX186_read_channel (int channel) { # 190 | .10 xdef _MAX186_read_channel _MAX186_read_channel: ; short result; ; ASSERT ((channel >= 0) && (channel <= 7)); ~~ channel 8 "i" ^^; // set all the SPI registers for access to the MAX 186 ; MAX186_init_SPI (); ^^ jsr _MAX186_init_SPI ; ; // first command combines the channel pattern with the control ; // bits. the second and third are essentially no-ops, cause there ; // is no 1 bit in the pattern ; SPIXMT[0] = channel_pattern[channel] | ^^^^^; 0x80 | ; 0x0F; move.w 4(sp),d0 ext.l d0 add.l d0,d0 lea _channel_pattern,a0 move.w (a0,d0.l),d0 or.w #143,d0 move.w d0,-736 ; SPIXMT[1] = 0x0; ^^^ move.w #0,-734 ; ; // 68332 QSPI command controls PCS and various parameters; ; // 1st command xfers 8 bits to specify the channel converted ; // 2nd command xfers 16 bits to rcv the converted data ; SPICMD[0] = 0x3 // Set PCS3 low, RESET low, TFS, RFS high ^^^^^; | M_CONT & SET // 1=keep CS active between cmds ; | M_BITSE & CLR // 0=8 bits, 1=use SPCR0 ; | M_DT & CLR // 0=no delay after, 1=use SPCR1 ; | M_DSCK & SET // 0=1/2SCK, 1=use SPCR1 ; ; move.b #147,-704 ; SPICMD[1] = 0x3 // Set PCS3 low, RESET low, TFS, RFS high ^^^^^^; | M_CONT & SET // 1=keep CS active between cmds ; | M_BITSE & SET // 0=8 bits, 1=use SPCR0 ; | M_DT & CLR // 0=no delay after, 1=use SPCR1 ; | M_DSCK & SET // 0=1/2SCK, 1=use SPCR1 ; ; move.b #211,-703 ; ; // Control register specifies two commands and interrupt when complete ; *SPCR2 = 0x0 // NEWQP ^^^^^^^^; | (0x01 << 8) // ENDQP ; | M_SPIFIE & SET // SPI finished rupt enable = 1 ; | M_WREN & CLR // wraparound enabled if = 1 ; | M_WRTO & CLR // wrap to enabled if = 1 ; ; move.w #33024,-996 ; ; MAX186_SPI_finished = 0; ^^^^^^^ clr.w _MAX186_SPI_finished ; _SPSR->SPIF = 0; // clear any old results (intrpt flag) ^ and.w #-129,-994 ; _SPCR1->SPE = 1; // start QSPI ^ or.w #32768,-998 ; while (MAX186_SPI_finished == 0) ^.10011 tst.w _MAX186_SPI_finished bne .10012 ; {;} ^ bra .10011 .10012 ; return SPIRCV[1]; ^ move.w -766,d0 .11 rts ;} ^.10 ; ; ; ;// MAX186_init_SPI ;// ;// Sets the SPI up for transfers to the MAX186. A key to the proper ;// operation with this routine in cooporation with other routines is ;// that is only adjusts values of the PCS lines that it uses. Other ;// lines will be unchanged from their current state. ;// ;// The MAX186 uses PCS line 3 as a chip select. It should idle high ;// ;void MAX186_init_SPI (void) { # 247 | .12 xdef _MAX186_init_SPI _MAX186_init_SPI: ; static ExcCFrame MAX186_SPI_Frame; bss .10013,20 ; ; // install QSPI interrupt handler ; InstallHandler(MAX186_SPI_rupt_handler, QSPI_INT_VECTOR, &MAX186_SPI_Frame); ~ '' ~ 1 4 20 ~ preamble 0 "[4I" ~ jump 8 "I" ~ target 10 "L" ~ postamble 14 "[3I" ~ MAX186_SPI_Frame .10013 ":" 1 ^^^^ pea .10013 move.w #83,-(sp) pea _MAX186_SPI_rupt_handler jsr _InstallHandler ; ; // PCS3 idles high ; _QPDR->PCS3 = 1; ^^^ or.w #64,-1004 ; ; // The SPI is assigned PCS3, MISO, and MOSI; SCK is automatic ; _QPAR->PCS3 = 1; ^^^ or.w #16384,-1002 ; _QPAR->MISO = 1; ^ or.w #256,-1002 ; _QPAR->MOSI = 1; ^ or.w #512,-1002 ; ; // PCS3, MOSI, and SCK are outputs; MISO is an input ; _QDDR->PCS3 = 1; ^^^ or.w #64,-1002 ; _QDDR->MOSI = 1; ^ or.w #2,-1002 ; _QDDR->SCK = 1; ^ or.w #4,-1002 ; _QDDR->MISO = 0; ^ and.w #-2,-1002 ; ; // Now set up the control registers. The baud rate is chosen assuming ; // that we are running with a system clock of 16 MHz. Bits per xfer ; // is 16, and we override this using the SPICMD variable to get ; // only eight for the first xfer of the control word ; *SPCR0 = MAX186_BAUD // 8 = 1 MHz; baud rate (2 is max) ^^^^^^; | (0x0 << 10) // bits per transfer (0 = 16) ; | M_MSTR & SET // 1 = Master, 0 = Slave ; | M_WOMQ & CLR // 1 = open drain, 0 = cmos ; | M_CPOL & CLR // 1 = inactive SCK high ; | M_CPHA & CLR // 1 = change on leading edge, capture on falling ; ; move.w #32772,-1000 ; ; *SPCR1 = MAX186_DTL | // DTL delay after xfer ^^^^^^^^; (MAX186_DSCKL << 8) | // delay between PCS valid and start of xfer ; M_SPE & CLR; // don't enable the SPI yet move.w #3840,-998 ; ; // SPCR2 will be set up by the routine which runs a command through ; *SPCR3 = M_LOOPQ & CLR // QSPI loop mode, 1 = on ^^^^^; | M_HMIE & CLR // HALTA & MODF interrupt enable ; | M_HALT & CLR // Halt ; ; move.b #0,-994 ; ; // The SPCR2 register is set according to the specific commands which ; // are being executed. It is set by the routines which actually execute ; // the commands ;} ^^^^^^^^ lea 10(sp),sp .13 rts .12 ; ; ; ; ;// MAX186_SPI_rupt_handler (void) { ;// Internal use only ;// ;// Interrupt handler for SPI ;// ;void MAX186_SPI_rupt_handler (void) { # 302 | .14 xdef _MAX186_SPI_rupt_handler _MAX186_SPI_rupt_handler: ; // clear any old results (intrpt flag) ; _SPSR->SPIF = 0; ^^ and.w #-129,-994 ; MAX186_SPI_finished = 1; ^ move.w #1,_MAX186_SPI_finished ;} ^.15 rts .14 ; ; # 307 | ~ channel_pattern _channel_pattern "[8i" ~ _MAX186_SPI_finished * "i" ~ _MAX186_SPI_rupt_handler * "(v" ~ _MAX186_init_SPI * "(v" ~ _MAX186_read_channel * "(i" ~ _MAX186_power_down * "(v" ~ _MAX186_power_up * "(v" ~ _MAX186_shutdown * "(v" ~ _MAX186_power_on_init * "(v" ~ '' ~ 2 2 8 ~ quot 0 "l" ~ rem 4 "l" ~ '' ~ 3 2 4 ~ quot 0 "i" ~ rem 2 "i" ~ ldiv_t ":" 2 ~ div_t ":" 3 ~ '__stdio' ~ 4 8 22 ~ _bp 0 "#C" ~ _bend 4 "#C" ~ _buff 8 "#C" ~ _flags 12 "I" ~ _unit 14 "c" ~ _bytbuf 15 "C" ~ _buflen 16 "L" ~ _tmpnum 20 "I" ~ FILE ":" 4 ~ fpos_t "l" ~ va_list "#c" ~ '' ~ 5 13 46 ~ libVersion 0 "l" ~ ramBase 4 "#c" ~ ramSize 8 "l" ~ ramWaits 12 "i" ~ flashBase 14 "#c" ~ flashSize 18 "l" ~ flashWaits 22 "i" ~ heapBot 24 "#v" ~ heapTop 28 "#v" ~ heapCur 32 "#v" ~ statusReg 36 "I" ~ vectorBase 38 "#v" ~ stackPtr 42 "#v" ~ infoAction "c" ~ TT8info ":" 5 ~ UeeErr "c" ~ '' ~ 6 2 8 ~ secs 0 "L" ~ ticks 4 "l" ~ time_tt ":" 6 ~ XmdmErr "c" ~ FlashErr "c" ~ _InstallHandler * "(#(v" ~ '' ~ 7 4 24 ~ eSR 0 "I" ~ ePC 2 "L" ~ vectofs 6 "I" ~ states 8 "[8I" ~ ExcCFramePtr "#:" 1 ~ ExcCFrame ":" 1 ~ ExcStackFrame ":" 7 ~ 'tm' ~ 8 10 20 ~ tm_sec 0 "i" ~ tm_min 2 "i" ~ tm_hour 4 "i" ~ tm_mday 6 "i" ~ tm_mon 8 "i" ~ tm_year 10 "i" ~ tm_wday 12 "i" ~ tm_yday 14 "i" ~ tm_isdst 16 "i" ~ tm_hsec 18 "i" ~ time_t "L" ~ clock_t "L" ~ wchar_t "c" ~ ptrdiff_t "l" ~ size_t "L" ~ bool "c" ~ vfptr "#(v" ~ ptr "#c" ~ ulpv "#L" ~ ulong "L" ~ uspv "#I" ~ unsint "I" ~ ushort "I" ~ ucpv "#C" ~ uchar "C" xref _InstallHandler xref .begin dseg global _MAX186_SPI_finished,2 end