;:ts=8
	far	code
	far	data
;#ifndef PRECOMPHDRS
;#include	<tt8lib.h>		/* definitions and prototypes for Model 8 library */
;#include	<tpu332.h>
;
;#include	<stdio.h>
;#include	<stdlib.h>
;#include	<userio.h>
;#endif
;
;#include	"tputime.h"
;
;#define			SECONDS_PER_EPOCH		0xFFFF
;
;// DEFINES FOR TPU FUNCTIONS
;#define			TPU_ITC_1_HZ			0 // TPU channel for input capture
;#define			TPU_ITC_40_KHZ			7
;
;enum 
;{
;	CHAN_CTRL, 
;	LINK_CTRL, 
;	MAX_COUNT, 
;	TRANS_COUNT, 
;	FINAL_TRANS_TIME, 
;	LAST_TRANS_TIME
;} ITC_Parameters;
;
;enum
;{
;	LINK_CHAN_CNTRL,
;	MAX_COUNT_PERIOD,
;	LAST_ACCUM,
;	ACCUM,
;	ACCUM_RATE_PPWA_UB,
;	PPWA_LWs
;} PPWA_Parameters;
;
;/* Host Service Request */
;#define			ITC_INITIALIZE				1
;#define			PPWA_INITIALIZE				2
;
;/* ITC -- Host Sequence */
;#define			SINGLE_NO_LINKS				0
;#define			CONTINUOUS_NO_LINKS			1
;#define         SINGLE_LINKS				2
;#define			CONTINUOUS_LINKS			3
;
;/* PPWA -- Host Sequence */
;#define			ACCUMULATE_24_BIT_PERIODS	0 // ** WARNING, BROKEN FOR SOME MASKS
;#define			ACCUMULATE_16_BIT_PERIODS	1
;#define         ACCUMULATE_24_BIT_WIDTHS	2 // ** WARNING, BROKEN FOR SOME MASKS
;#define		   	ACCUMULATE_16_BIT_WIDTHS	3
;
;/* PSC -- Pin State Control */
;#define			FORCE_BY_PAC				0x00
;#define			FORCE_HIGH					0x01
;#define			FORCE_LOW					0x02
;#define			NO_FORCE					0x03
;
;/* PAC -- Pin Action Control (inputs) */
;#define         NO_DETECT		   			0x00
;#define         DETECT_RISING           	0x04
;#define         DETECT_FALLING          	0x08
;#define         DETECT_EITHER           	0x0C
;#define         PAC_NO_CHANGE				0x10
;
;/* PAC -- Pin Action Control (outputs) */
;#define			NO_CHANGE_ON_MATCH			0x00
;#define			HIGH_ON_MATCH				0x04
;#define			LOW_ON_MATCH            	0x08
;#define			TOGGLE_ON_MATCH				0x0C
;
;/* TBS -- Time Base/Directionality Control */
;#define         INPUT_CHAN              	0x00
;#define			OUTPUT_CHAN					0x80
;#define         CAPTURE1_MATCH1				0x00
;#define         CAPTURE1_MATCH2				0x20
;#define			CAPTURE2_MATCH1         	0x40
;#define			CAPTURE2_MATCH2         	0x60
;#define        	TBS_NO_CHANGE				0x100
;
;static  ulong		tpuSeconds;
;static	ExcCFrame	framebuf;
;
;void	SetupOneSecondInterrupt(ushort chan);
;void	SetupTransitionCounter(ushort chan);
;void    OneSecondInterrupt(void);
;void	ResetTPUCount(ushort chan);
;
;long	GetTPUCount(ushort chan);
;
;void TPU_InitializeTimeKeeping()
;{
# 92 'tputime.c' 613179572
^| .2
	xdef	_TPU_InitializeTimeKeeping
_TPU_InitializeTimeKeeping:
;	SetupOneSecondInterrupt(TPU_ITC_1_HZ);
^	clr.w	-(sp)
	jsr	_SetupOneSecondInterrupt
;	SetupTransitionCounter(TPU_ITC_40_KHZ);
^	move.w	#7,-(sp)
	jsr	_SetupTransitionCounter
;	tpuSeconds = 0;
^	clr.l	_tpuSeconds
;}
^	add.w	#4,sp
.3
	rts
.2
;
;void TPU_SetTimeTM(struct tm *tp, vfptr sync)
;{
# 99
^| .4
	xdef	_TPU_SetTimeTM
_TPU_SetTimeTM:
	movem.l	d2/a3,-(sp)
	move.l	16(sp),a3
;	time_t value;
;	value = mktime(tp);
~ value d2 "L"
~ 'tm'
~ 1 10 20
~ tm_sec 0 "i"
~ tm_min 2 "i"
~ tm_hour 4 "i"
~ tm_mday 6 "i"
~ tm_mon 8 "i"
~ tm_year 10 "i"
~ tm_wday 12 "i"
~ tm_yday 14 "i"
~ tm_isdst 16 "i"
~ tm_hsec 18 "i"
~~ tp 8 "#:" 1
~~ sync a3 "#(v"
^^	move.l	12(sp),-(sp)
	jsr	_mktime
	move.l	d0,d2
;	if (sync != (vfptr) NULL) 
^;		(*sync)();
	move.l	a3,d0
	add.w	#4,sp
	beq	.10001
^	jsr	(a3)
;	tpuSeconds = value;
.10001
^	move.l	d2,_tpuSeconds
;}
^.5
	movem.l	(sp)+,d2/a3
	rts
.4
;
;time_tt TPU_ttmnow()
;{
# 108
^	bss	.10002,8
| .6
	xdef	_TPU_ttmnow
_TPU_ttmnow:
	link	a6,#.7
	movem.l	d2,-(sp)
;	time_tt now;
;	ushort  mask;
;
;	mask = GetInterruptMask();     
~ ''
~ 2 2 8
~ secs 0 "L"
~ ticks 4 "l"
~ now -8 ":" 2
~ mask d2 "I"
^^^^;			GetInterruptMask
	dc.w	$40c0
	dc.w	$e048
	dc.w	$240
	dc.w	$7
	move.w	d0,d2
;	SetInterruptMask(NO_RUPTS_MASK);
^	move.l	#7,d0
;			SetInterruptMask
	dc.w	$e148
	dc.w	$40
	dc.w	$2000
	dc.w	$46c0
;	now.secs  = tpuSeconds;
^	move.l	_tpuSeconds,-8(a6)
;	now.ticks = GetTPUCount(TPU_ITC_40_KHZ);
^	move.w	#7,-(sp)
	jsr	_GetTPUCount
	move.l	d0,-4(a6)
;	SetInterruptMask(mask);
^	move.w	d2,d0
;			SetInterruptMask
	dc.w	$e148
	dc.w	$40
	dc.w	$2000
	dc.w	$46c0
;	
;	//  Ticks should never be greater than 39999.  Larger numbers
;	//  may confuse other parts of the software, so prevent them.
;	if (now.ticks >= 40000)
^^^^;		now.ticks = 39999;
	cmp.l	#40000,-4(a6)
	add.w	#2,sp
	blt	.10003
^	move.l	#39999,-4(a6)
;	return now;
.10003
^	lea	.10002,a0
	lea	-8(a6),a1
	move.l	(a1)+,(a0)+
	move.l	(a1)+,(a0)+
	lea	.10002,a0
	move.l	a0,d0
.8
	movem.l	(sp)+,d2
	unlk	a6
	rts
;}
^.6
.7	equ	-8
;
;void SetupOneSecondInterrupt(ushort chan)
;{
# 126
^| .9
	xdef	_SetupOneSecondInterrupt
_SetupOneSecondInterrupt:
	movem.l	d2,-(sp)
	move.w	8(sp),d2
;	TPUInterruptDisable(chan);
~~ chan d2 "I"
^	move.w	d2,d0
;			TPUInterruptDisable
	dc.w	$7201
	dc.w	$e169
	dc.w	$4641
	dc.w	$c378
	dc.w	$fe0a
;
;	// SETUP CHANNEL
;	InstallHandler(OneSecondInterrupt, TPU_INT_VECTOR + chan, &framebuf);
^^^	pea	_framebuf
	move.w	d2,d0
	add.w	#64,d0
	move.w	d0,-(sp)
	pea	_OneSecondInterrupt
	jsr	_InstallHandler
;	TPUGetPin(chan);		//Set pin as input
^	move.w	d2,-(sp)
	jsr	_TPUGetPin
;	CHANPRIOR(chan,Disabled);
^	move.l	#-482,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#3,d1
	asl.w	d0,d1
	not.w	d1
	move.w	(a0),d0
	and.w	d1,d0
	move.w	d2,d1
	and.w	#7,d1
	add.w	d1,d1
	lea	12(sp),sp
	move.w	d0,-(sp)
	move.l	#0,d0
	asl.w	d1,d0
	move.w	(sp)+,d1
	or.w	d0,d1
	move.l	#-482,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;	*CISR ^= (1 << chan );		// Clear any pending interrupt
^	move.l	#1,d0
	asl.w	d2,d0
	move.w	-480,d1
	eor.w	d1,d0
	move.w	d0,-480
;	*CIER &= ~(1 << chan);		// disable interrupt
^	move.l	#1,d0
	asl.w	d2,d0
	not.w	d0
	and.w	d0,-502
;	FUNSEL(chan,ITC);		// select input capture function
^	move.l	#-494,a0
	move.w	d2,d0
	lsr.w	#2,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#3,d0
	asl.w	#2,d0
	move.l	#15,d1
	asl.w	d0,d1
	not.w	d1
	move.w	(a0),d0
	and.w	d1,d0
	move.w	d2,d1
	and.w	#3,d1
	asl.w	#2,d1
	move.w	d0,-(sp)
	move.l	#10,d0
	asl.w	d1,d0
	move.w	(sp)+,d1
	or.w	d0,d1
	move.l	#-494,a0
	move.w	d2,d0
	lsr.w	#2,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;
;	PRAM[chan][CHAN_CTRL]	= DETECT_RISING;	 // count rising edges
^^	move.l	#0,d0
	move.w	d2,d0
	asl.l	#4,d0
	move.l	#-256,a0
	move.w	#4,(a0,d0.l)
;	PRAM[chan][LINK_CTRL]	= 0x0E;				 // no links
^	move.l	#0,d0
	move.w	d2,d0
	asl.l	#4,d0
	move.l	#-256,a0
	move.w	#14,2(a0,d0.l)
;	PRAM[chan][MAX_COUNT]	= 1; // maximum count
^	move.l	#0,d0
	move.w	d2,d0
	asl.l	#4,d0
	move.l	#-256,a0
	move.w	#1,4(a0,d0.l)
;
;	HOSTSEQ(chan, CONTINUOUS_NO_LINKS); // continuous count, no links
^^	move.l	#-490,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#3,d1
	asl.w	d0,d1
	not.w	d1
	move.w	(a0),d0
	and.w	d1,d0
	move.w	d2,d1
	and.w	#7,d1
	add.w	d1,d1
	move.w	d0,-(sp)
	move.l	#1,d0
	asl.w	d1,d0
	move.w	(sp)+,d1
	or.w	d0,d1
	move.l	#-490,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;	HOSTSERVREQ(chan, ITC_INITIALIZE);	// init
^	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#1,d1
	asl.w	d0,d1
	move.l	#-486,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;	CHANPRIOR(chan,HighPrior);			// priority
^	move.l	#-482,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#3,d1
	asl.w	d0,d1
	not.w	d1
	move.w	(a0),d0
	and.w	d1,d0
	move.w	d2,d1
	and.w	#7,d1
	add.w	d1,d1
	move.w	d0,-(sp)
	move.l	#3,d0
	asl.w	d1,d0
	move.w	(sp)+,d1
	or.w	d0,d1
	move.l	#-482,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;	while(HOSTSERVSTAT(chan) & 3) 		// poll until service ends (00)
^.10004
	move.l	#-486,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#3,d1
	asl.w	d0,d1
	move.w	(a0),d0
	and.w	d1,d0
	and.w	#3,d0
	beq	.10005
;		;
^	bra	.10004
.10005
;	TPUClearInterrupt(chan);
^	move.l	#1,d0
	asl.w	d2,d0
	not.w	d0
	and.w	d0,-480
;	TPUInterruptEnable(chan);
^	move.w	d2,d0
;			TPUInterruptEnable
	dc.w	$7201
	dc.w	$e169
	dc.w	$8378
	dc.w	$fe0a
;}
^.10
	movem.l	(sp)+,d2
	rts
.9
;
;void SetupTransitionCounter(ushort chan)
;{
# 151
^| .11
	xdef	_SetupTransitionCounter
_SetupTransitionCounter:
	movem.l	d2,-(sp)
	move.w	8(sp),d2
;	TPUInterruptDisable(chan);
~~ chan d2 "I"
^	move.w	d2,d0
;			TPUInterruptDisable
	dc.w	$7201
	dc.w	$e169
	dc.w	$4641
	dc.w	$c378
	dc.w	$fe0a
;
;	// SETUP CHANNEL
;	TPUGetPin(chan);		//Set pin as input
^^^	move.w	d2,-(sp)
	jsr	_TPUGetPin
;	CHANPRIOR(chan,Disabled);
^	move.l	#-482,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#3,d1
	asl.w	d0,d1
	not.w	d1
	move.w	(a0),d0
	and.w	d1,d0
	move.w	d2,d1
	and.w	#7,d1
	add.w	d1,d1
	add.w	#2,sp
	move.w	d0,-(sp)
	move.l	#0,d0
	asl.w	d1,d0
	move.w	(sp)+,d1
	or.w	d0,d1
	move.l	#-482,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;	*CISR ^= (1 << chan );		// Clear any pending interrupt
^	move.l	#1,d0
	asl.w	d2,d0
	move.w	-480,d1
	eor.w	d1,d0
	move.w	d0,-480
;	*CIER &= ~(1 << chan);		// disable interrupt
^	move.l	#1,d0
	asl.w	d2,d0
	not.w	d0
	and.w	d0,-502
;	FUNSEL(chan,ITC);		// select input capture function
^	move.l	#-494,a0
	move.w	d2,d0
	lsr.w	#2,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#3,d0
	asl.w	#2,d0
	move.l	#15,d1
	asl.w	d0,d1
	not.w	d1
	move.w	(a0),d0
	and.w	d1,d0
	move.w	d2,d1
	and.w	#3,d1
	asl.w	#2,d1
	move.w	d0,-(sp)
	move.l	#10,d0
	asl.w	d1,d0
	move.w	(sp)+,d1
	or.w	d0,d1
	move.l	#-494,a0
	move.w	d2,d0
	lsr.w	#2,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;
;	PRAM[chan][CHAN_CTRL]	= DETECT_RISING;	 // count rising edges
^^	move.l	#0,d0
	move.w	d2,d0
	asl.l	#4,d0
	move.l	#-256,a0
	move.w	#4,(a0,d0.l)
;	PRAM[chan][LINK_CTRL]	= 0x0E;				 // no links
^	move.l	#0,d0
	move.w	d2,d0
	asl.l	#4,d0
	move.l	#-256,a0
	move.w	#14,2(a0,d0.l)
;	PRAM[chan][MAX_COUNT]	= 41000;			 // maximum count
^	move.l	#0,d0
	move.w	d2,d0
	asl.l	#4,d0
	move.l	#-256,a0
	move.w	#41000,4(a0,d0.l)
;
;	HOSTSEQ(chan, CONTINUOUS_NO_LINKS); // continuous count, no links
^^	move.l	#-490,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#3,d1
	asl.w	d0,d1
	not.w	d1
	move.w	(a0),d0
	and.w	d1,d0
	move.w	d2,d1
	and.w	#7,d1
	add.w	d1,d1
	move.w	d0,-(sp)
	move.l	#1,d0
	asl.w	d1,d0
	move.w	(sp)+,d1
	or.w	d0,d1
	move.l	#-490,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;	HOSTSERVREQ(chan, ITC_INITIALIZE);	// init
^	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#1,d1
	asl.w	d0,d1
	move.l	#-486,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;	CHANPRIOR(chan,MiddlePrior);
^	move.l	#-482,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#3,d1
	asl.w	d0,d1
	not.w	d1
	move.w	(a0),d0
	and.w	d1,d0
	move.w	d2,d1
	and.w	#7,d1
	add.w	d1,d1
	move.w	d0,-(sp)
	move.l	#2,d0
	asl.w	d1,d0
	move.w	(sp)+,d1
	or.w	d0,d1
	move.l	#-482,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	and.l	#65535,d0
	sub.l	d0,a0
	move.w	d1,(a0)
;	while(HOSTSERVSTAT(chan) & 3) 		// poll until service ends (00)
^.10006
	move.l	#-486,a0
	move.w	d2,d0
	lsr.w	#3,d0
	add.w	d0,d0
	move.l	#0,d1
	move.w	d0,d1
	sub.l	d1,a0
	move.w	d2,d0
	and.w	#7,d0
	add.w	d0,d0
	move.l	#3,d1
	asl.w	d0,d1
	move.w	(a0),d0
	and.w	d1,d0
	and.w	#3,d0
	beq	.10007
;		;
^	bra	.10006
.10007
;}
^.12
	movem.l	(sp)+,d2
	rts
.11
;
;long GetTPUCount(ushort chan)
;{	
# 173
^| .13
	xdef	_GetTPUCount
_GetTPUCount:
;	return ((ulong) (PRAM[chan][TRANS_COUNT]));	// get count
~~ chan 8 "I"
^	move.l	#0,d0
	move.w	4(sp),d0
	asl.l	#4,d0
	move.l	#-256,a0
	move.l	d0,-(sp)
	move.l	#0,d0
	move.l	(sp)+,d1
	move.w	6(a0,d1.l),d0
.14
	rts
;}
^.13
;
;void ResetTPUCount(ushort chan)
;{	
# 178
^| .15
	xdef	_ResetTPUCount
_ResetTPUCount:
;   PRAM[chan][TRANS_COUNT] = 0;
~~ chan 8 "I"
^	move.l	#0,d0
	move.w	4(sp),d0
	asl.l	#4,d0
	move.l	#-256,a0
	clr.w	6(a0,d0.l)
;}
^.16
	rts
.15
;
;void OneSecondInterrupt(void)
;{	
# 183
^| .17
	xdef	_OneSecondInterrupt
_OneSecondInterrupt:
;	ResetTPUCount(TPU_ITC_40_KHZ); 
^	move.w	#7,-(sp)
	jsr	_ResetTPUCount
;	tpuSeconds++;
^	add.l	#1,_tpuSeconds
;	TPUClearInterrupt(TPU_ITC_1_HZ);
^	and.w	#-2,-480
;}
^	add.w	#2,sp
.18
	rts
.17
;
;
;
;
;
;
;
;
;
# 196
|
~ _GetTPUCount * "(l"
~ _ResetTPUCount * "(v"
~ _OneSecondInterrupt * "(v"
~ _SetupTransitionCounter * "(v"
~ _SetupOneSecondInterrupt * "(v"
~ ''
~ 3 4 20
~ preamble 0 "[4I"
~ jump 8 "I"
~ target 10 "L"
~ postamble 14 "[3I"
~ framebuf _framebuf ":" 3
~ tpuSeconds _tpuSeconds "L"
~ _PPWA_Parameters * "c"
~ _ITC_Parameters * "c"
~ _TPU_InitializeTimeKeeping * "(v"
~ _TPU_SetTimeTM * "(v"
~ _TPU_ttmnow * "(:" 2
~ ''
~ 4 2 8
~ quot 0 "l"
~ rem 4 "l"
~ ''
~ 5 2 4
~ quot 0 "i"
~ rem 2 "i"
~ ldiv_t ":" 4
~ div_t ":" 5
~ '__stdio'
~ 6 8 22
~ _bp 0 "#C"
~ _bend 4 "#C"
~ _buff 8 "#C"
~ _flags 12 "I"
~ _unit 14 "c"
~ _bytbuf 15 "C"
~ _buflen 16 "L"
~ _tmpnum 20 "I"
~ FILE ":" 6
~ fpos_t "l"
~ va_list "#c"
~ _PRAM "[8I"
~ ''
~ 7 13 46
~ libVersion 0 "l"
~ ramBase 4 "#c"
~ ramSize 8 "l"
~ ramWaits 12 "i"
~ flashBase 14 "#c"
~ flashSize 18 "l"
~ flashWaits 22 "i"
~ heapBot 24 "#v"
~ heapTop 28 "#v"
~ heapCur 32 "#v"
~ statusReg 36 "I"
~ vectorBase 38 "#v"
~ stackPtr 42 "#v"
~ infoAction "c"
~ TT8info ":" 7
~ _TPUGetPin * "(i"
~ UeeErr "c"
~ time_tt ":" 2
~ XmdmErr "c"
~ FlashErr "c"
~ _InstallHandler * "(#(v"
~ ''
~ 8 4 24
~ eSR 0 "I"
~ ePC 2 "L"
~ vectofs 6 "I"
~ states 8 "[8I"
~ ExcCFramePtr "#:" 3
~ ExcCFrame ":" 3
~ ExcStackFrame ":" 8
~ _mktime * "(L"
~ time_t "L"
~ clock_t "L"
~ wchar_t "c"
~ ptrdiff_t "l"
~ size_t "L"
~ bool "c"
~ vfptr "#(v"
~ ptr "#c"
~ ulpv "#L"
~ ulong "L"
~ uspv "#I"
~ unsint "I"
~ ushort "I"
~ ucpv "#C"
~ uchar "C"
	xref	_TPUGetPin
	xref	_InstallHandler
	xref	_mktime
	xref	.begin
	dseg
	bss	_framebuf,20
	bss	_tpuSeconds,4
	global	_PPWA_Parameters,1
	global	_ITC_Parameters,1
	end