/* 
 * File:     system.c
 * Author:   Eric J. Martin
 * Comments: system setup file for PIC24F16KA101
 * Revision history: 
 */

#include "system.h" 

// Configuration Bits
//

// FBS
#pragma config BWRP = OFF    // Table Write Protect Boot->Boot segment may be written
#pragma config BSS = OFF    // Boot segment Protect->No boot program Flash segment

// FGS
#pragma config GWRP = OFF    // General Segment Code Flash Write Protection bit->General segment may be written
#pragma config GCP = OFF    // General Segment Code Flash Code Protection bit->No protection

// FOSCSEL
#pragma config FNOSC = PRI    // Oscillator Select->Primary oscillator (XT, HS, EC)
#pragma config IESO = ON    // Internal External Switch Over bit->Internal External Switchover mode enabled (Two-Speed Start-up enabled)

// FOSC
#pragma config POSCMOD = EC    // Primary Oscillator Configuration bits->External clock mode selected
#pragma config OSCIOFNC = ON    // CLKO Enable Configuration bit->CLKO output disabled; pin functions as port I/O
#pragma config POSCFREQ = HS    // Primary Oscillator Frequency Range Configuration bits->Primary oscillator/external clock input frequency greater than 8 MHz
#pragma config SOSCSEL = SOSCHP    // SOSC Power Selection Configuration bits->Secondary oscillator configured for high-power operation
#pragma config FCKSM = CSDCMD    // Clock Switching and Monitor Selection->Both Clock Switching and Fail-safe Clock Monitor are disabled

// FWDT
#pragma config WDTPS = PS32768    // Watchdog Timer Postscale Select bits->1:32,768
#pragma config FWPSA = PR128    // WDT Prescaler->WDT prescaler ratio of 1:128
#pragma config WINDIS = OFF    // Windowed Watchdog Timer Disable bit->Standard WDT selected; windowed WDT disabled
#pragma config FWDTEN = OFF    // Watchdog Timer Enable bit->WDT disabled (control is placed on the SWDTEN bit)

// FPOR
#pragma config BOREN = BOR3    // Brown-out Reset Enable bits->Brown-out Reset enabled in hardware; SBOREN bit disabled
#pragma config PWRTEN = ON    // Power-up Timer Enable bit->PWRT enabled
#pragma config I2C1SEL = PRI    // Alternate I2C1 Pin Mapping bit->Default location for SCL1/SDA1 pins
#pragma config BORV = V18    // Brown-out Reset Voltage bits->Brown-out Reset set to lowest voltage (1.8V)
#pragma config MCLRE = ON    // MCLR Pin Enable bit->MCLR pin enabled; RA5 input pin disabled

// FICD
#pragma config ICS = PGx1    // ICD Pin Placement Select bits->PGC1/PGD1 are used for programming and debugging the device
//#pragma config COE = OFF    // Set Clip On Emulation bit->Device will reset into Operational Mode
#pragma config BKBUG = OFF    // Background Debugger Enable bit->Background debugger disabled

// FDS
#pragma config DSWDTPS = DSWDTPSF    // Deep Sleep Watchdog Timer Postscale Select bits->1:2,147,483,648 (25.7 Days)
#pragma config DSWDTOSC = LPRC    // DSWDT Reference Clock Select bit->DSWDT uses LPRC as reference clock
#pragma config RTCOSC = SOSC    // RTCC Reference Clock Select bit->RTCC uses SOSC as reference clock
#pragma config DSBOREN = ON    // Deep Sleep Zero-Power BOR Enable bit->Deep Sleep BOR enabled in Deep Sleep
#pragma config DSWDTEN = ON    // Deep Sleep Watchdog Timer Enable bit->DSWDT enabled

void initSystem(void)
{
    initRegisters();
    initOSC();
    
}

void initOSC(void)
{
    // NOSC PRI; SOSCEN disabled; OSWEN Switch is Complete; 
    __builtin_write_OSCCONL((uint8_t) (0x0200 & 0x00FF));
    // RCDIV FRC/2; DOZE 1:8; DOZEN disabled; ROI disabled; 
    CLKDIV = 0x3100;
    // TUN Center frequency; 
    OSCTUN = 0x0000;
    // WDTO disabled; TRAPR disabled; SLEEP disabled; BOR disabled; DPSLP disabled; SWR disabled; SWDTEN disabled; EXTR disabled; POR disabled; SBOREN disabled; IDLE disabled; IOPUWR disabled; VREGS disabled; 
    RCON = 0x0000;
}

void initRegisters(void) 
{
    /****************************************************************************
     * Setting the Output Latch SFR(s)
     ***************************************************************************/
    LATA = 0x0000;
    LATB = 0x0000;

    /****************************************************************************
     * Setting the GPIO Direction SFR(s)
     ***************************************************************************/
    TRISA = 0x007F;
    TRISB = 0xF117;

    /****************************************************************************
     * Setting the Weak Pull Up and Weak Pull Down SFR(s)
     ***************************************************************************/
    CNPD1 = 0x0000;
    CNPD2 = 0x0000;
    CNPU1 = 0x0000;
    CNPU2 = 0x0000;

    /****************************************************************************
     * Setting the Open Drain SFR(s)
     ***************************************************************************/
    ODCA = 0x0000;
    ODCB = 0x0000;

    /****************************************************************************
     * Setting the Analog/Digital Configuration SFR(s)
     ***************************************************************************/
    AD1PCFG = 0x000C;
}