FILE_TYPE = EXPANDEDNETLIST;
{ Using PSTWRITER 17.2.0 d001 on Jun-22-2020 at 14:01:23 }
NET_NAME
'+VBATT'
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):+VBATT':
 C_SIGNAL='@bellypack2020.schematic1(sch_1):\+vbatt\';
NODE_NAME	U1 1
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15735838@MISC.TPSM842XX.NORMAL(CHIPS)':
 'VIN':;
NODE_NAME	J1 1
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15735951@CONNECTOR.CON2.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C4 1
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736266@CAPACITORS.CAP.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U2 4
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736141@INTEGRATED_CIRCUITS.MAX6043.NORMAL(CHIPS)':
 'IN':;
NODE_NAME	C1 1
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15737576@CAPACITORS.CAP.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C3 1
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15739227@CAPACITORS.CAP_P.NORMAL(CHIPS)':
 '1':;
NET_NAME
'GND'
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):GND':
 C_SIGNAL='@bellypack2020.schematic1(sch_1):gnd';
NODE_NAME	C1 2
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15737576@CAPACITORS.CAP.NORMAL(CHIPS)':
 '2':;
NODE_NAME	U1 2
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15735838@MISC.TPSM842XX.NORMAL(CHIPS)':
 'GND':;
NODE_NAME	J1 2
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15735951@CONNECTOR.CON2.NORMAL(CHIPS)':
 '2':;
NODE_NAME	C2 1
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15737607@CAPACITORS.CAP.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U2 2
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736141@INTEGRATED_CIRCUITS.MAX6043.NORMAL(CHIPS)':
 'GND':;
NODE_NAME	J2 4
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736356@CONNECTOR.CON4.NORMAL(CHIPS)':
 '4':;
NODE_NAME	C4 2
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736266@CAPACITORS.CAP.NORMAL(CHIPS)':
 '2':;
NODE_NAME	J3 3
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736048@CONNECTOR.CON3.NORMAL(CHIPS)':
 '3':;
NODE_NAME	C3 2
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15739227@CAPACITORS.CAP_P.NORMAL(CHIPS)':
 '2':;
NET_NAME
'+5V'
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):+5V':
 C_SIGNAL='@bellypack2020.schematic1(sch_1):\+5v\';
NODE_NAME	U1 3
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15735838@MISC.TPSM842XX.NORMAL(CHIPS)':
 'VOUT':;
NODE_NAME	C2 2
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15737607@CAPACITORS.CAP.NORMAL(CHIPS)':
 '2':;
NODE_NAME	J2 1
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736356@CONNECTOR.CON4.NORMAL(CHIPS)':
 '1':;
NET_NAME
'+10V'
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):+10V':
 C_SIGNAL='@bellypack2020.schematic1(sch_1):\+10v\';
NODE_NAME	U2 6
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736141@INTEGRATED_CIRCUITS.MAX6043.NORMAL(CHIPS)':
 'OUTS':;
NODE_NAME	U2 5
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736141@INTEGRATED_CIRCUITS.MAX6043.NORMAL(CHIPS)':
 'OUTF':;
NODE_NAME	J3 1
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736048@CONNECTOR.CON3.NORMAL(CHIPS)':
 '1':;
NET_NAME
'NC'
 'NC':
 C_SIGNAL='NC';
NODE_NAME	J3 2
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736048@CONNECTOR.CON3.NORMAL(CHIPS)':
 '2':;
NODE_NAME	J2 2
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736356@CONNECTOR.CON4.NORMAL(CHIPS)':
 '2':;
NODE_NAME	J2 3
 '@BELLYPACK2020.SCHEMATIC1(SCH_1):INS15736356@CONNECTOR.CON4.NORMAL(CHIPS)':
 '3':;
END.