/****************************************************************************/
/* Copyright 2010 MBARI.                                                    */
/* MBARI Proprietary Information. All rights reserved.                      */
/****************************************************************************/
#ifndef SYS_DEFS_H
#define SYS_DEFS_H

/* general defs */
#define TRUE    1
#define FALSE   0

#define HI      1
#define LO      0

/* serial I/O defs */
#define SER_CONSOLE     2
#define SER_SPARE       2

/* Daughterboard Type defs */
#define TYPE_OPEN    0
#define TYPE_CPU     1
#define TYPE_PS      2
#define TYPE_LVLS    3
#define TYPE_HVLS    4
#define TYPE_ENVIRON 5
#define TYPE_GFDET   6
#define TYPE_UNASS1  7
#define TYPE_UNASS2  8
#define TYPE_UNASS3  9

/* digital I/O names */

/* digital I/O assignements */
	
#define OUT_0_TRIS TRISBbits.TRISB0
#define OUT_1_TRIS TRISBbits.TRISB1
#define OUT_2_TRIS TRISBbits.TRISB3
#define OUT_3_TRIS TRISBbits.TRISB4
#define OUT_4_TRIS TRISBbits.TRISB8
#define OUT_5_TRIS TRISBbits.TRISB9
#define OUT_6_TRIS TRISBbits.TRISB12
#define OUT_7_TRIS TRISBbits.TRISB13

#define OUT_8_TRIS dummyBit
#define OUT_9_TRIS dummyBit
#define OUT_10_TRIS dummyBit
#define OUT_11_TRIS dummyBit
#define OUT_12_TRIS dummyBit
#define OUT_13_TRIS dummyBit
#define OUT_14_TRIS dummyBit
#define OUT_15_TRIS dummyBit

#define OUT_16_TRIS dummyBit
#define OUT_17_TRIS dummyBit
#define OUT_18_TRIS dummyBit
#define OUT_19_TRIS dummyBit
#define OUT_20_TRIS dummyBit
#define OUT_21_TRIS dummyBit
#define OUT_22_TRIS dummyBit
#define OUT_23_TRIS dummyBit

#define OUT_24_TRIS dummyBit
#define OUT_25_TRIS dummyBit
#define OUT_26_TRIS dummyBit
#define OUT_27_TRIS dummyBit
#define OUT_28_TRIS dummyBit
#define OUT_29_TRIS dummyBit
#define OUT_30_TRIS dummyBit
#define OUT_31_TRIS dummyBit


/* digital I/O assignements */
#define DIG_ADD_0 OUT_BIT_1 /*Digital Bus Address 0 (LSB) */

#define OUT_BIT_0 LATBbits.LATB12 // Digital Bus Address Gate
#define OUT_BIT_1 LATBbits.LATB13 // Digital Bus Address 0 (LSB)
#define OUT_BIT_2 LATBbits.LATB14 // Digital Bus Address 1
#define OUT_BIT_3 LATBbits.LATB15 // Digital Bus Address 2 (MSB)
#define OUT_BIT_4 LATEbits.LATE6 // Digital Bus Out 0
#define OUT_BIT_5 LATEbits.LATE7 // Digital Bus Out 1
#define OUT_BIT_6 LATBbits.LATB3 // SD Card CS* (SPI Bus #2) 
#define OUT_BIT_7 LATBbits.LATB1 // EEPROM Chip CS* (SPI Bus #2) 

#define OUT_BIT_8 LATFbits.LATF0 // Power Supply Digital Out 0
#define OUT_BIT_9 LATFbits.LATF1 // Power Supply Digital Out 1
#define OUT_BIT_10 LATFbits.LATF2 // Power Supply Digital Out 2
#define OUT_BIT_11 LATBbits.LATB8 // EEPROM Chip WP*
#define OUT_BIT_12 LATBbits.LATB9 // EEPROM Chip Hold*
#define OUT_BIT_13 LATDbits.LATD5 // XPort Reset
#define OUT_BIT_14 LATGbits.LATG9 // SPI #1 CS (for daughter boards)
#define OUT_BIT_15 dummyBit 

#define OUT_BIT_16 LATBbits.LATB0 // Spare_01
#define OUT_BIT_17 LATDbits.LATD1 // Spare_02
#define OUT_BIT_18 LATDbits.LATD2 // Spare_03 
#define OUT_BIT_19 LATDbits.LATD3 // Spare_04 
#define OUT_BIT_20 LATDbits.LATD4 // Spare_05 
#define OUT_BIT_21 LATDbits.LATD7 // Spare_06  
#define OUT_BIT_22 LATDbits.LATD8 // Spare_07 
#define OUT_BIT_23 LATEbits.LATE0 // Spare_08 

#define OUT_BIT_24 LATEbits.LATE1 // Spare_09 
#define OUT_BIT_25 LATEbits.LATE2 // Spare_10
#define OUT_BIT_26 LATEbits.LATE3 // Spare_11 
#define OUT_BIT_27 LATGbits.LATG2 // Spare_12 
#define OUT_BIT_28 dummyBit 
#define OUT_BIT_29 dummyBit  
#define OUT_BIT_30 dummyBit 
#define OUT_BIT_31 dummyBit 


#define IN_BIT_0 PORTFbits.RF5 // Slave Interrupt 0
#define IN_BIT_1 PORTFbits.RF4 // Slave Interrupt 1
#define IN_BIT_2 PORTFbits.RF3 // Slave Interrupt 2
#define IN_BIT_3 PORTEbits.RE4 // Digital Bus In 0
#define IN_BIT_4 PORTEbits.RE5 // Digital Bus In 1
#define IN_BIT_5 PORTBbits.RB10 // SD Card Detect
#define IN_BIT_6 PORTBbits.RB11 // SD Card Write Protect
#define IN_BIT_7 PORTDbits.RD6 // XPort Bootmode

#define IN_BIT_8 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_9 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_10 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_11 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_12 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_13 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_14 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_15 dummyBit // Placeholder for Spare_xx Inputs (if needed)

#define IN_BIT_16 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_17 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_18 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_19 dummyBit // Placeholder for Spare_xx Inputs (if needed)
#define IN_BIT_20 dummyBit 
#define IN_BIT_21 dummyBit 
#define IN_BIT_22 dummyBit 
#define IN_BIT_23 dummyBit 

#define IN_BIT_24 dummyBit 
#define IN_BIT_25 dummyBit
#define IN_BIT_26 dummyBit 
#define IN_BIT_27 dummyBit 
#define IN_BIT_28 dummyBit 
#define IN_BIT_29 dummyBit  
#define IN_BIT_30 dummyBit 
#define IN_BIT_31 dummyBit 


#endif