/****************************************************************************/
/* Copyright 2009 MBARI.                                                    */
/* MBARI Proprietary Information. All rights reserved.                      */
/****************************************************************************/
/* config.h derived from Microchip AN1157                                   */
/****************************************************************************/
#ifndef CONFIG_H
#define CONFIG_H

/* bootloader FW version */
#define MAJOR_VERSION   0x01   
#define MINOR_VERSION   0x00

/* instruction cycle speed (Fosc/2) */
#define FCY 1843200
/****************************************************************************/
/*                        Flash layout for bootloader                       */
/****************************************************************************/
/* Page 0 - 2 : Reserved for bootloader                                     */
/* Page     3 : Remapped IVT and AIVT                                       */
/* Page     4 : Parameter block and bootloader flag                         */
/* Page 5 - 7 : Used by application                                         */
/* Page     8 : Reset vector for application                                */
/****************************************************************************/
#define APP_RESET_VECTOR    0x2000

#define BOOT_RESET_VECTOR   0x0400
#define BOOT_LOADER_END     0x0BFF
#define BOOT_FLAG_ADDR      0x1000

#define CONFIG_START    0x157FA
#define CONFIG_END      0x157FE

/* flash memory configuration */
#define PM_INSTR_SIZE   4       /* bytes per instruction         */
#define PM_ROW_SIZE     256     /* user flash row size in bytes  */
#define PM_PAGE_SIZE    2048    /* user flash page size in bytes */
     
/* self-write NVMCON opcodes */
#define PM_ROW_WRITE    0x4001  /* NVM row write opcode  */
#define PM_WORD_WRITE   0x4003  /* NVM word write opcode */
#define PM_PAGE_ERASE   0x4042  /* NVM page erase opcode */

#define MAX_PACKET_SIZE 261

/* protocol commands */
#define RD_VER      0x00
#define RD_FLASH    0x01
#define WT_FLASH    0x02
#define ER_FLASH    0x03
#define RD_EEDATA   0x04
#define WT_EEDATA   0x05
#define RD_CONFIG   0x06
#define WT_CONFIG   0x07
#define VERIFY_OK   0x08

/* communications control bytes */
#define STX 0x55
#define ETX 0x04
#define DLE 0x05

#endif