########################
# bootloader for carbon waveglider
- uses microchip 16-bit bootloader and unified host
- unified host translates records, bootloader writes bytes to flash (small footpring, but can’t just paste hex to console)

// doc on microchip unified bootloader libraries and host application
https://www.microchip.com/SWLibraryWeb/product.aspx?product=16-bit-Bootloader
http://ww1.microchip.com/downloads/en//softwarelibrary/16-bit-bootloader/bootloader16bit-1.17.2.mc3lib
http://ww1.microchip.com/downloads/en//softwarelibrary/16-bit-bootloader/release_notes_bootloader_1_17_2.pdf
http://ww1.microchip.com/downloads/en//softwarelibrary/16-bit-bootloader/unifiedhost-1.16.1-bin.zip

// PIC24FJ AIVT howto
https://microchipsupport.force.com/s/article/How-to-use-the-Alternate-Interrupt-Vector-Table-AIVT-on-PIC24FJ

// PIC24FJ1024GA6XX data sheet
http://ww1.microchip.com/downloads/en/DeviceDoc/PIC24FJ1024GA610-GB610-Family-Data-Sheet-DS30010074G.pdf
// XC16 assembler/linker users guide
https://ww1.microchip.com/downloads/en/DeviceDoc/DS50002106D.pdf
// XC16 release notes (w/ note about BSLIM)
http://ww1.microchip.com/downloads/en/DeviceDoc/Readme_XC16_150.html

// XC8 compiler users guide (for hexmate use info)
http://ww1.microchip.com/downloads/en/devicedoc/50002053g.pdf
//Home » Software Development Tools for Microchip MCUs » MPLAB® XC8 C Compiler » Using Hexmate On the Command Line
https://microchipdeveloper.com/xc8:hexmate-cli

// app note 1157 (serial bootloader for pic14f (old, but useful)
http://ww1.microchip.com/downloads/en/AppNotes/01157a.pdf

########################
# hurdles
- the documentation is obsolete and wasn’t good in the first place
- most info in forums is also out of date and involves (now) unneccesary voodoo with linker scripts and hacks for compiler bugs
- creating unified binary (containing both bootloader and application, i.e. ‘factory’ image)

########################
# keys to success
// understand basic code bits:
- PIC24FJ1024G606 has 
  - separate program and data memory (all flash)
  - program memory can be divided into single or dual partitions
  - may be configured with one or two interrupt vector tables: IVT (primary) AIVT (alternate)
  - configuration registers at the upper flash addresses control clocks, partitioning, etc.
  - program memory addresses are 0-0xABEFF
  - configuration registers are just above program addresses

- we’re using single partition mode and both IVT (boot loader) and AIVT (app)
- bootloader and it’s IVT (interrupt vector table) are at the beginning of flash
  0x0000        main reset vector
  0x0002-0x00ff IVT 
  0x0100-0x17FF bootloader code
  0x1800        application reset vector (always at the start of the page after the boot loader
  0x1801-0x19FF application code
  0x1A00~0x1A?? application AIVT (always 0x200 into the application, length depends on how many interrupts the app has)
  …       application code

- Both the bootloader and application need to have (almost) identical configuration bits. 
It is important that 
- both enable the boot segment (though the bootloader sets the size to zero).
- both enable writing to the boot segment and general segment
- boot disable CodeGuard is disabled
- both enable multiple configurations (IOL1WAY OFF)

// FSEC
BWRP = OFF     //Boot Segment Write-Protect bit->Boot Segment may be written
BSS = DISABLED //Boot Segment Code-Protect Level bits->No Protection (other than BWRP)
BSEN = ON      //Boot Segment Control bit->Boot Segment size determined by FBSLIM
GWRP = OFF     //General Segment Write-Protect bit->General Segment may be written
GSS = DISABLED //General Segment Code-Protect Level bits->No Protection (other than GWRP)
CWRP = OFF     //Configuration Segment Write-Protect bit->Configuration Segment may be written
CSS = DISABLED //Configuration Segment Code-Protect Level bits->No Protection (other than CWRP)
AIVTDIS = ON   //Alternate Interrupt Vector Table bit->Enabled AIVT

// FBSLIM [1]
// bootloader uses BSLIM=0x1FFF (zero length)
// app uses BSLIM = (1's complement of) number bootloader pages (0x800 bytes/page)
// MCC warns if bootloader and app use different settings; also, the 
// linker (XC16 v1.50) indicates that pragma for default value doesn't work.
// However, if the pragma isn't specified, it assumes the default value (0x1FFF).
// Solution: set app and bootloader BSLIM to the value needed for the app, 
// then comment out the pragma in the bootloader system.c
// App
#pragma config BSLIM = 8188    //Boot Segment Flash Page Address Limit bits->8188
// Bootloader
//#pragma config BSLIM = 8188    //Boot Segment Flash Page Address Limit bits->8188

// FOSC
#pragma config POSCMD = XT     //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
#pragma config OSCIOFCN = ON   //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
#pragma config SOSCSEL = OFF   //SOSC Power Selection Configuration bits->Digital (SCLKI) mode
#pragma config PLLSS = PLL_PRI //PLL Secondary Selection Configuration bit->PLL is fed by the Primary oscillator
#pragma config IOL1WAY = OFF   //Peripheral pin select configuration bit->Allow multiple reconfigurations
#pragma config FCKSM = CSDCMD  //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled

// FBOOT
BTMODE = SINGLE    //Boot Mode Configuration bits->Device is in Single Boot (legacy) mode

[1] set the same in bootloader and app MCC, but comment out in bootloader system.c so it assumes the default 0x1ffc value]
- The bootloader FBSLIM register should be 0x1FFF (boot segment 0) 
- The application FBSLIM should be set to reflect the size of the boot segment (see below) 

In application and bootloader main, the interrupt vector table must be selected first thing in the project main.c:
int main(void)
{
    // select primary interrupt vector table
    // (IVT, addr 0x02-0xFF)
    INTCON2bits.AIVTEN = 0;
    // initialize the device
     SYSTEM_Initialize();
…
int main(void)
{
    // read and reset RCON (reset status register)
    g_rcon=RCON;
    RCON &= ~(0xFFFF);
    
    // select alternate interrupt vector table 
    // (AIVT, mapped to 0x1A00 by MCC, length varies with number of interrupts)
    INTCON2bits.AIVTEN = 1;
…

// Projects and configurations
The doc (Bootloader Generator User Guide) is old, specific to XC8, and aimed at making a unified hex file with both bootloader and app (e.g. for factory loading). Most of that doc doesn’t apply and/or is out of date.

- used separate projects for bootloader and app
- for both bootloader and app, MCC generates code stubs related to the bootloader (mcc_generated_files/boot/)
- The bootloader used a single configuration (there is no need to remove configurations as the doc suggests, but make sure they match where needed)
The only place they really need to differ is in the size of the boot segment (FBSLIM).
- files inclusion/exclusion is selected by opening project properties -> File Inclusion/Exclusion (then selecting the configuration)
- both projects should include the mcc generated code 
- both projects should exclude the flash component memory block (memory_partion.S or similar) generated by mcc
- both projects should use the same memory model (gcc config, large code, large data)
- bootloadr should create a default ISR, app should not (ld config)
- neither should disable interrupt vector table (ld config)
- app should include the bootloader project as a loadable (project properties->Loading> Add Loadable Project…(set project path), check INCLUDE (again, be sure that the flash memory partion is excluded from the build)

To configure app standalone (no bootloader)
- duplicate bootloadable app configuration (e.g. appbl config -> appsa)
- exclude boot files
- ENABLE generate default ISR

########################
# Unified binary (bootloader+app in single hex file)
# [still pending troubleshooting…]

- duplicate bootloadable app config (appbl), config name appbl-uni eg
- add loadable project (properties > Loading > Add Loadable Project > 
  - (add path to bootloader project, use main configuration (e.g. bload)
  - check the include box 
- building the appbl-uni configuration will then compile and link the bootloader and application code,
which creates hex files for the two projects.
The makefile then calls a utility called hexmate to merge the hex files.
In theory, the two shouldn’t overlap.
However, the hexmate merge step fails, because the autogenerated hexmate command in the makefile can’t resolve diffs in the hex files:

(944) data conflict at address 0h between dist/appbl_uni/production/cwg-pic.X.production.hex and ../../cwg-bl/cwg-bl.X/dist/WITH_CONFIGS/production/cwg-bl.X.production.hex

In reality, there are a couple of places where the two hex files may be different:
- the main reset vector at address 0x0 (the bootloader jumps to 0x100, the app jumps to the app main entry startup code, remapped by the linker to 0x1A48 [1].
- some IVT entries (0x02-0xFF) may differ where the bootloader handles interrupts that aren’t handled by the app or assigned to the app default ISR [2]

- The configuration registers (near the end of both files), at address 0xABFFE *may* differ, but should not. If they do, use MCC 

[1] the address depends on the bootloader size set in the MCC bootloader library setting. 
In our app, the app stuff is all mapped to 0x1800 and above; the AIVT starts at 0x1A00.
[2] these are determined in the MCC bootloader library configuration. Interrupts used by the bootloader must be set to “Keep in bootloader” (left column) and will be put in the IVT (0x2-FF)
Interrupts that are handled by the app should be set to “Remap to Application” (center column), and will be placed in the AIVT (0x1A00 in our app, decided by MCC/the linker)
Other interrupts should be put in the “Remap to application default” (right column); these are all assigned to a default ISR in the AIVT. 
Counterintuitively, the linker configuration “Create Default ISR” option (properties > gcc-ld > General) should be enabled in the bootloader and disabled in the app.
I think this is so that the bootloader library and linker can conspire :o) If it’s set in the application, it will cause linker warnings/errors (unable to allocate <some ISR entry>)

// find hexmate command used by MPLAB 
// the command is auto-generated by MPLAB when creating a unified hex file by specififying a loadable project/hex file
grep -ir hexmate . 

./carbonwg-pic/cwg-pic.X/nbproject/Makefile-appbl_uni.mk:	@"/Applications/microchip/mplabx/v5.40/mplab_platform/platform/../mplab_ide/modules/../../bin/hexmate" --edf="/Applications/microchip/mplabx/v5.40/mplab_platform/platform/../mplab_ide/modules/../../dat/en_msgs.txt" -break=1003000  dist/${CND_CONF}/${IMAGE_TYPE}/cwg-pic.X.${IMAGE_TYPE}.hex ../../cwg-bl/cwg-bl.X/dist/WITH_CONFIGS/production/cwg-bl.X.production.hex -odist/${CND_CONF}/production/cwg-pic.X.production.unified.hex

or more simply:

hexmate -edf=“/path/to/hexmate/message/text” -break=<address[1]> <hexfile> <hexfile> -o<path/to/output/hex[2]>

[1] see hexmate manual
[2] default is stdout

We can use the hexmate ‘+’ operator to select which version to use if there are difference

  export APHEX=carbonwg-pic/cwg-pic.X/dist/appbl/production/cwg-pic.X.production.hex 
  export BLHEX=cwg-bl/cwg-bl.X/dist/WITH_CONFIGS/production/cwg-bl.X.production.hex

Make two unified versions, one using bootloader version if different, the other using the app
  /Applications/microchip/mplabx/v5.40/mplab_platform/bin/hexmate -break=1003000 +$APHEX $BLHEX > unia.hex
  /Applications/microchip/mplabx/v5.40/mplab_platform/bin/hexmate -break=1003000 $APHEX +$BLHEX > unib.hex

Diffing those shows the areas of overlap
  diff apbl.hex blap.hex 
1,2c1,2
< :10000000481A040000000000041A0000081A00004A
< :10001000FE1900000C1A0000101A0000001A00005F
---
> :100000000001040000000000041A0000081A0000AB
> :10001000980200000C1A0000101A0000001A0000DC
7c7
< :10006000001A0000FE190000001A0000001A00002B
---
> :10006000001A00006E140000001A0000001A0000C0
25c25
< :10018000001A0000FE190000FE190000FE19000010
---
> :10018000001A00007E03000016030000BA020000FF

The differences are all in the IVT; should be OK use the version that favors bootloader on differences (unib.hex)
import unib into mblab as project and write (or use MPE)
[but it doesn’t work…IVT isn’t right]
hexmate seems to be putting NOP instead of goto IVT entry 

tried srec_cat (linux, mac ports (uses boost :o( )
found a simpler solution:
use mplab to load the bootloader 
use the bootloader to load the app
use mplab to read the flash image to a hex file (e.g. cwg-uni.hex)
use mplab IDE or IPE to program the hex file 
(in IDE, import the hex file as a project)

########################
# Loading sequence
hardware must have bootloader installed
open a terminal to the console port (38400N81)
reset the hardware 
after initial LED flash (2s on), type UUUU within 10s
- each time a U is received, the LED should flash and a U is echoed to the console
- after sequece received (or ~10s), the LED will 
  - flash 3x [no sequence received, running app)
  - stay on (sequence received, ready to program)
- close the terminal and open the unified host app
- load the bootloadable application hex image
- configure the serial settings
- select the PIC device type
- enter the application starting address (0x1800) and length (0xABEFF)
- optionally disable read-back verification (speeds operation)
- it is recommended to enable the option to reset the device after programming (to restart the hardware)
- click the button to start the programming cycle
- close the unified host

after programming is complete, the LED should indicate that it is running the application.
The app blinks the LED at 1 Hz when it is awake 
Open a terminal to the console (9600N81); the app should respond

########################
# Basic flow
  - The main reset vector (0x00) jumps to the bootloader entry (0x100)
  - bootloader executes, deciding whether to boot the app or load an image
  - application logic for when/how to do bootload is in boot_demo.c,h (user implements functions)
  - the bootloader part of the image loading protocol is in boot_process.c,h 
  - to load an image, it stays in the bootloader and waits for the unified host to connect and send an image (reset on completion)
  - when it’s time to load

// getting the bootloader size right
In order to build the bootloader, you first have to configure the 16-bit bootloader component in MCC, which needs to know how big the boot segmenth is…chicken and egg. Just start with something sensible; my bare-bones UART based bootloader was ~1200 bytes. 
The boot segment must be given in Flash pages (800 bytes)
After configuring and building the bootloader app, use mplab target memory view to see that last address in the bootloader code
then go back to mcc and round to the nearest page (0x800) boundary. example, my bootloader is 0x1200 bytes, so the next page up is 0x1800, so that’s what is entered into the bootloader MCC configuration. MCC automatically decides where to remap the application vectors (

  The FBSLIM register is an inverted page count (so that adding zeros always increases the size)
  round the bootloader size (in bytes) up too the nearest page boundary (0x?800) and divide by the page size (0x800 for this part), and take the 1’s complement 
  - e.g. : 0x1200 (bytes in bootloader) -> (divide by page size) 0x1800/0x800 -> 0x3 pages -> (invert)-> 0x1FFC -> FBSLIM.BSLIM

########################
# bootloader operation

- on boot, wait for character sequence (console 38400N81)
- if detected (or no app is loaded), run bootloader
- if not detected and app is valid, run application (console 9600N81)
- use microchip Unified Host (java app) to upload app image

create new project for bootloader
Use MCC to configure bootloader firmware
- add uart
- add flash (for flash IO)
- add 16-bit bootloader library
- add gpio (e.g enable)
- generate 

Use MCC to add 16-bit bootloader application library to application
- set FSEC reg
- configure boot loader application (bootloader project path)

Be careful about accepting changes to SYSTEM_INITIALIZE; it suggests putting interrupt initialization and BOOT_Initialize before clocks and uarts 
It would do pins > clocks > interrputs>uarts> other init
after generating code, modifed customized boot_demo
- added some definitions and libpic30 for timing (w/o interrupt)
/// @def XTFREQ
/// @brief on-board crystal frequency
/// nominal 4 MHz
#define XTFREQ      _XTAL_FREQ 

/// @def PLLMODE
/// @brief on-chip PLL config
#define PLLMODE     1 

/// @def FOSC
/// @brief internal clock frequency
#define FOSC        (XTFREQ * PLLMODE)

/// @def FCY
/// @brief instruction cycle frequency
#define FCY         (FOSC / 2)

#include <libpic30.h>
// some LED blink macros and a function (using RD8 in my app)
#define LED_BLINK(t) blink_led(t,t)
#define LED_ON() PORTDbits.RD8=1
#define LED_OFF() PORTDbits.RD8=0

.c:
- define function EnterBootLoadMode [get input from UART4, return true if “UUUU” received]
- added some blinking LED to indicate various conditions
  - on for 2s entering bootloader firmware
  - blink when U detected
  - blink 3x if booting boot sequence detecte, 5x if booting

configure bootloader using mcc
- uart (different from app uart, using same IO pins)
- flash peripheral (include files generated, exclude flash memory segment.S)
- 16-bit bootloader (library) 
- IO pins : blinky, uart transceiver enable(s)

MCC generatess project code, including 
- uart 4 driver
- flash IO driver
- gpio driver
- interrupt handlers
- 16-bit bootloader (firmware (boot_demo) + protocol ( boot_process) )

seemingly, changing the bootloader uart to a different speed from the app uart made it work.

configure system clocks to match app 
for boot loader, use different UART peripherial w/ same host console IO pins (RD1:tx RD2:Rx)
MCC settings that matter: 
System : clocks, FSEC register

////////////////////////////////////
///////////////////i/////////////////
// cwg boot loader build (WITH_CONFIGS

// include files (note flash segment excluded)
	•	mcc_generated_files/boot/boot_private.h 
	•	mcc_generated_files/boot/com_adaptor.h 
	•	mcc_generated_files/boot/boot_demo.h 
	•	mcc_generated_files/boot/boot_config.h 
	•	mcc_generated_files/boot/boot_process.h 
	•	mcc_generated_files/memory/flash.h 
	•	mcc_generated_files/interrupt_manager.h 
	•	mcc_generated_files/clock.h 
	•	mcc_generated_files/mcc.h 
	•	mcc_generated_files/pin_manager.h 
	•	mcc_generated_files/traps.h 
	•	mcc_generated_files/system.h 
	•	mcc_generated_files/uart4.h 
	•	mcc_generated_files/boot/contract.json 
	•	mcc_generated_files/boot/boot_demo.c 
	•	mcc_generated_files/boot/com_adaptor_uart.c 
	•	mcc_generated_files/boot/interrupts.S 
	•	mcc_generated_files/boot/hardware_interrupt_table.S 
	•	mcc_generated_files/boot/boot_verify_not_blank.c 
	•	mcc_generated_files/boot/boot_process.c 
	•	mcc_generated_files/memory/flash.s 
	•	mcc_generated_files/system.c 
	•	mcc_generated_files/clock.c 
	•	mcc_generated_files/interrupt_manager.c 
	•	mcc_generated_files/mcc.c 
	•	mcc_generated_files/pin_manager.c 
	•	mcc_generated_files/traps.c 
	•	mcc_generated_files/uart4.c 
	•	main.c 

allow ICD to select memories
// Loading
Load symbols when programming…
No Loadable projects/files
// XC16 General
Code Model Large
Data Model Large
Optimization 0

// XC16 Global
use legacy libc
don’t delete intermediate files
common include dirs ../cwg-pic.X
partition single
// XC16 gcc.Preprocessing, Messages
extra warnings

// XC16 as
all defaults (nothing selected)
// XC16 gcc.general
generate debugging info
// XC16 gcc.MemoryModel
Code Model Large
Data Model Large
Optimization 0

// XC16 ld.general
min stack 16
use local stack
init data sections
pack data template
create handles
fill value for upper byte of data 0
stack guardband size 16
// XC16 ld.diagnostics
display memory usage

// XC16 ld.additional options
--verbose

// Configuration bits: selected in the GUI

// FSEC
#pragma config BWRP = OFF    //Boot Segment Write-Protect bit->Boot Segment may be written
#pragma config BSS = DISABLED    //Boot Segment Code-Protect Level bits->No Protection (other than BWRP)
#pragma config BSEN = ON    //Boot Segment Control bit->Boot Segment size determined by FBSLIM
#pragma config GWRP = OFF    //General Segment Write-Protect bit->General Segment may be written
#pragma config GSS = DISABLED    //General Segment Code-Protect Level bits->No Protection (other than GWRP)
#pragma config CWRP = OFF    //Configuration Segment Write-Protect bit->Configuration Segment may be written
#pragma config CSS = DISABLED    //Configuration Segment Code-Protect Level bits->No Protection (other than CWRP)
#pragma config AIVTDIS = ON    //Alternate Interrupt Vector Table bit->Enabled AIVT

// FBSLIM
//#pragma config BSLIM = 8188    //Boot Segment Flash Page Address Limit bits->8191

// FOSCSEL
#pragma config FNOSC = PRI    //Oscillator Source Selection->Primary Oscillator (XT, HS, EC)
#pragma config PLLMODE = DISABLED    //PLL Mode Selection->No PLL used; PLLEN bit is not available
#pragma config IESO = OFF    //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source

// FOSC
#pragma config POSCMD = XT    //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
#pragma config OSCIOFCN = ON    //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
#pragma config SOSCSEL = OFF    //SOSC Power Selection Configuration bits->Digital (SCLKI) mode
#pragma config PLLSS = PLL_PRI    //PLL Secondary Selection Configuration bit->PLL is fed by the Primary oscillator
#pragma config IOL1WAY = OFF    //Peripheral pin select configuration bit->Allow multiple reconfigurations
#pragma config FCKSM = CSDCMD    //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled

// FWDT
#pragma config WDTPS = PS32768    //Watchdog Timer Postscaler bits->1:32768
#pragma config FWPSA = PR128    //Watchdog Timer Prescaler bit->1:128
#pragma config FWDTEN = OFF    //Watchdog Timer Enable bits->WDT and SWDTEN disabled
#pragma config WINDIS = OFF    //Watchdog Timer Window Enable bit->Watchdog Timer in Non-Window mode
#pragma config WDTWIN = WIN25    //Watchdog Timer Window Select bits->WDT Window is 25% of WDT period
#pragma config WDTCMX = WDTCLK    //WDT MUX Source Select bits->WDT clock source is determined by the WDTCLK Configuration bits
#pragma config WDTCLK = LPRC    //WDT Clock Source Select bits->WDT uses LPRC

// FPOR
#pragma config BOREN = ON    //Brown Out Enable bit->Brown Out Enable Bit
#pragma config LPCFG = OFF    //Low power regulator control->No Retention Sleep
#pragma config DNVPEN = ENABLE    //Downside Voltage Protection Enable bit->Downside protection enabled using ZPBOR when BOR is inactive

// FICD
#pragma config ICS = PGD2    //ICD Communication Channel Select bits->Communicate on PGEC2 and PGED2
#pragma config JTAGEN = OFF    //JTAG Enable bit->JTAG is disabled
#pragma config BTSWP = OFF    //BOOTSWP Disable->BOOTSWP instruction disabled

// FDEVOPT1
#pragma config ALTCMPI = DISABLE    //Alternate Comparator Input Enable bit->C1INC, C2INC, and C3INC are on their standard pin locations
#pragma config TMPRPIN = OFF    //Tamper Pin Enable bit->TMPRN pin function is disabled
#pragma config SOSCHP = ON    //SOSC High Power Enable bit (valid only when SOSCSEL = 1->Enable SOSC high power mode (default)
#pragma config ALTVREF = ALTVREFDIS    //Alternate Voltage Reference Location Enable bit->VREF+ and CVREF+ on RB0, VREF- and CVREF- on RB1

// FBOOT
#pragma config BTMODE = SINGLE    //Boot Mode Configuration bits->Device is in Single Boot (legacy) mode

#include "pin_manager.h"
#include "clock.h"
#include "system.h"
#include "uart4.h"
#include "boot/boot_process.h"
#include "interrupt_manager.h"
#include "traps.h"
#include "memory/flash.h"

void SYSTEM_Initialize(void)
{
    BOOT_Initialize();
    PIN_MANAGER_Initialize();
    CLOCK_Initialize();
    INTERRUPT_Initialize();
    UART4_Initialize();
}

// bootloader MCC highlights
configure system clocks to match app 
// System
Primary Osc
400000000
PLL En (default)
FOSC 4 mhz
FOS/2 2 MHZ
osc2 is gpio 
communicates on PGEC2 and PGED2
WDT and SWDTEN disabled 
WDT clock settings default (uses LPRC, non-window mode, time prescalar 1:128, time postscalar 1:32768, timeout 135.3s)
FBOOT 0x3
FBOOT.BTMODE single
FBSLIM 0x1fff
FBSLIM.BSLIM 0x1fff
FSEC=0xFE7
FSEC.AIVTDIS enable AIVT
FSEC.BSEN bootseg size determined by FBSLIM
FSEC.BWRP bootseg may be written
FSEC.BSS no protection other than bwrp
FSEC.CSS no protection other than cwrp
FSEC.CWRP may be written
FSEC.GSS no protection other than gwrp
FSEC.GWRP may be written
FDEVOPT1 0xE
FICD 0x8002
FOSC 0x91
FOSCSEL 0x7A
FSEC 0xFE7
FWDT 0x6B9F
CLKDIV 0x3200
DCOCON 0x700
DCOTUN 0x0
OSCDIV 0x0
OCSFDIV 0x0
OSCTUN 0x0
…
// 16-bit Bootloader : Bootloader
UART : UART4 (match peripheral selected)
Bootloader end address 0x1800 (must align to 0x800 address and be large enough to fit bootloader code)
Enable reset command
enable read command 
verification scheme not blank
interrupt table remmapping:
Keep in bootloader (used by bootloader, stored in bootloader IVT)
NVMError
NVM Interrupt
U4RX
U4TX
U4Err
Remap to Application: (used by app, stored in app AIVT)
Int0Interrupt
T1 Interrupt
T2 Interrupt
U1RX
U1TX
U1Err
U2RX
U2TX
U2Err
U3RX
U3TX
U3Err

Remap to application default ()
- all other interrupts

// Flash 
enable interrupt program/erase complete
NVMCON 0x1
NVMKEY 0x0

// Interrupt Module
enable U4E, U4TX U4RX, NVM

// Pin Module
U4TX : RD1 : start high, output
U4RX : RD2 : input
RD3,6,8: output

// UART4
38400N81
enable uart
enable interrupts

// application MCC highlights

// System
FBSLIM 0x1ffc
FBSLIM.BSLIM 0x1ffc
FSEC=0x8FE7
FSEC.AIVTDIS disable AIVT
MCC notifications will warn about different BSLIM
OK to ignore, must be set to correct value in application system.c and commented out in bootloader system.c 
this is due to a linker limitation that doesn’t allow the pragma BSLIM=0x1fff to work
the bootloader needs this value, so commenting out the pragma in the bootloader system.c causes  BSLIM to have the correct default value (0x1fff)
for the application, it needs to have the value 0x1ffc (3 pages for 0x1000<bootloader size<0x1800) - just set BSLIM-0x1ffc and use the generated pragma in application system.c

////////////////////////////////////
////////////////////////////////////
// cwg boot loader app build (appbl config)

/// include files
	•	mcc_generated_files/boot/boot_config.h 
	•	mcc_generated_files/interrupt_manager.h 
	•	mcc_generated_files/uart1.h 
	•	mcc_generated_files/uart2.h 
	•	mcc_generated_files/uart3.h 
	•	mcc_generated_files/ext_int.h 
	•	mcc_generated_files/clock.h 
	•	mcc_generated_files/spi1.h 
	•	mcc_generated_files/adc1.h 
	•	mcc_generated_files/mcc.h 
	•	mcc_generated_files/pin_manager.h 
	•	mcc_generated_files/tmr1.h 
	•	mcc_generated_files/tmr2.h 
	•	mcc_generated_files/system.h 
	•	mcc_generated_files/adc_module_features.h 
	•	../src/timers.h 
	•	../src/script.h 
	•	../src/proto.h 
	•	../src/ui.h 
	•	../src/config.h 
	•	../src/cli_api.h 
	•	../src/pic24.h 
	•	../src/a2d.h 
	•	../src/iodisk.h 
	•	../src/ff.h 
	•	../src/ffconf.h 
	•	../src/buffer.h 
	•	../src/log.h 
	•	../src/cwgconf.h 
	•	../src/licor8xx.h 
	•	../src/rtc.h 
	•	../src/cli_impl.h 
	•	../src/ioserial.h 
	•	../src/GenericTypeDefs.h 
	•	../src/iospi.h 
	•	../src/cwgsys.h 
	•	../src/iodigital.h 
	•	../src/traps.h 
	•	../src/z85.h 
	•	../src/cwg-shared.h 
	•	../src/iowfile.h 
	•	../src/licor8xx-shared.h 
	•	../src/logutils.h 
	•	../src/fileutils.h 
	•	mcc_generated_files/boot/user_interrupt_table.S 
	•	mcc_generated_files/boot/remapped_reset.S 
	•	mcc_generated_files/boot/interrupts.S 
	•	mcc_generated_files/boot/hardware_interrupt_table.S 
	•	mcc_generated_files/uart3.c 
	•	mcc_generated_files/spi1.c 
	•	mcc_generated_files/system.c 
	•	mcc_generated_files/clock.c 
	•	mcc_generated_files/adc1.c 
	•	mcc_generated_files/ext_int.c 
	•	mcc_generated_files/interrupt_manager.c 
	•	mcc_generated_files/mcc.c 
	•	mcc_generated_files/pin_manager.c 
	•	mcc_generated_files/tmr1.c 
	•	mcc_generated_files/tmr2.c 
	•	mcc_generated_files/uart1.c 
	•	mcc_generated_files/uart2.c 
	•	../src/log.c 
	•	../src/ff.c 
	•	../src/buffer.c 
	•	../src/iodisk.c 
	•	../src/cli_impl.c 
	•	../src/licor8xx.c 
	•	../src/rtc.c 
	•	../src/cwgconf.c 
	•	../src/ioserial.c 
	•	../src/iodigital.c 
	•	../src/cwgsys.c 
	•	../src/iospi.c 
	•	../src/main.c 
	•	../src/timers.c 
	•	../src/config.c 
	•	../src/ui.c 
	•	../src/script.c 
	•	../src/pic24.c 
	•	../src/cli_api.c 
	•	../src/a2d.c 
	•	../src/addrtrap.s 
	•	../src/proto.c 
	•	../src/traps.c 
	•	../src/z85.c 
	•	../src/cwg-shared.c 
	•	../src/iowfile.c 
	•	../src/licor8xx-shared.c 
	•	../src/logutils.c 
	•	../src/fileutils.c 

allow ICD to select memories
// Loading
Load symbols when programming…
No Loadable projects/files
// XC16 General
Code Model Large
Data Model Large
Optimization 0

// XC16 Global
use legacy libc
don’t delete intermediate files
common include dirs ../cwg-pic.X
// XC16 as
all defaults (nothing selected)
// XC16 gcc.general
generate debugging info
// XC16 gcc.MemoryModel
Code Model Large
Data Model Large
Optimization 0
// XC16 gcc.Preprocessing, Messages
extra warnings

// XC16 ld.general
min stack 16
use local stack
init data sections
pack data template
create handles
create default ISR

fill value for upper byte of data 0
stack guardband size 16

// XC16 ld.diagnostics
display memory usage

// XC16 ld.additional options
--verbose

// Configuration bits: selected in the GUI

// FSEC
#pragma config BWRP = OFF    //Boot Segment Write-Protect bit->Boot Segment may be written
#pragma config BSS = DISABLED    //Boot Segment Code-Protect Level bits->No Protection (other than BWRP)
#pragma config BSEN = ON    //Boot Segment Control bit->Boot Segment size determined by FBSLIM
#pragma config GWRP = OFF    //General Segment Write-Protect bit->General Segment may be written
#pragma config GSS = DISABLED    //General Segment Code-Protect Level bits->No Protection (other than GWRP)
#pragma config CWRP = OFF    //Configuration Segment Write-Protect bit->Configuration Segment may be written
#pragma config CSS = DISABLED    //Configuration Segment Code-Protect Level bits->No Protection (other than CWRP)
#pragma config AIVTDIS = ON    //Alternate Interrupt Vector Table bit->Ensabled AIVT

// FBSLIM
#pragma config BSLIM = 8188    //Boot Segment Flash Page Address Limit bits->8191

// FOSCSEL
#pragma config FNOSC = PRI    //Oscillator Source Selection->Primary Oscillator (XT, HS, EC)
#pragma config PLLMODE = DISABLED    //PLL Mode Selection->No PLL used; PLLEN bit is not available
#pragma config IESO = OFF    //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source

// FOSC
#pragma config POSCMD = XT    //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
#pragma config OSCIOFCN = ON    //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
#pragma config SOSCSEL = OFF    //SOSC Power Selection Configuration bits->Digital (SCLKI) mode
#pragma config PLLSS = PLL_PRI    //PLL Secondary Selection Configuration bit->PLL is fed by the Primary oscillator
#pragma config IOL1WAY = OFF    //Peripheral pin select configuration bit->Allow multiple reconfigurations
#pragma config FCKSM = CSDCMD    //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled

// FWDT
#pragma config WDTPS = PS32768    //Watchdog Timer Postscaler bits->1:32768
#pragma config FWPSA = PR128    //Watchdog Timer Prescaler bit->1:128
#pragma config FWDTEN = OFF    //Watchdog Timer Enable bits->WDT and SWDTEN disabled
#pragma config WINDIS = OFF    //Watchdog Timer Window Enable bit->Watchdog Timer in Non-Window mode
#pragma config WDTWIN = WIN25    //Watchdog Timer Window Select bits->WDT Window is 25% of WDT period
#pragma config WDTCMX = WDTCLK    //WDT MUX Source Select bits->WDT clock source is determined by the WDTCLK Configuration bits
#pragma config WDTCLK = LPRC    //WDT Clock Source Select bits->WDT uses LPRC

// FPOR
#pragma config BOREN = ON    //Brown Out Enable bit->Brown Out Enable Bit
#pragma config LPCFG = OFF    //Low power regulator control->No Retention Sleep
#pragma config DNVPEN = ENABLE    //Downside Voltage Protection Enable bit->Downside protection enabled using ZPBOR when BOR is inactive

// FICD
#pragma config ICS = PGD2    //ICD Communication Channel Select bits->Communicate on PGEC2 and PGED2
#pragma config JTAGEN = OFF    //JTAG Enable bit->JTAG is disabled
#pragma config BTSWP = OFF    //BOOTSWP Disable->BOOTSWP instruction disabled

// FDEVOPT1
#pragma config ALTCMPI = DISABLE    //Alternate Comparator Input Enable bit->C1INC, C2INC, and C3INC are on their standard pin locations
#pragma config TMPRPIN = OFF    //Tamper Pin Enable bit->TMPRN pin function is disabled
#pragma config SOSCHP = ON    //SOSC High Power Enable bit (valid only when SOSCSEL = 1->Enable SOSC high power mode (default)
#pragma config ALTVREF = ALTVREFDIS    //Alternate Voltage Reference Location Enable bit->VREF+ and CVREF+ on RB0, VREF- and CVREF- on RB1

// FBOOT
#pragma config BTMODE = SINGLE    //Boot Mode Configuration bits->Device is in Single Boot (legacy) mode

int main(void)
{
    // get reset status
    // and reset RCON
    g_rcon=RCON;
    RCON &= ~(0xFFFF);
    INTCON2bits.AIVTEN = 1; //<<<<< for app AIVT 
…

CLEAN SUCCESSFUL (total time: 52ms)
make -f nbproject/Makefile-appbl.mk SUBPROJECTS= .build-conf
make[1]: Entering directory '/Users/headley/tmp/bootloader/carbonwg-pic/cwg-pic.X'
make  -f nbproject/Makefile-appbl.mk dist/appbl/production/cwg-pic.X.production.hex
make[2]: Entering directory '/Users/headley/tmp/bootloader/carbonwg-pic/cwg-pic.X'
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/boot/remapped_reset.S  -o build/appbl/production/mcc_generated_files/boot/remapped_reset.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/boot/remapped_reset.o.d"  -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc  -I"../cwg-pic.X" -Wa,-MD,"build/appbl/production/mcc_generated_files/boot/remapped_reset.o.asm.d",--defsym=__MPLAB_BUILD=1,-g,--no-relax  -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/boot/interrupts.S  -o build/appbl/production/mcc_generated_files/boot/interrupts.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/boot/interrupts.o.d"  -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc  -I"../cwg-pic.X" -Wa,-MD,"build/appbl/production/mcc_generated_files/boot/interrupts.o.asm.d",--defsym=__MPLAB_BUILD=1,-g,--no-relax  -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/boot/hardware_interrupt_table.S  -o build/appbl/production/mcc_generated_files/boot/hardware_interrupt_table.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/boot/hardware_interrupt_table.o.d"  -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc  -I"../cwg-pic.X" -Wa,-MD,"build/appbl/production/mcc_generated_files/boot/hardware_interrupt_table.o.asm.d",--defsym=__MPLAB_BUILD=1,-g,--no-relax  -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/boot/user_interrupt_table.S  -o build/appbl/production/mcc_generated_files/boot/user_interrupt_table.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/boot/user_interrupt_table.o.d"  -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc  -I"../cwg-pic.X" -Wa,-MD,"build/appbl/production/mcc_generated_files/boot/user_interrupt_table.o.asm.d",--defsym=__MPLAB_BUILD=1,-g,--no-relax  -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/clock.c  -o build/appbl/production/mcc_generated_files/clock.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/clock.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/system.c  -o build/appbl/production/mcc_generated_files/system.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/system.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/spi1.c  -o build/appbl/production/mcc_generated_files/spi1.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/spi1.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/uart3.c  -o build/appbl/production/mcc_generated_files/uart3.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/uart3.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/adc1.c  -o build/appbl/production/mcc_generated_files/adc1.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/adc1.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/ext_int.c  -o build/appbl/production/mcc_generated_files/ext_int.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/ext_int.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/mcc.c  -o build/appbl/production/mcc_generated_files/mcc.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/mcc.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/pin_manager.c  -o build/appbl/production/mcc_generated_files/pin_manager.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/pin_manager.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/interrupt_manager.c  -o build/appbl/production/mcc_generated_files/interrupt_manager.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/interrupt_manager.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/tmr1.c  -o build/appbl/production/mcc_generated_files/tmr1.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/tmr1.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/tmr2.c  -o build/appbl/production/mcc_generated_files/tmr2.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/tmr2.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/uart1.c  -o build/appbl/production/mcc_generated_files/uart1.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/uart1.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   mcc_generated_files/uart2.c  -o build/appbl/production/mcc_generated_files/uart2.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/mcc_generated_files/uart2.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/log.c  -o build/appbl/production/_ext/1360937237/log.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/log.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/ff.c  -o build/appbl/production/_ext/1360937237/ff.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/ff.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/buffer.c  -o build/appbl/production/_ext/1360937237/buffer.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/buffer.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/iodisk.c  -o build/appbl/production/_ext/1360937237/iodisk.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/iodisk.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/cli_impl.c  -o build/appbl/production/_ext/1360937237/cli_impl.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/cli_impl.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/licor8xx.c  -o build/appbl/production/_ext/1360937237/licor8xx.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/licor8xx.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/rtc.c  -o build/appbl/production/_ext/1360937237/rtc.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/rtc.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/cwgconf.c  -o build/appbl/production/_ext/1360937237/cwgconf.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/cwgconf.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/ioserial.c  -o build/appbl/production/_ext/1360937237/ioserial.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/ioserial.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/iodigital.c  -o build/appbl/production/_ext/1360937237/iodigital.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/iodigital.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/cwgsys.c  -o build/appbl/production/_ext/1360937237/cwgsys.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/cwgsys.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/iospi.c  -o build/appbl/production/_ext/1360937237/iospi.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/iospi.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/main.c  -o build/appbl/production/_ext/1360937237/main.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/main.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/timers.c  -o build/appbl/production/_ext/1360937237/timers.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/timers.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/config.c  -o build/appbl/production/_ext/1360937237/config.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/config.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/ui.c  -o build/appbl/production/_ext/1360937237/ui.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/ui.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/script.c  -o build/appbl/production/_ext/1360937237/script.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/script.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/pic24.c  -o build/appbl/production/_ext/1360937237/pic24.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/pic24.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/cli_api.c  -o build/appbl/production/_ext/1360937237/cli_api.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/cli_api.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/a2d.c  -o build/appbl/production/_ext/1360937237/a2d.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/a2d.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/addrtrap.s  -o build/appbl/production/_ext/1360937237/addrtrap.o  -c -mcpu=24FJ1024GA606  -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc  -I"../cwg-pic.X" -Wa,-MD,"build/appbl/production/_ext/1360937237/addrtrap.o.d",--defsym=__MPLAB_BUILD=1,-g,--no-relax  -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/proto.c  -o build/appbl/production/_ext/1360937237/proto.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/proto.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/traps.c  -o build/appbl/production/_ext/1360937237/traps.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/traps.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/z85.c  -o build/appbl/production/_ext/1360937237/z85.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/z85.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/cwg-shared.c  -o build/appbl/production/_ext/1360937237/cwg-shared.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/cwg-shared.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/iowfile.c  -o build/appbl/production/_ext/1360937237/iowfile.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/iowfile.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/licor8xx-shared.c  -o build/appbl/production/_ext/1360937237/licor8xx-shared.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/licor8xx-shared.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/logutils.c  -o build/appbl/production/_ext/1360937237/logutils.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/logutils.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   ../src/fileutils.c  -o build/appbl/production/_ext/1360937237/fileutils.o  -c -mcpu=24FJ1024GA606  -MMD -MF "build/appbl/production/_ext/1360937237/fileutils.o.d"      -mno-eds-warn  -g -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -mlarge-code -mlarge-data -O0 -msmart-io=1 -Wall -msfr-warn=off    -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16"
"/Applications/microchip/xc16/v1.50/bin/xc16-gcc"   -o dist/appbl/production/cwg-pic.X.production.elf  build/appbl/production/mcc_generated_files/boot/user_interrupt_table.o build/appbl/production/mcc_generated_files/boot/remapped_reset.o build/appbl/production/mcc_generated_files/boot/interrupts.o build/appbl/production/mcc_generated_files/boot/hardware_interrupt_table.o build/appbl/production/mcc_generated_files/uart3.o build/appbl/production/mcc_generated_files/spi1.o build/appbl/production/mcc_generated_files/system.o build/appbl/production/mcc_generated_files/clock.o build/appbl/production/mcc_generated_files/adc1.o build/appbl/production/mcc_generated_files/ext_int.o build/appbl/production/mcc_generated_files/interrupt_manager.o build/appbl/production/mcc_generated_files/mcc.o build/appbl/production/mcc_generated_files/pin_manager.o build/appbl/production/mcc_generated_files/tmr1.o build/appbl/production/mcc_generated_files/tmr2.o build/appbl/production/mcc_generated_files/uart1.o build/appbl/production/mcc_generated_files/uart2.o build/appbl/production/_ext/1360937237/log.o build/appbl/production/_ext/1360937237/ff.o build/appbl/production/_ext/1360937237/buffer.o build/appbl/production/_ext/1360937237/iodisk.o build/appbl/production/_ext/1360937237/cli_impl.o build/appbl/production/_ext/1360937237/licor8xx.o build/appbl/production/_ext/1360937237/rtc.o build/appbl/production/_ext/1360937237/cwgconf.o build/appbl/production/_ext/1360937237/ioserial.o build/appbl/production/_ext/1360937237/iodigital.o build/appbl/production/_ext/1360937237/cwgsys.o build/appbl/production/_ext/1360937237/iospi.o build/appbl/production/_ext/1360937237/main.o build/appbl/production/_ext/1360937237/timers.o build/appbl/production/_ext/1360937237/config.o build/appbl/production/_ext/1360937237/ui.o build/appbl/production/_ext/1360937237/script.o build/appbl/production/_ext/1360937237/pic24.o build/appbl/production/_ext/1360937237/cli_api.o build/appbl/production/_ext/1360937237/a2d.o build/appbl/production/_ext/1360937237/addrtrap.o build/appbl/production/_ext/1360937237/proto.o build/appbl/production/_ext/1360937237/traps.o build/appbl/production/_ext/1360937237/z85.o build/appbl/production/_ext/1360937237/cwg-shared.o build/appbl/production/_ext/1360937237/iowfile.o build/appbl/production/_ext/1360937237/licor8xx-shared.o build/appbl/production/_ext/1360937237/logutils.o build/appbl/production/_ext/1360937237/fileutils.o      -mcpu=24FJ1024GA606        -omf=elf -save-temps=obj -DXPRJ_appbl=appbl  -legacy-libc    -I"../cwg-pic.X" -Wl,--local-stack,,--defsym=__MPLAB_BUILD=1,,--script=p24FJ1024GA606.gld,--stack=16,--check-sections,--data-init,--pack-data,--handles,--no-isr,--no-gc-sections,--fill-upper=0,--stackguard=16,--no-force-link,--smart-io,-Map="dist/appbl/production/cwg-pic.X.production.map",--report-mem,--memorysummary,dist/appbl/production/memoryfile.xml,--verbose  -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16" 
GNU ld version 2.14 - Microchip 1.50 (B) Build date: Jan-16-2020
  Supported emulations:
   pic30_elf32
using external linker script:
==================================================
/*

 * Linker script for PIC24FJ1024GA606

 * (c) Copyright 2013 Microchip Technology, Inc

 * Part support version 1.40.B(08-Oct-2019)

 *

 * This software is developed by Microchip Technology Inc. and its

 * subsidiaries ("Microchip").

 * 

 * Redistribution and use in source and binary forms, with or without

 * modification, are permitted provided that the following conditions are 

 * met:

 * 

 * 1.      Redistributions of source code must retain the above copyright

 *         notice, this list of conditions and the following disclaimer.

 * 2.      Redistributions in binary form must reproduce the above 

 *         copyright notice, this list of conditions and the following 

 *         disclaimer in the documentation and/or other materials provided 

 *         with the distribution.

 * 3.      Microchip's name may not be used to endorse or promote products

 *         derived from this software without specific prior written 

 *         permission.

 * 

 * THIS SOFTWARE IS PROVIDED BY MICROCHIP "AS IS" AND ANY EXPRESS OR IMPLIED

 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF

 * MERCHANTABILITY AND FITNESS FOR PURPOSE ARE DISCLAIMED. IN NO EVENT 

 * SHALL MICROCHIP BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,

 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO

 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA OR PROFITS;

 * OR BUSINESS INTERRUPTION) HOWSOEVER CAUSED AND ON ANY THEORY OF LIABILITY,

 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 

 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF

 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 * 

 */
OUTPUT_ARCH("24FJ1024GA606")
CRT0_STARTUP(crt0_extended24.o)
CRT1_STARTUP(crt1_extended24.o)
/*

 * Define how to startup, by default we initialize

 * everything as normal; change to crt_start_mode to

 * preserve preserved data on a restart

 *

 * Or define your own __crt_start_mode fucntion

 */
CRT_STARTMODE(crt_start_mode_normal)
OPTIONAL(-lpPIC24Fxxx)
OPTIONAL(-lfx)
/*

** Memory Regions

*/
MEMORY
{
  data (a!xr) : ORIGIN = 0x800, LENGTH = 0x8000
/*

 * Memory regions that are always present

 */
  FBOOT : ORIGIN = 0x801800, LENGTH = 0x2
/*

 * Single panel memory regions

 */
  reset : ORIGIN = 0x0, LENGTH = 0x4
  ivt : ORIGIN = 0x4, LENGTH = 0xFC
  program (xr) : ORIGIN = 0x100, LENGTH = 0xABE00
  FSEC : ORIGIN = 0xABF00, LENGTH = 0x2
  FBSLIM : ORIGIN = 0xABF10, LENGTH = 0x2
  FSIGN : ORIGIN = 0xABF14, LENGTH = 0x2
  FOSCSEL : ORIGIN = 0xABF18, LENGTH = 0x2
  FOSC : ORIGIN = 0xABF1C, LENGTH = 0x2
  FWDT : ORIGIN = 0xABF20, LENGTH = 0x2
  FPOR : ORIGIN = 0xABF24, LENGTH = 0x2
  FICD : ORIGIN = 0xABF28, LENGTH = 0x2
  FDEVOPT1 : ORIGIN = 0xABF2C, LENGTH = 0x2
/*

 * Dual panel memory regions

 */
}
/*

 * Configuration words that are always present

 */
__FBOOT = 0x801800;
/*

 * Single panel configuration words

 */
__FSEC = 0xABF00;
__FBSLIM = 0xABF10;
__FSIGN = 0xABF14;
__FOSCSEL = 0xABF18;
__FOSC = 0xABF1C;
__FWDT = 0xABF20;
__FPOR = 0xABF24;
__FICD = 0xABF28;
__FDEVOPT1 = 0xABF2C;
__CODE_BASE = 0x100;
__CODE_LENGTH = 0xABE00;
__IVT_BASE = 0x4;
/*

 * Dual panel configuration words

 */
__DATA_BASE = 0x800;
__DATA_LENGTH = 0x8000;
/*

** ==================== Section Map ======================

*/
SECTIONS
{
  /*

  ** ========== Program Memory ==========

  */
  /*

  ** Reset Instruction

  */
  .reset :
  {
        SHORT(ABSOLUTE(__reset));
        SHORT(0x04);
        SHORT((ABSOLUTE(__reset) >> 16) & 0x7F);
        SHORT(0);
  } >reset
  /*

  ** Interrupt Vector Tables

  **

  ** The primary and alternate tables are loaded

  ** here, between sections .reset and .text.

  ** Vector table source code appears below.

  */
  /*

  ** User Code and Library Code

  **

  ** This section must not be assigned to __CODE_BASE,

  ** because CodeGuard(tm) sections may be located there.

  **

  ** Note that input sections *(.text) are not mapped here.

  ** The best-fit allocator locates them, so that .text

  ** may flow around PSV sections as needed.

  */
  .text :
  {
        *(.init);
        *(.user_init);
        KEEP (*(.handle));
        KEEP (*(.isr*));
        *(.libc) *(.libm) *(.libdsp); /* keep together in this order */
        *(.lib*);
  } >program

  /*

  ** User-Defined Section in Program Memory

  **

  ** note: can specify an address using

  **       the following syntax:

  **

  **       usercode 0x1234 :

  **         {

  **           *(usercode);

  **         } >program

  */
  usercode :
  {
        *(usercode);
  } >program
  /*

  ** User-Defined Constants in Program Memory

  **

  ** For PSV type sections, the Load Memory Address (LMA)

  ** should be specified as follows:

  **

  **       userconst : AT(0x1234)

  **         {

  **           *(userconst);

  **         } >program

  **

  ** Note that mapping PSV sections in linker scripts

  ** is not generally recommended.

  **

  ** Because of page alignment restrictions, memory is

  ** often used more efficiently when PSV sections

  ** do not appear in the linker script.

  **

  ** For more information on memory allocation,

  ** please refer to chapter 10, 'Linker Processing'

  ** in the Assembler, Linker manual (DS51317).

  */
  /*

  ** Configuration Words

  */
/*

 * Configuration words that are always present

 */
  __FBOOT :
  { KEEP (*(__FBOOT.sec*)) } >FBOOT
/*

 * Single panel configuration words

 */
  __FSEC :
  { KEEP (*(__FSEC.sec*)) } >FSEC
  __FBSLIM :
  { KEEP (*(__FBSLIM.sec*)) } >FBSLIM
  __FSIGN :
  { KEEP (*(__FSIGN.sec*)) } >FSIGN
  __FOSCSEL :
  { KEEP (*(__FOSCSEL.sec*)) } >FOSCSEL
  __FOSC :
  { KEEP (*(__FOSC.sec*)) } >FOSC
  __FWDT :
  { KEEP (*(__FWDT.sec*)) } >FWDT
  __FPOR :
  { KEEP (*(__FPOR.sec*)) } >FPOR
  __FICD :
  { KEEP (*(__FICD.sec*)) } >FICD
  __FDEVOPT1 :
  { KEEP (*(__FDEVOPT1.sec*)) } >FDEVOPT1
/*

 * Dual panel configuration words

 */

  /*

  ** =========== Data Memory ===========

  */
  /*

  ** ICD Debug Exec

  **

  ** This section provides optional storage for

  ** the ICD2 debugger. Define a global symbol

  ** named __ICD2RAM to enable ICD2. This section

  ** must be loaded at data address 0x800.

  */
  .icd __DATA_BASE (NOLOAD):
  {
    . += (DEFINED (__ICD2RAM) ? 0x50 : 0 );
  } > data
  /*

  ** Other sections in data memory are not explicitly mapped.

  ** Instead they are allocated according to their section

  ** attributes, which is most efficient.

  ** 

  ** If a specific arrangement of sections is required

  ** (other than what can be achieved using attributes)

  ** additional sections may be defined here. See chapter

  ** 10.5 in the MPLAB ASM30/LINK30 User's Guide (DS51317)

  ** for more information.

  */
  /*

  ** ========== Debug Info ==============

  */
  .comment 0 : { *(.comment) }
  /*

  ** DWARF-2

  */
  .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
  .debug_abbrev 0 : { *(.debug_abbrev) }
  .debug_line 0 : { *(.debug_line) }
  .debug_frame 0 : { *(.debug_frame) }
  .debug_str 0 : { *(.debug_str) }
  .debug_loc 0 : { *(.debug_loc) }
  .debug_macinfo 0 : { *(.debug_macinfo) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  .debug_ranges 0 : { *(.debug_ranges) }
  .debug_aranges 0 : { *(.debug_aranges) }
} /* SECTIONS */
/*

** ================= End of Section Map ================

*/
/*

** ============== Equates for SFR Addresses =============

*/
 WREG0 = 0x0;
_WREG0 = 0x0;
 WREG1 = 0x2;
_WREG1 = 0x2;
 WREG2 = 0x4;
_WREG2 = 0x4;
 WREG3 = 0x6;
_WREG3 = 0x6;
 WREG4 = 0x8;
_WREG4 = 0x8;
 WREG5 = 0xA;
_WREG5 = 0xA;
 WREG6 = 0xC;
_WREG6 = 0xC;
 WREG7 = 0xE;
_WREG7 = 0xE;
 WREG8 = 0x10;
_WREG8 = 0x10;
 WREG9 = 0x12;
_WREG9 = 0x12;
 WREG10 = 0x14;
_WREG10 = 0x14;
 WREG11 = 0x16;
_WREG11 = 0x16;
 WREG12 = 0x18;
_WREG12 = 0x18;
 WREG13 = 0x1A;
_WREG13 = 0x1A;
 WREG14 = 0x1C;
_WREG14 = 0x1C;
 WREG15 = 0x1E;
_WREG15 = 0x1E;
 SPLIM = 0x20;
_SPLIM = 0x20;
 PCL = 0x2E;
_PCL = 0x2E;
 PCH = 0x30;
_PCH = 0x30;
 DSRPAG = 0x32;
_DSRPAG = 0x32;
_DSRPAGbits = 0x32;
 DSWPAG = 0x34;
_DSWPAG = 0x34;
_DSWPAGbits = 0x34;
 RCOUNT = 0x36;
_RCOUNT = 0x36;
 SR = 0x42;
_SR = 0x42;
_SRbits = 0x42;
 CORCON = 0x44;
_CORCON = 0x44;
_CORCONbits = 0x44;
 DISICNT = 0x52;
_DISICNT = 0x52;
_DISICNTbits = 0x52;
 TBLPAG = 0x54;
_TBLPAG = 0x54;
_TBLPAGbits = 0x54;
 INTCON1 = 0x80;
_INTCON1 = 0x80;
_INTCON1bits = 0x80;
 INTCON2 = 0x82;
_INTCON2 = 0x82;
_INTCON2bits = 0x82;
 INTCON4 = 0x86;
_INTCON4 = 0x86;
_INTCON4bits = 0x86;
 IFS0 = 0x88;
_IFS0 = 0x88;
_IFS0bits = 0x88;
 IFS1 = 0x8A;
_IFS1 = 0x8A;
_IFS1bits = 0x8A;
 IFS2 = 0x8C;
_IFS2 = 0x8C;
_IFS2bits = 0x8C;
 IFS3 = 0x8E;
_IFS3 = 0x8E;
_IFS3bits = 0x8E;
 IFS4 = 0x90;
_IFS4 = 0x90;
_IFS4bits = 0x90;
 IFS5 = 0x92;
_IFS5 = 0x92;
_IFS5bits = 0x92;
 IFS6 = 0x94;
_IFS6 = 0x94;
_IFS6bits = 0x94;
 IFS7 = 0x96;
_IFS7 = 0x96;
_IFS7bits = 0x96;
 IEC0 = 0x98;
_IEC0 = 0x98;
_IEC0bits = 0x98;
 IEC1 = 0x9A;
_IEC1 = 0x9A;
_IEC1bits = 0x9A;
 IEC2 = 0x9C;
_IEC2 = 0x9C;
_IEC2bits = 0x9C;
 IEC3 = 0x9E;
_IEC3 = 0x9E;
_IEC3bits = 0x9E;
 IEC4 = 0xA0;
_IEC4 = 0xA0;
_IEC4bits = 0xA0;
 IEC5 = 0xA2;
_IEC5 = 0xA2;
_IEC5bits = 0xA2;
 IEC6 = 0xA4;
_IEC6 = 0xA4;
_IEC6bits = 0xA4;
 IEC7 = 0xA6;
_IEC7 = 0xA6;
_IEC7bits = 0xA6;
 IPC0 = 0xA8;
_IPC0 = 0xA8;
_IPC0bits = 0xA8;
 IPC1 = 0xAA;
_IPC1 = 0xAA;
_IPC1bits = 0xAA;
 IPC2 = 0xAC;
_IPC2 = 0xAC;
_IPC2bits = 0xAC;
 IPC3 = 0xAE;
_IPC3 = 0xAE;
_IPC3bits = 0xAE;
 IPC4 = 0xB0;
_IPC4 = 0xB0;
_IPC4bits = 0xB0;
 IPC5 = 0xB2;
_IPC5 = 0xB2;
_IPC5bits = 0xB2;
 IPC6 = 0xB4;
_IPC6 = 0xB4;
_IPC6bits = 0xB4;
 IPC7 = 0xB6;
_IPC7 = 0xB6;
_IPC7bits = 0xB6;
 IPC8 = 0xB8;
_IPC8 = 0xB8;
_IPC8bits = 0xB8;
 IPC9 = 0xBA;
_IPC9 = 0xBA;
_IPC9bits = 0xBA;
 IPC10 = 0xBC;
_IPC10 = 0xBC;
_IPC10bits = 0xBC;
 IPC11 = 0xBE;
_IPC11 = 0xBE;
_IPC11bits = 0xBE;
 IPC12 = 0xC0;
_IPC12 = 0xC0;
_IPC12bits = 0xC0;
 IPC13 = 0xC2;
_IPC13 = 0xC2;
_IPC13bits = 0xC2;
 IPC14 = 0xC4;
_IPC14 = 0xC4;
_IPC14bits = 0xC4;
 IPC15 = 0xC6;
_IPC15 = 0xC6;
_IPC15bits = 0xC6;
 IPC16 = 0xC8;
_IPC16 = 0xC8;
_IPC16bits = 0xC8;
 IPC17 = 0xCA;
_IPC17 = 0xCA;
_IPC17bits = 0xCA;
 IPC18 = 0xCC;
_IPC18 = 0xCC;
_IPC18bits = 0xCC;
 IPC19 = 0xCE;
_IPC19 = 0xCE;
_IPC19bits = 0xCE;
 IPC20 = 0xD0;
_IPC20 = 0xD0;
_IPC20bits = 0xD0;
 IPC21 = 0xD2;
_IPC21 = 0xD2;
_IPC21bits = 0xD2;
 IPC22 = 0xD4;
_IPC22 = 0xD4;
_IPC22bits = 0xD4;
 IPC23 = 0xD6;
_IPC23 = 0xD6;
_IPC23bits = 0xD6;
 IPC24 = 0xD8;
_IPC24 = 0xD8;
_IPC24bits = 0xD8;
 IPC25 = 0xDA;
_IPC25 = 0xDA;
_IPC25bits = 0xDA;
 IPC26 = 0xDC;
_IPC26 = 0xDC;
_IPC26bits = 0xDC;
 IPC27 = 0xDE;
_IPC27 = 0xDE;
_IPC27bits = 0xDE;
 IPC28 = 0xE0;
_IPC28 = 0xE0;
_IPC28bits = 0xE0;
 IPC29 = 0xE2;
_IPC29 = 0xE2;
_IPC29bits = 0xE2;
 INTTREG = 0xE4;
_INTTREG = 0xE4;
_INTTREGbits = 0xE4;
 OSCCON = 0x100;
_OSCCON = 0x100;
_OSCCONbits = 0x100;
 OSCCONL = 0x100;
_OSCCONL = 0x100;
 OSCCONH = 0x101;
_OSCCONH = 0x101;
 CLKDIV = 0x102;
_CLKDIV = 0x102;
_CLKDIVbits = 0x102;
 OSCTUN = 0x106;
_OSCTUN = 0x106;
_OSCTUNbits = 0x106;
 DCOTUN = 0x108;
_DCOTUN = 0x108;
_DCOTUNbits = 0x108;
 DCOCON = 0x10A;
_DCOCON = 0x10A;
_DCOCONbits = 0x10A;
 OSCDIV = 0x10C;
_OSCDIV = 0x10C;
_OSCDIVbits = 0x10C;
 OSCFDIV = 0x10E;
_OSCFDIV = 0x10E;
_OSCFDIVbits = 0x10E;
 RCON = 0x110;
_RCON = 0x110;
_RCONbits = 0x110;
 HLVDCON = 0x114;
_HLVDCON = 0x114;
_HLVDCONbits = 0x114;
 PMCON1 = 0x128;
_PMCON1 = 0x128;
_PMCON1bits = 0x128;
 PMCON2 = 0x12A;
_PMCON2 = 0x12A;
_PMCON2bits = 0x12A;
 PMCON3 = 0x12C;
_PMCON3 = 0x12C;
_PMCON3bits = 0x12C;
 PMCON4 = 0x12E;
_PMCON4 = 0x12E;
_PMCON4bits = 0x12E;
 PMCS1CF = 0x130;
_PMCS1CF = 0x130;
_PMCS1CFbits = 0x130;
 PMCS1BS = 0x132;
_PMCS1BS = 0x132;
_PMCS1BSbits = 0x132;
 PMCS1MD = 0x134;
_PMCS1MD = 0x134;
_PMCS1MDbits = 0x134;
 PMCS2CF = 0x136;
_PMCS2CF = 0x136;
_PMCS2CFbits = 0x136;
 PMCS2BS = 0x138;
_PMCS2BS = 0x138;
_PMCS2BSbits = 0x138;
 PMCS2MD = 0x13A;
_PMCS2MD = 0x13A;
_PMCS2MDbits = 0x13A;
 PMDOUT1 = 0x13C;
_PMDOUT1 = 0x13C;
 PMDOUT2 = 0x13E;
_PMDOUT2 = 0x13E;
 PMDIN1 = 0x140;
_PMDIN1 = 0x140;
 PMDIN2 = 0x142;
_PMDIN2 = 0x142;
 PMSTAT = 0x144;
_PMSTAT = 0x144;
_PMSTATbits = 0x144;
 CRCCON1 = 0x158;
_CRCCON1 = 0x158;
_CRCCON1bits = 0x158;
 CRCCON2 = 0x15A;
_CRCCON2 = 0x15A;
_CRCCON2bits = 0x15A;
 CRCXORL = 0x15C;
_CRCXORL = 0x15C;
_CRCXORLbits = 0x15C;
 CRCXORH = 0x15E;
_CRCXORH = 0x15E;
_CRCXORHbits = 0x15E;
 CRCDAT = 0x160;
_CRCDAT = 0x160;
 CRCDATL = 0x160;
_CRCDATL = 0x160;
 CRCDATH = 0x162;
_CRCDATH = 0x162;
 CRCWDAT = 0x164;
_CRCWDAT = 0x164;
 CRCWDATL = 0x164;
_CRCWDATL = 0x164;
 CRCWDATH = 0x166;
_CRCWDATH = 0x166;
 REFOCON1 = 0x168;
_REFOCON1 = 0x168;
_REFOCON1bits = 0x168;
 REFOCONL = 0x168;
_REFOCONL = 0x168;
_REFOCONLbits = 0x168;
 REFOCON2 = 0x16A;
_REFOCON2 = 0x16A;
_REFOCON2bits = 0x16A;
 REFOCONH = 0x16A;
_REFOCONH = 0x16A;
_REFOCONHbits = 0x16A;
 PMD1 = 0x178;
_PMD1 = 0x178;
_PMD1bits = 0x178;
 PMD2 = 0x17A;
_PMD2 = 0x17A;
_PMD2bits = 0x17A;
 PMD3 = 0x17C;
_PMD3 = 0x17C;
_PMD3bits = 0x17C;
 PMD4 = 0x17E;
_PMD4 = 0x17E;
_PMD4bits = 0x17E;
 PMD5 = 0x180;
_PMD5 = 0x180;
_PMD5bits = 0x180;
 PMD6 = 0x182;
_PMD6 = 0x182;
_PMD6bits = 0x182;
 PMD7 = 0x184;
_PMD7 = 0x184;
_PMD7bits = 0x184;
 PMD8 = 0x186;
_PMD8 = 0x186;
_PMD8bits = 0x186;
 TMR1 = 0x190;
_TMR1 = 0x190;
 PR1 = 0x192;
_PR1 = 0x192;
 T1CON = 0x194;
_T1CON = 0x194;
_T1CONbits = 0x194;
 TMR2 = 0x196;
_TMR2 = 0x196;
 TMR3HLD = 0x198;
_TMR3HLD = 0x198;
 TMR3 = 0x19A;
_TMR3 = 0x19A;
 PR2 = 0x19C;
_PR2 = 0x19C;
 PR3 = 0x19E;
_PR3 = 0x19E;
 T2CON = 0x1A0;
_T2CON = 0x1A0;
_T2CONbits = 0x1A0;
 T3CON = 0x1A2;
_T3CON = 0x1A2;
_T3CONbits = 0x1A2;
 TMR4 = 0x1A4;
_TMR4 = 0x1A4;
 TMR5HLD = 0x1A6;
_TMR5HLD = 0x1A6;
 TMR5 = 0x1A8;
_TMR5 = 0x1A8;
 PR4 = 0x1AA;
_PR4 = 0x1AA;
 PR5 = 0x1AC;
_PR5 = 0x1AC;
 T4CON = 0x1AE;
_T4CON = 0x1AE;
_T4CONbits = 0x1AE;
 T5CON = 0x1B0;
_T5CON = 0x1B0;
_T5CONbits = 0x1B0;
 CTMUCON1L = 0x1C0;
_CTMUCON1L = 0x1C0;
_CTMUCON1Lbits = 0x1C0;
 CTMUCON1H = 0x1C2;
_CTMUCON1H = 0x1C2;
_CTMUCON1Hbits = 0x1C2;
 CTMUCON2L = 0x1C4;
_CTMUCON2L = 0x1C4;
_CTMUCON2Lbits = 0x1C4;
 RTCCON1L = 0x1CC;
_RTCCON1L = 0x1CC;
_RTCCON1Lbits = 0x1CC;
 RTCCON1H = 0x1CE;
_RTCCON1H = 0x1CE;
_RTCCON1Hbits = 0x1CE;
 RTCCON2L = 0x1D0;
_RTCCON2L = 0x1D0;
_RTCCON2Lbits = 0x1D0;
 RTCCON2H = 0x1D2;
_RTCCON2H = 0x1D2;
 RTCCON3L = 0x1D4;
_RTCCON3L = 0x1D4;
_RTCCON3Lbits = 0x1D4;
 RTCSTATL = 0x1D8;
_RTCSTATL = 0x1D8;
_RTCSTATLbits = 0x1D8;
 TIMEL = 0x1DC;
_TIMEL = 0x1DC;
_TIMELbits = 0x1DC;
 TIMEH = 0x1DE;
_TIMEH = 0x1DE;
_TIMEHbits = 0x1DE;
 DATEL = 0x1E0;
_DATEL = 0x1E0;
_DATELbits = 0x1E0;
 DATEH = 0x1E2;
_DATEH = 0x1E2;
_DATEHbits = 0x1E2;
 ALMTIMEL = 0x1E4;
_ALMTIMEL = 0x1E4;
_ALMTIMELbits = 0x1E4;
 ALMTIMEH = 0x1E6;
_ALMTIMEH = 0x1E6;
_ALMTIMEHbits = 0x1E6;
 ALMDATEL = 0x1E8;
_ALMDATEL = 0x1E8;
_ALMDATELbits = 0x1E8;
 ALMDATEH = 0x1EA;
_ALMDATEH = 0x1EA;
_ALMDATEHbits = 0x1EA;
 TSATIMEL = 0x1EC;
_TSATIMEL = 0x1EC;
_TSATIMELbits = 0x1EC;
 TSATIMEH = 0x1EE;
_TSATIMEH = 0x1EE;
_TSATIMEHbits = 0x1EE;
 TSADATEL = 0x1F0;
_TSADATEL = 0x1F0;
_TSADATELbits = 0x1F0;
 TSADATEH = 0x1F2;
_TSADATEH = 0x1F2;
_TSADATEHbits = 0x1F2;
 IC1CON1 = 0x200;
_IC1CON1 = 0x200;
_IC1CON1bits = 0x200;
 IC1CON2 = 0x202;
_IC1CON2 = 0x202;
_IC1CON2bits = 0x202;
 IC1BUF = 0x204;
_IC1BUF = 0x204;
 IC1TMR = 0x206;
_IC1TMR = 0x206;
 IC2CON1 = 0x208;
_IC2CON1 = 0x208;
_IC2CON1bits = 0x208;
 IC2CON2 = 0x20A;
_IC2CON2 = 0x20A;
_IC2CON2bits = 0x20A;
 IC2BUF = 0x20C;
_IC2BUF = 0x20C;
 IC2TMR = 0x20E;
_IC2TMR = 0x20E;
 IC3CON1 = 0x210;
_IC3CON1 = 0x210;
_IC3CON1bits = 0x210;
 IC3CON2 = 0x212;
_IC3CON2 = 0x212;
_IC3CON2bits = 0x212;
 IC3BUF = 0x214;
_IC3BUF = 0x214;
 IC3TMR = 0x216;
_IC3TMR = 0x216;
 IC4CON1 = 0x218;
_IC4CON1 = 0x218;
_IC4CON1bits = 0x218;
 IC4CON2 = 0x21A;
_IC4CON2 = 0x21A;
_IC4CON2bits = 0x21A;
 IC4BUF = 0x21C;
_IC4BUF = 0x21C;
 IC4TMR = 0x21E;
_IC4TMR = 0x21E;
 IC5CON1 = 0x220;
_IC5CON1 = 0x220;
_IC5CON1bits = 0x220;
 IC5CON2 = 0x222;
_IC5CON2 = 0x222;
_IC5CON2bits = 0x222;
 IC5BUF = 0x224;
_IC5BUF = 0x224;
 IC5TMR = 0x226;
_IC5TMR = 0x226;
 IC6CON1 = 0x228;
_IC6CON1 = 0x228;
_IC6CON1bits = 0x228;
 IC6CON2 = 0x22A;
_IC6CON2 = 0x22A;
_IC6CON2bits = 0x22A;
 IC6BUF = 0x22C;
_IC6BUF = 0x22C;
 IC6TMR = 0x22E;
_IC6TMR = 0x22E;
 OC1CON1 = 0x230;
_OC1CON1 = 0x230;
_OC1CON1bits = 0x230;
 OC1CON2 = 0x232;
_OC1CON2 = 0x232;
_OC1CON2bits = 0x232;
 OC1RS = 0x234;
_OC1RS = 0x234;
 OC1R = 0x236;
_OC1R = 0x236;
 OC1TMR = 0x238;
_OC1TMR = 0x238;
 OC2CON1 = 0x23A;
_OC2CON1 = 0x23A;
_OC2CON1bits = 0x23A;
 OC2CON2 = 0x23C;
_OC2CON2 = 0x23C;
_OC2CON2bits = 0x23C;
 OC2RS = 0x23E;
_OC2RS = 0x23E;
 OC2R = 0x240;
_OC2R = 0x240;
 OC2TMR = 0x242;
_OC2TMR = 0x242;
 OC3CON1 = 0x244;
_OC3CON1 = 0x244;
_OC3CON1bits = 0x244;
 OC3CON2 = 0x246;
_OC3CON2 = 0x246;
_OC3CON2bits = 0x246;
 OC3RS = 0x248;
_OC3RS = 0x248;
 OC3R = 0x24A;
_OC3R = 0x24A;
 OC3TMR = 0x24C;
_OC3TMR = 0x24C;
 OC4CON1 = 0x24E;
_OC4CON1 = 0x24E;
_OC4CON1bits = 0x24E;
 OC4CON2 = 0x250;
_OC4CON2 = 0x250;
_OC4CON2bits = 0x250;
 OC4RS = 0x252;
_OC4RS = 0x252;
 OC4R = 0x254;
_OC4R = 0x254;
 OC4TMR = 0x256;
_OC4TMR = 0x256;
 OC5CON1 = 0x258;
_OC5CON1 = 0x258;
_OC5CON1bits = 0x258;
 OC5CON2 = 0x25A;
_OC5CON2 = 0x25A;
_OC5CON2bits = 0x25A;
 OC5RS = 0x25C;
_OC5RS = 0x25C;
 OC5R = 0x25E;
_OC5R = 0x25E;
 OC5TMR = 0x260;
_OC5TMR = 0x260;
 OC6CON1 = 0x262;
_OC6CON1 = 0x262;
_OC6CON1bits = 0x262;
 OC6CON2 = 0x264;
_OC6CON2 = 0x264;
_OC6CON2bits = 0x264;
 OC6RS = 0x266;
_OC6RS = 0x266;
 OC6R = 0x268;
_OC6R = 0x268;
 OC6TMR = 0x26A;
_OC6TMR = 0x26A;
 CCP1CON1L = 0x26C;
_CCP1CON1L = 0x26C;
_CCP1CON1Lbits = 0x26C;
 CCP1CON1H = 0x26E;
_CCP1CON1H = 0x26E;
_CCP1CON1Hbits = 0x26E;
 CCP1CON2L = 0x270;
_CCP1CON2L = 0x270;
_CCP1CON2Lbits = 0x270;
 CCP1CON2H = 0x272;
_CCP1CON2H = 0x272;
_CCP1CON2Hbits = 0x272;
 CCP1CON3L = 0x274;
_CCP1CON3L = 0x274;
_CCP1CON3Lbits = 0x274;
 CCP1CON3H = 0x276;
_CCP1CON3H = 0x276;
_CCP1CON3Hbits = 0x276;
 CCP1STAT = 0x278;
_CCP1STAT = 0x278;
_CCP1STATbits = 0x278;
 CCP1STATL = 0x278;
_CCP1STATL = 0x278;
_CCP1STATLbits = 0x278;
 CCP1STATH = 0x27A;
_CCP1STATH = 0x27A;
_CCP1STATHbits = 0x27A;
 CCP1TMRL = 0x27C;
_CCP1TMRL = 0x27C;
 CCP1TMRH = 0x27E;
_CCP1TMRH = 0x27E;
 CCP1PRL = 0x280;
_CCP1PRL = 0x280;
 CCP1PRH = 0x282;
_CCP1PRH = 0x282;
 CCP1RA = 0x284;
_CCP1RA = 0x284;
 CCP1RAL = 0x284;
_CCP1RAL = 0x284;
 CCP1RAH = 0x286;
_CCP1RAH = 0x286;
 CCP1RB = 0x288;
_CCP1RB = 0x288;
 CCP1RBL = 0x288;
_CCP1RBL = 0x288;
 CCP1RBH = 0x28A;
_CCP1RBH = 0x28A;
 CCP1BUFL = 0x28C;
_CCP1BUFL = 0x28C;
 CCP1BUFH = 0x28E;
_CCP1BUFH = 0x28E;
 CCP2CON1L = 0x290;
_CCP2CON1L = 0x290;
_CCP2CON1Lbits = 0x290;
 CCP2CON1H = 0x292;
_CCP2CON1H = 0x292;
_CCP2CON1Hbits = 0x292;
 CCP2CON2L = 0x294;
_CCP2CON2L = 0x294;
_CCP2CON2Lbits = 0x294;
 CCP2CON2H = 0x296;
_CCP2CON2H = 0x296;
_CCP2CON2Hbits = 0x296;
 CCP2CON3L = 0x298;
_CCP2CON3L = 0x298;
_CCP2CON3Lbits = 0x298;
 CCP2CON3H = 0x29A;
_CCP2CON3H = 0x29A;
_CCP2CON3Hbits = 0x29A;
 CCP2STAT = 0x29C;
_CCP2STAT = 0x29C;
_CCP2STATbits = 0x29C;
 CCP2STATL = 0x29C;
_CCP2STATL = 0x29C;
_CCP2STATLbits = 0x29C;
 CCP2STATH = 0x29E;
_CCP2STATH = 0x29E;
_CCP2STATHbits = 0x29E;
 CCP2TMRL = 0x2A0;
_CCP2TMRL = 0x2A0;
 CCP2TMRH = 0x2A2;
_CCP2TMRH = 0x2A2;
 CCP2PRL = 0x2A4;
_CCP2PRL = 0x2A4;
 CCP2PRH = 0x2A6;
_CCP2PRH = 0x2A6;
 CCP2RA = 0x2A8;
_CCP2RA = 0x2A8;
 CCP2RAL = 0x2A8;
_CCP2RAL = 0x2A8;
 CCP2RAH = 0x2AA;
_CCP2RAH = 0x2AA;
 CCP2RB = 0x2AC;
_CCP2RB = 0x2AC;
 CCP2RBL = 0x2AC;
_CCP2RBL = 0x2AC;
 CCP2RBH = 0x2AE;
_CCP2RBH = 0x2AE;
 CCP2BUFL = 0x2B0;
_CCP2BUFL = 0x2B0;
 CCP2BUFH = 0x2B2;
_CCP2BUFH = 0x2B2;
 CCP3CON1L = 0x2B4;
_CCP3CON1L = 0x2B4;
_CCP3CON1Lbits = 0x2B4;
 CCP3CON1H = 0x2B6;
_CCP3CON1H = 0x2B6;
_CCP3CON1Hbits = 0x2B6;
 CCP3CON2L = 0x2B8;
_CCP3CON2L = 0x2B8;
_CCP3CON2Lbits = 0x2B8;
 CCP3CON2H = 0x2BA;
_CCP3CON2H = 0x2BA;
_CCP3CON2Hbits = 0x2BA;
 CCP3CON3L = 0x2BC;
_CCP3CON3L = 0x2BC;
_CCP3CON3Lbits = 0x2BC;
 CCP3CON3H = 0x2BE;
_CCP3CON3H = 0x2BE;
_CCP3CON3Hbits = 0x2BE;
 CCP3STAT = 0x2C0;
_CCP3STAT = 0x2C0;
_CCP3STATbits = 0x2C0;
 CCP3STATL = 0x2C0;
_CCP3STATL = 0x2C0;
_CCP3STATLbits = 0x2C0;
 CCP3STATH = 0x2C2;
_CCP3STATH = 0x2C2;
_CCP3STATHbits = 0x2C2;
 CCP3TMRL = 0x2C4;
_CCP3TMRL = 0x2C4;
 CCP3TMRH = 0x2C6;
_CCP3TMRH = 0x2C6;
 CCP3PRL = 0x2C8;
_CCP3PRL = 0x2C8;
 CCP3PRH = 0x2CA;
_CCP3PRH = 0x2CA;
 CCP3RA = 0x2CC;
_CCP3RA = 0x2CC;
 CCP3RAL = 0x2CC;
_CCP3RAL = 0x2CC;
 CCP3RAH = 0x2CE;
_CCP3RAH = 0x2CE;
 CCP3RB = 0x2D0;
_CCP3RB = 0x2D0;
 CCP3RBL = 0x2D0;
_CCP3RBL = 0x2D0;
 CCP3RBH = 0x2D2;
_CCP3RBH = 0x2D2;
 CCP3BUFL = 0x2D4;
_CCP3BUFL = 0x2D4;
 CCP3BUFH = 0x2D6;
_CCP3BUFH = 0x2D6;
 CMSTAT = 0x2E6;
_CMSTAT = 0x2E6;
_CMSTATbits = 0x2E6;
 CVRCON = 0x2E8;
_CVRCON = 0x2E8;
_CVRCONbits = 0x2E8;
 CM1CON = 0x2EA;
_CM1CON = 0x2EA;
_CM1CONbits = 0x2EA;
 CM2CON = 0x2EC;
_CM2CON = 0x2EC;
_CM2CONbits = 0x2EC;
 CM3CON = 0x2EE;
_CM3CON = 0x2EE;
_CM3CONbits = 0x2EE;
 ANCFG = 0x2F4;
_ANCFG = 0x2F4;
_ANCFGbits = 0x2F4;
 CCP4CON1L = 0x300;
_CCP4CON1L = 0x300;
_CCP4CON1Lbits = 0x300;
 CCP4CON1H = 0x302;
_CCP4CON1H = 0x302;
_CCP4CON1Hbits = 0x302;
 CCP4CON2L = 0x304;
_CCP4CON2L = 0x304;
_CCP4CON2Lbits = 0x304;
 CCP4CON2H = 0x306;
_CCP4CON2H = 0x306;
_CCP4CON2Hbits = 0x306;
 CCP4CON3L = 0x308;
_CCP4CON3L = 0x308;
 CCP4CON3H = 0x30A;
_CCP4CON3H = 0x30A;
_CCP4CON3Hbits = 0x30A;
 CCP4STAT = 0x30C;
_CCP4STAT = 0x30C;
_CCP4STATbits = 0x30C;
 CCP4STATL = 0x30C;
_CCP4STATL = 0x30C;
_CCP4STATLbits = 0x30C;
 CCP4STATH = 0x30E;
_CCP4STATH = 0x30E;
_CCP4STATHbits = 0x30E;
 CCP4TMRL = 0x310;
_CCP4TMRL = 0x310;
 CCP4TMRH = 0x312;
_CCP4TMRH = 0x312;
 CCP4PRL = 0x314;
_CCP4PRL = 0x314;
 CCP4PRH = 0x316;
_CCP4PRH = 0x316;
 CCP4RA = 0x318;
_CCP4RA = 0x318;
 CCP4RAL = 0x318;
_CCP4RAL = 0x318;
 CCP4RAH = 0x31A;
_CCP4RAH = 0x31A;
 CCP4RB = 0x31C;
_CCP4RB = 0x31C;
 CCP4RBL = 0x31C;
_CCP4RBL = 0x31C;
 CCP4RBH = 0x31E;
_CCP4RBH = 0x31E;
 CCP4BUFL = 0x320;
_CCP4BUFL = 0x320;
 CCP4BUFH = 0x322;
_CCP4BUFH = 0x322;
 CCP5CON1L = 0x324;
_CCP5CON1L = 0x324;
_CCP5CON1Lbits = 0x324;
 CCP5CON1H = 0x326;
_CCP5CON1H = 0x326;
_CCP5CON1Hbits = 0x326;
 CCP5CON2L = 0x328;
_CCP5CON2L = 0x328;
_CCP5CON2Lbits = 0x328;
 CCP5CON2H = 0x32A;
_CCP5CON2H = 0x32A;
_CCP5CON2Hbits = 0x32A;
 CCP5CON3L = 0x32C;
_CCP5CON3L = 0x32C;
 CCP5CON3H = 0x32E;
_CCP5CON3H = 0x32E;
_CCP5CON3Hbits = 0x32E;
 CCP5STAT = 0x330;
_CCP5STAT = 0x330;
_CCP5STATbits = 0x330;
 CCP5STATL = 0x330;
_CCP5STATL = 0x330;
_CCP5STATLbits = 0x330;
 CCP5STATH = 0x332;
_CCP5STATH = 0x332;
_CCP5STATHbits = 0x332;
 CCP5TMRL = 0x334;
_CCP5TMRL = 0x334;
 CCP5TMRH = 0x336;
_CCP5TMRH = 0x336;
 CCP5PRL = 0x338;
_CCP5PRL = 0x338;
 CCP5PRH = 0x33A;
_CCP5PRH = 0x33A;
 CCP5RA = 0x33C;
_CCP5RA = 0x33C;
 CCP5RAL = 0x33C;
_CCP5RAL = 0x33C;
 CCP5RAH = 0x33E;
_CCP5RAH = 0x33E;
 CCP5RB = 0x340;
_CCP5RB = 0x340;
 CCP5RBL = 0x340;
_CCP5RBL = 0x340;
 CCP5RBH = 0x342;
_CCP5RBH = 0x342;
 CCP5BUFL = 0x344;
_CCP5BUFL = 0x344;
 CCP5BUFH = 0x346;
_CCP5BUFH = 0x346;
 CCP6CON1L = 0x348;
_CCP6CON1L = 0x348;
_CCP6CON1Lbits = 0x348;
 CCP6CON1H = 0x34A;
_CCP6CON1H = 0x34A;
_CCP6CON1Hbits = 0x34A;
 CCP6CON2L = 0x34C;
_CCP6CON2L = 0x34C;
_CCP6CON2Lbits = 0x34C;
 CCP6CON2H = 0x34E;
_CCP6CON2H = 0x34E;
_CCP6CON2Hbits = 0x34E;
 CCP6CON3L = 0x350;
_CCP6CON3L = 0x350;
 CCP6CON3H = 0x352;
_CCP6CON3H = 0x352;
_CCP6CON3Hbits = 0x352;
 CCP6STAT = 0x354;
_CCP6STAT = 0x354;
_CCP6STATbits = 0x354;
 CCP6STATL = 0x354;
_CCP6STATL = 0x354;
_CCP6STATLbits = 0x354;
 CCP6STATH = 0x356;
_CCP6STATH = 0x356;
_CCP6STATHbits = 0x356;
 CCP6TMRL = 0x358;
_CCP6TMRL = 0x358;
 CCP6TMRH = 0x35A;
_CCP6TMRH = 0x35A;
 CCP6PRL = 0x35C;
_CCP6PRL = 0x35C;
 CCP6PRH = 0x35E;
_CCP6PRH = 0x35E;
 CCP6RA = 0x360;
_CCP6RA = 0x360;
 CCP6RAL = 0x360;
_CCP6RAL = 0x360;
 CCP6RAH = 0x362;
_CCP6RAH = 0x362;
 CCP6RB = 0x364;
_CCP6RB = 0x364;
 CCP6RBL = 0x364;
_CCP6RBL = 0x364;
 CCP6RBH = 0x366;
_CCP6RBH = 0x366;
 CCP6BUFL = 0x368;
_CCP6BUFL = 0x368;
 CCP6BUFH = 0x36A;
_CCP6BUFH = 0x36A;
 CCP7CON1L = 0x36C;
_CCP7CON1L = 0x36C;
_CCP7CON1Lbits = 0x36C;
 CCP7CON1H = 0x36E;
_CCP7CON1H = 0x36E;
_CCP7CON1Hbits = 0x36E;
 CCP7CON2L = 0x370;
_CCP7CON2L = 0x370;
_CCP7CON2Lbits = 0x370;
 CCP7CON2H = 0x372;
_CCP7CON2H = 0x372;
_CCP7CON2Hbits = 0x372;
 CCP7CON3L = 0x374;
_CCP7CON3L = 0x374;
 CCP7CON3H = 0x376;
_CCP7CON3H = 0x376;
_CCP7CON3Hbits = 0x376;
 CCP7STAT = 0x378;
_CCP7STAT = 0x378;
_CCP7STATbits = 0x378;
 CCP7STATL = 0x378;
_CCP7STATL = 0x378;
_CCP7STATLbits = 0x378;
 CCP7STATH = 0x37A;
_CCP7STATH = 0x37A;
_CCP7STATHbits = 0x37A;
 CCP7TMRL = 0x37C;
_CCP7TMRL = 0x37C;
 CCP7TMRH = 0x37E;
_CCP7TMRH = 0x37E;
 CCP7PRL = 0x380;
_CCP7PRL = 0x380;
 CCP7PRH = 0x382;
_CCP7PRH = 0x382;
 CCP7RA = 0x384;
_CCP7RA = 0x384;
 CCP7RAL = 0x384;
_CCP7RAL = 0x384;
 CCP7RAH = 0x386;
_CCP7RAH = 0x386;
 CCP7RB = 0x388;
_CCP7RB = 0x388;
 CCP7RBL = 0x388;
_CCP7RBL = 0x388;
 CCP7RBH = 0x38A;
_CCP7RBH = 0x38A;
 CCP7BUFL = 0x38C;
_CCP7BUFL = 0x38C;
 CCP7BUFH = 0x38E;
_CCP7BUFH = 0x38E;
 U1MODE = 0x398;
_U1MODE = 0x398;
_U1MODEbits = 0x398;
 U1STA = 0x39A;
_U1STA = 0x39A;
_U1STAbits = 0x39A;
 U1TXREG = 0x39C;
_U1TXREG = 0x39C;
_U1TXREGbits = 0x39C;
 U1RXREG = 0x39E;
_U1RXREG = 0x39E;
 U1BRG = 0x3A0;
_U1BRG = 0x3A0;
 U1ADMD = 0x3A2;
_U1ADMD = 0x3A2;
_U1ADMDbits = 0x3A2;
 U2MODE = 0x3AE;
_U2MODE = 0x3AE;
_U2MODEbits = 0x3AE;
 U2STA = 0x3B0;
_U2STA = 0x3B0;
_U2STAbits = 0x3B0;
 U2TXREG = 0x3B2;
_U2TXREG = 0x3B2;
_U2TXREGbits = 0x3B2;
 U2RXREG = 0x3B4;
_U2RXREG = 0x3B4;
 U2BRG = 0x3B6;
_U2BRG = 0x3B6;
 U2ADMD = 0x3B8;
_U2ADMD = 0x3B8;
_U2ADMDbits = 0x3B8;
 U3MODE = 0x3C4;
_U3MODE = 0x3C4;
_U3MODEbits = 0x3C4;
 U3STA = 0x3C6;
_U3STA = 0x3C6;
_U3STAbits = 0x3C6;
 U3TXREG = 0x3C8;
_U3TXREG = 0x3C8;
_U3TXREGbits = 0x3C8;
 U3RXREG = 0x3CA;
_U3RXREG = 0x3CA;
 U3BRG = 0x3CC;
_U3BRG = 0x3CC;
 U3ADMD = 0x3CE;
_U3ADMD = 0x3CE;
_U3ADMDbits = 0x3CE;
 U4MODE = 0x3D0;
_U4MODE = 0x3D0;
_U4MODEbits = 0x3D0;
 U4STA = 0x3D2;
_U4STA = 0x3D2;
_U4STAbits = 0x3D2;
 U4TXREG = 0x3D4;
_U4TXREG = 0x3D4;
_U4TXREGbits = 0x3D4;
 U4RXREG = 0x3D6;
_U4RXREG = 0x3D6;
 U4BRG = 0x3D8;
_U4BRG = 0x3D8;
 U4ADMD = 0x3DA;
_U4ADMD = 0x3DA;
_U4ADMDbits = 0x3DA;
 U5MODE = 0x3DC;
_U5MODE = 0x3DC;
_U5MODEbits = 0x3DC;
 U5STA = 0x3DE;
_U5STA = 0x3DE;
_U5STAbits = 0x3DE;
 U5TXREG = 0x3E0;
_U5TXREG = 0x3E0;
_U5TXREGbits = 0x3E0;
 U5RXREG = 0x3E2;
_U5RXREG = 0x3E2;
 U5BRG = 0x3E4;
_U5BRG = 0x3E4;
 U5ADMD = 0x3E6;
_U5ADMD = 0x3E6;
_U5ADMDbits = 0x3E6;
 U6MODE = 0x3E8;
_U6MODE = 0x3E8;
_U6MODEbits = 0x3E8;
 U6STA = 0x3EA;
_U6STA = 0x3EA;
_U6STAbits = 0x3EA;
 U6TXREG = 0x3EC;
_U6TXREG = 0x3EC;
_U6TXREGbits = 0x3EC;
 U6RXREG = 0x3EE;
_U6RXREG = 0x3EE;
 U6BRG = 0x3F0;
_U6BRG = 0x3F0;
 U6ADMD = 0x3F2;
_U6ADMD = 0x3F2;
_U6ADMDbits = 0x3F2;
 SPI1CON1 = 0x3F4;
_SPI1CON1 = 0x3F4;
_SPI1CON1bits = 0x3F4;
 SPI1CON1L = 0x3F4;
_SPI1CON1L = 0x3F4;
_SPI1CON1Lbits = 0x3F4;
 SPI1CON1H = 0x3F6;
_SPI1CON1H = 0x3F6;
_SPI1CON1Hbits = 0x3F6;
 SPI1CON2 = 0x3F6;
_SPI1CON2 = 0x3F6;
_SPI1CON2bits = 0x3F6;
 SPI1CON2L = 0x3F8;
_SPI1CON2L = 0x3F8;
_SPI1CON2Lbits = 0x3F8;
 SPI1CON3 = 0x3F8;
_SPI1CON3 = 0x3F8;
_SPI1CON3bits = 0x3F8;
 SPI1STATL = 0x3FC;
_SPI1STATL = 0x3FC;
_SPI1STATLbits = 0x3FC;
 SPI1STATH = 0x3FE;
_SPI1STATH = 0x3FE;
_SPI1STATHbits = 0x3FE;
 SPI1BUFL = 0x400;
_SPI1BUFL = 0x400;
_SPI1BUFLbits = 0x400;
 SPI1BUFH = 0x402;
_SPI1BUFH = 0x402;
_SPI1BUFHbits = 0x402;
 SPI1BRGL = 0x404;
_SPI1BRGL = 0x404;
_SPI1BRGLbits = 0x404;
 SPI1IMSK1 = 0x408;
_SPI1IMSK1 = 0x408;
_SPI1IMSK1bits = 0x408;
 SPI1IMSKL = 0x408;
_SPI1IMSKL = 0x408;
_SPI1IMSKLbits = 0x408;
 SPI1IMSK2 = 0x40A;
_SPI1IMSK2 = 0x40A;
_SPI1IMSK2bits = 0x40A;
 SPI1IMSKH = 0x40A;
_SPI1IMSKH = 0x40A;
_SPI1IMSKHbits = 0x40A;
 SPI1URDTL = 0x40C;
_SPI1URDTL = 0x40C;
_SPI1URDTLbits = 0x40C;
 SPI1URDTH = 0x40E;
_SPI1URDTH = 0x40E;
_SPI1URDTHbits = 0x40E;
 SPI2CON1 = 0x410;
_SPI2CON1 = 0x410;
_SPI2CON1bits = 0x410;
 SPI2CON1L = 0x410;
_SPI2CON1L = 0x410;
_SPI2CON1Lbits = 0x410;
 SPI2CON1H = 0x412;
_SPI2CON1H = 0x412;
_SPI2CON1Hbits = 0x412;
 SPI2CON2 = 0x412;
_SPI2CON2 = 0x412;
_SPI2CON2bits = 0x412;
 SPI2CON2L = 0x414;
_SPI2CON2L = 0x414;
_SPI2CON2Lbits = 0x414;
 SPI2CON3 = 0x414;
_SPI2CON3 = 0x414;
_SPI2CON3bits = 0x414;
 SPI2STATL = 0x418;
_SPI2STATL = 0x418;
_SPI2STATLbits = 0x418;
 SPI2STATH = 0x41A;
_SPI2STATH = 0x41A;
_SPI2STATHbits = 0x41A;
 SPI2BUFL = 0x41C;
_SPI2BUFL = 0x41C;
_SPI2BUFLbits = 0x41C;
 SPI2BUFH = 0x41E;
_SPI2BUFH = 0x41E;
_SPI2BUFHbits = 0x41E;
 SPI2BRGL = 0x420;
_SPI2BRGL = 0x420;
_SPI2BRGLbits = 0x420;
 SPI2IMSK1 = 0x424;
_SPI2IMSK1 = 0x424;
_SPI2IMSK1bits = 0x424;
 SPI2IMSKL = 0x424;
_SPI2IMSKL = 0x424;
_SPI2IMSKLbits = 0x424;
 SPI2IMSK2 = 0x426;
_SPI2IMSK2 = 0x426;
_SPI2IMSK2bits = 0x426;
 SPI2IMSKH = 0x426;
_SPI2IMSKH = 0x426;
_SPI2IMSKHbits = 0x426;
 SPI2URDTL = 0x428;
_SPI2URDTL = 0x428;
_SPI2URDTLbits = 0x428;
 SPI2URDTH = 0x42A;
_SPI2URDTH = 0x42A;
_SPI2URDTHbits = 0x42A;
 SPI3CON1 = 0x42C;
_SPI3CON1 = 0x42C;
_SPI3CON1bits = 0x42C;
 SPI3CON1L = 0x42C;
_SPI3CON1L = 0x42C;
_SPI3CON1Lbits = 0x42C;
 SPI3CON1H = 0x42E;
_SPI3CON1H = 0x42E;
_SPI3CON1Hbits = 0x42E;
 SPI3CON2 = 0x42E;
_SPI3CON2 = 0x42E;
_SPI3CON2bits = 0x42E;
 SPI3CON2L = 0x430;
_SPI3CON2L = 0x430;
_SPI3CON2Lbits = 0x430;
 SPI3CON3 = 0x430;
_SPI3CON3 = 0x430;
_SPI3CON3bits = 0x430;
 SPI3STATL = 0x434;
_SPI3STATL = 0x434;
_SPI3STATLbits = 0x434;
 SPI3STATH = 0x436;
_SPI3STATH = 0x436;
_SPI3STATHbits = 0x436;
 SPI3BUFL = 0x438;
_SPI3BUFL = 0x438;
_SPI3BUFLbits = 0x438;
 SPI3BUFH = 0x43A;
_SPI3BUFH = 0x43A;
_SPI3BUFHbits = 0x43A;
 SPI3BRGL = 0x43C;
_SPI3BRGL = 0x43C;
_SPI3BRGLbits = 0x43C;
 SPI3IMSK1 = 0x440;
_SPI3IMSK1 = 0x440;
_SPI3IMSK1bits = 0x440;
 SPI3IMSKL = 0x440;
_SPI3IMSKL = 0x440;
_SPI3IMSKLbits = 0x440;
 SPI3IMSK2 = 0x442;
_SPI3IMSK2 = 0x442;
_SPI3IMSK2bits = 0x442;
 SPI3IMSKH = 0x442;
_SPI3IMSKH = 0x442;
_SPI3IMSKHbits = 0x442;
 SPI3URDTL = 0x444;
_SPI3URDTL = 0x444;
_SPI3URDTLbits = 0x444;
 SPI3URDTH = 0x446;
_SPI3URDTH = 0x446;
_SPI3URDTHbits = 0x446;
 CLC1CONL = 0x464;
_CLC1CONL = 0x464;
_CLC1CONLbits = 0x464;
 CLC1CONH = 0x466;
_CLC1CONH = 0x466;
_CLC1CONHbits = 0x466;
 CLC1SEL = 0x468;
_CLC1SEL = 0x468;
_CLC1SELbits = 0x468;
 CLC1SELL = 0x468;
_CLC1SELL = 0x468;
_CLC1SELLbits = 0x468;
 CLC1GLSL = 0x46C;
_CLC1GLSL = 0x46C;
_CLC1GLSLbits = 0x46C;
 CLC1GLSH = 0x46E;
_CLC1GLSH = 0x46E;
_CLC1GLSHbits = 0x46E;
 CLC2CONL = 0x470;
_CLC2CONL = 0x470;
_CLC2CONLbits = 0x470;
 CLC2CONH = 0x472;
_CLC2CONH = 0x472;
_CLC2CONHbits = 0x472;
 CLC2SEL = 0x474;
_CLC2SEL = 0x474;
_CLC2SELbits = 0x474;
 CLC2SELL = 0x474;
_CLC2SELL = 0x474;
_CLC2SELLbits = 0x474;
 CLC2GLSL = 0x478;
_CLC2GLSL = 0x478;
_CLC2GLSLbits = 0x478;
 CLC2GLSH = 0x47A;
_CLC2GLSH = 0x47A;
_CLC2GLSHbits = 0x47A;
 CLC3CONL = 0x47C;
_CLC3CONL = 0x47C;
_CLC3CONLbits = 0x47C;
 CLC3CONH = 0x47E;
_CLC3CONH = 0x47E;
_CLC3CONHbits = 0x47E;
 CLC3SEL = 0x480;
_CLC3SEL = 0x480;
_CLC3SELbits = 0x480;
 CLC3SELL = 0x480;
_CLC3SELL = 0x480;
_CLC3SELLbits = 0x480;
 CLC3GLSL = 0x484;
_CLC3GLSL = 0x484;
_CLC3GLSLbits = 0x484;
 CLC3GLSH = 0x486;
_CLC3GLSH = 0x486;
_CLC3GLSHbits = 0x486;
 CLC4CONL = 0x488;
_CLC4CONL = 0x488;
_CLC4CONLbits = 0x488;
 CLC4CONH = 0x48A;
_CLC4CONH = 0x48A;
_CLC4CONHbits = 0x48A;
 CLC4SEL = 0x48C;
_CLC4SEL = 0x48C;
_CLC4SELbits = 0x48C;
 CLC4SELL = 0x48C;
_CLC4SELL = 0x48C;
_CLC4SELLbits = 0x48C;
 CLC4GLSL = 0x490;
_CLC4GLSL = 0x490;
_CLC4GLSLbits = 0x490;
 CLC4GLSH = 0x492;
_CLC4GLSH = 0x492;
_CLC4GLSHbits = 0x492;
 I2C1RCV = 0x494;
_I2C1RCV = 0x494;
_I2C1RCVbits = 0x494;
 I2C1TRN = 0x496;
_I2C1TRN = 0x496;
_I2C1TRNbits = 0x496;
 I2C1BRG = 0x498;
_I2C1BRG = 0x498;
 I2C1CON1 = 0x49A;
_I2C1CON1 = 0x49A;
_I2C1CON1bits = 0x49A;
 I2C1CONL = 0x49A;
_I2C1CONL = 0x49A;
_I2C1CONLbits = 0x49A;
 I2C1CON2 = 0x49C;
_I2C1CON2 = 0x49C;
_I2C1CON2bits = 0x49C;
 I2C1CONH = 0x49C;
_I2C1CONH = 0x49C;
_I2C1CONHbits = 0x49C;
 I2C1STAT = 0x49E;
_I2C1STAT = 0x49E;
_I2C1STATbits = 0x49E;
 I2C1ADD = 0x4A0;
_I2C1ADD = 0x4A0;
_I2C1ADDbits = 0x4A0;
 I2C1MSK = 0x4A2;
_I2C1MSK = 0x4A2;
_I2C1MSKbits = 0x4A2;
 I2C2RCV = 0x4A4;
_I2C2RCV = 0x4A4;
_I2C2RCVbits = 0x4A4;
 I2C2TRN = 0x4A6;
_I2C2TRN = 0x4A6;
_I2C2TRNbits = 0x4A6;
 I2C2BRG = 0x4A8;
_I2C2BRG = 0x4A8;
 I2C2CON1 = 0x4AA;
_I2C2CON1 = 0x4AA;
_I2C2CON1bits = 0x4AA;
 I2C2CONL = 0x4AA;
_I2C2CONL = 0x4AA;
_I2C2CONLbits = 0x4AA;
 I2C2CON2 = 0x4AC;
_I2C2CON2 = 0x4AC;
_I2C2CON2bits = 0x4AC;
 I2C2CONH = 0x4AC;
_I2C2CONH = 0x4AC;
_I2C2CONHbits = 0x4AC;
 I2C2STAT = 0x4AE;
_I2C2STAT = 0x4AE;
_I2C2STATbits = 0x4AE;
 I2C2ADD = 0x4B0;
_I2C2ADD = 0x4B0;
_I2C2ADDbits = 0x4B0;
 I2C2MSK = 0x4B2;
_I2C2MSK = 0x4B2;
_I2C2MSKbits = 0x4B2;
 I2C3RCV = 0x4B4;
_I2C3RCV = 0x4B4;
_I2C3RCVbits = 0x4B4;
 I2C3TRN = 0x4B6;
_I2C3TRN = 0x4B6;
_I2C3TRNbits = 0x4B6;
 I2C3BRG = 0x4B8;
_I2C3BRG = 0x4B8;
 I2C3CON1 = 0x4BA;
_I2C3CON1 = 0x4BA;
_I2C3CON1bits = 0x4BA;
 I2C3CONL = 0x4BA;
_I2C3CONL = 0x4BA;
_I2C3CONLbits = 0x4BA;
 I2C3CON2 = 0x4BC;
_I2C3CON2 = 0x4BC;
_I2C3CON2bits = 0x4BC;
 I2C3CONH = 0x4BC;
_I2C3CONH = 0x4BC;
_I2C3CONHbits = 0x4BC;
 I2C3STAT = 0x4BE;
_I2C3STAT = 0x4BE;
_I2C3STATbits = 0x4BE;
 I2C3ADD = 0x4C0;
_I2C3ADD = 0x4C0;
_I2C3ADDbits = 0x4C0;
 I2C3MSK = 0x4C2;
_I2C3MSK = 0x4C2;
_I2C3MSKbits = 0x4C2;
 DMACON = 0x4C4;
_DMACON = 0x4C4;
_DMACONbits = 0x4C4;
 DMABUF = 0x4C6;
_DMABUF = 0x4C6;
 DMAL = 0x4C8;
_DMAL = 0x4C8;
 DMAH = 0x4CA;
_DMAH = 0x4CA;
 DMACH0 = 0x4CC;
_DMACH0 = 0x4CC;
_DMACH0bits = 0x4CC;
 DMAINT0 = 0x4CE;
_DMAINT0 = 0x4CE;
_DMAINT0bits = 0x4CE;
 DMASRC0 = 0x4D0;
_DMASRC0 = 0x4D0;
 DMADST0 = 0x4D2;
_DMADST0 = 0x4D2;
 DMACNT0 = 0x4D4;
_DMACNT0 = 0x4D4;
 DMACH1 = 0x4D6;
_DMACH1 = 0x4D6;
_DMACH1bits = 0x4D6;
 DMAINT1 = 0x4D8;
_DMAINT1 = 0x4D8;
_DMAINT1bits = 0x4D8;
 DMASRC1 = 0x4DA;
_DMASRC1 = 0x4DA;
 DMADST1 = 0x4DC;
_DMADST1 = 0x4DC;
 DMACNT1 = 0x4DE;
_DMACNT1 = 0x4DE;
 DMACH2 = 0x4E0;
_DMACH2 = 0x4E0;
_DMACH2bits = 0x4E0;
 DMAINT2 = 0x4E2;
_DMAINT2 = 0x4E2;
_DMAINT2bits = 0x4E2;
 DMASRC2 = 0x4E4;
_DMASRC2 = 0x4E4;
 DMADST2 = 0x4E6;
_DMADST2 = 0x4E6;
 DMACNT2 = 0x4E8;
_DMACNT2 = 0x4E8;
 DMACH3 = 0x4EA;
_DMACH3 = 0x4EA;
_DMACH3bits = 0x4EA;
 DMAINT3 = 0x4EC;
_DMAINT3 = 0x4EC;
_DMAINT3bits = 0x4EC;
 DMASRC3 = 0x4EE;
_DMASRC3 = 0x4EE;
 DMADST3 = 0x4F0;
_DMADST3 = 0x4F0;
 DMACNT3 = 0x4F2;
_DMACNT3 = 0x4F2;
 DMACH4 = 0x4F4;
_DMACH4 = 0x4F4;
_DMACH4bits = 0x4F4;
 DMAINT4 = 0x4F6;
_DMAINT4 = 0x4F6;
_DMAINT4bits = 0x4F6;
 DMASRC4 = 0x4F8;
_DMASRC4 = 0x4F8;
 DMADST4 = 0x4FA;
_DMADST4 = 0x4FA;
 DMACNT4 = 0x4FC;
_DMACNT4 = 0x4FC;
 DMACH5 = 0x4FE;
_DMACH5 = 0x4FE;
_DMACH5bits = 0x4FE;
 DMAINT5 = 0x500;
_DMAINT5 = 0x500;
_DMAINT5bits = 0x500;
 DMASRC5 = 0x502;
_DMASRC5 = 0x502;
 DMADST5 = 0x504;
_DMADST5 = 0x504;
 DMACNT5 = 0x506;
_DMACNT5 = 0x506;
 DMACH6 = 0x508;
_DMACH6 = 0x508;
_DMACH6bits = 0x508;
 DMAINT6 = 0x50A;
_DMAINT6 = 0x50A;
_DMAINT6bits = 0x50A;
 DMASRC6 = 0x50C;
_DMASRC6 = 0x50C;
 DMADST6 = 0x50E;
_DMADST6 = 0x50E;
 DMACNT6 = 0x510;
_DMACNT6 = 0x510;
 DMACH7 = 0x512;
_DMACH7 = 0x512;
_DMACH7bits = 0x512;
 DMAINT7 = 0x514;
_DMAINT7 = 0x514;
_DMAINT7bits = 0x514;
 DMASRC7 = 0x516;
_DMASRC7 = 0x516;
 DMADST7 = 0x518;
_DMADST7 = 0x518;
 DMACNT7 = 0x51A;
_DMACNT7 = 0x51A;
 PADCON = 0x65E;
_PADCON = 0x65E;
_PADCONbits = 0x65E;
 IOCSTAT = 0x660;
_IOCSTAT = 0x660;
_IOCSTATbits = 0x660;
 TRISB = 0x676;
_TRISB = 0x676;
_TRISBbits = 0x676;
 PORTB = 0x678;
_PORTB = 0x678;
_PORTBbits = 0x678;
 LATB = 0x67A;
_LATB = 0x67A;
_LATBbits = 0x67A;
 ODCB = 0x67C;
_ODCB = 0x67C;
_ODCBbits = 0x67C;
 ANSB = 0x67E;
_ANSB = 0x67E;
_ANSBbits = 0x67E;
 ANSELB = 0x67E;
_ANSELB = 0x67E;
_ANSELBbits = 0x67E;
 IOCPB = 0x680;
_IOCPB = 0x680;
_IOCPBbits = 0x680;
 IOCNB = 0x682;
_IOCNB = 0x682;
_IOCNBbits = 0x682;
 IOCFB = 0x684;
_IOCFB = 0x684;
_IOCFBbits = 0x684;
 CNPUB = 0x686;
_CNPUB = 0x686;
_CNPUBbits = 0x686;
 IOCPUB = 0x686;
_IOCPUB = 0x686;
_IOCPUBbits = 0x686;
 CNPDB = 0x688;
_CNPDB = 0x688;
_CNPDBbits = 0x688;
 IOCPDB = 0x688;
_IOCPDB = 0x688;
_IOCPDBbits = 0x688;
 TRISC = 0x68A;
_TRISC = 0x68A;
_TRISCbits = 0x68A;
 PORTC = 0x68C;
_PORTC = 0x68C;
_PORTCbits = 0x68C;
 LATC = 0x68E;
_LATC = 0x68E;
_LATCbits = 0x68E;
 ODCC = 0x690;
_ODCC = 0x690;
_ODCCbits = 0x690;
 ANSC = 0x692;
_ANSC = 0x692;
_ANSCbits = 0x692;
 ANSELC = 0x692;
_ANSELC = 0x692;
_ANSELCbits = 0x692;
 IOCPC = 0x694;
_IOCPC = 0x694;
_IOCPCbits = 0x694;
 IOCNC = 0x696;
_IOCNC = 0x696;
_IOCNCbits = 0x696;
 IOCFC = 0x698;
_IOCFC = 0x698;
_IOCFCbits = 0x698;
 CNPUC = 0x69A;
_CNPUC = 0x69A;
_CNPUCbits = 0x69A;
 IOCPUC = 0x69A;
_IOCPUC = 0x69A;
_IOCPUCbits = 0x69A;
 CNPDC = 0x69C;
_CNPDC = 0x69C;
_CNPDCbits = 0x69C;
 IOCPDC = 0x69C;
_IOCPDC = 0x69C;
_IOCPDCbits = 0x69C;
 TRISD = 0x69E;
_TRISD = 0x69E;
_TRISDbits = 0x69E;
 PORTD = 0x6A0;
_PORTD = 0x6A0;
_PORTDbits = 0x6A0;
 LATD = 0x6A2;
_LATD = 0x6A2;
_LATDbits = 0x6A2;
 ODCD = 0x6A4;
_ODCD = 0x6A4;
_ODCDbits = 0x6A4;
 ANSD = 0x6A6;
_ANSD = 0x6A6;
_ANSDbits = 0x6A6;
 ANSELD = 0x6A6;
_ANSELD = 0x6A6;
_ANSELDbits = 0x6A6;
 IOCPD = 0x6A8;
_IOCPD = 0x6A8;
_IOCPDbits = 0x6A8;
 IOCND = 0x6AA;
_IOCND = 0x6AA;
_IOCNDbits = 0x6AA;
 IOCFD = 0x6AC;
_IOCFD = 0x6AC;
_IOCFDbits = 0x6AC;
 CNPUD = 0x6AE;
_CNPUD = 0x6AE;
_CNPUDbits = 0x6AE;
 IOCPUD = 0x6AE;
_IOCPUD = 0x6AE;
_IOCPUDbits = 0x6AE;
 CNPDD = 0x6B0;
_CNPDD = 0x6B0;
_CNPDDbits = 0x6B0;
 IOCPDD = 0x6B0;
_IOCPDD = 0x6B0;
_IOCPDDbits = 0x6B0;
 TRISE = 0x6B2;
_TRISE = 0x6B2;
_TRISEbits = 0x6B2;
 PORTE = 0x6B4;
_PORTE = 0x6B4;
_PORTEbits = 0x6B4;
 LATE = 0x6B6;
_LATE = 0x6B6;
_LATEbits = 0x6B6;
 ODCE = 0x6B8;
_ODCE = 0x6B8;
_ODCEbits = 0x6B8;
 ANSE = 0x6BA;
_ANSE = 0x6BA;
_ANSEbits = 0x6BA;
 ANSELE = 0x6BA;
_ANSELE = 0x6BA;
_ANSELEbits = 0x6BA;
 IOCPE = 0x6BC;
_IOCPE = 0x6BC;
_IOCPEbits = 0x6BC;
 IOCNE = 0x6BE;
_IOCNE = 0x6BE;
_IOCNEbits = 0x6BE;
 IOCFE = 0x6C0;
_IOCFE = 0x6C0;
_IOCFEbits = 0x6C0;
 CNPUE = 0x6C2;
_CNPUE = 0x6C2;
_CNPUEbits = 0x6C2;
 IOCPUE = 0x6C2;
_IOCPUE = 0x6C2;
_IOCPUEbits = 0x6C2;
 CNPDE = 0x6C4;
_CNPDE = 0x6C4;
_CNPDEbits = 0x6C4;
 IOCPDE = 0x6C4;
_IOCPDE = 0x6C4;
_IOCPDEbits = 0x6C4;
 TRISF = 0x6C6;
_TRISF = 0x6C6;
_TRISFbits = 0x6C6;
 PORTF = 0x6C8;
_PORTF = 0x6C8;
_PORTFbits = 0x6C8;
 LATF = 0x6CA;
_LATF = 0x6CA;
_LATFbits = 0x6CA;
 ODCF = 0x6CC;
_ODCF = 0x6CC;
_ODCFbits = 0x6CC;
 ANSELF = 0x6CE;
_ANSELF = 0x6CE;
 ANSF = 0x6CE;
_ANSF = 0x6CE;
 IOCPF = 0x6D0;
_IOCPF = 0x6D0;
_IOCPFbits = 0x6D0;
 IOCNF = 0x6D2;
_IOCNF = 0x6D2;
_IOCNFbits = 0x6D2;
 IOCFF = 0x6D4;
_IOCFF = 0x6D4;
_IOCFFbits = 0x6D4;
 CNPUF = 0x6D6;
_CNPUF = 0x6D6;
_CNPUFbits = 0x6D6;
 IOCPUF = 0x6D6;
_IOCPUF = 0x6D6;
_IOCPUFbits = 0x6D6;
 CNPDF = 0x6D8;
_CNPDF = 0x6D8;
_CNPDFbits = 0x6D8;
 IOCPDF = 0x6D8;
_IOCPDF = 0x6D8;
_IOCPDFbits = 0x6D8;
 TRISG = 0x6DA;
_TRISG = 0x6DA;
_TRISGbits = 0x6DA;
 PORTG = 0x6DC;
_PORTG = 0x6DC;
_PORTGbits = 0x6DC;
 LATG = 0x6DE;
_LATG = 0x6DE;
_LATGbits = 0x6DE;
 ODCG = 0x6E0;
_ODCG = 0x6E0;
_ODCGbits = 0x6E0;
 ANSELG = 0x6E2;
_ANSELG = 0x6E2;
_ANSELGbits = 0x6E2;
 ANSG = 0x6E2;
_ANSG = 0x6E2;
_ANSGbits = 0x6E2;
 IOCPG = 0x6E4;
_IOCPG = 0x6E4;
_IOCPGbits = 0x6E4;
 IOCNG = 0x6E6;
_IOCNG = 0x6E6;
_IOCNGbits = 0x6E6;
 IOCFG = 0x6E8;
_IOCFG = 0x6E8;
_IOCFGbits = 0x6E8;
 CNPUG = 0x6EA;
_CNPUG = 0x6EA;
_CNPUGbits = 0x6EA;
 IOCPUG = 0x6EA;
_IOCPUG = 0x6EA;
_IOCPUGbits = 0x6EA;
 CNPDG = 0x6EC;
_CNPDG = 0x6EC;
_CNPDGbits = 0x6EC;
 IOCPDG = 0x6EC;
_IOCPDG = 0x6EC;
_IOCPDGbits = 0x6EC;
 ADC1BUF0 = 0x712;
_ADC1BUF0 = 0x712;
 ADC1BUF1 = 0x714;
_ADC1BUF1 = 0x714;
 ADC1BUF2 = 0x716;
_ADC1BUF2 = 0x716;
 ADC1BUF3 = 0x718;
_ADC1BUF3 = 0x718;
 ADC1BUF4 = 0x71A;
_ADC1BUF4 = 0x71A;
 ADC1BUF5 = 0x71C;
_ADC1BUF5 = 0x71C;
 ADC1BUF6 = 0x71E;
_ADC1BUF6 = 0x71E;
 ADC1BUF7 = 0x720;
_ADC1BUF7 = 0x720;
 ADC1BUF8 = 0x722;
_ADC1BUF8 = 0x722;
 ADC1BUF9 = 0x724;
_ADC1BUF9 = 0x724;
 ADC1BUF10 = 0x726;
_ADC1BUF10 = 0x726;
 ADC1BUF11 = 0x728;
_ADC1BUF11 = 0x728;
 ADC1BUF12 = 0x72A;
_ADC1BUF12 = 0x72A;
 ADC1BUF13 = 0x72C;
_ADC1BUF13 = 0x72C;
 ADC1BUF14 = 0x72E;
_ADC1BUF14 = 0x72E;
 ADC1BUF15 = 0x730;
_ADC1BUF15 = 0x730;
 ADC1BUF16 = 0x732;
_ADC1BUF16 = 0x732;
 ADC1BUF17 = 0x734;
_ADC1BUF17 = 0x734;
 ADC1BUF18 = 0x736;
_ADC1BUF18 = 0x736;
 ADC1BUF19 = 0x738;
_ADC1BUF19 = 0x738;
 ADC1BUF20 = 0x73A;
_ADC1BUF20 = 0x73A;
 ADC1BUF21 = 0x73C;
_ADC1BUF21 = 0x73C;
 ADC1BUF22 = 0x73E;
_ADC1BUF22 = 0x73E;
 ADC1BUF23 = 0x740;
_ADC1BUF23 = 0x740;
 ADC1BUF24 = 0x742;
_ADC1BUF24 = 0x742;
 ADC1BUF25 = 0x744;
_ADC1BUF25 = 0x744;
 AD1CON1 = 0x746;
_AD1CON1 = 0x746;
_AD1CON1bits = 0x746;
 AD1CON2 = 0x748;
_AD1CON2 = 0x748;
_AD1CON2bits = 0x748;
 AD1CON3 = 0x74A;
_AD1CON3 = 0x74A;
_AD1CON3bits = 0x74A;
 AD1CHS = 0x74C;
_AD1CHS = 0x74C;
_AD1CHSbits = 0x74C;
 AD1CHS0 = 0x74C;
_AD1CHS0 = 0x74C;
_AD1CHS0bits = 0x74C;
 AD1CSSH = 0x74E;
_AD1CSSH = 0x74E;
_AD1CSSHbits = 0x74E;
 AD1CSSL = 0x750;
_AD1CSSL = 0x750;
_AD1CSSLbits = 0x750;
 AD1CON4 = 0x752;
_AD1CON4 = 0x752;
_AD1CON4bits = 0x752;
 AD1CON5 = 0x754;
_AD1CON5 = 0x754;
_AD1CON5bits = 0x754;
 AD1CHITH = 0x756;
_AD1CHITH = 0x756;
_AD1CHITHbits = 0x756;
 AD1CHITL = 0x758;
_AD1CHITL = 0x758;
_AD1CHITLbits = 0x758;
 AD1CTMENH = 0x75A;
_AD1CTMENH = 0x75A;
_AD1CTMENHbits = 0x75A;
 AD1CTMENL = 0x75C;
_AD1CTMENL = 0x75C;
_AD1CTMENLbits = 0x75C;
 AD1DMBUF = 0x75E;
_AD1DMBUF = 0x75E;
_AD1DMBUFbits = 0x75E;
 AD1RESDMA = 0x75E;
_AD1RESDMA = 0x75E;
_AD1RESDMAbits = 0x75E;
 NVMCON = 0x760;
_NVMCON = 0x760;
_NVMCONbits = 0x760;
 NVMADR = 0x762;
_NVMADR = 0x762;
_NVMADRbits = 0x762;
 NVMADRL = 0x762;
_NVMADRL = 0x762;
_NVMADRLbits = 0x762;
 NVMADRH = 0x764;
_NVMADRH = 0x764;
_NVMADRHbits = 0x764;
 NVMADRU = 0x764;
_NVMADRU = 0x764;
_NVMADRUbits = 0x764;
 NVMKEY = 0x766;
_NVMKEY = 0x766;
 RPINR0 = 0x790;
_RPINR0 = 0x790;
_RPINR0bits = 0x790;
 RPINR1 = 0x792;
_RPINR1 = 0x792;
_RPINR1bits = 0x792;
 RPINR2 = 0x794;
_RPINR2 = 0x794;
_RPINR2bits = 0x794;
 RPINR3 = 0x796;
_RPINR3 = 0x796;
_RPINR3bits = 0x796;
 RPINR4 = 0x798;
_RPINR4 = 0x798;
_RPINR4bits = 0x798;
 RPINR7 = 0x79E;
_RPINR7 = 0x79E;
_RPINR7bits = 0x79E;
 RPINR8 = 0x7A0;
_RPINR8 = 0x7A0;
_RPINR8bits = 0x7A0;
 RPINR11 = 0x7A6;
_RPINR11 = 0x7A6;
_RPINR11bits = 0x7A6;
 RPINR12 = 0x7A8;
_RPINR12 = 0x7A8;
_RPINR12bits = 0x7A8;
 RPINR17 = 0x7B2;
_RPINR17 = 0x7B2;
_RPINR17bits = 0x7B2;
 RPINR18 = 0x7B4;
_RPINR18 = 0x7B4;
_RPINR18bits = 0x7B4;
 RPINR19 = 0x7B6;
_RPINR19 = 0x7B6;
_RPINR19bits = 0x7B6;
 RPINR20 = 0x7B8;
_RPINR20 = 0x7B8;
_RPINR20bits = 0x7B8;
 RPINR21 = 0x7BA;
_RPINR21 = 0x7BA;
_RPINR21bits = 0x7BA;
 RPINR22 = 0x7BC;
_RPINR22 = 0x7BC;
_RPINR22bits = 0x7BC;
 RPINR23 = 0x7BE;
_RPINR23 = 0x7BE;
_RPINR23bits = 0x7BE;
 RPINR25 = 0x7C2;
_RPINR25 = 0x7C2;
_RPINR25bits = 0x7C2;
 RPINR27 = 0x7C6;
_RPINR27 = 0x7C6;
_RPINR27bits = 0x7C6;
 RPINR28 = 0x7C8;
_RPINR28 = 0x7C8;
_RPINR28bits = 0x7C8;
 RPINR29 = 0x7CA;
_RPINR29 = 0x7CA;
_RPINR29bits = 0x7CA;
 RPOR0 = 0x7D4;
_RPOR0 = 0x7D4;
_RPOR0bits = 0x7D4;
 RPOR1 = 0x7D6;
_RPOR1 = 0x7D6;
_RPOR1bits = 0x7D6;
 RPOR2 = 0x7D8;
_RPOR2 = 0x7D8;
_RPOR2bits = 0x7D8;
 RPOR3 = 0x7DA;
_RPOR3 = 0x7DA;
_RPOR3bits = 0x7DA;
 RPOR4 = 0x7DC;
_RPOR4 = 0x7DC;
_RPOR4bits = 0x7DC;
 RPOR5 = 0x7DE;
_RPOR5 = 0x7DE;
_RPOR5bits = 0x7DE;
 RPOR6 = 0x7E0;
_RPOR6 = 0x7E0;
_RPOR6bits = 0x7E0;
 RPOR7 = 0x7E2;
_RPOR7 = 0x7E2;
_RPOR7bits = 0x7E2;
 RPOR8 = 0x7E4;
_RPOR8 = 0x7E4;
_RPOR8bits = 0x7E4;
 RPOR9 = 0x7E6;
_RPOR9 = 0x7E6;
_RPOR9bits = 0x7E6;
 RPOR10 = 0x7E8;
_RPOR10 = 0x7E8;
_RPOR10bits = 0x7E8;
 RPOR11 = 0x7EA;
_RPOR11 = 0x7EA;
_RPOR11bits = 0x7EA;
 RPOR12 = 0x7EC;
_RPOR12 = 0x7EC;
_RPOR12bits = 0x7EC;
 RPOR13 = 0x7EE;
_RPOR13 = 0x7EE;
_RPOR13bits = 0x7EE;
 RPOR14 = 0x7F0;
_RPOR14 = 0x7F0;
_RPOR14bits = 0x7F0;
 RPOR15 = 0x7F2;
_RPOR15 = 0x7F2;
_RPOR15bits = 0x7F2;
/*

** ======= Base Addresses for Various Peripherals and ACC ======

*/
 IC1 = 0x204;
_IC1 = 0x204;
 IC2 = 0x20C;
_IC2 = 0x20C;
 IC3 = 0x214;
_IC3 = 0x214;
 IC4 = 0x21C;
_IC4 = 0x21C;
 IC5 = 0x224;
_IC5 = 0x224;
 IC6 = 0x22C;
_IC6 = 0x22C;
 OC1 = 0x234;
_OC1 = 0x234;
 OC2 = 0x23E;
_OC2 = 0x23E;
 OC3 = 0x248;
_OC3 = 0x248;
 OC4 = 0x252;
_OC4 = 0x252;
 OC5 = 0x25C;
_OC5 = 0x25C;
 OC6 = 0x266;
_OC6 = 0x266;
 UART1 = 0x398;
_UART1 = 0x398;
 UART2 = 0x3AE;
_UART2 = 0x3AE;

==================================================
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(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)fgtge.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)fixsfdi.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)fixunssfsi.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)floatdisf.daeo
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(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)fne.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)fpack.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)funpack.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)funpack2.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)futil.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)modsi3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)mulsf3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)powf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)sqrtf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)udivsi3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)umodsi3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)divmoddi3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)muldi3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)_frexpf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)errno.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)expf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)fchop.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)fcompare.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)fixsfsi.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)ldexpf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)logf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)umuldi3.daeo
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(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)isalnum.DA_eso
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)isalpha.DA_eso
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)isspace.DA_eso
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)isxdigit.DA_eso
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)tolower.DA_eso
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)toupper.DA_eso
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)gmtime.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)malloc.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)memcmp.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)memcpy.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)memmove.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)memset.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)mktime.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strcat.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strchr.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strcmp.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strcpy.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strcspn.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strlen.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strncmp.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strncpy.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strstr.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strtok.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetmem.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xstod.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xstoflt.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xstopfx.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xstoul.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xstoxflt.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xttotm.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sprintf.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)vsprintf.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xprintf.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xputfld.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)localtim.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strtol.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xdtento.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xfdscale.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xfdunsca.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xferaise.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetzone.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xisdst.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xvacopy.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sprintf_cdnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sscanf_cdnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xprintf_cdnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xputfld_cdnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xscanf_cdnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sprintf_cdnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sscanf_cdnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xprintf_cdnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xputfld_cdnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xscanf_cdnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sprintf_cdeEnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xprintf_cdeEnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xputfld_cdeEnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xldtob_cdeEnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgenld_cdeEnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sscanf_cdeEfFnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xscanf_cdeEfFnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sscanf_cdeEfFnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xscanf_cdeEfFnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sprintf_cdeEfFnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xprintf_cdeEfFnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xputfld_cdeEfFnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xldtob_cdeEfFnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgenld_cdeEfFnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sprintf_cdeEfFnopsuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xprintf_cdeEfFnopsuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xputfld_cdeEfFnopsuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xldtob_cdeEfFnopsuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgenld_cdeEfFnopsuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sprintf_cdeEnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xprintf_cdeEnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xputfld_cdeEnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xldtob_cdeEnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgenld_cdeEnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sscanf_cdfFnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xscanf_cdfFnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)sprintf_cdnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xprintf_cdnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xputfld_cdnopsuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)asctime.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)div.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)free.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)ldiv.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)memchr.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)strspn.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xatexit.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xfdnorm.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetdst.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgettime.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xldtob.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xldunsca.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xlitob.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xputtxt.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xstrftim.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xdnorm.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgentime.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xldscale.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetfld_cdnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetfld_cdnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetfld_cdeEfFnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetfloa_cdeEfFnopuxX.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetfld_cdeEfFnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetfloa_cdeEfFnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetfld_cdfFnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetfloa_cdfFnopuxXL.DAeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgenld.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetint.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xgetstr.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xstold.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xstoll.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xstoull.DA_eo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-c-elf.a)xldtento.DA_elo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-pic30-elf.a)sbrkda.Leo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-pic30-elf.a)getenvda.Leo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/liblega-pic30-elf.a)brkda.Lelo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)adddf3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)deqltle.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)dgtge.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)divdf3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)divsi3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)dpack.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)dunpack2.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)extendsfdf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)fixdfsi.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)floatsidf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)muldf3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)subdf3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)truncdfsf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)mulsi3.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)dcompare.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)dpropagateNaN.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)dtype.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)dunpack.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)floatdidf.daeo
(/Applications/microchip/xc16/v1.50/bin/bin/../../lib/libm-elf.a)floatundidf.daeo

xc16-ld 1.50 (B)

Default Code Model: Small
Default Data Model: Large
Default Scalar Model: Small

"program" Memory  [Origin = 0x100, Length = 0xabe00]

section                    address   length (PC units)   length (bytes) (dec)
-------                    -------   -----------------   --------------------
app_reset_section           0x1800                 0x4             0x6  (6)
.text                       0x1804               0x1fa           0x2f7  (759)
.text                       0x19fe                 0x2             0x3  (3)
__remapped_DefaultInterrupt    0x1a00                 0x4             0x6  (6)
remappedOscillatorFail      0x1a04                 0x4             0x6  (6)
remappedAddressError        0x1a08                 0x4             0x6  (6)
remappedStackError          0x1a0c                 0x4             0x6  (6)
remappedMathError           0x1a10                 0x4             0x6  (6)
remappedGeneralError        0x1a14                 0x4             0x6  (6)
remappedINT0Interrupt       0x1a18                 0x4             0x6  (6)
remappedT1Interrupt         0x1a1c                 0x4             0x6  (6)
remappedT2Interrupt         0x1a20                 0x4             0x6  (6)
remappedU1RXInterrupt       0x1a24                 0x4             0x6  (6)
remappedU1TXInterrupt       0x1a28                 0x4             0x6  (6)
remappedU2RXInterrupt       0x1a2c                 0x4             0x6  (6)
remappedU2TXInterrupt       0x1a30                 0x4             0x6  (6)
remappedU1ErrInterrupt      0x1a34                 0x4             0x6  (6)
remappedU2ErrInterrupt      0x1a38                 0x4             0x6  (6)
remappedU3ErrInterrupt      0x1a3c                 0x4             0x6  (6)
remappedU3RXInterrupt       0x1a40                 0x4             0x6  (6)
remappedU3TXInterrupt       0x1a44                 0x4             0x6  (6)
.text                       0x1a48              0x705c          0xa88a  (43146)
.const                      0x8aa4              0x43c6          0x65a9  (26025)
.text                       0xce6a             0x18d52         0x253fb  (152571)
.dinit                     0x25bbc               0x812           0xc1b  (3099)
.text                      0x263ce              0x3146          0x49e9  (18921)
.text                      0x29514               0xc9a          0x12e7  (4839)

                 Total "program" memory used (bytes):        0x3ce85  (249477) 23%

"data" Memory  [Origin = 0x800, Length = 0x8000]

section                    address      alignment gaps    total length  (dec)
-------                    -------      --------------    -------------------
../src/addrtrap.s.scn1       0x800                   0             0x6  (6)
.nbss                        0x806                   0             0x2  (2)
.bss                         0x808                   0          0x4c00  (19456)
.data                       0x5408                   0           0x3b4  (948)
.bss                        0x57bc                   0            0x84  (132)
.data                       0x5840                   0           0x42e  (1070)
.bss                        0x5c6e                   0            0x22  (34)
.data                       0x5c90                   0            0x22  (34)
.bss                        0x5cb2                   0            0x20  (32)
.data                       0x5cd2                   0            0x5e  (94)
.bss                        0x5d30                   0            0x84  (132)
.data                       0x5db4                   0            0x94  (148)
.bss                        0x5e48                   0            0x1e  (30)
.data                       0x5e66                   0            0x3c  (60)
.bss                        0x5ea2                   0            0x26  (38)
.data                       0x5ec8                   0             0x4  (4)
.bss                        0x5ecc                   0             0x6  (6)
.data                       0x5ed2                   0             0x2  (2)
.bss                        0x5ed4                   0             0x6  (6)
.data                       0x5eda                   0             0x4  (4)
.bss                        0x5ede                   0             0x4  (4)
.data                       0x5ee2                   0             0x8  (8)
.bss                        0x5eea                   0             0x2  (2)

                 Total "data" memory used (bytes):         0x56ec  (22252) 67%

Dynamic Memory Usage

region                     address                      maximum length  (dec)
------                     -------                      ---------------------
heap                             0                                   0  (0)
stack                       0x5eec                              0x2114  (8468)

                 Maximum dynamic memory (bytes):         0x2114  (8468)

"/Applications/microchip/xc16/v1.50/bin"/xc16-bin2hex dist/appbl/production/cwg-pic.X.production.elf -a  -omf=elf   -mdfp="/Users/headley/.mchp_packs/Microchip/PIC24F-GA-GB_DFP/1.1.74/xc16" 
make[2]: Leaving directory '/Users/headley/tmp/bootloader/carbonwg-pic/cwg-pic.X'
make[1]: Leaving directory '/Users/headley/tmp/bootloader/carbonwg-pic/cwg-pic.X'

BUILD SUCCESSFUL (total time: 4s)
Loading code from /Users/headley/tmp/bootloader/carbonwg-pic/cwg-pic.X/dist/appbl/production/cwg-pic.X.production.hex...
Program loaded with pack,PIC24F-GA-GB_DFP,1.1.74,Microchip
Loading completed