set var S0 fret
creg cx0=5 cx1=x800000 cx2=3000

println "cycles[%lu] bits[%08lx] delay[%ld] ret[$S0]" CX0 CX1 CX2
goto cycle
:fret

if [ CX3 == 0 ] goto success
println "ERR stat[%ld]" CX3
goto quit
:success
println "OK stat[%ld]" CX3
goto quit

# cycle macro
:cycle
# set bits (CX1), delay (CX2 msec),  clr bits 
mdio IOH:CX1 DCX2 IOL:CX1

# decrement counter
creg cx0--

# update status
creg cx3=cx0

# check whether done
if [ cx0 == 0 ] goto end_cycle
# start next cycle
goto cycle

:end_cycle
println "returning to $S0"
goto $S0
println "should not be here"

:quit
println "done"
END
