/*
 * init_TM4C123GH6PM_64pin.c
 *
 *  Created on: Apr 18, 2021
 *      Author: thomm
 */

#include "main.h"
#include "system.h"
#include "init.h"

#include "microsd.h"
#include "uartstdio.h"  // User local version with larger RX buffer
#include "sleep.h"
#include "i2c_fram.h"
#include "board_util.h"

#include "inc/hw_types.h"
#include "inc/hw_gpio.h"
#include "inc/hw_memmap.h"

// TODO, use #include for these...
extern void profile2_toggle(int target);
extern void ADS1248_gpio_init(void);
extern void AUX1_init(void);
extern void optode_init(void);
extern void led_init(void);

void init_TM4C123GH6PM_64pin(void);


void init_TM4C123GH6PM_64pin(void)
{

    //TM4C123GH6PM = 64   (43 GPIO)
    //PA0 - PA7       8
    //PB0 - PB7       8
    //PC0 - PC7       8
    //PD0 - PD7       8
    //PE0 - PE5       6
    //PF0 - PF4       5

    /*** Enable the GPIO ports used ***/
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); //PA0 - PA7       8
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); //PB0 - PB7       8
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC); //PC0 - PC7       8
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); //PD0 - PD7       8
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); //PE0 - PE5       6
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); //PF0 - PF4       5

    /*** Initialize Green and Red LED ***/
    // This is done early in init to enable oscope timing
    led_init();     // defd in board_util.c
    led_power_on();  //green led



#if BOARD_NANOFET >= 1
    // Set PA1 high to avoid RS232 glitch, later in init(), this will be setup as console serial port
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_1); // PA1 is console TX
    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_1, 0xFF);

    MAP_SysCtlDelay(MILLISECOND*2);       // fast startup (2msec, was 100msec)

    //1        PB6           PB6_ADC_START        // PB6_ADC_START
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_6); // 1        PB6           PB6_ADC_START
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_6, 0xFF);  // ADC_START=1 is inactive

    //+5        PF4           PF4_ADC_RESET        // PF4_ADC_RESET
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_4); // 5        PF4           PF4_ADC_RESET
    MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_4, 0xFF);    // ADC_RESET to ADS1284 active low reset (init to 1)

    //called above
    //led_init();     // defd in board_util.c

    /*** Initialize UART0 for use as the console, printf, etc ***/
    //17       PA0/U0RX      PA0_CONSOLE_RX0
    //18       PA1/U0TX      PA1_CONSOLE_TX0
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
    MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
    MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
    UARTClockSourceSet(UART0_BASE, UART_CLOCK_PIOSC);
    UARTStdioConfig(0, 115200, 16000000);       // 115200 bits per second
    UARTEchoSet(true);  // Enable console echo

    // THOM TODO, figure out best way to manage I2C for low power, default is to set as GPIO high so to not pull down resistors for now
    // 47       PB2/I2C0SCL    I2C_SCL
    // 48       PB3/I2C0SDA    I2C_SDA
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_2); // 47       PB2/I2C0SCL    I2C_SCL
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_2, 0xFF);    // Set high (maybe should float?)
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_3); // 48       PB3/I2C0SDA    I2C_SDA
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_3, 0xFF);    // Set

    // FRAM init calls i2c_init - need to figure out peripheral init backplane policy (recommend calling i2c_init here)
    // void i2c0_init(bool bFast)

    // DRDY input pin for ADS1284
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_6);      // Input   53       PD6           PD6_DRDY

    // NC on both DAG and nanoFET, DAG has named the pins
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_5);     // 57       PB5           PB5_ENV_ENABLE (no connect on DAG)
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_5, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4);     // 58       PB4           PB4_NC           //PB4_VENABLE_NC (no connect on DAG)
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_4, 0x00);

    /*** Initialize ADS1248 pins as GPIO to reduce power consumption, SPI config happens in ADS1284_xxx.c ***/
    // THOM TODO on nanoFET and DAG - ADS1284 routines need tweaking
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_0);     // SSI3CLK  61       PD0           PD0_SSI3_CLK
    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_0, 0x00);

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_1);     // SSI3Fss  62       PD1           PD1_SSI3_SS_CS   TODO, FIX BUG (CS=0 is active, should be inactive)  18 Jul 2024
    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_1, 0x00);

    MAP_GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_2);      // SSI3Rx   63       PD2           PD2_SSI3_RX_MISO

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_3);     // SSI3Tx   64       PD3           PD3_SSI3_TX_MOSI
    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_3, 0x00);
#endif

#if BOARD_MSC == 3
#ifdef PART_TM4C123GH6PM


#ifdef TIVA_MOD_REVA  //Defd in System.h
    // Set PA1 high to avoid RS232 glitch, later in init(), this will be setup as console serial port later in init
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_1); // PA1 is console TX (uart0)
    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_1, 0xFF);

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_7); // PA7 is I2C_RST is active hi, goes to the gate of a FET
    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_7, 0xFF);

    MAP_SysCtlDelay(MILLISECOND*2);       // fast startup (2msec, was 100msec)

    // PE2 ADC_START (pH_Start)
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_2); // 1    PE2_ADC_START (pH)
    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_2, 0xFF);  // ADC_START=1 is inactive

    // PE3 ADC_RESET (pH_ADC_Reset)
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_3); // PE3_ADC_RESET
    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_3, 0xFF);    // ADC_RESET to ADS1284 active low reset (init to 1)

    // PE1 ADC_DRDY (pH_DRDY) input pin for ADS1284
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTE_BASE, GPIO_PIN_1);      // Input PE1_DRDY

    // ADC_SHUTDOWN (pH_SHUTDOWN)  PE0
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_0); // PE0 pH adc shutdown
    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_0, 0x00);

    /*** Initialize UART0 for use as the console, printf, etc ***/
    //17       PA0/U0RX      PA0_CONSOLE_RX0
    //18       PA1/U0TX      PA1_CONSOLE_TX0
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
    MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
    MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
    UARTClockSourceSet(UART0_BASE, UART_CLOCK_PIOSC);
    UARTStdioConfig(0, 115200, 16000000);       // 115200 bits per second
    UARTEchoSet(true);  // Enable console echo

    // 47       PB2/I2C0SCL    I2C_SCL
    // 48       PB3/I2C0SDA    I2C_SDA
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_2); // 47       PB2/I2C0SCL    I2C_SCL
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_2, 0xFF);    // Set high (maybe should float?)
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_3); // 48       PB3/I2C0SDA    I2C_SDA
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_3, 0xFF);    // Set

    //Unlock the NMI pin, PD7
    // https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1020814/faq-how-to-get-locked-gpio-pins-on-tm4c123-devices-to-work
    // GPIOUnlockPin(GPIO_PORTF_BASE, GPIO_PIN_0);
    HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
    HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = 0x80;      //PD7
    HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = 0x00;

    //MMS Spec CTS (input) PD6, MMS Spec RTS (output) PD7
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_6);      // PD6 MMS spectrometer CTS as input PD6
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_7);     // PD7 MMS Spec RTS output
    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_7, 0xFF);        // RTS=1 is inactive ???  THOM TODO  1 Jul 2024, verify

    //APF PC4 (SYS) CTS / PC5 (SYS) RTS
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTC_BASE, GPIO_PIN_4);      // PC4 system/float CTS input
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE, GPIO_PIN_5);     // PC5 system/float RTS output
    MAP_GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_5, 0xFF);        // RTS=1 is inactive

#ifdef NOCODE
        // no toggling of sys_rts is seen with a scope unless PD7 is unlocked
        while(1)
        {
            MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_7, 0x00);
            //MAP_GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_5, 0x00);
            delay_msec(1);
            MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_7, 0xFF);
            //MAP_GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_5, 0xFF);
            delay_msec(1);
        }
#endif
    //NAND flash chip select PB5 (FSS) is CS1, PE5 is CS2 (SCHchecked)  Done in SSI
    //MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_5);     // PB5 is Flash_CS1 (SSI2Fss)
    //MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_5, 0xFF);        // active lo
    //MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5);     // PE5 is Flash_CS2
    //MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, 0xFF);        // active lo

    //Unlock the NMI pin, PF0
    // GPIOUnlockPin(GPIO_PORTF_BASE, GPIO_PIN_0);
    HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
    HWREG(GPIO_PORTF_BASE + GPIO_O_CR) = 0x01;      //PF0
    HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = 0x00;

    //NAND flash power supply enables - spi_flash_open()
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_0);     //PF0 is Flash_EN1
    MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_0, 0x00);        // active hi
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1);     //PF1 is Flash_EN2
    MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, 0x00);        // active hi


#ifdef NOCODE
    while(1)
    {
        MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_0, 0x00);
        MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, 0x00);
        delay_msec(1);
        MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_0, 0xFF);
        MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, 0xFF);

        delay_msec(1);
    }
#endif
    //NAND flash hold1 (PF4) and hold2 (PE4)
    // NOT NEEDED, BUT PROGRAM AS INPUTS on RevA - remove for RevB
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTF_BASE, GPIO_PIN_4);      // PF4
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTE_BASE, GPIO_PIN_4);      // PE4
    //MAP_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_4);     //PF4 is Flash hold1
    //MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_4, 0x00);        // active hi
    //MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_4);     //PE4 is Flash hold1
    //MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0x00);        // active hi

    //I2C Reset
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_7);     //PA7 is I2C_RST
    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_7, 0x00);        // active hi (not in reset now)

    // uSD detect (input) PA6
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_6);      // uSD card detect

    /*** Initialize ADS1248 pins as GPIO to reduce power consumption, SPI config happens in ADS1284_xxx.c ***/
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_0);     // SSI3CLK  61       PD0           PD0_SSI3_CLK
    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_0, 0x00);

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_1);     // SSI3Fss  62       PD1           PD1_SSI3_SS_CS
    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_1, 0xFF);        // CS=inactive  THOM TODO: Check MPHOX, NanoFET, MFET for this error (CS is active lo)

    MAP_GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_2);      // SSI3Rx   63       PD2           PD2_SSI3_RX_MISO

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_3);     // SSI3Tx   64       PD3           PD3_SSI3_TX_MOSI
    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_3, 0x00);


    // GPIO init for SSI2 (NAND flash) PB4=CLK, PB5=CS1, PE5=CS2, PB6=MISO, PB7=MOSI
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4);     // SSI2CLK         PB4
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_4, 0x00);

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_5);     // SSI2Fss CS1        PB5           PB5  CS1 is active lo
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_5, 0xFF);

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5);     // CS2        PE5           PE5  CS2 is active lo
    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, 0xFF);

    MAP_GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_6);      // SSI2MISO       PB6           PB6_SSI2_RX_MISO

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_7);     // SSI2MOSI       PB7           PB7_SSI2_TX_MOSI
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_7, 0x00);

    //and SSI0 (uSD)  PA2=CLK,  PA3=CS,  PA4=MISO,  PA5=MOSI
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_2);     // SSI0CLK         PA2
    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_2, 0x00);

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);     // SSI0Fss CS        PA3      CS is active lo
    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0xFF);

    MAP_GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_4);      // SSI0MISO       PA4           PA4_SSI0_RX_MISO

    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_5);     // SSI0MOSI       PA5           PA5_SSI0_TX_MOSI
    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_5, 0x00);

    uprintf("TIVA_MOD_REVA is configured (system.h) in init_TM4C123GH6PM.c"); prn_nl(); uprintf(">");
#endif //TIVA_MOD_REVA

#ifdef TIVA_MOD_REVB
    // Set PA1 high to avoid RS232 glitch, later in init(), this will be setup as console serial port later in init
    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_1, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_1); // PA1 is console TX (uart0)

    MAP_SysCtlDelay(MILLISECOND*2);       // fast startup (2msec, was 100msec)

    // PE2 ADC_START (pH_Start)
    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_2, 0xFF);  // ADC_START=1 is inactive
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_2); // 1    PE2_ADC_START (pH)

    // PE3 ADC_RESET (pH_ADC_Reset)
    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_3, 0xFF);    // ADC_RESET to ADS1284 active low reset (init to 1)
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_3); // PE3_ADC_RESET

    // PE1 ADC_DRDY (pH_DRDY) input pin for ADS1284
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTE_BASE, GPIO_PIN_1);      // Input PE1_DRDY

    // ADC_SHUTDOWN (pH_SHUTDOWN)  PE0
    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_0, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_0); // PE0 pH adc shutdown

    /*** Initialize UART0 for use as the console, printf, etc ***/
    //17       PA0/U0RX      PA0_CONSOLE_RX0
    //18       PA1/U0TX      PA1_CONSOLE_TX0
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
    MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
    MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
    MAP_UARTClockSourceSet(UART0_BASE, UART_CLOCK_PIOSC);
    UARTStdioConfig(0, 115200, 16000000);       // 115200 bits per second
    UARTEchoSet(true);  // Enable console echo

    // 47       PB2/I2C0SCL    I2C_SCL
    // 48       PB3/I2C0SDA    I2C_SDA
    // these are later configured to i2c mode by i2c0_init
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_2, 0xFF);    // Set high (maybe should float?)
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_2); // 47       PB2/I2C0SCL    I2C_SCL
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_3, 0xFF);    // Set
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_3); // 48       PB3/I2C0SDA    I2C_SDA

    //Unlock the NMI pin, PD7
    // https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1020814/faq-how-to-get-locked-gpio-pins-on-tm4c123-devices-to-work
    // GPIOUnlockPin(GPIO_PORTF_BASE, GPIO_PIN_0);
    HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
    HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = 0x80;      //PD7
    HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = 0x00;

    //MMS Spec CTS (input) PD6, MMS Spec RTS (output) PD7
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_6);      // PD6 MMS spectrometer CTS as input PD6
    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_7, 0xFF);        // RTS=1 is inactive ???  THOM TODO  1 Jul 2024, verify
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_7);     // PD7 MMS Spec RTS output

    //APF PC4 (SYS) CTS / PC5 (SYS) RTS
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTC_BASE, GPIO_PIN_4);      // PC4 system/float CTS input
    MAP_GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_5, 0xFF);        // RTS=1 is inactive
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE, GPIO_PIN_5);     // PC5 system/float RTS output

    //NAND flash chip select PB5 (FSS) is CS1, PE5 is CS2 (SCHchecked)  Done in SSI
    //MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_5);     // PB5 is Flash_CS1 (SSI2Fss)
    //MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_5, 0xFF);        // active lo
    //MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5);     // PE5 is Flash_CS2
    //MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, 0xFF);        // active lo

    //Unlock the NMI pin, PF0
    // GPIOUnlockPin(GPIO_PORTF_BASE, GPIO_PIN_0);
    HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
    HWREG(GPIO_PORTF_BASE + GPIO_O_CR) = 0x01;      //PF0
    HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = 0x00;

    //Watchdog GPIO (call before wdog_readMon before wdog_init)
    MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_0, 0xFF);        // active lo
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_0);     //PF0 is /WD_ResetMon
    MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, 0x00);        // active hi
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1);     //PF1 is WD_PetDog

    MAP_GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_7);      // PA7 is WD_Monitor, an input on RevB (Changed from RevA)

    MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_4, 0xFF);        // active lo
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_4);      // PF4, is I2C_RST, active lo, in RevB

    //Flash_CS2
    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0xFF);      // active lo
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_4);   // PE4 is Flash CS2, active lo

    // FlashPwr_En
    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, 0xFF);        // active hi
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5);     // PE5 is FlashPwr Enable

    // uSD detect (input) PA6
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_6);      // uSD card detect

    /*** Initialize ADS1248 pins as GPIO to reduce power consumption, SPI config happens in ADS1284_xxx.c ***/
    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_0, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_0);     // SSI3CLK  61       PD0           PD0_SSI3_CLK

    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_1, 0xFF);        // CS=inactive  THOM TODO: Check MPHOX, NanoFET, MFET for this error (CS is active lo)
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_1);     // SSI3Fss  62       PD1           PD1_SSI3_SS_CS

    MAP_GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_2);      // SSI3Rx   63       PD2           PD2_SSI3_RX_MISO

    MAP_GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_3, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_3);     // SSI3Tx   64       PD3           PD3_SSI3_TX_MOSI

    // GPIO init for SSI2 (NAND flash) PB4=CLK, PB5=CS1, PE5=CS2, PB6=MISO, PB7=MOSI
    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_4, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4);     // SSI2CLK         PB4

    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_5, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_5);     // SSI2Fss CS1        PB5           PB5  CS1 is active lo

    MAP_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5);     // CS2        PE5           PE5  CS2 is active lo

    MAP_GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_6);      // SSI2MISO       PB6           PB6_SSI2_RX_MISO

    MAP_GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_7, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_7);     // SSI2MOSI       PB7           PB7_SSI2_TX_MOSI

    //and SSI0 (uSD)  PA2=CLK,  PA3=CS,  PA4=MISO,  PA5=MOSI
    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_2, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_2);     // SSI0CLK         PA2

    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);     // SSI0Fss CS        PA3      CS is active lo

    MAP_GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_4);      // SSI0MISO       PA4           PA4_SSI0_RX_MISO

    MAP_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_5, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_5);     // SSI0MOSI       PA5           PA5_SSI0_TX_MOSI

#ifdef NOCODE  // only print when RevA is config'd
    uprintf("TIVA_MOD_REVB is configured (system.h) in init_TM4C123GH6PM.c"); prn_nl(); uprintf(">");
#endif
#endif //TIVA_MOD_REVB

    //enable the EEPROM
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_EEPROM0);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_EEPROM0) ) { }

#endif  //PART_TM4C123GH6PM

#endif //#if BOARD_MSC == 3
    //---------- Done with 'pin' init --------------------------


}


