/*
 * init_TM4C1290NCPDT_128pin.c
 *
 *  Created on: Sep 14, 2024
 *      Author: thomm
 */

#include "main.h"
#include "system.h"
#include "init.h"

#include "microsd.h"
#include "uartstdio.h"  // User local version with larger RX buffer
#include "sleep.h"
#include "i2c_fram.h"
#include "board_util.h"

#include "inc/hw_types.h"
#include "inc/hw_gpio.h"
#include "inc/hw_memmap.h"

// TODO, use #include for these...
extern void profile2_toggle(int target);
extern void ADS1248_gpio_init(void);
extern void led_init(void);

void init_TM4C1290NCPDT_128pin(void);


void init_TM4C1290NCPDT_128pin(void)
{
#ifdef PART_TM4C1290NCPDT

    // pinmux.c generated from SysConfig Utility 1.21
    // this is for serlog_cf2_tiva129_v1_0
    //   FUTURE, change Sys_CTS and Sys_RTS to PP2 / PP3 and config UART6

    // Enable Peripheral Clocks
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOA) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOB) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOC) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOD) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOE) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOF) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOG) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOH) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOJ) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOK) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOL) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOM) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPION) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOP) ) { }
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOQ) ) { }

    /*** Initialize Green and Red LED ***/
    // This is done early in init to enable oscope timing
    led_init();     // defd in board_util.c
    led_power_on();  //green led


    // Configure the GPIO Pin Mux for PH0 Sys_RTS for GPIO_PH0
    MAP_GPIOPinWrite(GPIO_PORTH_BASE, GPIO_PIN_0, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTH_BASE, GPIO_PIN_0);


    // Configure the GPIO Pin Mux for PH1 Sys_CTS for GPIO_PH1
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTH_BASE, GPIO_PIN_1);


    // Configure the GPIO Pin Mux for PA6 uSD_Detect for GPIO_PH3
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_6);
    //MAP_GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_6, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);        // This looks like a bug, pin6 is an input 17 Mar 2025


    // Configure the GPIO Pin Mux for PG2 Flash_En for GPIO_PG2
    MAP_GPIOPinWrite(GPIO_PORTG_BASE, GPIO_PIN_2, 0xFF);        //LogPwr ON  //APFTODO, change this to OFF and handle in init_uSDCard in microsd.c
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTG_BASE, GPIO_PIN_2);


    // Configure the GPIO Pin Mux for PG3 /Flash_CS2_PG3 for GPIO_PG3
    MAP_GPIOPinWrite(GPIO_PORTG_BASE, GPIO_PIN_3, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTG_BASE, GPIO_PIN_3);


    // Configure the GPIO Pin Mux for PQ2 /I2C_Rst for GPIO_PQ2
    MAP_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_2, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTQ_BASE, GPIO_PIN_2);

    // Configure the GPIO Pin Mux for PK5 PK5_M0PWM7 for GPIO_PK5
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTK_BASE, GPIO_PIN_5);

    // Configure the GPIO Pin Mux for PK4  PK4_M0PWM6 for GPIO_PK4
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTK_BASE, GPIO_PIN_4);

    // Configure the GPIO Pin Mux for PL3 pH_Shutdown for GPIO_PL3 (schematic PL3 pH_pwrEnable)
    MAP_GPIOPinWrite(GPIO_PORTL_BASE, GPIO_PIN_3, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTL_BASE, GPIO_PIN_3);

    // Configure the GPIO Pin Mux for PL2 /pH_DRDY for GPIO_PL2
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTL_BASE, GPIO_PIN_2);

    // Configure the GPIO Pin Mux for PL1  pH_Start for GPIO_PL1
    MAP_GPIOPinWrite(GPIO_PORTL_BASE, GPIO_PIN_1, 0x00);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTL_BASE, GPIO_PIN_1);

    // Configure the GPIO Pin Mux for PL0 /pH_ADC_Reset for GPIO_PL0
    MAP_GPIOPinWrite(GPIO_PORTL_BASE, GPIO_PIN_0, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTL_BASE, GPIO_PIN_0);

    // Configure the GPIO Pin Mux for PM5 WD_Pet_Dog
    MAP_GPIOPinWrite(GPIO_PORTM_BASE, GPIO_PIN_5, 0xFF);                    //WD_Pet_Dog  wdog_pet().   Normally hi, with a hi->lo transition to pet the dog
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTM_BASE, GPIO_PIN_5);

    // Configure the GPIO Pin Mux for PM6 Reset_Wdog_Monitor, this resets the flip flop
    //MAP_GPIOPinTypeGPIOInput(GPIO_PORTM_BASE, GPIO_PIN_6);
    MAP_GPIOPinWrite(GPIO_PORTM_BASE, GPIO_PIN_6, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTM_BASE, GPIO_PIN_6);

    // Configure the GPIO Pin Mux for PM7 WD_Monitor
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTM_BASE, GPIO_PIN_7);

    // Configure the GPIO Pin Mux for PP0 U6RX for GPIO_PP0
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTP_BASE, GPIO_PIN_0);

    // Configure the GPIO Pin Mux for PP1 U6TX for GPIO_PP1
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTP_BASE, GPIO_PIN_1);

    // Configure the GPIO Pin Mux for PN5 Spec_CTS
    MAP_GPIOPinTypeGPIOInput(GPIO_PORTN_BASE, GPIO_PIN_5);
    // Configure the GPIO Pin Mux for PN4 Spec_RTS
    MAP_GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_4, 0xFF);
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTN_BASE, GPIO_PIN_4);

    // Configure the GPIO Pin Mux for PB2 for I2C0SCL
    MAP_GPIOPinConfigure(GPIO_PB2_I2C0SCL);
    MAP_GPIOPinTypeI2CSCL(GPIO_PORTB_BASE, GPIO_PIN_2);

    // Configure the GPIO Pin Mux for PB3 for I2C0SDA
    MAP_GPIOPinConfigure(GPIO_PB3_I2C0SDA);
    MAP_GPIOPinTypeI2C(GPIO_PORTB_BASE, GPIO_PIN_3);        //MAP_GPIOPinTypeI2C causes link error 21 Sep 2024

    // Configure the GPIO Pin Mux for PG0 for I2C1SCL
    MAP_GPIOPinConfigure(GPIO_PG0_I2C1SCL);
    MAP_GPIOPinTypeI2CSCL(GPIO_PORTG_BASE, GPIO_PIN_0);

    // Configure the GPIO Pin Mux for PG1 for I2C1SDA
    MAP_GPIOPinConfigure(GPIO_PG1_I2C1SDA);
    MAP_GPIOPinTypeI2C(GPIO_PORTG_BASE, GPIO_PIN_1);

    // SSI0 is config'd in microsd.c in init_uSDCard(void)

    // Configure the GPIO Pin Mux for PF1 for SSI3XDAT0 - MOSI
    MAP_GPIOPinConfigure(GPIO_PF1_SSI3XDAT0);
    MAP_GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_1);

    // Configure the GPIO Pin Mux for PF0 for SSI3XDAT1 - MISO
    MAP_GPIOPinConfigure(GPIO_PF0_SSI3XDAT1);
    MAP_GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_0);

    // Configure the GPIO Pin Mux for PF2 for SSI3FSS (Chips Select CS)
    //MAP_GPIOPinConfigure(GPIO_PF2_SSI3FSS);               //combining CS with SPI results in problems with CS timing 15 Mar 2025, fix is to have CS as GPIO
    //MAP_GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_2);
    MAP_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 0xFF);        //ADS1248 CS as GPIO
    MAP_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2);

    // Configure the GPIO Pin Mux for PF3 for SSI3CLK
    MAP_GPIOPinConfigure(GPIO_PF3_SSI3CLK);
    MAP_GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_3);

    // Configure the GPIO Pin Mux for PG4 for SSI2XDAT1 - MISO
    MAP_GPIOPinConfigure(GPIO_PG4_SSI2XDAT1);
    MAP_GPIOPinTypeSSI(GPIO_PORTG_BASE, GPIO_PIN_4);

    // Configure the GPIO Pin Mux for PG5 for SSI2XDAT0 - MISO
    MAP_GPIOPinConfigure(GPIO_PG5_SSI2XDAT0);
    MAP_GPIOPinTypeSSI(GPIO_PORTG_BASE, GPIO_PIN_5);

    // Configure the GPIO Pin Mux for PG6 for SSI2FSS
    MAP_GPIOPinConfigure(GPIO_PG6_SSI2FSS);
    MAP_GPIOPinTypeSSI(GPIO_PORTG_BASE, GPIO_PIN_6);

    // Configure the GPIO Pin Mux for PG7 for SSI2CLK
    MAP_GPIOPinConfigure(GPIO_PG7_SSI2CLK);
    MAP_GPIOPinTypeSSI(GPIO_PORTG_BASE, GPIO_PIN_7);

    // Configure the GPIO Pin Mux for PE4 for SSI1XDAT0 - MOSI
    MAP_GPIOPinConfigure(GPIO_PE4_SSI1XDAT0);
    MAP_GPIOPinTypeSSI(GPIO_PORTE_BASE, GPIO_PIN_4);

    // Configure the GPIO Pin Mux for PE5 for SSI1XDAT1 - MISO
    MAP_GPIOPinConfigure(GPIO_PE5_SSI1XDAT1);
    MAP_GPIOPinTypeSSI(GPIO_PORTE_BASE, GPIO_PIN_5);

    // Configure the GPIO Pin Mux for PB4 for SSI1FSS
    MAP_GPIOPinConfigure(GPIO_PB4_SSI1FSS);
    MAP_GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4);

    // Configure the GPIO Pin Mux for PB5 for SSI1CLK
    MAP_GPIOPinConfigure(GPIO_PB5_SSI1CLK);
    MAP_GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_5);

    // Configure the GPIO Pin Mux for PK0 for U4RX
    MAP_GPIOPinConfigure(GPIO_PK0_U4RX);
    MAP_GPIOPinTypeUART(GPIO_PORTK_BASE, GPIO_PIN_0);

    // Configure the GPIO Pin Mux for PK1 for U4TX
    MAP_GPIOPinConfigure(GPIO_PK1_U4TX);
    MAP_GPIOPinTypeUART(GPIO_PORTK_BASE, GPIO_PIN_1);

    // Configure the GPIO Pin Mux for PC6 for U5RX
    MAP_GPIOPinConfigure(GPIO_PC6_U5RX);
    MAP_GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_6);

    // Configure the GPIO Pin Mux for PC7 for U5TX
    MAP_GPIOPinConfigure(GPIO_PC7_U5TX);
    MAP_GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_7);

    // Configure the GPIO Pin Mux for PA0 for U0RX
    MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
    MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0);

    // Configure the GPIO Pin Mux for PA1 for U0TX
    MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
    MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_1);

    // Configure the GPIO Pin Mux for PQ4 for U1RX
    MAP_GPIOPinConfigure(GPIO_PQ4_U1RX);
    MAP_GPIOPinTypeUART(GPIO_PORTQ_BASE, GPIO_PIN_4);

    // Configure the GPIO Pin Mux for PQ5 for U1TX
    MAP_GPIOPinConfigure(GPIO_PQ5_U1TX);
    MAP_GPIOPinTypeUART(GPIO_PORTQ_BASE, GPIO_PIN_5);

    // Configure the GPIO Pin Mux for PJ0 for U3RX
    MAP_GPIOPinConfigure(GPIO_PJ0_U3RX);
    MAP_GPIOPinTypeUART(GPIO_PORTJ_BASE, GPIO_PIN_0);

    // Configure the GPIO Pin Mux for PJ1 for U3TX
    MAP_GPIOPinConfigure(GPIO_PJ1_U3TX);
    MAP_GPIOPinTypeUART(GPIO_PORTJ_BASE, GPIO_PIN_1);

    // Configure the GPIO Pin Mux for PD4 for U2RX
    MAP_GPIOPinConfigure(GPIO_PD4_U2RX);
    MAP_GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_4);

    // Configure the GPIO Pin Mux for PD5 for U2TX
    MAP_GPIOPinConfigure(GPIO_PD5_U2TX);
    MAP_GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_5);



    //-------------------- UART Peripheral Setup --------------------------------

    /*** Initialize UART0 for use as the console, printf, etc ***/
    //17       PA0/U0RX      PA0_CONSOLE_RX0
    //18       PA1/U0TX      PA1_CONSOLE_TX0
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_UART0) )
    {

    }

    //MAP_GPIOPinConfigure(GPIO_PA0_U0RX);  // Done above
    //MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
    MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
    UARTClockSourceSet(UART0_BASE, UART_CLOCK_PIOSC);
    UARTStdioConfig(0, DEFAULT_BAUDRATE, 16000000);       // 115200 bits per second, except for APF which is 9600 (see system.h)
    UARTEchoSet(true);  // Enable console echo

    //enable the EEPROM
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_EEPROM0);
    while( ! MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_EEPROM0) ) { }

#endif

}

