.ALIASES
R_R1            R1(1=SOURCE 2=BIAS ) CN @IBIAS.SCHEMATIC1(sch_1):INS14305@BREAKOUT.Rbreak.Normal(chips)
R_R2            R2(1=GATE 2=SOURCE ) CN @IBIAS.SCHEMATIC1(sch_1):INS14325@BREAKOUT.Rbreak.Normal(chips)
R_R3            R3(1=DRAIN 2=GATE ) CN @IBIAS.SCHEMATIC1(sch_1):INS14345@BREAKOUT.Rbreak.Normal(chips)
R_R4            R4(1=DRIVE 2=GATE ) CN @IBIAS.SCHEMATIC1(sch_1):INS14365@BREAKOUT.Rbreak.Normal(chips)
R_R5            R5(1=E1REF 2=SOURCE ) CN @IBIAS.SCHEMATIC1(sch_1):INS14385@BREAKOUT.Rbreak.Normal(chips)
R_R6            R6(1=REF 2=N14689 ) CN @IBIAS.SCHEMATIC1(sch_1):INS14405@BREAKOUT.Rbreak.Normal(chips)
R_R7            R7(1=E2REF 2=DRAIN ) CN @IBIAS.SCHEMATIC1(sch_1):INS14425@BREAKOUT.Rbreak.Normal(chips)
R_R8            R8(1=BIAS 2=E2REF ) CN @IBIAS.SCHEMATIC1(sch_1):INS14445@BREAKOUT.Rbreak.Normal(chips)
E_E1            E1(3=DRIVE 4=0 1=N14689 2=E1- ) CN @IBIAS.SCHEMATIC1(sch_1):INS14480@ANALOG.E.Normal(chips)
X_H1    H1(1=N15049 2=0 3=BIAS 4=REF ) CN @IBIAS.SCHEMATIC1(sch_1):INS14519@ANALOG.H.Normal(chips)
X_H2    H2(1=N14978 2=0 3=BIAS 4=0 ) CN @IBIAS.SCHEMATIC1(sch_1):INS14558@ANALOG.H.Normal(chips)
E_E2            E2(3=DRAIN 4=0 1=REF 2=E2- ) CN @IBIAS.SCHEMATIC1(sch_1):INS14639@ANALOG.E.Normal(chips)
V_V1            V1(+=N14974 -=0 ) CN @IBIAS.SCHEMATIC1(sch_1):INS14926@SOURCE.VDC.Normal(chips)
R_R9            R9(1=N14974 2=N14978 ) CN @IBIAS.SCHEMATIC1(sch_1):INS14954@BREAKOUT.Rbreak.Normal(chips)
V_V2            V2(+=N15073 -=0 ) CN @IBIAS.SCHEMATIC1(sch_1):INS15075@SOURCE.VDC.Normal(chips)
R_R10           R10(1=N15073 2=N15049 ) CN @IBIAS.SCHEMATIC1(sch_1):INS15051@BREAKOUT.Rbreak.Normal(chips)
V_V3            V3(+=N16032 -=0 ) CN @IBIAS.SCHEMATIC1(sch_1):INS16036@SOURCE.VDC.Normal(chips)
R_R11           R11(1=N16032 2=N16604 ) CN @IBIAS.SCHEMATIC1(sch_1):INS15962@BREAKOUT.Rbreak.Normal(chips)
R_R12           R12(1=N16604 2=N16633 ) CN @IBIAS.SCHEMATIC1(sch_1):INS16137@BREAKOUT.Rbreak.Normal(chips)
V_V4            V4(+=0 -=N16633 ) CN @IBIAS.SCHEMATIC1(sch_1):INS16167@SOURCE.VDC.Normal(chips)
E_E3            E3(3=E2REF 4=E2- 1=N16604 2=0 ) CN @IBIAS.SCHEMATIC1(sch_1):INS17388@ANALOG.E.Normal(chips)
E_E4            E4(3=E1REF 4=E1- 1=N17988 2=0 ) CN @IBIAS.SCHEMATIC1(sch_1):INS18076@ANALOG.E.Normal(chips)
R_R14           R14(1=N17988 2=N18170 ) CN @IBIAS.SCHEMATIC1(sch_1):INS18174@BREAKOUT.Rbreak.Normal(chips)
R_R13           R13(1=N18044 2=N17988 ) CN @IBIAS.SCHEMATIC1(sch_1):INS18002@BREAKOUT.Rbreak.Normal(chips)
V_V5            V5(+=N18044 -=0 ) CN @IBIAS.SCHEMATIC1(sch_1):INS18048@SOURCE.VDC.Normal(chips)
V_V6            V6(+=0 -=N18170 ) CN @IBIAS.SCHEMATIC1(sch_1):INS18148@SOURCE.VDC.Normal(chips)
E_E5            E5(3=OUT 4=0 1=REFE 2=SOURCE ) CN @IBIAS.SCHEMATIC1(sch_1):INS18562@ANALOG.E.Normal(chips)
R_R15           R15(1=0 2=OUT ) CN @IBIAS.SCHEMATIC1(sch_1):INS18627@BREAKOUT.Rbreak.Normal(chips)
R_R16           R16(1=SUBSTRATE 2=SOURCE ) CN @IBIAS.SCHEMATIC1(sch_1):INS18957@BREAKOUT.Rbreak.Normal(chips)
R_R17           R17(1=REFE 2=SUBSTRATE ) CN @IBIAS.SCHEMATIC1(sch_1):INS19005@BREAKOUT.Rbreak.Normal(chips)
R_R18           R18(1=DRAIN 2=REFE ) CN @IBIAS.SCHEMATIC1(sch_1):INS19031@BREAKOUT.Rbreak.Normal(chips)
R_R19           R19(1=N19480 2=N19398 ) CN @IBIAS.SCHEMATIC1(sch_1):INS19410@BREAKOUT.Rbreak.Normal(chips)
V_V7            V7(+=N19480 -=0 ) CN @IBIAS.SCHEMATIC1(sch_1):INS19484@SOURCE.VDC.Normal(chips)
X_H3    H3(1=N19398 2=0 3=N19790 4=0 ) CN @IBIAS.SCHEMATIC1(sch_1):INS19434@ANALOG.H.Normal(chips)
R_R20           R20(1=N19790 2=T3 ) CN @IBIAS.SCHEMATIC1(sch_1):INS19764@BREAKOUT.Rbreak.Normal(chips)
R_R21           R21(1=0 2=T3 ) CN @IBIAS.SCHEMATIC1(sch_1):INS19794@BREAKOUT.Rbreak.Normal(chips)
_    _(GND_0=0)
_    _(bias=BIAS)
_    _(drain=DRAIN)
_    _(drive=DRIVE)
_    _(E1-=E1-)
_    _(E1ref=E1REF)
_    _(E2-=E2-)
_    _(E2ref=E2REF)
_    _(gate=GATE)
_    _(out=OUT)
_    _(ref=REF)
_    _(refe=REFE)
_    _(source=SOURCE)
_    _(substrate=SUBSTRATE)
_    _(T3=T3)
.ENDALIASES
