(ExpressProject "Design1"
  (ProjectVersion "19981106")
  (SoftwareVersion "17.4-2019 S036 (4091683)  [2/25/2023]-[02/05/24]")
  (ProjectType "PCB")
  (Folder "Design Resources"
    (Folder "Library")
    ("Allegro Netlist Directory" "allegro")
    (DOCKED "TRUE")
    (DOCKING_POSITION "59420")
    (NoModify)
    (File ".\pcam_v2.dsn"
      (Type "Schematic Design"))
    (BuildFileAddedOrDeleted "x")
    (CompileFileAddedOrDeleted "x")
    (Display_Online_DRC_Results "FALSE"))
  (Folder "Layout")
  (Folder "Outputs")
  (Folder "Referenced Projects")
  (Folder "PSpice Resources"
    (Folder "Simulation Profiles")
    (Folder "Model Libraries"
      (Sort User))
    (Folder "Stimulus Files"
      (Sort User))
    (Folder "Include Files"
      (Sort User)))
  (Folder "Logs")
  (PartMRUSelector
    ("CONN SOCKET 16x2"
      (FullPartName "CONN SOCKET 16x2.Normal")
      (LibraryName "C:\CADENCE\SPB_17.4\TOOLS\CAPTURE\LIBRARY\CONNECTOR.OLB")
      (DeviceIndex "0")))
  (GlobalState
    (FileView
      (Path "Design Resources")
      (Select "Design Resources"))
    (HierarchyView)
    (Doc
      (Type "COrCapturePMDoc")
      (Frame
        (Placement "44 0 1 -1 -1 -1 -1 0 200 0 858"))
      (Tab 0))
    (Doc
      (Type "COrSchematicDoc")
      (Frame
        (Placement "44 0 1 -1 -1 -1 -1 5 1170 24 899")
        (Scroll "-4 -4")
        (Zoom "116")
        (Occurrence "/"))
      (Path "X:\902304_PISCIVORE CAM\PCAM V2\ELECTRICAL\PCAM_V2.DSN")
      (Schematic "SCHEMATIC1")
      (Page "PAGE1")))
  (MPSSessionName "mcgill"))