CPF Switch Board
MBARI 100221094 
Design Notes

Requirements

1. Switch 3 channels of 12V or optionally 5V at 0.8A max continuous, 1.25A peak inrush.
    Notable loads (from Gene's power budget spreadsheet)
	Motorized Valve 	  5V @ 0.8A max
	ISUS			12V @ 0.35A max
	Iridium			12V @ 0.5A max
	all others			<0.1A

2. Circuit breaker function: 1.25A @ 15 msec  (  12V power supply limits at 3A)

3.  UART Serial I/O:   3 channels of  XR20M1280 UART, run core at 1.8V for power.  Max baud 115k (?)  RS232 level shifting with full handshaking on one port and bare-bones on two ports.

4.  "Native" Serial I/O:  3 channels from G400 SOM.  Max baud = ?   RS232 level shifting with RTX/CTS handshaking on one port, bare-bones on two ports.

Design Notes

1. Clock 
UART baud clock:  needs integer multiple (plus can trim by .0625 fractions if needed).  Nominal 9600 x 16 = 153.6 kHz; max 115.2kbaud x 16 = 1.8432 MHz.   1.84 MHz/12 = 153.6 kHz.   (Clock input requires 1.8V if Vcore is 1.8V.)

Energy Monitor timebase: Sample Clock allowed range is 100-400 kHz, "target" 250 kHz, with 4X-8X-12X etc prescaler.   So ClkIn input should be 1-2-3 MHz; 1.84 MHz with 8X prescaler will yield 230.4 kHz sample clock.  ClkIn threshold Vclkin(th) is 1.3V max so 1.8V clock should work.

Oscillator:  LTC6930-7.37 @ 7.37 MHz with divider set to 4 yields 1.84 MHZ, will run on 1.8V and should draw ~180 uA (0.3 mW).  Part claims low impedance output with controlled rise/fall times, so run unbuffered; fanout is 6 inputs all of which are crystal oscillator inputs.  Locate part near centerline of board to minimize trace length/reflection time.  N.B. Linear Tech recommends two 0.1 uF bypass caps for this part, see spec Fig 1.

2. UART

3. Level Shifter

4. Current Limiter/Pwr Switch
No UV lockout… regulated pwr supply input
EMI per channel (alternate is 1 ea for 12V and 5V; per-channel gives isolation between loads too)
No fuse… current too low, resistance too high
Current Limit.  Supplies are 12V @ 3A and 5V @ 1A.  Highest load is 0.8A (valve).  50% margin  1.2A.  50 mV drop  .0417 use .04 ohm  actual CL = 1.25A  
MOSFET: Dpak for large thermal mass.  25-35V, 2-10mohm… 6 pages of choices.
  	All seem to allow 10V @ 2A for between 100msec and continuous (@ Tc=25).
	All are trench gate and intended for sync rect applications 
	Fairchild FDD8896 looks okay, 6 mohm/30V/$1
	Gate slowdown cap for inrush: shoot for 0.75A (0.5A margin).  
	Per LT spec p. 15, C = (30ua/0.75) x 470uF = .018uF
Overvoltage – try +25%, so 15V on 12V boards and 6.25V on 5V boards
LT4363 FB pin threshold 1.275V @ 1uA max, 0.2uA typ. bias
Hold bias-error to 1% typ for Energy Monitor accuracy
LTC2946 A/D In 2.048V FS, 3 Mohm min, 10 MOhm typ
Total divider bias current typ 0.2uA + 0.2uA = 0.4uA
.01275V/0.4uA = ~32k divider output impedance, min.
15/1.275 = 11.76 div, 6.25/1.275 = 4.9 div.
Don’t bother with precision monolithic dividers since OVP does not require precision and the energy measurement is be-nice-if. 
Divider calc suggests 42.2k for bottom, 453k for 12V top (+0.26%), 165k for 5V top (-0.16%). 

4a. Change LT4363 current limiter to LTC4380 micropower version (May-Jun 2016)
Choose MSOP package for j-bend leads
Available in -1/-2 options with 27V and 45V limits (p. 9), or -3/-4 with user configured limits by zener diode addition.  Choose -3 option which latches off on overload and has configurable (zener select) voltage limits.

Voltage limit: LTC4380 limits by limiting gate voltage (zener clamp), no feedback loop.  Closest it can clamp is Vgate(max)-Vgate(on) above normal supply, or approx 14-4 = 10V above 12 V rail.  Probably better to rely on TVS diodes for voltage limit, SMBJ12A breaks down at 13-15V and clamps (hard) at 20V max.  Can move diodes downstream of switches so that OV will cause an OC trip.  Better spot to protect against reverse surges from loads, but does not protect against reverse polarity supply connection.

Current Limit:  Choose Rdrn for 1 mA at 15V peak input voltage: 15k.  Keep 40 mohm Rsns for 1.25 A current limit.      

5. Energy Monitor
Actual division ratios are 11.73 for 12V and 4.910 for 5V boards
LTC2946 ADIN is 2.048V FS and 0.500 mV/count (12 bit)
so scale factors are 24.02V FS and 5.865 mV/count for 12V, 
and 10.06V FS and 2.455 mV/count for 5V

6. Datamate connectors
Series M80-5, with jackscrews and board mount screws.  3mm tail = 0.118”
(note series 666 is already in CIS Database, presumably in use here…)
6 pin: M80-5400642 = DigiKey 952-1024-5-ND
12 pin: M80-5401242 = DigiKey 952-1931-ND
Note “small bore” crimp sockets are AWG 24-28, “large bore” required for AWG 22.
Current rating ~3A
Female mate is M80-481 (hex socket jackscrews, no shroud).  Avail for 6-pin, not for 12… for 12 have to use M80-461 slotted jackscrews, no shroud.
(Also available M80-941 with str relief hood)

Review Questions

1. Are we okay with combined power and signal ground nets?  Maybe have Batt, Pwr (12V/5V), and Sig (3V3/1V8)?

2. Harwin “L-Tek” M80-666 series with clips is already in use here (or at least is in CIS Database) – alas these are SMT with no board mount.

3. Y-caps on Mobo (with access to frame ground) for CM control?

4. No UV lockout on pwr switch – OK?

5. Exar never specifies logic sense of SLEEP pin.  Assuming High=Sleep.

6. How lucky do we feel with the MAX level shifter AutoShutdownPlus mode?

7. Use GPIOS for RTS/CTS on Ch. A of native serial boards?

8. Missing a requested feature on I2C addressing:  local select jumper… what was it?

9. How far to recess Harwin connectors from board edge

10. Testpoints.