/** @page UART_TwoBoards_ComPolling UART TwoBoards Communication Polling example @verbatim ****************************************************************************** * @file UART/UART_TwoBoards_ComPolling/readme.txt * @author MCD Application Team * @brief Description of the UART Two Boards Communication Polling example. ****************************************************************************** * * Copyright (c) 2019 STMicroelectronics. All rights reserved. * * This software component is licensed by ST under BSD 3-Clause license, * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** @endverbatim @par Example Description UART transmission (transmit/receive) in Polling mode between two boards. Board: Nucleo-H7A3ZI-Q (embeds a STM32H7A3ZIT6Q device) Tx Pin: PD5 Rx Pin: PD6 _________________________ _________________________ | ______________| |______________ | | |USART | | USART| | | | | | | | | | TX |_____________________| RX | | | | | | | | | | | | | | | | | | | | | | RX |_____________________| TX | | | | | | | | | |______________| |______________| | | | | | | | | | | GND|_____________________|GND | |_STM32_Board 1___________| |_STM32_Board 2___________| Two identical boards are connected as shown on the picture above. Board 1: transmitting then receiving board Board 2: receiving then transmitting board The user presses the User push-button on board 1. Then, board 1 sends in polling mode a message to board 2 that sends it back to board 1 in polling mode as well. Finally, board 1 and 2 compare the received message to that sent. If the messages are the same, the test passes. WARNING: as both boards do not behave the same way, "TRANSMITTER_BOARD" compilation switch is defined in /Src/main.c and must be enabled at compilation time before loading the executable in the board that first transmits then receives. The receiving then transmitting board needs to be loaded with an executable software obtained with TRANSMITTER_BOARD disabled. Nucleo-H7A3ZI-Q board LEDs are used to monitor the transfer status: - While board 1 is waiting for the user to press the User push-button, its LED1 is blinking rapidly (100 ms period). - When the test passes, LED1 on both boards is turned on, otherwise the test has failed. - After the transmission/reception processes begin LED2 is turned on. - Once the transmission/reception processes are completed LED2 is turned off. - If there is an initialization or transfer error, LED3 is turned on. At the beginning of the main program the HAL_Init() function is called to reset all the peripherals, initialize the Flash interface and the systick. The SystemClock_Config() function is used to configure the system clock for STM32H7A3xxQ Devices : The CPU at 280 MHz. The HCLK for CD Domain AXI and AHB3 peripherals, CD Domain AHB1/AHB2 peripherals and SRD Domain AHB4 peripherals at 280 MHz. The APB clock dividers for CD Domain APB3 peripherals, CD Domain APB1 and APB2 peripherals and SRD Domain APB4 peripherals to run at 280 MHz/2. The UART is configured as follows: - BaudRate = 115200 baud - Word Length = 8 bits (8 data bits, no parity bit) - One Stop Bit - No parity - Hardware flow control disabled (RTS and CTS signals) - Reception and transmission are enabled in the time @note USARTx/UARTx instance used and associated resources can be updated in "main.h" file depending hardware configuration used. @note When the parity is enabled, the computed parity is inserted at the MSB position of the transmitted data. @note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds) based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower) than the peripheral interrupt. Otherwise the caller ISR process will be blocked. To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function. @note The application need to ensure that the SysTick time base is always set to 1 millisecond to have correct HAL operation. @Note If the application is using the DTCM/ITCM memories (@0x20000000/ 0x0000000: not cacheable and only accessible by the Cortex M7 and the MDMA), no need for cache maintenance when the Cortex M7 and the MDMA access these RAMs. If the application needs to use DMA (or other masters) based access or requires more RAM, then the user has to: - Use a non TCM SRAM. (example : CD AXI-SRAM @ 0x24000000) - Add a cache maintenance mechanism to ensure the cache coherence between CPU and other masters (DMAs, DMA2D, LTDC, MDMA). - The addresses and the size of cacheable buffers (shared between CPU and other masters) must be properly defined to be aligned to L1-CACHE line size (32 bytes). @Note It is recommended to enable the cache and maintain its coherence. Please refer to the AN4838 "Managing memory protection unit (MPU) in STM32 MCUs" Please refer to the AN4839 "Level 1 cache on STM32F7 Series and STM32H7 Series" @par Keywords Connectivity, UART, Baud rate, RS-232, Full-duplex, Polling, Parity, Stop bit, Transmission, Reception. @par Directory contents - UART/UART_TwoBoards_ComPolling/Inc/stm32h7xx_hal_conf.h HAL configuration file - UART/UART_TwoBoards_ComPolling/Inc/stm32h7xx_it.h interrupt handlers header file - UART/UART_TwoBoards_ComPolling/Inc/main.h Header for main.c module - UART/UART_TwoBoards_ComPolling/Inc/stm32h7xx_nucleo_conf.h STM32H7xx_Nucleo board configuration file - UART/UART_TwoBoards_ComPolling/Src/stm32h7xx_it.c interrupt handlers - UART/UART_TwoBoards_ComPolling/Src/main.c Main program - UART/UART_TwoBoards_ComPolling/Src/stm32h7xx_hal_msp.c HAL MSP module - UART/UART_TwoBoards_ComPolling/Src/system_stm32h7xx.c STM32H7xx system source file @par Hardware and Software environment - This example runs on STM32H7A3xxQ devices. - This example has been tested with two Nucleo-H7A3ZI-Q boards embedding a STM32H7A3ZIT6Q device and can be easily tailored to any other supported device and development board. - Nucleo-H7A3ZI-Q set-up - Connect a wire between 1st board PD5 pin (Uart Tx) and 2nd board PD6 pin (Uart Rx) - Connect a wire between 1st board PD6 pin (Uart Rx) and 2nd board PD5 pin (Uart Tx) - Connect 1st board GND to 2nd Board GND @par How to use it ? In order to make the program work, you must do the following : - Open your preferred toolchain - Rebuild all files and load your image into target memory - Run the example *

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