#ifndef  __RTOS_TARGET_CFG_H__
#define  __RTOS_TARGET_CFG_H__

#define CPU_ICSR            ( ( sfr_dword *) 0xE000ED04 )   // Interrupt Control State Register
#define CPU_SYSTICKCSR      ( ( sfr_dword *) 0xE000E010 )   // SysTick Control and Status Register
#define CPU_SYSTICKCSR_EINT 0x02                            // Bit for enable/disable SysTick interrupt


// Define SysTick clock frequency and its interrupt rate in Hz.
#define SYSTICKFREQ     72000000
#define SYSTICKINTRATE  1000

#endif // __RTOS_TARGET_CFG_H_-