asm &H74C0
;/****************************************************************************/
;/* Copyright 1997 MLML - Moss Landing Marine Labs                           */
;/****************************************************************************/
;/****************************************************************************/
;/* Summary  : Assembly Code for pumped nutrient analyzer                    */
;/* Filename : ANALYZER.ASM                                                  */
;/* Author   : Luke Coletti                                                  */
;/* Project  : NSF 21-1509-2712                                              */
;/* Version  : 1.1                                                           */
;/* Compiler : TXTOOLS 4.10 running TXBASIC 4.10 on model 5F with 9.8MHz OSC */
;/* Created  : 02/14/97                                                      */
;/* Archived :                                                               */
;/****************************************************************************/
;/* Modification History:                                                    */
;/* 06/21/97 modified rd/wr TIC routine to keep lower 7 bits in DDR from     */
;/*          being clobbered.                                                */
;/****************************************************************************/
                                                                        
;/* Equates ******************************************************************/
;label:                 addr:   desc:                         r/w:    init:
PORT2           equ     H'03    ;port 2                       r/w     DDRs' come
P2DDR           equ     H'01    ;port 2 data direction reg.    w      up inputs
P2DDRC          equ     H'69    ;readable copy of port2 ddr   r/w
PORT5           equ     H'15    ;port 5                       r/w
P5DDR           equ     H'20    ;port 5 data direction reg.    w
P5DDRC          equ     H'6A    ;readable copy of port5 ddr   r/w
RP5CR           equ     H'14    ;RAM/Port 5 Control Register  r/w
TCSR3           equ     H'1B    ;Timer 2 Control & Status Reg r/w


;/* Write WORD to DS1667 Digital Pot *****************************************/
;/* wiper 0 is passed in B REG                                               */
;/* wiper 1, when implemented, will be passed in A REG                       */
;/****************************************************************************/
DIGIPOTS    sei                     ;disable interrupts
            aim  #B'11111011,PORT5  ;set P5 bit 3(CLK) low
            oim  #B'00000010,PORT5  ;set P5 bit 2(ENABLE) high
            oim  #B'00000110,P5DDR  ;set bits 2,3(ENABLE,CLK) of PORT5 to output
            oim  #B'00000110,P5DDRC ;update r/w copy of PORT5 DDR
            oim  #B'00000100,P2DDR  ;set bit 3(DATA) of PORT2 to output
            oim  #B'00000100,P2DDRC ;update r/w copy of PORT2 DDR


            ldx  #H'09              ;number of bits to be shifted out = 9
WIPER1      aim  #B'11111011,PORT2  ;set P2 bit 3 (DATA) low
            oim  #B'00000100,PORT5  ;set P5 bit 3 (CLK) high
            aim  #B'11111011,PORT5  ;set P5 bit 3 (CLK) low
            dex                     ;decrement x and
            bne  WIPER1             ;check if zero

            ldx  #H'08              ;number of bits to be shifted out = 8
WIPER0      rolb                    ;rotate MSB of B into carry bit
            bcc  ZERO_2             ;test if carry bit is a zero
            oim  #B'00000100,PORT2  ;set P2 bit 3 (DATA) high
            bra  CLOCK_2
ZERO_2      aim  #B'11111011,PORT2  ;set P2 bit 3 (DATA) low
CLOCK_2     oim  #B'00000100,PORT5  ;set P5 bit 3 (CLK) high
            aim  #B'11111011,PORT5  ;set P5 bit 3 (CLK) low
            dex                     ;decrement x and
            bne  WIPER0             ;check if zero

            aim  #B'11111011,P2DDR  ;set P2 bit 3 (DATA) to input
            aim  #B'11111011,P2DDRC
            aim  #B'11111001,P5DDR  ;set P5 bit 3 (CLK) and bit 2 (ENABLE)
            aim  #B'11111001,P5DDRC ;to input(s), bit 2 has pulldown
            cli                     ;enable interrupts
            rts                     ;return to TX BASIC

