; Archelon URCC C 3.18 2004/03/09
; MSP430 CIF 2004/03/02
; Compiled "H:\ESP\gen2\software\msp430\dwarves\cpld.c" Mon Dec 06 10:22:21 2004
; 
	.dbgseg dbg_syms
	.align 0x2
	.long 0x6c69662e
	.long 0x65
	.long 0x1
	.long 0x0
	.long 0x167fffe
	.long 0x0
	.long DBG5
	.long 0x0
	.long 0x0
	.long 0x0
; typedef int ptrdiff_t;
; ptrdiff_t size 2
; typedef unsigned int size_t;
; size_t size 2
; typedef int wchar_t;
; wchar_t size 2
; typedef	  unsigned char       uint8;
; uint8 size 1
; typedef   uint8               byte;
; byte size 1
; typedef	  signed char         int8;
; int8 size 1
; typedef	  unsigned short      uint16;
; uint16 size 2
; typedef	  short               int16;
; int16 size 2
; typedef	  unsigned long       uint32;
; uint32 size 4
; typedef	  long                int32;
; int32 size 4
; typedef	  enum {false, true}  boolean;
; boolean size 1
; typedef   void voidFn (void);
; voidFn size 0
; typedef	struct {int16 P,I,D;} int16PID;
; int16PID size 6
; void cpld_io_init(void);
; byte get_cpld_io(byte reg);
; void set_cpld_io(byte reg,byte val);
; void clear_cpld_bit(byte reg,byte val);
; void set_cpld_bit(byte reg, byte val);
; __builtin__ unsigned short _BIS_SR(unsigned short);
; __builtin__ unsigned short _BIC_SR(unsigned short);
; __builtin__ unsigned short _BIS_SR_IRQ(unsigned short);
; __builtin__ unsigned short _BIC_SR_IRQ(unsigned short);
;  __builtin__ void _DINT(void);
; __builtin__ void _EINT(void);
; __builtin__ void _NOP(void);
; __builtin__ void _OPC(const unsigned short op);
; __builtin__ short _SWPB(short);  
; __builtin__ long _SWPB_LONG(long);  
; __builtin__ float _SWPB_FLOAT(float);  
; sfrb    IE1               = (0x0000) ;
; sfrb    IFG1              = (0x0002) ;
; sfrb    ME1               = (0x0004) ;
; sfrb    IE2               = (0x0001) ;
; sfrb    IFG2              = (0x0003) ;
; sfrb    ME2               = (0x0005) ;
; sfrw    WDTCTL            = (0x0120) ;
; sfrw    MPY               = (0x0130) ;
; sfrw    MPYS              = (0x0132) ;
; sfrw    MAC               = (0x0134) ;
; sfrw    MACS              = (0x0136) ;
; sfrw    OP2               = (0x0138) ;
; sfrw    RESLO             = (0x013A) ;
; sfrw    RESHI             = (0x013C) ;
; const sfrw SUMEXT         = (0x013E) ;
; const sfrb P1IN           = (0x0020) ;
; sfrb    P1OUT             = (0x0021) ;
; sfrb    P1DIR             = (0x0022) ;
; sfrb    P1IFG             = (0x0023) ;
; sfrb    P1IES             = (0x0024) ;
; sfrb    P1IE              = (0x0025) ;
; sfrb    P1SEL             = (0x0026) ;
; const sfrb P2IN           = (0x0028) ;
; sfrb    P2OUT             = (0x0029) ;
; sfrb    P2DIR             = (0x002A) ;
; sfrb    P2IFG             = (0x002B) ;
; sfrb    P2IES             = (0x002C) ;
; sfrb    P2IE              = (0x002D) ;
; sfrb    P2SEL             = (0x002E) ;
; const sfrb P3IN           = (0x0018) ;
; sfrb    P3OUT             = (0x0019) ;
; sfrb    P3DIR             = (0x001A) ;
; sfrb    P3SEL             = (0x001B) ;
; const sfrb P4IN           = (0x001C) ;
; sfrb    P4OUT             = (0x001D) ;
; sfrb    P4DIR             = (0x001E) ;
; sfrb    P4SEL             = (0x001F) ;
; const sfrb P5IN           = (0x0030) ;
; sfrb    P5OUT             = (0x0031) ;
; sfrb    P5DIR             = (0x0032) ;
; sfrb    P5SEL             = (0x0033) ;
; const sfrb P6IN           = (0x0034) ;
; sfrb    P6OUT             = (0x0035) ;
; sfrb    P6DIR             = (0x0036) ;
; sfrb    P6SEL             = (0x0037) ;
; sfrb    U0CTL             = (0x0070) ;
; sfrb    U0TCTL            = (0x0071) ;
; sfrb    U0RCTL            = (0x0072) ;
; sfrb    U0MCTL            = (0x0073) ;
; sfrb    U0BR0             = (0x0074) ;
; sfrb    U0BR1             = (0x0075) ;
; const sfrb U0RXBUF        = (0x0076) ;
; sfrb    U0TXBUF           = (0x0077) ;
; sfrb    U1CTL             = (0x0078) ;
; sfrb    U1TCTL            = (0x0079) ;
; sfrb    U1RCTL            = (0x007A) ;
; sfrb    U1MCTL            = (0x007B) ;
; sfrb    U1BR0             = (0x007C) ;
; sfrb    U1BR1             = (0x007D) ;
; const sfrb U1RXBUF        = (0x007E) ;
; sfrb    U1TXBUF           = (0x007F) ;
; sfrb    I2CIE             = (0x0050) ;
; sfrb    I2CIFG            = (0x0051) ;
; sfrb    I2CNDAT           = (0x0052) ;
; sfrb    I2CTCTL           = (0x0071) ;
; sfrb    I2CDCTL           = (0x0072) ;
; sfrb    I2CPSC            = (0x0073) ;
; sfrb    I2CSCLH           = (0x0074) ;
; sfrb    I2CSCLL           = (0x0075) ;
; sfrb    I2CDRB            = (0x0076) ;
; sfrw    I2CDRW            = (0x0076) ;
; sfrw    I2COA             = (0x0118) ;
; sfrw    I2CSA             = (0x011A) ;
; const sfrw I2CIV          = (0x011C) ;
; const sfrw TAIV           = (0x012E) ;
; sfrw    TACTL             = (0x0160) ;
; sfrw    TACCTL0           = (0x0162) ;
; sfrw    TACCTL1           = (0x0164) ;
; sfrw    TACCTL2           = (0x0166) ;
; sfrw    TAR               = (0x0170) ;
; sfrw    TACCR0            = (0x0172) ;
; sfrw    TACCR1            = (0x0174) ;
; sfrw    TACCR2            = (0x0176) ;
; const sfrw TBIV           = (0x011E) ;
; sfrw    TBCTL             = (0x0180) ;
; sfrw    TBCCTL0           = (0x0182) ;
; sfrw    TBCCTL1           = (0x0184) ;
; sfrw    TBCCTL2           = (0x0186) ;
; sfrw    TBCCTL3           = (0x0188) ;
; sfrw    TBCCTL4           = (0x018A) ;
; sfrw    TBCCTL5           = (0x018C) ;
; sfrw    TBCCTL6           = (0x018E) ;
; sfrw    TBR               = (0x0190) ;
; sfrw    TBCCR0            = (0x0192) ;
; sfrw    TBCCR1            = (0x0194) ;
; sfrw    TBCCR2            = (0x0196) ;
; sfrw    TBCCR3            = (0x0198) ;
; sfrw    TBCCR4            = (0x019A) ;
; sfrw    TBCCR5            = (0x019C) ;
; sfrw    TBCCR6            = (0x019E) ;
; sfrb    DCOCTL            = (0x0056) ;
; sfrb    BCSCTL1           = (0x0057) ;
; sfrb    BCSCTL2           = (0x0058) ;
; sfrw    FCTL1             = (0x0128) ;
; sfrw    FCTL2             = (0x012A) ;
; sfrw    FCTL3             = (0x012C) ;
; sfrb    CACTL1            = (0x0059) ;
; sfrb    CACTL2            = (0x005A) ;
; sfrb    CAPD              = (0x005B) ;
; sfrw    ADC12CTL0         = (0x01A0) ;
; sfrw    ADC12CTL1         = (0x01A2) ;
; sfrw    ADC12IFG          = (0x01A4) ;
; sfrw    ADC12IE           = (0x01A6) ;
; sfrw    ADC12IV           = (0x01A8) ;
; sfrw    ADC12MEM0         = (0x0140) ;
; sfrw    ADC12MEM1         = (0x0142) ;
; sfrw    ADC12MEM2         = (0x0144) ;
; sfrw    ADC12MEM3         = (0x0146) ;
; sfrw    ADC12MEM4         = (0x0148) ;
; sfrw    ADC12MEM5         = (0x014A) ;
; sfrw    ADC12MEM6         = (0x014C) ;
; sfrw    ADC12MEM7         = (0x014E) ;
; sfrw    ADC12MEM8         = (0x0150) ;
; sfrw    ADC12MEM9         = (0x0152) ;
; sfrw    ADC12MEM10        = (0x0154) ;
; sfrw    ADC12MEM11        = (0x0156) ;
; sfrw    ADC12MEM12        = (0x0158) ;
; sfrw    ADC12MEM13        = (0x015A) ;
; sfrw    ADC12MEM14        = (0x015C) ;
; sfrw    ADC12MEM15        = (0x015E) ;
; sfrb    ADC12MCTL0        = (0x0080) ;
; sfrb    ADC12MCTL1        = (0x0081) ;
; sfrb    ADC12MCTL2        = (0x0082) ;
; sfrb    ADC12MCTL3        = (0x0083) ;
; sfrb    ADC12MCTL4        = (0x0084) ;
; sfrb    ADC12MCTL5        = (0x0085) ;
; sfrb    ADC12MCTL6        = (0x0086) ;
; sfrb    ADC12MCTL7        = (0x0087) ;
; sfrb    ADC12MCTL8        = (0x0088) ;
; sfrb    ADC12MCTL9        = (0x0089) ;
; sfrb    ADC12MCTL10       = (0x008A) ;
; sfrb    ADC12MCTL11       = (0x008B) ;
; sfrb    ADC12MCTL12       = (0x008C) ;
; sfrb    ADC12MCTL13       = (0x008D) ;
; sfrb    ADC12MCTL14       = (0x008E) ;
; sfrb    ADC12MCTL15       = (0x008F) ;
; sfrw    DAC12_0CTL        = (0x01c0) ;
; sfrw    DAC12_1CTL        = (0x01c2) ;
; sfrw    DAC12_0DAT        = (0x01c8) ;
; sfrw    DAC12_1DAT        = (0x01ca) ;
; sfrw    DMACTL0           = (0x0122) ;
; sfrw    DMACTL1           = (0x0124) ;
; sfrw    DMA0CTL           = (0x01e0) ;
; sfrw    DMA1CTL           = (0x01e8) ;
; sfrw    DMA2CTL           = (0x01f0) ;
; sfrw    DMA0SA            = (0x01e2) ;
; sfrw    DMA0DA            = (0x01e4) ;
; sfrw    DMA0SZ            = (0x01e6) ;
; sfrw    DMA1SA            = (0x01ea) ;
; sfrw    DMA1DA            = (0x01ec) ;
; sfrw    DMA1SZ            = (0x01ee) ;
; sfrw    DMA2SA            = (0x01f2) ;
; sfrw    DMA2DA            = (0x01f4) ;
; sfrw    DMA2SZ            = (0x01f6) ;
; static __inline__  void MCLKsleep (unsigned mclks)
; }
; static __inline__  void initDWRFCLKS (void)
; }  
; static __inline__  void initDWRFBUS (void)
; }
; static __inline__ 
;   void driveDWRFbus (void)
; }
; static __inline__ 
;   void floatDWRFbus (void)
; }
; static __inline__ 
;   void setDWRFadr (byte adr)
; } 
; static __inline__  
;   void refreshDWRFadr (byte adr)
; }  
; static __inline__ 
;   void freezeDWRFadr (void)
; }
; static __inline__ 
;   byte readDWRFnext (void)
; }
; static __inline__ 
;   byte readDWRFlast (void)
; }
; static __inline__ 
;   byte readDWRFfirst (byte baseAdr)
; }
; static __inline__ 
;   byte readDWRF (byte adr)
; }
; static __inline__ 
;   void writeDWRFnext (byte value)
; }
; static __inline__ 
;   void writeDWRFlast (byte value)
; }
; static __inline__ 
;   void writeDWRFfirst (byte baseAdr, byte value)
; }
; static __inline__ 
;   void writeDWRF (byte adr, byte value)
; }
; extern
; byte DWRFIEimage;  
; static __inline__  void disableDWRFirqs (byte mask)
; }
; static __inline__  void enableDWRFirqs (byte mask)
; }
; static __inline__  void endDWRFirqs (byte mask)
; }
; static __inline__  void startDWRFirqs (byte mask)
; }
; static byte gDrvCtrl;
; static byte gDrvMtrCtrl;
; static byte gHConfig;
; static byte gPWRctrl;
; static byte gMISCout; 
; static byte gSensCtrl;
; void cpld_io_init(void)
DBG3:
	.long 0x0
	.long DBG10
	.long _cpld_io_init
	.long 0x40
	.long 0x1020001
	.long DBG1
	.long DBG7-DBG8
	.long DBG9
	.long DBG6
	.long 0x0
	.pseg cpld_code
DBG8:
	.dbgseg dbg_syms
DBG1:
	.long 0x66622e
	.long 0x0
	.long DBG8
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0xc
	.long 0x0
	.long DBG11
	.long 0x0
	.dbgseg dbg_line
	.align 0x2
DBG9:
	.long DBG3
	.long 0x0
	.long _cpld_io_init
	.long 0x1
	.long DBG13
	.long 0x2
	.long DBG14
	.long 0x3
	.long DBG15
	.long 0x4
	.long DBG16
	.long 0x5
	.long DBG17
	.long 0x6
	.long DBG18
	.long 0x7
	.long DBG19
	.long 0x8
	.long DBG20
	.long 0x9
	.pseg cpld_code
	.global _cpld_io_init
_cpld_io_init:
; ENTRY
DBG12:
; {
DBG13:
; gDrvCtrl=0x0;
DBG14:
	mov.b	#0x0,&_gDrvCtrl
DBG15:
; gDrvMtrCtrl=0x0; 
	mov.b	#0x0,&_gDrvMtrCtrl
DBG16:
; gHConfig=0x0;
	mov.b	#0x0,&_gHConfig
DBG17:
; gPWRctrl=0x0;
	mov.b	#0x0,&_gPWRctrl
DBG18:
; gMISCout = 0x1f;
	mov.b	#0x1f,&_gMISCout
DBG19:
; gSensCtrl = 0x0;
	mov.b	#0x0,&_gSensCtrl
DBG21:
DBG20:
; EXIT
	ret
	.dbgseg dbg_syms
	.long 0x66652e
	.long 0x0
	.long DBG21
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0x14
	.long 0x0
	.long 0x0
	.long 0x0
	.pseg cpld_code
DBG7:
	.dbgseg dbg_syms
	.long 0x0
	.long DBG10
	.long DBG7
	.long 0x0
	.long 0xff0001
; }
; byte get_cpld_io(byte reg)
DBG6:
	.long 0x0
	.long DBG26
	.long _get_cpld_io
	.long 0x4c
	.long 0x1020001
	.long DBG11
	.long DBG23-DBG24
	.long DBG25
	.long DBG22
	.long 0x0
	.pseg cpld_code
DBG24:
	.dbgseg dbg_syms
DBG11:
	.long 0x66622e
	.long 0x0
	.long DBG24
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0x16
	.long 0x0
	.long DBG27
	.long 0x0
	.dbgseg dbg_line
DBG25:
	.long DBG6
	.long 0x0
	.long _get_cpld_io
	.long 0x1
	.long DBG29
	.long 0x2
	.long DBG30
	.long 0x3
	.long DBG31
	.long 0x4
	.long DBG32
	.long 0x5
	.long DBG33
	.long 0x6
	.long DBG34
	.long 0x7
	.long DBG35
	.long 0x8
	.long DBG36
	.long 0x9
	.long DBG37
	.long 0xa
	.long DBG38
	.long 0xc
	.long DBG39
	.long 0xd
	.long DBG40
	.long 0xf
	.pseg cpld_code
	.global _get_cpld_io
_get_cpld_io:
; ENTRY
DBG28:
; reg at argloc 0 (0x0) in reg  size 1
; {
DBG29:
; 	switch(reg)
DBG30:
	jmp	get_cpld_io_L2
DBG32:
DBG31:
; 	{
; 	case 16 : return gDrvCtrl;
get_cpld_io_L3:
	mov.b	&_gDrvCtrl,r12
	jmp	get_cpld_io_LL2
DBG33:
; 	case 25 : return gDrvMtrCtrl;
get_cpld_io_L4:
	mov.b	&_gDrvMtrCtrl,r12
	jmp	get_cpld_io_LL2
DBG34:
; 	case 3 : return gHConfig;
get_cpld_io_L5:
	mov.b	&_gHConfig,r12
	jmp	get_cpld_io_LL2
DBG35:
; 	case 14 : return gPWRctrl;
get_cpld_io_L6:
	mov.b	&_gPWRctrl,r12
	jmp	get_cpld_io_LL2
DBG36:
; 	case 15 : return gMISCout;
get_cpld_io_L7:
	mov.b	&_gMISCout,r12
	jmp	get_cpld_io_LL2
DBG37:
; 	case 12 : return gSensCtrl;
get_cpld_io_L8:
	mov.b	&_gSensCtrl,r12
	jmp	get_cpld_io_LL2
DBG38:
; 	default: return 0;
get_cpld_io_L9:
	mov.b	#0x0,r12
	jmp	get_cpld_io_LL2
DBG39:
get_cpld_io_L2:
	and	#0xff,r12
; swcode: switch has 6 cases - min 3 max 25
	cmp	#0x10,r12
	jeq	get_cpld_io_L3
	cmp	#0x19,r12
	jeq	get_cpld_io_L4
	cmp	#0x3,r12
	jeq	get_cpld_io_L5
	cmp	#0xe,r12
	jeq	get_cpld_io_L6
	cmp	#0xf,r12
	jeq	get_cpld_io_L7
	cmp	#0xc,r12
	jeq	get_cpld_io_L8
	jmp	get_cpld_io_L9
get_cpld_io_L1:
; 	}
DBG40:
; }
; ****** Warning: Function ends without returning a value
get_cpld_io_LL2:
; EXIT
DBG41:
	ret
	.dbgseg dbg_syms
	.long 0x676572
	.long 0x0
	.long 0xc0102
	.long 0xc
	.long 0x11ffff
	.long 0x66652e
	.long 0x0
	.long DBG41
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0x24
	.long 0x0
	.long 0x0
	.long 0x0
	.pseg cpld_code
DBG23:
	.dbgseg dbg_syms
	.long 0x0
	.long DBG26
	.long DBG23
	.long 0x0
	.long 0xff0001
; void set_cpld_io(byte reg,byte val)
DBG22:
	.long 0x0
	.long DBG46
	.long _set_cpld_io
	.long 0x40
	.long 0x1020001
	.long DBG27
	.long DBG43-DBG44
	.long DBG45
	.long DBG42
	.long 0x0
	.pseg cpld_code
DBG44:
	.dbgseg dbg_syms
DBG27:
	.long 0x66622e
	.long 0x0
	.long DBG44
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0x26
	.long 0x0
	.long DBG47
	.long 0x0
	.dbgseg dbg_line
DBG45:
	.long DBG22
	.long 0x0
	.long _set_cpld_io
	.long 0x1
	.long DBG49
	.long 0x2
	.long DBG50
	.long 0x3
	.long DBG51
	.long 0x4
	.long DBG52
	.long 0x5
	.long DBG53
	.long 0x6
	.long DBG54
	.long 0x7
	.long DBG55
	.long 0x8
	.long DBG56
	.long 0x9
	.long DBG57
	.long 0xa
	.long DBG58
	.long 0xb
	.long DBG59
	.long 0xc
	.long DBG60
	.long 0xd
	.long DBG61
	.long 0xe
	.long DBG62
	.long 0xf
	.long DBG63
	.long 0x10
	.long DBG64
	.long 0x11
	.long DBG65
	.long 0x12
	.long DBG66
	.long 0x13
	.long DBG67
	.long 0x14
	.long DBG68
	.long 0x15
	.long DBG69
	.long 0x16
	.long DBG70
	.long 0x17
	.long DBG71
	.long 0x18
	.long DBG72
	.long 0x19
	.long DBG73
	.long 0x1a
	.long DBG82
	.long 0x1b
	.long DBG83
	.long 0x1c
	.pseg cpld_code
	.global _set_cpld_io
_set_cpld_io:
; ENTRY
DBG48:
; reg at argloc 0 (0x0) in reg  size 1
; val at argloc 0 (0x0) in reg  size 1
; {
DBG49:
; 	switch(reg)
DBG50:
	jmp	set_cpld_io_L2
DBG52:
DBG51:
; 	{
; 	case 16 :
set_cpld_io_L3:
; 	gDrvCtrl =val;
DBG53:
	mov.b	r13,&_gDrvCtrl
DBG54:
; 	break;
	jmp	set_cpld_io_L1
DBG55:
; 	case 25 : 
set_cpld_io_L4:
; 	 gDrvMtrCtrl =val;
DBG56:
	mov.b	r13,&_gDrvMtrCtrl
DBG57:
; 	break;
	jmp	set_cpld_io_L1
DBG58:
; 	case 3 : 
set_cpld_io_L5:
; 	 gHConfig =val;
DBG59:
	mov.b	r13,&_gHConfig
DBG60:
;  	break;
	jmp	set_cpld_io_L1
DBG61:
; 	case 14 : 
set_cpld_io_L6:
; 	 gPWRctrl =val;
DBG62:
	mov.b	r13,&_gPWRctrl
DBG63:
;    break;
	jmp	set_cpld_io_L1
DBG64:
;     case 15 : 
set_cpld_io_L7:
;     gMISCout =val;
DBG65:
	mov.b	r13,&_gMISCout
DBG66:
;     break;
	jmp	set_cpld_io_L1
DBG67:
;     case 12 : 
set_cpld_io_L8:
;     gSensCtrl =val;
DBG68:
	mov.b	r13,&_gSensCtrl
DBG69:
;     break;
	jmp	set_cpld_io_L1
DBG70:
; 	default: break;
set_cpld_io_L9:
	jmp	set_cpld_io_L1
DBG71:
set_cpld_io_L2:
	mov.b	r12,r14
	and	#0xff,r14
; swcode: switch has 6 cases - min 3 max 25
	cmp	#0x10,r14
	jeq	set_cpld_io_L3
	cmp	#0x19,r14
	jeq	set_cpld_io_L4
	cmp	#0x3,r14
	jeq	set_cpld_io_L5
	cmp	#0xe,r14
	jeq	set_cpld_io_L6
	cmp	#0xf,r14
	jeq	set_cpld_io_L7
	cmp	#0xc,r14
	jeq	set_cpld_io_L8
	jmp	set_cpld_io_L9
set_cpld_io_L1:
; 	}
; 	_DINT();
DBG72:
	dint
DBG75:
DBG74:
DBG73:
;     writeDWRF(reg,val);
; {
;   setDWRFadr (adr), writeDWRFlast (value);
; {
;   P1OUT  = adr;
	mov.b	r12,&0x21
DBG76:
;   driveDWRFbus();
; {
;   P1DIR  = -1;    
	mov.b	#0xff,&0x22
DBG77:
;  (( P3OUT ) &= ~( 0x01 )) ;  
	and.b	#0xfe,&0x19
DBG79:
DBG78:
; {
;   P1OUT  = value;  
	mov.b	r13,&0x21
;  (( P3OUT ) &= ~( 0x04 )) ;
	and.b	#0xfb,&0x19
;  (( P3OUT ) |= ( 0x01 | 0x04 )) ;
	bis.b	#0x5,&0x19
DBG82:
DBG81:
DBG80:
;     _EINT();
	eint
DBG84:
DBG83:
; EXIT
	ret
	.dbgseg dbg_syms
	.long 0x6c6176
	.long 0x0
	.long 0xd0102
	.long 0xc
	.long 0x11ffff
	.long 0x676572
	.long 0x0
	.long 0xc0102
	.long 0xc
	.long 0x11ffff
	.long 0x66652e
	.long 0x0
	.long DBG84
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0x41
	.long 0x0
	.long 0x0
	.long 0x0
	.pseg cpld_code
DBG43:
	.dbgseg dbg_syms
	.long 0x0
	.long DBG46
	.long DBG43
	.long 0x0
	.long 0xff0001
; }
; void clear_cpld_bit(byte reg,byte val)
DBG42:
	.long 0x0
	.long DBG89
	.long _clear_cpld_bit
	.long 0x40
	.long 0x1020001
	.long DBG47
	.long DBG86-DBG87
	.long DBG88
	.long DBG85
	.long 0x0
	.pseg cpld_code
DBG87:
	.dbgseg dbg_syms
DBG47:
	.long 0x66622e
	.long 0x0
	.long DBG87
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0x42
	.long 0x0
	.long DBG90
	.long 0x0
	.dbgseg dbg_line
DBG88:
	.long DBG42
	.long 0x0
	.long _clear_cpld_bit
	.long 0x1
	.long DBG92
	.long 0x2
	.long DBG93
	.long 0x3
	.long DBG94
	.long 0x4
	.long DBG95
	.long 0x5
	.long DBG96
	.long 0x6
	.long DBG97
	.long 0x7
	.long DBG98
	.long 0x8
	.long DBG99
	.long 0x9
	.long DBG100
	.long 0xa
	.long DBG101
	.long 0xb
	.long DBG102
	.long 0xc
	.long DBG103
	.long 0xd
	.long DBG104
	.long 0xe
	.long DBG105
	.long 0xf
	.long DBG106
	.long 0x10
	.long DBG107
	.long 0x11
	.long DBG108
	.long 0x12
	.long DBG109
	.long 0x13
	.long DBG110
	.long 0x14
	.long DBG111
	.long 0x15
	.long DBG112
	.long 0x16
	.long DBG113
	.long 0x17
	.long DBG114
	.long 0x18
	.long DBG115
	.long 0x19
	.long DBG116
	.long 0x1a
	.long DBG117
	.long 0x1b
	.long DBG118
	.long 0x1c
	.long DBG119
	.long 0x1d
	.long DBG120
	.long 0x1e
	.long DBG121
	.long 0x1f
	.long DBG122
	.long 0x20
	.long DBG131
	.long 0x21
	.long DBG132
	.long 0x22
	.pseg cpld_code
	.global _clear_cpld_bit
_clear_cpld_bit:
; ENTRY
DBG91:
; reg at argloc 0 (0x0) in reg  size 1
; val at argloc 0 (0x0) in reg  size 1
; {
DBG92:
; 	switch(reg)
DBG93:
	jmp	clear_cpld_bit_L2
DBG95:
DBG94:
; 	{
; 	case 16 :
clear_cpld_bit_L3:
;  ((gDrvCtrl) &= ~(val)) ;
DBG96:
	bic.b	r13,&_gDrvCtrl
	mov.b	&_gDrvCtrl,r13
DBG98:
DBG97:
; 	val=gDrvCtrl;
; 	break;
	jmp	clear_cpld_bit_L1
DBG99:
; 	case 25 :
clear_cpld_bit_L4:
;  ((gDrvMtrCtrl) &= ~(val)) ;
DBG100:
	bic.b	r13,&_gDrvMtrCtrl
	mov.b	&_gDrvMtrCtrl,r13
DBG102:
DBG101:
; 	val=gDrvMtrCtrl;
; 	break;
	jmp	clear_cpld_bit_L1
DBG103:
; 	case 3 : 
clear_cpld_bit_L5:
;  ((gHConfig) &= ~(val)) ;
DBG104:
	bic.b	r13,&_gHConfig
	mov.b	&_gHConfig,r13
DBG106:
DBG105:
; 	val=gHConfig;
; 	break;
	jmp	clear_cpld_bit_L1
DBG107:
; 	case 14 : 
clear_cpld_bit_L6:
;  ((gPWRctrl) &= ~(val)) ;
DBG108:
	bic.b	r13,&_gPWRctrl
	mov.b	&_gPWRctrl,r13
DBG110:
DBG109:
; 	val=gPWRctrl;
;     break;
	jmp	clear_cpld_bit_L1
DBG111:
;     case 15 : 
clear_cpld_bit_L7:
;  ((gMISCout) &= ~(val)) ;
DBG112:
	bic.b	r13,&_gMISCout
	mov.b	&_gMISCout,r13
DBG114:
DBG113:
;     val=gMISCout;
;     break;
	jmp	clear_cpld_bit_L1
DBG115:
;     case 12 : 
clear_cpld_bit_L8:
;  ((gSensCtrl) &= ~(val)) ;
DBG116:
	bic.b	r13,&_gSensCtrl
	mov.b	&_gSensCtrl,r13
DBG118:
DBG117:
;     val=gSensCtrl;
;     break;
	jmp	clear_cpld_bit_L1
DBG119:
; 	default: break;
clear_cpld_bit_L9:
	jmp	clear_cpld_bit_L1
DBG120:
clear_cpld_bit_L2:
	mov.b	r12,r14
	and	#0xff,r14
; swcode: switch has 6 cases - min 3 max 25
	cmp	#0x10,r14
	jeq	clear_cpld_bit_L3
	cmp	#0x19,r14
	jeq	clear_cpld_bit_L4
	cmp	#0x3,r14
	jeq	clear_cpld_bit_L5
	cmp	#0xe,r14
	jeq	clear_cpld_bit_L6
	cmp	#0xf,r14
	jeq	clear_cpld_bit_L7
	cmp	#0xc,r14
	jeq	clear_cpld_bit_L8
	jmp	clear_cpld_bit_L9
clear_cpld_bit_L1:
; 	}
;      _DINT();
DBG121:
	dint
DBG124:
DBG123:
DBG122:
;      writeDWRF(reg,val);
; {
;   setDWRFadr (adr), writeDWRFlast (value);
; {
;   P1OUT  = adr;
	mov.b	r12,&0x21
DBG125:
;   driveDWRFbus();
; {
;   P1DIR  = -1;    
	mov.b	#0xff,&0x22
DBG126:
;  (( P3OUT ) &= ~( 0x01 )) ;  
	and.b	#0xfe,&0x19
DBG128:
DBG127:
; {
;   P1OUT  = value;  
	mov.b	r13,&0x21
;  (( P3OUT ) &= ~( 0x04 )) ;
	and.b	#0xfb,&0x19
;  (( P3OUT ) |= ( 0x01 | 0x04 )) ;
	bis.b	#0x5,&0x19
DBG131:
DBG130:
DBG129:
;      _EINT();
	eint
DBG133:
DBG132:
; EXIT
	ret
	.dbgseg dbg_syms
	.long 0x676572
	.long 0x0
	.long 0xc0102
	.long 0xc
	.long 0x11ffff
DBG2:
	.long 0x62622e
	.long 0x0
	.long DBG91
	.long 0x0
	.long 0x1640001
	.long 0x0
	.long 0x1
	.long 0x0
	.long DBG134
	.long 0x0
	.long 0x6c6176
	.long 0x0
	.long 0xd0102
	.long 0xc
	.long 0x11ffff
	.long 0x62652e
	.long 0x0
	.long DBG97
	.long 0x0
	.long 0x1640001
	.long 0x0
	.long 0x7
	.long 0x0
	.long 0x0
	.long 0x0
DBG134:
	.long 0x62622e
	.long 0x0
	.long DBG129
	.long 0x0
	.long 0x1640001
	.long 0x0
	.long 0x20
	.long 0x0
	.long DBG135
	.long 0x0
	.long 0x6c6176
	.long 0x0
	.long 0xd0102
	.long 0xc
	.long 0x11ffff
	.long 0x62652e
	.long 0x0
	.long DBG132
	.long 0x0
	.long 0x1640001
	.long 0x0
	.long 0x22
	.long 0x0
	.long 0x0
	.long 0x0
	.long 0x66652e
	.long 0x0
	.long DBG133
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0x63
	.long 0x0
	.long 0x0
	.long 0x0
	.pseg cpld_code
DBG86:
	.dbgseg dbg_syms
	.long 0x0
	.long DBG89
	.long DBG86
	.long 0x0
	.long 0xff0001
; }
; void set_cpld_bit(byte reg,byte val)
DBG85:
	.long 0x0
	.long DBG140
	.long _set_cpld_bit
	.long 0x40
	.long 0x1020001
	.long DBG90
	.long DBG137-DBG138
	.long DBG139
	.long DBG136
	.long 0x0
	.pseg cpld_code
DBG138:
	.dbgseg dbg_syms
DBG90:
	.long 0x66622e
	.long 0x0
	.long DBG138
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0x64
	.long 0x0
	.long DBG141
	.long 0x0
	.dbgseg dbg_line
DBG139:
	.long DBG85
	.long 0x0
	.long _set_cpld_bit
	.long 0x1
	.long DBG143
	.long 0x2
	.long DBG144
	.long 0x3
	.long DBG145
	.long 0x4
	.long DBG146
	.long 0x5
	.long DBG147
	.long 0x6
	.long DBG148
	.long 0x7
	.long DBG149
	.long 0x8
	.long DBG150
	.long 0x9
	.long DBG151
	.long 0xa
	.long DBG152
	.long 0xb
	.long DBG153
	.long 0xc
	.long DBG154
	.long 0xd
	.long DBG155
	.long 0xe
	.long DBG156
	.long 0xf
	.long DBG157
	.long 0x10
	.long DBG158
	.long 0x11
	.long DBG159
	.long 0x12
	.long DBG160
	.long 0x13
	.long DBG161
	.long 0x14
	.long DBG162
	.long 0x15
	.long DBG163
	.long 0x16
	.long DBG164
	.long 0x17
	.long DBG165
	.long 0x18
	.long DBG166
	.long 0x19
	.long DBG167
	.long 0x1a
	.long DBG168
	.long 0x1b
	.long DBG169
	.long 0x1c
	.long DBG170
	.long 0x1d
	.long DBG171
	.long 0x1e
	.long DBG172
	.long 0x1f
	.long DBG173
	.long 0x20
	.long DBG182
	.long 0x21
	.long DBG183
	.long 0x22
	.pseg cpld_code
	.global _set_cpld_bit
_set_cpld_bit:
; ENTRY
DBG142:
; reg at argloc 0 (0x0) in reg  size 1
; val at argloc 0 (0x0) in reg  size 1
; {
DBG143:
; 	switch(reg)
DBG144:
	jmp	set_cpld_bit_L2
DBG146:
DBG145:
; 	{
; 	case 16 :
set_cpld_bit_L3:
;  ((gDrvCtrl) |= (val)) ;
DBG147:
	bis.b	r13,&_gDrvCtrl
	mov.b	&_gDrvCtrl,r13
DBG149:
DBG148:
; 	val=gDrvCtrl;
; 	break;
	jmp	set_cpld_bit_L1
DBG150:
; 	case 25 :
set_cpld_bit_L4:
;  ((gDrvMtrCtrl) |= (val)) ;
DBG151:
	bis.b	r13,&_gDrvMtrCtrl
	mov.b	&_gDrvMtrCtrl,r13
DBG153:
DBG152:
; 	val=gDrvMtrCtrl;
; 	break;
	jmp	set_cpld_bit_L1
DBG154:
; 	case 3 : 
set_cpld_bit_L5:
;  ((gHConfig) |= (val)) ;
DBG155:
	bis.b	r13,&_gHConfig
	mov.b	&_gHConfig,r13
DBG157:
DBG156:
; 	val=gHConfig;
; 	break;
	jmp	set_cpld_bit_L1
DBG158:
; 	case 14 : 
set_cpld_bit_L6:
;  ((gPWRctrl) |= (val)) ;
DBG159:
	bis.b	r13,&_gPWRctrl
	mov.b	&_gPWRctrl,r13
DBG161:
DBG160:
; 	val=gPWRctrl;
;     break;
	jmp	set_cpld_bit_L1
DBG162:
;     case 15 : 
set_cpld_bit_L7:
;  ((gMISCout) |= (val)) ;
DBG163:
	bis.b	r13,&_gMISCout
	mov.b	&_gMISCout,r13
DBG165:
DBG164:
;     val=gMISCout;
;     break;
	jmp	set_cpld_bit_L1
DBG166:
;     case 12 : 
set_cpld_bit_L8:
;  ((gSensCtrl) |= (val)) ;
DBG167:
	bis.b	r13,&_gSensCtrl
	mov.b	&_gSensCtrl,r13
DBG169:
DBG168:
;     val=gSensCtrl;
;     break;
	jmp	set_cpld_bit_L1
DBG170:
; 	default: break;
set_cpld_bit_L9:
	jmp	set_cpld_bit_L1
DBG171:
set_cpld_bit_L2:
	mov.b	r12,r14
	and	#0xff,r14
; swcode: switch has 6 cases - min 3 max 25
	cmp	#0x10,r14
	jeq	set_cpld_bit_L3
	cmp	#0x19,r14
	jeq	set_cpld_bit_L4
	cmp	#0x3,r14
	jeq	set_cpld_bit_L5
	cmp	#0xe,r14
	jeq	set_cpld_bit_L6
	cmp	#0xf,r14
	jeq	set_cpld_bit_L7
	cmp	#0xc,r14
	jeq	set_cpld_bit_L8
	jmp	set_cpld_bit_L9
set_cpld_bit_L1:
; 	}
; _DINT();
DBG172:
	dint
DBG175:
DBG174:
DBG173:
; writeDWRF(reg,val);
; {
;   setDWRFadr (adr), writeDWRFlast (value);
; {
;   P1OUT  = adr;
	mov.b	r12,&0x21
DBG176:
;   driveDWRFbus();
; {
;   P1DIR  = -1;    
	mov.b	#0xff,&0x22
DBG177:
;  (( P3OUT ) &= ~( 0x01 )) ;  
	and.b	#0xfe,&0x19
DBG179:
DBG178:
; {
;   P1OUT  = value;  
	mov.b	r13,&0x21
;  (( P3OUT ) &= ~( 0x04 )) ;
	and.b	#0xfb,&0x19
;  (( P3OUT ) |= ( 0x01 | 0x04 )) ;
	bis.b	#0x5,&0x19
DBG182:
DBG181:
DBG180:
; _EINT();
	eint
DBG184:
DBG183:
; EXIT
	ret
	.dbgseg dbg_syms
	.long 0x676572
	.long 0x0
	.long 0xc0102
	.long 0xc
	.long 0x11ffff
DBG135:
	.long 0x62622e
	.long 0x0
	.long DBG142
	.long 0x0
	.long 0x1640001
	.long 0x0
	.long 0x1
	.long 0x0
	.long DBG185
	.long 0x0
	.long 0x6c6176
	.long 0x0
	.long 0xd0102
	.long 0xc
	.long 0x11ffff
	.long 0x62652e
	.long 0x0
	.long DBG148
	.long 0x0
	.long 0x1640001
	.long 0x0
	.long 0x7
	.long 0x0
	.long 0x0
	.long 0x0
DBG185:
	.long 0x62622e
	.long 0x0
	.long DBG180
	.long 0x0
	.long 0x1640001
	.long 0x0
	.long 0x20
	.long 0x0
	.long DBG186
	.long 0x0
	.long 0x6c6176
	.long 0x0
	.long 0xd0102
	.long 0xc
	.long 0x11ffff
	.long 0x62652e
	.long 0x0
	.long DBG183
	.long 0x0
	.long 0x1640001
	.long 0x0
	.long 0x22
	.long 0x0
	.long 0x0
	.long 0x0
	.long 0x66652e
	.long 0x0
	.long DBG184
	.long 0x0
	.long 0x1650001
	.long 0x0
	.long 0x85
	.long 0x0
	.long 0x0
	.long 0x0
	.pseg cpld_code
DBG137:
	.dbgseg dbg_syms
	.long 0x0
	.long DBG140
	.long DBG137
	.long 0x0
	.long 0xff0001
; }
	.dseg	cpld_bss
	.align 0x2
cpld_V7:
_gHConfig:
	.bss 0x1
; gHConfig size 1
_gDrvCtrl:
	.bss 0x1
; gDrvCtrl size 1
_gMISCout:
	.bss 0x1
; gMISCout size 1
_gSensCtrl:
	.bss 0x1
; gSensCtrl size 1
_gPWRctrl:
	.bss 0x1
; gPWRctrl size 1
_gDrvMtrCtrl:
	.bss 0x1
; gDrvMtrCtrl size 1
	.extern _DWRFIEimage
	.dbgseg dbg_syms
.0fake_1:
DBG4:
	.long 0x6166302e
	.long 0x315f656b
	.long 0x0
	.long 0xa
	.long 0x10ffffe
	.long 0x0
	.long 0x10000
	.long 0x0
	.long DBG187
	.long 0x0
	.long 0x736c6166
	.long 0x65
	.long 0x0
	.long 0xb
	.long 0x10ffff
	.long 0x65757274
	.long 0x0
	.long 0x1
	.long 0xb
	.long 0x10ffff
	.long 0x736f652e
	.long 0x0
	.long 0x1
	.long 0x0
	.long 0x166ffff
	.long DBG4
	.long 0x10000
	.long 0x0
	.long 0x0
	.long 0x0
.1fake_2:
DBG187:
	.long 0x6166312e
	.long 0x325f656b
	.long 0x0
	.long 0x8
	.long 0x10afffe
	.long 0x0
	.long 0x60000
	.long 0x0
	.long DBG188
	.long 0x0
	.long 0x50
	.long 0x0
	.long 0x0
	.long 0x3
	.long 0x8ffff
	.long 0x49
	.long 0x0
	.long 0x2
	.long 0x3
	.long 0x8ffff
	.long 0x44
	.long 0x0
	.long 0x4
	.long 0x3
	.long 0x8ffff
	.long 0x736f652e
	.long 0x0
	.long 0x6
	.long 0x0
	.long 0x166ffff
	.long DBG187
	.long 0x60000
	.long 0x0
	.long 0x0
	.long 0x0
DBG141:
DBG186:
DBG136:
DBG188:
	.long 0x7073
	.long 0x0
	.long 0x1
	.long 0x0
	.long 0x16cfffe
	.long 0x0
	.long 0x100001
	.long 0x0
	.long 0x0
	.long 0x0
	.long 0x52
	.long 0x0
	.long 0x2
	.long 0x0
	.long 0x16cfffe
	.long 0x0
	.long 0x100010
	.long 0x0
	.long 0x0
	.long 0x0
	.long 0x6f434867
	.long 0x6769666e
	.long _gHConfig
	.long 0xc
	.long 0x30002
	.long 0x76724467
	.long 0x6c727443
	.long _gDrvCtrl
	.long 0xc
	.long 0x30002
	.long 0x53494d67
	.long 0x74756f43
	.long _gMISCout
	.long 0xc
	.long 0x30002
	.long 0x0
	.long DBG189
	.long _gSensCtrl
	.long 0xc
	.long 0x30002
	.long 0x52575067
	.long 0x6c727463
	.long _gPWRctrl
	.long 0xc
	.long 0x30002
	.long 0x0
	.long DBG190
	.long _gDrvMtrCtrl
	.long 0xc
	.long 0x30002
	.long 0x6c6f6f62
	.long 0x6e6165
	.long 0x0
	.long 0xa
	.long 0x10dfffe
	.long .0fake_1
	.long 0x0
	.long 0x0
	.long 0x0
	.long 0x0
	.long 0x0
	.long DBG191
	.long 0x0
	.long 0x4
	.long 0xdfffe
	.long 0x38746e69
	.long 0x0
	.long 0x0
	.long 0x2
	.long 0xdfffe
	.long 0x746e6975
	.long 0x3233
	.long 0x0
	.long 0xf
	.long 0xdfffe
	.long 0x64696f76
	.long 0x6e46
	.long 0x0
	.long 0x40
	.long 0xdfffe
	.long 0x746e6975
	.long 0x3631
	.long 0x0
	.long 0xd
	.long 0xdfffe
	.long 0x61686377
	.long 0x745f72
	.long 0x0
	.long 0x4
	.long 0xdfffe
	.long 0x657a6973
	.long 0x745f
	.long 0x0
	.long 0xe
	.long 0xdfffe
	.long 0x31746e69
	.long 0x44495036
	.long 0x0
	.long 0x8
	.long 0x10dfffe
	.long .1fake_2
	.long 0x6
	.long 0x0
	.long 0x0
	.long 0x0
	.long 0x33746e69
	.long 0x32
	.long 0x0
	.long 0x5
	.long 0xdfffe
	.long 0x31746e69
	.long 0x36
	.long 0x0
	.long 0x3
	.long 0xdfffe
	.long 0x65747962
	.long 0x0
	.long 0x0
	.long 0xc
	.long 0xdfffe
	.long 0x746e6975
	.long 0x38
	.long 0x0
	.long 0xc
	.long 0xdfffe
	.long 0x666f652e
	.long 0x0
	.long 0x0
	.long 0x0
	.long 0x67fffe
	.dbgseg dbg_strs
	.align 0x2
	.long 0x9c
DBG5:
	.long 0x483a5c45
	.long 0x53505c67
	.long 0x656e325c
	.long 0x736f6674
	.long 0x77617265
	.long 0x5c6d7370
	.long 0x3433305c
	.long 0x64776172
	.long 0x7665735c
	.long 0x63706c64
	.long 0x2e630000
DBG191:
	.long 0x70747264
	.long 0x6966665f
	.long 0x74000000
DBG46:
	.long 0x7365745f
	.long 0x63706c64
	.long 0x5f696f00
DBG89:
	.long 0x636c6561
	.long 0x725f6370
	.long 0x6c645f62
	.long 0x69740000
DBG140:
	.long 0x7365745f
	.long 0x63706c64
	.long 0x5f626974
	.long 0x0
DBG10:
	.long 0x63706c64
	.long 0x5f696f5f
	.long 0x696e6974
	.long 0x0
DBG189:
	.long 0x6753656e
	.long 0x73437472
	.long 0x6c000000
DBG26:
	.long 0x6765745f
	.long 0x63706c64
	.long 0x5f696f00
DBG190:
	.long 0x67447276
	.long 0x4d747243
	.long 0x74726c00
	.iseg _idesc
	.align 0x2
	.data 0x0
	.data cpld_V7
	.data 0x6