<?xml version="1.0" encoding="UTF-8"?>
<BaliProject version="3.2" title="PC104" device="LCMXO2-7000ZE-1BG256C" default_implementation="impl1">
    <Options/>
    <Implementation title="impl1" dir="impl1" description="impl1" synthesis="lse" default_strategy="Strategy1">
        <Options def_top="top_level"/>
        <Source name="pc104/src/bidi_ts_buffer.vhd" type="VHDL" type_short="VHDL">
            <Options/>
        </Source>
        <Source name="pc104/src/reset_synchronizer.vhd" type="VHDL" type_short="VHDL">
            <Options/>
        </Source>
        <Source name="pc104/src/top_level.vhd" type="VHDL" type_short="VHDL">
            <Options top_module="top_level"/>
        </Source>
        <Source name="impl1/impl1.xcf" type="Programming Project File" type_short="Programming">
            <Options/>
        </Source>
        <Source name="PC104.lpf" type="Logic Preference" type_short="LPF">
            <Options/>
        </Source>
        <Source name="Reveal/pc104.rva" type="Reveal Analyzer Project File" type_short="RVA">
            <Options/>
        </Source>
        <Source name="Reveal/pc104_debug.rvl" type="Reveal" type_short="Reveal" excluded="TRUE">
            <Options/>
        </Source>
    </Implementation>
    <Strategy name="Strategy1" file="PC1041.sty"/>
</BaliProject>
