pn150317172255
#Start recording tcl command: 3/17/2015 17:16:02
#Project Location: C:/Users/rawa/Desktop/FPGA_PC104; Project name: PC104
prj_project new -name "PC104" -impl "impl1" -dev LCMXO2-7000ZE-1BG256C -synthesis "lse"
prj_project save
prj_src add "C:/Users/rawa/Desktop/FPGA_PC104/pc104/src/bidi_ts_buffer.vhd" "C:/Users/rawa/Desktop/FPGA_PC104/pc104/src/reset_synchronizer.vhd" "C:/Users/rawa/Desktop/FPGA_PC104/pc104/src/top_level.vhd"
prj_run Export -impl impl1 -task Jedecgen -forceAll
prj_run Export -impl impl1 -forceAll
prj_run Export -impl impl1 -forceAll
pgr_project save "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
prj_src add -exclude "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
prj_src enable "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project save "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_project close
#Stop recording: 3/17/2015 17:22:55



pn150317172901
#Start recording tcl command: 3/17/2015 17:25:19
#Project Location: C:/Users/rawa/Desktop/FPGA_PC104; Project name: PC104
prj_project open "C:/Users/rawa/Desktop/FPGA_PC104/PC104.ldf"
#Stop recording: 3/17/2015 17:29:01



pn150317180140
#Start recording tcl command: 3/17/2015 17:54:13
#Project Location: C:/Users/rawa/Desktop/FPGA_PC104; Project name: PC104
prj_project open "C:/Users/rawa/Desktop/FPGA_PC104/PC104.ldf"
#Stop recording: 3/17/2015 18:01:40



pn150317192715
#Start recording tcl command: 3/17/2015 18:03:27
#Project Location: C:/Users/rawa/Desktop/FPGA_PC104; Project name: PC104
prj_project open "C:/Users/rawa/Desktop/FPGA_PC104/PC104.ldf"
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program set -port FTUSB-1
pgr_program run
pgr_project save "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_project close
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program set -port FTUSB-0
pgr_program set -port FTUSB-1
pgr_program run
pgr_project save "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_project close
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project close
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
prj_run Export -impl impl1 -forceAll
pgr_program run
pgr_project close
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project close
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project close
prj_run Synthesis -impl impl1
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project close
#Stop recording: 3/17/2015 19:27:15



pn150317211131
#Start recording tcl command: 3/17/2015 19:29:17
#Project Location: C:/Users/rawa/Desktop/FPGA_PC104; Project name: PC104
prj_project open "C:/Users/rawa/Desktop/FPGA_PC104/PC104.ldf"
prj_run Export -impl impl1 -forceAll
prj_run Export -impl impl1 -forceAll
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project close
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project save "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_project close
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project close
prj_run Synthesis -impl impl1
rvl_project new
rvl_trace trc_option SampleClk=clock
rvl_trace add_sig  {drive_cpu_bus drive_enet_bus drive_pc104_bus}
rvl_trace add_sig  {select_enet select_pc104 select_sfr select_test {sfr_register[15:0]} synced_reset_n}
rvl_trace add_sig  {{test_register[15:0]} {to_lpc3141[15:0]} {to_pc104[7:0]}}
rvl_trace add_sig  {enet_cmd_opad enet_cs_n_opad}
rvl_trace add_sig  {enet_rd_n_opad enet_reset_n_opad enet_wr_n_opad}
rvl_trace move_sig -move_to drive_cpu_bus {enet_reset_n_opad}
rvl_trace move_sig -move_to drive_cpu_bus {enet_cmd_opad}
rvl_trace move_sig -move_to drive_cpu_bus {enet_cs_n_opad}
rvl_trace move_sig -move_to drive_cpu_bus {enet_rd_n_opad}
rvl_trace move_sig -move_to drive_cpu_bus {enet_wr_n_opad}
rvl_trace trc_option BufferDepth=2048
rvl_trace trc_option BufferDepth=1024
rvl_tu set -name TU1 -set_sig {lpc3141_b_n_stcs0_ipad }
rvl_tu add -radix Bin 
rvl_tu set -name TU2 -set_sig {lpc3141_b_n_stcs1_ipad }
rvl_tu add -radix Bin 
rvl_tu set -name TU3 -set_sig {lpc3141_b_n_oe_ipad }
rvl_tu add -radix Bin 
rvl_tu set -name TU4 -set_sig {lpc3141_b_n_we_ipad }
rvl_te set -expression TU1 TE1
prj_run Export -impl impl1 -forceAll
rvl_project save -overwrite C:/Users/rawa/Desktop/FPGA_PC104/pc104/pc104/pc104.rvl
prj_run Export -impl impl1 -forceAll
rvl_project close -force
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
rvl_project new
pgr_project save "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_project close
rvl_trace trc_option SampleClk=clock
rvl_trace add_sig  {drive_cpu_bus drive_enet_bus drive_pc104_bus}
rvl_trace add_sig  {enet_cmd_opad enet_cs_n_opad}
rvl_trace add_sig  {{from_enet[15:0]} {from_lpc3141[15:0]} {from_pc104[7:0]}}
rvl_trace add_sig  {lpc3141_b_n_oe_ipad lpc3141_b_n_stcs0_ipad lpc3141_b_n_stcs1_ipad lpc3141_b_n_we_ipad}
rvl_trace add_sig  {lpc3141_b_n_oe_ipad lpc3141_b_n_stcs0_ipad lpc3141_b_n_stcs1_ipad lpc3141_b_n_we_ipad {lpc3141_ba_ipads[15:0]}}
rvl_trace move_sig -move_to drive_cpu_bus {lpc3141_ba_ipads}
rvl_trace move_sig -move_to lpc3141_ba_ipads {lpc3141_ba_ipads}
rvl_trace del_sig {lpc3141_ba_ipads}
rvl_trace add_sig  {select_enet select_pc104 select_sfr select_test {sfr_register[15:0]}}
rvl_trace add_sig  {{test_register[15:0]} {to_lpc3141[15:0]} {to_pc104[7:0]}}
rvl_trace move_sig -move_to enet_cmd_opad {enet_cs_n_opad}
rvl_trace add_sig  {enet_wr_n_opad}
rvl_trace add_sig  {enet_rd_n_opad}
rvl_trace move_sig -move_to from_enet {enet_rd_n_opad}
rvl_trace move_sig -move_to from_enet {enet_wr_n_opad}
rvl_trace move_sig -move_to from_enet {select_enet}
rvl_trace add_sig  {pc104_std_ior_n_opad}
rvl_trace add_sig  {pc104_std_iow_n_opad}
rvl_trace add_sig  {pc104_std_aen_opad}
rvl_tu set -name TU1 -set_sig {lpc3141_b_n_stcs1_ipad }
rvl_tu add -radix Bin 
rvl_tu set -name TU2 -set_sig {lpc3141_b_n_stcs0_ipad }
rvl_tu add -radix Bin 
rvl_tu set -name TU3 -set_sig {lpc3141_b_n_oe_ipad }
rvl_tu add -radix Bin 
rvl_tu set -name TU4 -set_sig {lpc3141_b_n_we_ipad }
rvl_te set -expression TU1 TE1
rvl_project save -overwrite C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl
prj_src add -exclude "C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl"
prj_src enable "C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl"
prj_run Export -impl impl1 -forceAll
rvl_project close -force
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
rva_project new -rva "pc104" -cable USB2 -rvl "C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl" -dev "LCMXO2-7000ZE:19615811" -port 0 -xcf ""
prj_src add "C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104.rva"
rva_project run
rva_project stop
rva_project run
rva_project stop
rva_project run
rva_project run
rva_project run
rva_project stop
rva_project run
rva_project close
rvl_project open C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl
rvl_trace del_sig {drive_pc104_bus}
rvl_trace del_sig {from_pc104}
rvl_trace del_sig {select_pc104 select_sfr select_test}
rvl_trace del_sig {pc104_std_ior_n_opad pc104_std_iow_n_opad pc104_std_aen_opad}
rvl_trace del_sig {to_pc104}
rvl_trace del_sig {test_register}
rvl_trace del_sig {sfr_register}
rvl_trace move_sig -move_to from_lpc3141 {to_lpc3141}
rvl_trace move_sig -move_to drive_cpu_bus {lpc3141_b_n_oe_ipad}
rvl_trace move_sig -move_to lpc3141_b_n_oe_ipad {lpc3141_b_n_stcs1_ipad}
rvl_trace move_sig -move_to lpc3141_b_n_stcs1_ipad {lpc3141_b_n_stcs0_ipad}
rvl_trace move_sig -move_to lpc3141_b_n_we_ipad {lpc3141_b_n_stcs0_ipad}
rvl_trace move_sig -move_to drive_cpu_bus {lpc3141_b_n_we_ipad}
rvl_trace del_sig {lpc3141_b_n_stcs0_ipad}
rvl_trace add_sig  {{enet_io_iopads[15:0]}}
rvl_trace move_sig -move_to select_enet {enet_io_iopads}
rvl_trace move_sig -move_to enet_io_iopads {select_enet}
rvl_trace add_sig  {{lpc3141_bd_iopads[15:0]}}
rvl_trace move_sig -move_to drive_cpu_bus {lpc3141_bd_iopads}
rvl_trace add_sig  {select_enet}
rvl_trace trc_option BufferDepth=1024
rvl_trace add_sig  {{lpc3141_ba_ipads[15:0]}}
rvl_trace move_sig -move_to lpc3141_bd_iopads {lpc3141_ba_ipads}
rvl_project save -overwrite C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl
prj_run Export -impl impl1 -forceAll
rvl_project close -force
pgr_project save "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_project close
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project close
rva_project open "C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104.rva"
rva_project run
rva_project close
rvl_project open C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl
rvl_trace del_sig {enet_io_iopads}
rvl_trace del_sig {lpc3141_bd_iopads}
rvl_project save -overwrite C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl
prj_run Export -impl impl1 -forceAll
rvl_project close -force
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project close
rva_project open "C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104.rva"
rva_project run
prj_src exclude "C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl"
prj_run Export -impl impl1 -forceAll
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_project close
pgr_project open "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
prj_src enable "C:/Users/rawa/Desktop/FPGA_PC104/Reveal/pc104_debug.rvl"
prj_run Export -impl impl1 -forceAll
pgr_program run
pgr_program set -port FTUSB-0
pgr_program set -port FTUSB-1
pgr_program run
pgr_project save "C:/Users/rawa/Desktop/FPGA_PC104/impl1/impl1.xcf"
pgr_project close
rva_project close
#Stop recording: 3/17/2015 21:11:31



pn150318134552
#Start recording tcl command: 3/18/2015 13:44:58
#Project Location: C:/Users/rawa/Desktop/FPGA_PC104; Project name: PC104
prj_project open "C:/Users/rawa/Desktop/FPGA_PC104/PC104.ldf"
#Stop recording: 3/18/2015 13:45:52



pn150318134931
#Start recording tcl command: 3/18/2015 13:46:29
#Project Location: C:/Users/rawa/Desktop/PC-104/FPGA_PC104; Project name: PC104
prj_project open "C:/Users/rawa/Desktop/PC-104/FPGA_PC104/PC104.ldf"
pgr_project open "C:/Users/rawa/Desktop/PC-104/FPGA_PC104/impl1/impl1.xcf"
pgr_program run
pgr_project save "C:/Users/rawa/Desktop/PC-104/FPGA_PC104/impl1/impl1.xcf"
pgr_project close
#Stop recording: 3/18/2015 13:49:31



pn150329150433
#Start recording tcl command: 3/29/2015 15:04:08
#Project Location: C:/Users/wayne/Desktop/PC-104/FPGA_PC104; Project name: PC104
prj_project open "C:/Users/wayne/Desktop/PC-104/FPGA_PC104/PC104.ldf"
prj_run Export -impl impl1 -task Jedecgen -forceAll
#Stop recording: 3/29/2015 15:04:33



pn150401064427
#Start recording tcl command: 4/1/2015 05:56:09
#Project Location: C:/Users/Wayne Radochonski/Desktop/PC-104/FPGA_PC104; Project name: PC104
prj_project open "C:/Users/Wayne Radochonski/Desktop/PC-104/FPGA_PC104/PC104.ldf"
prj_run Export -impl impl1 -forceAll
prj_run Export -impl impl1 -forceAll
prj_run Export -impl impl1 -forceAll
#Stop recording: 4/1/2015 06:44:27