#include <NXP/iolpc3130.h>
#include "arm_comm.h"
#include "drv_cgu.h"
#if 0



/* Static Memory MPMCStaticExtendedWait */
typedef struct{
__REG32 EXTENDEDWAIT  :10;
__REG32               :22;
} __mpmcs_ext_wait_bits;

/* MPMCStaticWaitWen0..3 */
typedef struct{
__REG32 WAITWEN : 4;
__REG32         :28;
} __mpmcs_wen_bits;

/* MPMCStaticWaitOen0..3 */
typedef struct{
__REG32 WAITOEN : 4;
__REG32         :28;
} __mpmcs_oen_bits;

/* MPMCStaticWaitRd0..3 */
typedef struct{
__REG32 WAITRD  : 5;
__REG32         :27;
} __mpmcs_rd_bits;

/* MPMCStaticWaitPage0..3 */
typedef struct{
__REG32 WAITPAGE : 5;
__REG32          :27;
} __mpmcs_page_bits;

/* MPMCStaticWaitWr0..3 */
typedef struct{
__REG32 WAITWR  : 5;
__REG32         :27;
} __mpmcs_wr_bits;

/* MPMCStaticWaitTurn0..3 */
typedef struct{
__REG32 WAITTURN  : 4;
__REG32           :28;
} __mpmcs_turn_bits;

/* Dynamic Memory Active to Precharge Command Period Register */
typedef struct{
__REG32 tRAS  : 4;
__REG32       :28;
} __mpmcd_tras_bits;

__IO_REG32_BIT(MPMCDynamicRasCas0,    0x17008104,__READ_WRITE,__mpmcd_ras_cas_bits);

  /*Configure RAS latency*/
  MPMCDynamicRasCas0_bit.RAS = 2;
  /*Configure CAS latency*/
  MPMCDynamicRasCas0_bit.CAS = 2;





MPMCStaticWaitWen0,    0x17008204,__READ_WRITE,__mpmcs_wen_bits);
MPMCStaticWaitOen0,    0x17008208,__READ_WRITE,__mpmcs_oen_bits);
MPMCStaticWaitRd0,     0x1700820C,__READ_WRITE,__mpmcs_rd_bits);
MPMCStaticWaitPage0,   0x17008210,__READ_WRITE,__mpmcs_page_bits);
MPMCStaticWaitWr0,     0x17008214,__READ_WRITE,__mpmcs_wr_bits);
MPMCStaticWaitTurn0,   0x17008218,__READ_WRITE,__mpmcs_turn_bits);


MPMCStaticWaitWen1,    0x17008224,__READ_WRITE,__mpmcs_wen_bits);
MPMCStaticWaitOen1,    0x17008228,__READ_WRITE,__mpmcs_oen_bits);
MPMCStaticWaitRd1,     0x1700822C,__READ_WRITE,__mpmcs_rd_bits);
MPMCStaticWaitPage1,   0x17008230,__READ_WRITE,__mpmcs_page_bits);
MPMCStaticWaitWr1,     0x17008234,__READ_WRITE,__mpmcs_wr_bits);
MPMCStaticWaitTurn1,   0x17008238,__READ_WRITE,__mpmcs_turn_bits);
MPMCStaticConfig2,     0x17008240,__READ_WRITE,__mpmcs_cnfg_bits);
MPMCStaticWaitWen2,    0x17008244,__READ_WRITE,__mpmcs_wen_bits);
MPMCStaticWaitOen2,    0x17008248,__READ_WRITE,__mpmcs_oen_bits);
MPMCStaticWaitRd2,     0x1700824C,__READ_WRITE,__mpmcs_rd_bits);
MPMCStaticWaitPage2,   0x17008250,__READ_WRITE,__mpmcs_page_bits);
MPMCStaticWaitWr2,     0x17008254,__READ_WRITE,__mpmcs_wr_bits);
MPMCStaticWaitTurn2,   0x17008258,__READ_WRITE,__mpmcs_turn_bits);
MPMCStaticConfig3,     0x17008260,__READ_WRITE,__mpmcs_cnfg_bits);
MPMCStaticWaitWen3,    0x17008264,__READ_WRITE,__mpmcs_wen_bits);
MPMCStaticWaitOen3,    0x17008268,__READ_WRITE,__mpmcs_oen_bits);
MPMCStaticWaitRd3,     0x1700826C,__READ_WRITE,__mpmcs_rd_bits);
MPMCStaticWaitPage3,   0x17008270,__READ_WRITE,__mpmcs_page_bits);
MPMCStaticWaitWr3,     0x17008274,__READ_WRITE,__mpmcs_wr_bits);
MPMCStaticWaitTurn3,   0x17008278,__READ_WRITE,__mpmcs_turn_bits);

#endif

#define ETHERNET_BASE_ADDRESS   0x20020000
#define CMD_HIGH                0x0004
#define CMD_LOW                 0x0000
#define BE3                     0x8000
#define BE2                     0x4000
#define BE1                     0x2000
#define BE0                     0x1000

/* MPMCStaticConfig0..1 */
typedef struct{
__REG32 MW   : 2;
__REG32      : 1;
__REG32 PM   : 1;
__REG32      : 2;
__REG32 PC   : 1;
__REG32 BLS  : 1;
__REG32 EW   : 1;
__REG32      : 22;
} __wjr_mpmcs_cnfg_bits;

__IO_REG32_BIT(WJR_MPMCStaticConfig0, 0x17008200,__READ_WRITE,__wjr_mpmcs_cnfg_bits);
__IO_REG32_BIT(WJR_MPMCStaticConfig1, 0x17008220,__READ_WRITE,__wjr_mpmcs_cnfg_bits);
void Fubar()
{
  CGU_Run_Clock(CLOCK_OUT);
  
   (*(volatile Int32U*) 0x17008200) = 0x80;
  MPMCStaticWaitWen0_bit.WAITWEN   = 15;
  MPMCStaticWaitOen0_bit.WAITOEN   = 15;
  MPMCStaticWaitRd0_bit.WAITRD     = 31;
  MPMCStaticWaitWr0_bit.WAITWR     = 31; 
  MPMCStaticWaitTurn0_bit.WAITTURN = 15;
  
  (*(volatile Int32U*) 0x17008220) = 0x81;
  MPMCStaticWaitWen1_bit.WAITWEN   = 15;
  MPMCStaticWaitOen1_bit.WAITOEN   = 15;
  MPMCStaticWaitRd1_bit.WAITRD     = 31;
  MPMCStaticWaitWr1_bit.WAITWR     = 31; 
  MPMCStaticWaitTurn1_bit.WAITTURN = 15;
}

void EthernetWrite(Int16U addr,  Int16U data )
{                                
   Int16U address = (addr) | ((BE1 | BE0) << (addr & 0x02));   
   Int32U wptr = ETHERNET_BASE_ADDRESS + CMD_HIGH;
   Int32U dptr = ETHERNET_BASE_ADDRESS + CMD_LOW;
                  
    (*(volatile Int16U*) wptr) = address;       
    (*(volatile Int16U*) dptr) = data; 	    
}

Int16U EthernetRead(Int16U addr)
{                                
   Int16U address = (addr) | ((BE1 | BE0) << (addr & 0x02));   
   Int32U wptr = ETHERNET_BASE_ADDRESS + CMD_HIGH;
   Int32U dptr = ETHERNET_BASE_ADDRESS + CMD_LOW;
                  
    (*(volatile Int16U*) wptr) = address;       
    Int16U data = (*(volatile Int16U*) dptr);	  
    return data;
}

Int16U EthernetWalkingOnesTest(Int16U address)
{
    Int16U pattern;
    
    // Perform a walking 1's test at the given address.
    for (pattern = 1; pattern != 0; pattern <<= 1)
    {
        // Write the test pattern.
        EthernetWrite(address, pattern);
        // Read it back
        Int16U result = EthernetRead(address);
        if (result != pattern) 
            return pattern;
    }
    return 0;
}

Int16U EthernetCheckValueInRegister(Int16U address, Int16U expectedValue)
{
  Int16U result = EthernetRead(address);
  if (result == expectedValue)
    return result;
  return 0;
}

void AssertPeripheralReset()
{
  volatile Int16U sfr;
  sfr = (*(volatile Int16U *) 0x20028000);
  sfr = sfr | 2;
  (*(volatile Int16U *) 0x20028000) = sfr;
}

void NegatePeripheralReset()
{
   volatile Int16U sfr;
  sfr = (*(volatile Int16U *) 0x20028000);
  sfr = sfr & ~(2);
  (*(volatile Int16U *) 0x20028000) = sfr;
}

Int8U Access_PC104(void)
{
   volatile Int8U sfr;
  sfr = (*(volatile Int8U *) 0x2000048D) ;
  return sfr;
}