#ifndef I2S_REGS_H
#define I2S_REGS_H

#define I2S_BASE_ADDR   0x16000000
#define I2S_FORMAT_SETTINGS       	(*(volatile unsigned long *)(I2S_BASE_ADDR + 0x000))
#define AUDIOSS_MUX_SETTINGS       	(*(volatile unsigned long *)(I2S_BASE_ADDR + 0x004))
#define N_SOF_COUNTER       		(*(volatile unsigned long *)(I2S_BASE_ADDR + 0x010))

#define I2STX1_BASE_ADDR   0x16000100
#define I2STX1_LEFT_16BIT       (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x000))
#define I2STX1_RIGHT_16BIT      (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x004))
#define I2STX1_LEFT_24BIT       (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x008))
#define I2STX1_RIGHT_24BIT      (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x00C))
#define I2STX1_INT_STATUS   	(*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x010))
#define I2STX1_INT_MASK 	    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x014))

#define I2STX1_LEFT_32BIT_0	    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x020))
#define I2STX1_LEFT_32BIT_1	    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x024))
#define I2STX1_LEFT_32BIT_2	    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x028))
#define I2STX1_LEFT_32BIT_3	    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x02C))
#define I2STX1_LEFT_32BIT_4	    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x030))
#define I2STX1_LEFT_32BIT_5	    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x034))
#define I2STX1_LEFT_32BIT_6	    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x038))
#define I2STX1_LEFT_32BIT_7	    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x03C))
#define I2STX1_RIGHT_32BIT_0	(*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x040))
#define I2STX1_RIGHT_32BIT_1    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x044))
#define I2STX1_RIGHT_32BIT_2    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x048))
#define I2STX1_RIGHT_32BIT_3    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x04C))
#define I2STX1_RIGHT_32BIT_4    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x050))
#define I2STX1_RIGHT_32BIT_5    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x054))
#define I2STX1_RIGHT_32BIT_6    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x058))
#define I2STX1_RIGHT_32BIT_7    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x05C))
#define I2STX1_INTERLEAVED_0    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x060))
#define I2STX1_INTERLEAVED_1    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x064))
#define I2STX1_INTERLEAVED_2    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x068))
#define I2STX1_INTERLEAVED_3    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x06C))
#define I2STX1_INTERLEAVED_4    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x070))
#define I2STX1_INTERLEAVED_5    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x074))
#define I2STX1_INTERLEAVED_6    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x078))
#define I2STX1_INTERLEAVED_7    (*(volatile unsigned long *)(I2STX1_BASE_ADDR + 0x07C))



#define I2SRX1_BASE_ADDR   0x16000200
#define I2SRX1_LEFT_16BIT       (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x000))
#define I2SRX1_RIGHT_16BIT      (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x004))
#define I2SRX1_LEFT_24BIT       (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x008))
#define I2SRX1_RIGHT_24BIT      (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x00C))
#define I2SRX1_INT_STATUS   	(*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x010))
#define I2SRX1_INT_MASK 	    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x014))

#define I2SRX1_LEFT_32BIT_0	    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x020))
#define I2SRX1_LEFT_32BIT_1	    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x024))
#define I2SRX1_LEFT_32BIT_2	    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x028))
#define I2SRX1_LEFT_32BIT_3	    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x02C))
#define I2SRX1_LEFT_32BIT_4	    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x030))
#define I2SRX1_LEFT_32BIT_5	    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x034))
#define I2SRX1_LEFT_32BIT_6	    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x038))
#define I2SRX1_LEFT_32BIT_7	    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x03C))
#define I2SRX1_RIGHT_32BIT_0	(*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x040))
#define I2SRX1_RIGHT_32BIT_1    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x044))
#define I2SRX1_RIGHT_32BIT_2    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x048))
#define I2SRX1_RIGHT_32BIT_3    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x04C))
#define I2SRX1_RIGHT_32BIT_4    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x050))
#define I2SRX1_RIGHT_32BIT_5    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x054))
#define I2SRX1_RIGHT_32BIT_6    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x058))
#define I2SRX1_RIGHT_32BIT_7    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x05C))
#define I2SRX1_INTERLEAVED_0    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x060))
#define I2SRX1_INTERLEAVED_1    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x064))
#define I2SRX1_INTERLEAVED_2    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x068))
#define I2SRX1_INTERLEAVED_3    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x06C))
#define I2SRX1_INTERLEAVED_4    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x070))
#define I2SRX1_INTERLEAVED_5    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x074))
#define I2SRX1_INTERLEAVED_6    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x078))
#define I2SRX1_INTERLEAVED_7    (*(volatile unsigned long *)(I2SRX1_BASE_ADDR + 0x07C))


#endif
