/***********************************************************************
 * $Id::  $
 *
 * Project: EA3141 board definitions
 *
 * Description:
 *     This file contains board specific information such as the
 *     chip select wait states, and other board specific information.
 *
 ***********************************************************************
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * products. This software is supplied "AS IS" without any warranties.
 * NXP Semiconductors assumes no responsibility or liability for the
 * use of the software, conveys no license or title under any patent,
 * copyright, or mask work right to the product. NXP Semiconductors
 * reserves the right to make changes in the software without
 * notification. NXP Semiconductors also make no representation or
 * warranty that such application will be suitable for the specified
 * use without further testing or modification.
 **********************************************************************/

#ifndef EA3141_BOARD_H
#define EA3141_BOARD_H

#include "lpc_types.h"
#include "lpc313x_chip.h"

#ifdef __cplusplus
extern "C"
{
#endif

/* board crystal frequency */
#define XTAL_IN		        (12000000)
/* on EA3141 SPI NOR flash is connected to chip select 0 */
#define SPI_NOR_SLAVE_ID	0

/***********************************************************************
 * Address of slave device connected to I2C ports
 **********************************************************************/
#define EA3141_I2C0_LEDC_ADR     0xC0
#define EA3141_I2C1_CODEC_ADR    0x34

/***********************************************************************
 * Delay constants in nanosecs for MT48LC32M16LF SDRAM on board
 **********************************************************************/
#define EA3141_SDRAM_TRP            (20)
#define EA3141_SDRAM_TRFC           (66)
#define EA3141_SDRAM_TRAS           (44)
#define EA3141_SDRAM_TREX           (75)
#define EA3141_SDRAM_TARP           4
#define EA3141_SDRAM_TWR            (75)
#define EA3141_SDRAM_TRC            (66)
#define EA3141_SDRAM_TRRD           (15)
#define EA3141_SDRAM_TMRD           (20)
#define EA3141_SDRAM_TXSR           (75)
#define EA3141_SDRAM_TDAL           (50)
#define EA3141_SDRAM_REFRESH        (100)
#define EA3141_SDRAM_OPER_REFRESH   (7812)

#define EA3141_MPMC_DELAY           /*0x824*/0x828

/* Miscellaneous board setup functions */
void ea3141_board_init(void);

/* SPI NOR flash driver functions */
STATUS spinor_init(INT_32 spi_id);
STATUS spinor_read(UNS_8 *dst, UNS_32 offset, UNS_32 bytecount);
STATUS spinor_write(UNS_8 *src, UNS_32 offset, UNS_32 bytecount);
STATUS spinor_erase_from_beginning(UNS_32 bytecount);
STATUS spinor_erase_sector(UNS_32 sectorIndex);
INT_32 spinor_write_page(UNS_8 *src, UNS_32 offset);



#ifdef __cplusplus
}
#endif

#endif /* EA3141_BOARD_H */
