PAR: Place And Route Diamond (64-bit) 3.0.0.97.
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp. All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
Copyright (c) 2001 Agere Systems All rights reserved.
Copyright (c) 2002-2013 Lattice Semiconductor Corporation, All rights reserved.
Mon Feb 17 10:32:29 2014
C:/lscc/diamond/3.0_x64/ispfpga\bin\nt64\par -f PC104_PC104.p2t
PC104_PC104_map.ncd PC104_PC104.dir PC104_PC104.prf -gui
Preference file: PC104_PC104.prf.
Cost Table Summary
Level/ Number Worst Timing Worst Timing Run NCD
Cost [ncd] Unrouted Slack Score Slack(hold) Score(hold) Time Status
---------- -------- ----- ------ ----------- ----------- ----- ------
5_1 * 0 65.206 0 0.856 0 06 Complete
* : Design saved.
Total (real) run time for 1-seed: 6 secs
par done!
Lattice Place and Route Report for Design "PC104_PC104_map.ncd"
Mon Feb 17 10:32:29 2014
Best Par Run
PAR: Place And Route Diamond (64-bit) 3.0.0.97.
Command Line: par -w -l 5 -i 6 -t 1 -c 0 -e 0 -gui -exp parUseNBR=1:parCDP=0:parCDR=0:parPathBased=OFF PC104_PC104_map.ncd PC104_PC104.dir/5_1.ncd PC104_PC104.prf
Preference file: PC104_PC104.prf.
Placement level-cost: 5-1.
Routing Iterations: 6
Loading design for application par from file PC104_PC104_map.ncd.
Design name: top_level
NCD version: 3.2
Vendor: LATTICE
Device: LCMXO2-7000ZE
Package: CABGA256
Performance: 1
Loading device for application par from file 'xo2c7000.nph' in environment: C:/lscc/diamond/3.0_x64/ispfpga.
Package Status: Final Version 1.36
Performance Hardware Data Status: Final) Version 23.4
License checked out.
Ignore Preference Error(s): True
Device utilization summary:
PIO (prelim) 174+4(JTAG)/336 53% used
174+4(JTAG)/207 86% bonded
SLICE 29/3432 <1% used
GSR 1/1 100% used
PLL 1/2 50% used
Number of Signals: 182
Number of Connections: 358
Pin Constraint Summary:
174 out of 174 pins locked (100% locked).
The following 1 signal is selected to use the primary clock routing resources:
clk_osc_mhz_14_ipad_c (driver: clk_osc_mhz_14_ipad, clk load #: 2)
No signal is selected as secondary clock.
Signal sys_reset_n_ipad_c is selected as Global Set/Reset.
Starting Placer Phase 0.
Finished Placer Phase 0. REAL time: 2 secs
Starting Placer Phase 1.
....................
Placer score = 45891.
Finished Placer Phase 1. REAL time: 3 secs
Starting Placer Phase 2.
.
Placer score = 45863
Finished Placer Phase 2. REAL time: 3 secs
Clock Report
Global Clock Resources:
CLK_PIN : 1 out of 8 (12%)
PLL : 1 out of 2 (50%)
DCM : 0 out of 2 (0%)
DCC : 0 out of 8 (0%)
Quadrants All (TL, TR, BL, BR) - Global Clocks:
PRIMARY "clk_osc_mhz_14_ipad_c" from comp "clk_osc_mhz_14_ipad" on CLK_PIN site "T7 (PB16A)", clk load = 2
PRIMARY : 1 out of 8 (12%)
SECONDARY: 0 out of 8 (0%)
Edge Clocks:
No edge clock selected.
I/O Usage Summary (final):
174 + 4(JTAG) out of 336 (53.0%) PIO sites used.
174 + 4(JTAG) out of 207 (86.0%) bonded PIO sites used.
Number of PIO comps: 174; differential: 0
Number of Vref pins used: 0
I/O Bank Usage Summary:
+----------+----------------+------------+-----------+
| I/O Bank | Usage | Bank Vccio | Bank Vref |
+----------+----------------+------------+-----------+
| 0 | 35 / 51 ( 68%) | 3.3V | - |
| 1 | 52 / 52 (100%) | 3.3V | - |
| 2 | 42 / 52 ( 80%) | 3.3V | - |
| 3 | 13 / 16 ( 81%) | 3.3V | - |
| 4 | 16 / 16 (100%) | 3.3V | - |
| 5 | 16 / 20 ( 80%) | 3.3V | - |
+----------+----------------+------------+-----------+
Total placer CPU time: 3 secs
Dumping design to file PC104_PC104.dir/5_1.ncd.
0 connections routed; 358 unrouted.
Starting router resource preassignment
WARNING - par: The following clock signals will be routed by using generic routing resource and may suffer from excessive delay and/or skew.
Signal=clk_osc_khz_32_ipad_c loads=2 clock_loads=2
Signal=clk_lpc3141_clock_out_ipad_c loads=3 clock_loads=2
Signal=clk_lpc3141_sysclk_ipad_c loads=4 clock_loads=3
Signal=clk_lpc3141_256fs_ipad_c loads=4 clock_loads=3
Completed router resource preassignment. Real time: 4 secs
Start NBR router at 10:32:33 02/17/14
*****************************************************************
Info: NBR allows conflicts(one node used by more than one signal)
in the earlier iterations. In each iteration, it tries to
solve the conflicts while keeping the critical connections
routed as short as possible. The routing process is said to
be completed when no conflicts exist and all connections
are routed.
Note: NBR uses a different method to calculate timing slacks. The
worst slack and total negative slack may not be the same as
that in TRCE report. You should always run TRCE to verify
your design. Thanks.
*****************************************************************
Start NBR special constraint process at 10:32:33 02/17/14
Start NBR section for maxskew routing
Level 4, iteration 1
0(0.00%) conflict; 322(89.94%) untouched conns; 0 (nbr) score;
Estimated worst slack/total negative slack: 64.972ns/0.000ns; real time: 5 secs
Start NBR section for initial routing
Level 4, iteration 1
2(0.00%) conflicts; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack: 65.206ns/0.000ns; real time: 5 secs
Info: Initial congestion level at 75% usage is 0
Info: Initial congestion area at 75% usage is 0 (0.00%)
Start NBR section for normal routing
Level 4, iteration 1
2(0.00%) conflicts; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack: 65.206ns/0.000ns; real time: 5 secs
Level 4, iteration 2
2(0.00%) conflicts; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack: 65.206ns/0.000ns; real time: 5 secs
Level 4, iteration 3
0(0.00%) conflict; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack: 65.206ns/0.000ns; real time: 5 secs
Start NBR section for re-routing
Level 4, iteration 1
0(0.00%) conflict; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack: 65.206ns/0.000ns; real time: 5 secs
Start NBR section for post-routing
End NBR router with 0 unrouted connection
NBR Summary
-----------
Number of unrouted connections : 0 (0.00%)
Number of connections with timing violations : 0 (0.00%)
Estimated worst slack : 65.206ns
Timing score : 0
-----------
Notes: The timing info is calculated for SETUP only and all PAR_ADJs are ignored.
Hold time optimization iteration 0:
All hold time violations have been successfully corrected in speed grade M
Total CPU time 5 secs
Total REAL time: 6 secs
Completely routed.
End of route. 358 routed (100.00%); 0 unrouted.
Checking DRC ...
No errors found.
Hold time timing score: 0, hold timing errors: 0
Timing score: 0
Dumping design to file PC104_PC104.dir/5_1.ncd.
All signals are completely routed.
PAR_SUMMARY::Run status = completed
PAR_SUMMARY::Number of unrouted conns = 0
PAR_SUMMARY::Worst slack> = 65.206
PAR_SUMMARY::Timing score> = 0.000
PAR_SUMMARY::Worst slack> = 0.856
PAR_SUMMARY::Timing score> = 0.000
Total CPU time to completion: 5 secs
Total REAL time to completion: 6 secs
par done!
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp. All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
Copyright (c) 2001 Agere Systems All rights reserved.
Copyright (c) 2002-2013 Lattice Semiconductor Corporation, All rights reserved.