// Xilinx Verilog netlist produced by netgen application (version G.26)
// Command      : -sdf_path c:\Projects\genosensor\2g\CPLDs\Core\U21\implement\ver0\rev1\time_sim.sdf -sim -ofmt verilog U21.nga c:\Projects\genosensor\2g\CPLDs\Core\U21\implement\ver0\rev1\time_sim.v 
// Input file   : U21.nga
// Output file  : c:/Projects/genosensor/2g/CPLDs/Core/U21/implement/ver0/rev1/time_sim.v
// Design name  : U21.nga
// # of Modules : 1
// Xilinx       : C:/Xilinx
// Device       : XCR3384XL-7-TQ144 (Speed File: Version 6.0)

// This verilog netlist is a simulation model and uses simulation 
// primitives which may not represent the true implementation of the 
// device, however the netlist is functionally correct and should not 
// be modified. This file cannot be synthesized and should only be used 
// with supported simulation tools.

`timescale 1 ns/1 ps

module U21 (
  Brake0, Brake1, DIR0, DIR1, WR, RD, Reset, AS, Mclk, FLS0, FLS1, HSI, MHSO, INTbus, Home033FLG, Home05FLG, Enc033FLG, Enc05FLG, Home133FLG, 
Home15FLG, Enc133FLG, Enc15FLG, RLS0, RLS1, GP_Motor0_0, GP_Motor1_0, SCLreset, SCLinc, LightSense, TXI, PWM1, PWM2, PhaseA_Encoder0, PhaseA_Encoder1
, PhaseB_Encoder0, PhaseB_Encoder1, Home0, Home1, Enc033ctrl, Enc05ctrl, Enc133ctrl, Enc15ctrl, GP_Motor0_1, GP_Motor1_1, HSO, Home033ctrl, Home05ctrl
, Home133ctrl, Home15ctrl, INT, LED1, LED2, LED3, LED4, LED5, MHSI, MTRpwr, MTRpwrn, MTXI, PAH0, PAH1, PAL0, PAL1, PBH0, PBH1, PBL0, PBL1, SCLout, 
TP10, TP11, TP12, SCL, I2CS, AD
);
  input Brake0;
  input Brake1;
  input DIR0;
  input DIR1;
  input WR;
  input RD;
  input Reset;
  input AS;
  input Mclk;
  input FLS0;
  input FLS1;
  input HSI;
  input MHSO;
  input INTbus;
  input Home033FLG;
  input Home05FLG;
  input Enc033FLG;
  input Enc05FLG;
  input Home133FLG;
  input Home15FLG;
  input Enc133FLG;
  input Enc15FLG;
  input RLS0;
  input RLS1;
  input GP_Motor0_0;
  input GP_Motor1_0;
  input SCLreset;
  input SCLinc;
  input LightSense;
  input TXI;
  input PWM1;
  input PWM2;
  input PhaseA_Encoder0;
  input PhaseA_Encoder1;
  input PhaseB_Encoder0;
  input PhaseB_Encoder1;
  input Home0;
  input Home1;
  output Enc033ctrl;
  output Enc05ctrl;
  output Enc133ctrl;
  output Enc15ctrl;
  output GP_Motor0_1;
  output GP_Motor1_1;
  output HSO;
  output Home033ctrl;
  output Home05ctrl;
  output Home133ctrl;
  output Home15ctrl;
  output INT;
  output LED1;
  output LED2;
  output LED3;
  output LED4;
  output LED5;
  output MHSI;
  output MTRpwr;
  output MTRpwrn;
  output MTXI;
  output PAH0;
  output PAH1;
  output PAL0;
  output PAL1;
  output PBH0;
  output PBH1;
  output PBL0;
  output PBL1;
  output SCLout;
  output TP10;
  output TP11;
  output TP12;
  inout SCL;
  input [5 : 0] I2CS;
  inout [7 : 0] AD;
  wire NlwRenamedSig_IO_Brake0;
  wire \Brake0_II/UIM ;
  wire NlwRenamedSig_IO_Brake1;
  wire \Brake1_II/UIM ;
  wire NlwRenamedSig_IO_DIR0;
  wire \DIR0_II/UIM ;
  wire NlwRenamedSig_IO_DIR1;
  wire \DIR1_II/UIM ;
  wire NlwRenamedSig_IO_WR;
  wire \WR_II/UIM ;
  wire NlwRenamedSig_IO_RD;
  wire \RD_II/UIM ;
  wire NlwRenamedSig_IO_Reset;
  wire \Reset_II/UIM ;
  wire \AD<1>_II/UIM ;
  wire \AD<1>_II/IREG ;
  wire \FOOBAR2__ctinst/7 ;
  wire PRLD = glbl.PRLD;
  wire \U4/ctrlr<1>_MC_tsimcreated_prld_ ;
  wire \Mclk_II/FCLK ;
  wire \U4/ctrlr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire Gnd;
  wire \FOOBAR12__ctinst/4 ;
  wire NlwRenamedSig_IO_AS;
  wire \AS_II/UIM ;
  wire U2_ASedge;
  wire \AS_II/IREG ;
  wire \U2_ASedge_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire Vcc;
  wire NlwRenamedSig_IO_Mclk;
  wire \AD<0>_II/UIM ;
  wire \AD<0>_II/IREG ;
  wire \U4/ctrlr<0>_MC_tsimcreated_prld_ ;
  wire \U4/ctrlr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \AD<4>_II/UIM ;
  wire \AD<4>_II/IREG ;
  wire \U4/ctrlr<4>_MC_tsimcreated_prld_ ;
  wire \U4/ctrlr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR10__ctinst/4 ;
  wire \AD<5>_II/UIM ;
  wire \AD<5>_II/IREG ;
  wire \U4/ctrlr<5>_MC_tsimcreated_prld_ ;
  wire \U4/ctrlr<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \AD<6>_II/UIM ;
  wire \AD<6>_II/IREG ;
  wire \U4/ctrlr<6>_MC_tsimcreated_prld_ ;
  wire \U4/ctrlr<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \AD<7>_II/UIM ;
  wire \AD<7>_II/IREG ;
  wire \U4/ctrlr<7>_MC_tsimcreated_prld_ ;
  wire \U4/ctrlr<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR9__ctinst/4 ;
  wire \AD<2>_II/UIM ;
  wire \AD<2>_II/IREG ;
  wire \U4/ctrlr<2>_MC_tsimcreated_prld_ ;
  wire \U4/ctrlr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \AD<3>_II/UIM ;
  wire \AD<3>_II/IREG ;
  wire \U4/ctrlr<3>_MC_tsimcreated_prld_ ;
  wire \U4/ctrlr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_FLS0;
  wire \FLS0_II/UIM ;
  wire NlwRenamedSig_IO_FLS1;
  wire \FLS1_II/UIM ;
  wire NlwRenamedSig_IO_HSI;
  wire \HSI_II/UIM ;
  wire NlwRenamedSig_IO_MHSO;
  wire \MHSO_II/UIM ;
  wire \I2CS<0>_II/UIM ;
  wire \I2CS<1>_II/UIM ;
  wire \I2CS<2>_II/UIM ;
  wire \I2CS<3>_II/UIM ;
  wire \I2CS<4>_II/UIM ;
  wire \I2CS<5>_II/UIM ;
  wire NlwRenamedSig_IO_INTbus;
  wire \INTbus_II/UIM ;
  wire NlwRenamedSig_IO_Home033FLG;
  wire \Home033FLG_II/UIM ;
  wire \Home033FLG_II/IREG ;
  wire \U4/Flgreg<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR21__ctinst/4 ;
  wire NlwRenamedSig_IO_Home05FLG;
  wire \Home05FLG_II/UIM ;
  wire \Home05FLG_II/IREG ;
  wire \U4/Flgreg<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_Enc033FLG;
  wire \Enc033FLG_II/UIM ;
  wire \Enc033FLG_II/IREG ;
  wire \U4/Flgreg<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR24__ctinst/4 ;
  wire NlwRenamedSig_IO_Enc05FLG;
  wire \Enc05FLG_II/UIM ;
  wire \Enc05FLG_II/IREG ;
  wire \U4/Flgreg<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_Home133FLG;
  wire \Home133FLG_II/UIM ;
  wire \Home133FLG_II/IREG ;
  wire \U4/Flgreg<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_Home15FLG;
  wire \Home15FLG_II/UIM ;
  wire \Home15FLG_II/IREG ;
  wire \U4/Flgreg<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_Enc133FLG;
  wire \Enc133FLG_II/UIM ;
  wire \Enc133FLG_II/IREG ;
  wire \U4/Flgreg<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_Enc15FLG;
  wire \Enc15FLG_II/UIM ;
  wire \Enc15FLG_II/IREG ;
  wire \U4/Flgreg<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_RLS0;
  wire \RLS0_II/UIM ;
  wire NlwRenamedSig_IO_RLS1;
  wire \RLS1_II/UIM ;
  wire NlwRenamedSig_IO_GP_Motor0_0;
  wire \GP_Motor0_0_II/UIM ;
  wire \U1/U4/InEdge0r ;
  wire \GP_Motor0_0_II/IREG ;
  wire \U1/U4/InEdge0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_GP_Motor1_0;
  wire \GP_Motor1_0_II/UIM ;
  wire \U1/U4/InEdge1r ;
  wire \GP_Motor1_0_II/IREG ;
  wire \U1/U4/InEdge1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_SCLreset;
  wire \SCLreset_II/UIM ;
  wire \U11_U4/Line_last ;
  wire \SCLreset_II/IREG ;
  wire \U11_U4/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_SCLinc;
  wire \SCLinc_II/UIM ;
  wire \U11_U1/Line_last ;
  wire \SCLinc_II/IREG ;
  wire \U11_U1/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \SCL_II/UIM ;
  wire \U11_U2/Line_last ;
  wire \SCL_II/IREG ;
  wire \U11_U2/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_LightSense;
  wire \LightSense_II/UIM ;
  wire NlwRenamedSig_IO_TXI;
  wire \TXI_II/UIM ;
  wire NlwRenamedSig_IO_PWM1;
  wire \PWM1_II/UIM ;
  wire NlwRenamedSig_IO_PWM2;
  wire \PWM2_II/UIM ;
  wire NlwRenamedSig_IO_PhaseA_Encoder0;
  wire \PhaseA_Encoder0_II/UIM ;
  wire NlwRenamedSig_IO_PhaseA_Encoder1;
  wire \PhaseA_Encoder1_II/UIM ;
  wire NlwRenamedSig_IO_PhaseB_Encoder0;
  wire \PhaseB_Encoder0_II/UIM ;
  wire NlwRenamedSig_IO_PhaseB_Encoder1;
  wire \PhaseB_Encoder1_II/UIM ;
  wire NlwRenamedSig_IO_Home0;
  wire \Home0_II/UIM ;
  wire \U1/U4/HE0stater ;
  wire \Home0_II/IREG ;
  wire \U1/U4/HE0stater_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire NlwRenamedSig_IO_Home1;
  wire \Home1_II/UIM ;
  wire \U1/U4/HE1stater ;
  wire \Home1_II/IREG ;
  wire \U1/U4/HE1stater_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \Enc033ctrl_MC.Q ;
  wire \Enc05ctrl_MC.Q ;
  wire \Enc133ctrl_MC.Q ;
  wire \Enc15ctrl_MC.Q ;
  wire \GP_Motor0_1_MC.Q ;
  wire \GP_Motor1_1_MC.Q ;
  wire \HSO_MC.Q ;
  wire \Home033ctrl_MC.Q ;
  wire \Home05ctrl_MC.Q ;
  wire \Home133ctrl_MC.Q ;
  wire \Home15ctrl_MC.Q ;
  wire \INT_MC.Q ;
  wire \LED1_MC.Q ;
  wire \LED2_MC.Q ;
  wire \LED3_MC.Q ;
  wire \LED4_MC.Q ;
  wire \LED5_MC.Q ;
  wire \MHSI_MC.Q ;
  wire \MTRpwr_MC.Q ;
  wire \MTRpwrn_MC.Q ;
  wire \MTXI_MC.Q ;
  wire \PAH0_MC.Q ;
  wire \PAH1_MC.Q ;
  wire \PAL0_MC.Q ;
  wire \PAL1_MC.Q ;
  wire \PBH0_MC.Q ;
  wire \PBH1_MC.Q ;
  wire \PBL0_MC.Q ;
  wire \PBL1_MC.Q ;
  wire \SCLout_MC.Q ;
  wire \TP10_MC.Q ;
  wire \TP11_MC.Q ;
  wire \TP12_MC.Q ;
  wire \U11_U2/Line_last_MC.Q ;
  wire \U11_U2/Line_last_MC.OE ;
  wire \U4/ctrlr<0>_MC.Q ;
  wire \U4/ctrlr<0>_MC.OE ;
  wire \U4/ctrlr<1>_MC.Q ;
  wire \U4/ctrlr<1>_MC.OE ;
  wire \U4/ctrlr<2>_MC.Q ;
  wire \U4/ctrlr<2>_MC.OE ;
  wire \U4/ctrlr<3>_MC.Q ;
  wire \U4/ctrlr<3>_MC.OE ;
  wire \U4/ctrlr<4>_MC.Q ;
  wire \U4/ctrlr<4>_MC.OE ;
  wire \U4/ctrlr<5>_MC.Q ;
  wire \U4/ctrlr<5>_MC.OE ;
  wire \U4/ctrlr<6>_MC.Q ;
  wire \U4/ctrlr<6>_MC.OE ;
  wire \U4/ctrlr<7>_MC.Q ;
  wire \U4/ctrlr<7>_MC.OE ;
  wire \Enc033ctrl_MC.Q_tsimrenamed_net_ ;
  wire \Enc033ctrl_MC.D ;
  wire \Enc033ctrl_MC.D1 ;
  wire \Enc033ctrl_MC.D2 ;
  wire \U4/ctrlr<2>_MC.D ;
  wire \U4/ctrlr<2>_MC.BUFOE.OUT ;
  wire \FOOBAR1__ctinst/7 ;
  wire \U4/ctrlr<2>_MC.D1 ;
  wire \U4/ctrlr<2>_MC.D2 ;
  wire DCORI2CCNTr;
  wire \outDATA<2>\$WA0.UIM ;
  wire \U4/ctrlr<2>_MC.D2_PT_0 ;
  wire DCORCONFIGr;
  wire \outDATA<2>\$WA1.UIM ;
  wire \U4/ctrlr<2>_MC.D2_PT_1 ;
  wire DCORLIMITSr;
  wire \outDATA<2>\$WA2.UIM ;
  wire \U4/ctrlr<2>_MC.D2_PT_2 ;
  wire DCORENCPWRr;
  wire \outDATA<2>\$WA3.UIM ;
  wire \U4/ctrlr<2>_MC.D2_PT_3 ;
  wire N_PZ_1110;
  wire \outDATA<2>\$WA4.UIM ;
  wire \U4/ctrlr<2>_MC.D2_PT_4 ;
  wire N_PZ_1111;
  wire \outDATA<2>\$WA5.UIM ;
  wire \U4/ctrlr<2>_MC.D2_PT_5 ;
  wire \DCORENCPWRw_MC.Q ;
  wire DCORENCPWRw;
  wire \DCORENCPWRw_MC.D ;
  wire \DCORENCPWRw_MC.D1 ;
  wire \DCORENCPWRw_MC.D2 ;
  wire \U2_ADDR_reg<1>_MC.Q ;
  wire \U2_ADDR_reg<1>_MC.D ;
  wire \U2_ADDR_reg<1>_MC_tsimcreated_xor_ ;
  wire \U2_ADDR_reg<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U2_ADDR_reg<1>_MC.D1 ;
  wire \U2_ADDR_reg<1>_MC.D2 ;
  wire \U2_ADDR_reg<1>_MC.D2_PT_0 ;
  wire N15302;
  wire \U2_ADDR_reg<1>_MC.D2_PT_1 ;
  wire \U2_ADDR_reg<1>_MC.D2_PT_2 ;
  wire U2_AutoInc;
  wire U2_WRRDedge;
  wire N_PZ_1082;
  wire \U2_ADDR_reg<1>_MC.D2_PT_3 ;
  wire \N15302_MC.Q ;
  wire \N15302_MC.D ;
  wire \N15302_MC.D1 ;
  wire \N15302_MC.D2 ;
  wire \U2_ADDR_reg<0>_MC.Q ;
  wire \U2_ADDR_reg<0>_MC.D ;
  wire \U2_ADDR_reg<0>_MC_tsimcreated_xor_ ;
  wire \U2_ADDR_reg<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U2_ADDR_reg<0>_MC.D1 ;
  wire \U2_ADDR_reg<0>_MC.D2 ;
  wire \U2_ADDR_reg<0>_MC.D2_PT_0 ;
  wire \U2_ADDR_reg<0>_MC.D2_PT_1 ;
  wire \U2_ADDR_reg<0>_MC.D2_PT_2 ;
  wire \U2_ADDR_reg<0>_MC.D2_PT_3 ;
  wire \U2_ADDR_reg<4>_MC.Q ;
  wire \U2_ADDR_reg<4>_MC.D ;
  wire \U2_ADDR_reg<4>_MC_tsimcreated_xor_ ;
  wire \U2_ADDR_reg<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U2_ADDR_reg<4>_MC.D1 ;
  wire \U2_ADDR_reg<4>_MC.D2 ;
  wire \U2_ADDR_reg<4>_MC.D2_PT_0 ;
  wire \U2_ADDR_reg<4>_MC.D2_PT_1 ;
  wire \U2_ADDR_reg<4>_MC.D2_PT_2 ;
  wire \U2_ADDR_reg<5>_MC.Q ;
  wire \U2_ADDR_reg<5>_MC.D ;
  wire \U2_ADDR_reg<5>_MC_tsimcreated_xor_ ;
  wire \U2_ADDR_reg<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U2_ADDR_reg<5>_MC.D1 ;
  wire \U2_ADDR_reg<5>_MC.D2 ;
  wire \U2_ADDR_reg<5>_MC.D2_PT_0 ;
  wire \U2_ADDR_reg<5>_MC.D2_PT_1 ;
  wire \U2_ADDR_reg<5>_MC.D2_PT_2 ;
  wire \U2_ADDR_reg<6>_MC.Q ;
  wire \U2_ADDR_reg<6>_MC.D ;
  wire \U2_ADDR_reg<6>_MC_tsimcreated_xor_ ;
  wire \U2_ADDR_reg<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U2_ADDR_reg<6>_MC.D1 ;
  wire \U2_ADDR_reg<6>_MC.D2 ;
  wire \U2_ADDR_reg<6>_MC.D2_PT_0 ;
  wire \U2_ADDR_reg<6>_MC.D2_PT_1 ;
  wire \U2_ADDR_reg<6>_MC.D2_PT_2 ;
  wire \U2_ADDR_reg<7>_MC.Q ;
  wire \U2_ADDR_reg<7>_MC.D ;
  wire \U2_ADDR_reg<7>_MC_tsimcreated_xor_ ;
  wire \U2_ADDR_reg<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U2_ADDR_reg<7>_MC.D1 ;
  wire \U2_ADDR_reg<7>_MC.D2 ;
  wire \U2_ADDR_reg<7>_MC.D2_PT_0 ;
  wire \U2_ADDR_reg<7>_MC.D2_PT_1 ;
  wire \U2_ADDR_reg<7>_MC.D2_PT_2 ;
  wire \U2_AutoInc_MC.Q ;
  wire \U2_AutoInc_MC.D ;
  wire \U2_AutoInc_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR11__ctinst/4 ;
  wire \U2_AutoInc_MC.D1 ;
  wire \U2_AutoInc_MC.D2 ;
  wire \U2_WRRDedge_MC.Q ;
  wire \U2_WRRDedge_MC.D ;
  wire \U2_WRRDedge_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U2_WRRDedge_MC.D1 ;
  wire \U2_WRRDedge_MC.D2 ;
  wire \N_PZ_1082_MC.Q ;
  wire \N_PZ_1082_MC.D ;
  wire \N_PZ_1082_MC.D1 ;
  wire \N_PZ_1082_MC.D2 ;
  wire \N_PZ_1082_MC.D2_PT_0 ;
  wire \N_PZ_1082_MC.D2_PT_1 ;
  wire \U2_ADDR_reg<2>_MC.Q ;
  wire \U2_ADDR_reg<2>_MC.D ;
  wire \U2_ADDR_reg<2>_MC_tsimcreated_xor_ ;
  wire \U2_ADDR_reg<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U2_ADDR_reg<2>_MC.D1 ;
  wire \U2_ADDR_reg<2>_MC.D2 ;
  wire \U2_ADDR_reg<2>_MC.D2_PT_0 ;
  wire \U2_ADDR_reg<2>_MC.D2_PT_1 ;
  wire \U2_ADDR_reg<2>_MC.D2_PT_2 ;
  wire \U2_ADDR_reg<2>_MC.D2_PT_3 ;
  wire \U2_ADDR_reg<3>_MC.Q ;
  wire \U2_ADDR_reg<3>_MC.D ;
  wire \U2_ADDR_reg<3>_MC_tsimcreated_xor_ ;
  wire \U2_ADDR_reg<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U2_ADDR_reg<3>_MC.D1 ;
  wire \U2_ADDR_reg<3>_MC.D2 ;
  wire \U2_ADDR_reg<3>_MC.D2_PT_0 ;
  wire \U2_ADDR_reg<3>_MC.D2_PT_1 ;
  wire \U2_ADDR_reg<3>_MC.D2_PT_2 ;
  wire \U2_ADDR_reg<3>_MC.D2_PT_3 ;
  wire \U2_Enable_AD_MC.Q ;
  wire U2_Enable_AD;
  wire \U2_Enable_AD_MC.D ;
  wire \U2_Enable_AD_MC.D1 ;
  wire \U2_Enable_AD_MC.D2 ;
  wire \U4/ctrlr<3>_MC.D ;
  wire \U4/ctrlr<3>_MC.BUFOE.OUT ;
  wire \U4/ctrlr<3>_MC.D1 ;
  wire \U4/ctrlr<3>_MC.D2 ;
  wire \outDATA<3>\$WA0.UIM ;
  wire \U4/ctrlr<3>_MC.D2_PT_0 ;
  wire \outDATA<3>\$WA1.UIM ;
  wire \U4/ctrlr<3>_MC.D2_PT_1 ;
  wire \outDATA<3>\$WA2.UIM ;
  wire \U4/ctrlr<3>_MC.D2_PT_2 ;
  wire \outDATA<3>\$WA3.UIM ;
  wire \U4/ctrlr<3>_MC.D2_PT_3 ;
  wire \outDATA<3>\$WA4.UIM ;
  wire \U4/ctrlr<3>_MC.D2_PT_4 ;
  wire \outDATA<3>\$WA5.UIM ;
  wire \U4/ctrlr<3>_MC.D2_PT_5 ;
  wire \Enc05ctrl_MC.Q_tsimrenamed_net_ ;
  wire \Enc05ctrl_MC.D ;
  wire \Enc05ctrl_MC.D1 ;
  wire \Enc05ctrl_MC.D2 ;
  wire \Enc133ctrl_MC.Q_tsimrenamed_net_ ;
  wire \Enc133ctrl_MC.D ;
  wire \Enc133ctrl_MC.D1 ;
  wire \Enc133ctrl_MC.D2 ;
  wire \U4/ctrlr<6>_MC.D ;
  wire \U4/ctrlr<6>_MC.BUFOE.OUT ;
  wire \U4/ctrlr<6>_MC.D1 ;
  wire \U4/ctrlr<6>_MC.D2 ;
  wire \outDATA<6>\$WA0.UIM ;
  wire \U4/ctrlr<6>_MC.D2_PT_0 ;
  wire \outDATA<6>\$WA1.UIM ;
  wire \U4/ctrlr<6>_MC.D2_PT_1 ;
  wire \outDATA<6>\$WA2.UIM ;
  wire \U4/ctrlr<6>_MC.D2_PT_2 ;
  wire \outDATA<6>\$WA3.UIM ;
  wire \U4/ctrlr<6>_MC.D2_PT_3 ;
  wire \outDATA<6>\$WA4.UIM ;
  wire \U4/ctrlr<6>_MC.D2_PT_4 ;
  wire \outDATA<6>\$WA5.UIM ;
  wire \U4/ctrlr<6>_MC.D2_PT_5 ;
  wire \U4/ctrlr<7>_MC.D ;
  wire \U4/ctrlr<7>_MC.BUFOE.OUT ;
  wire \U4/ctrlr<7>_MC.D1 ;
  wire \U4/ctrlr<7>_MC.D2 ;
  wire \outDATA<7>\$WA0.UIM ;
  wire \U4/ctrlr<7>_MC.D2_PT_0 ;
  wire \outDATA<7>\$WA1.UIM ;
  wire \U4/ctrlr<7>_MC.D2_PT_1 ;
  wire \outDATA<7>\$WA2.UIM ;
  wire \U4/ctrlr<7>_MC.D2_PT_2 ;
  wire \outDATA<7>\$WA3.UIM ;
  wire \U4/ctrlr<7>_MC.D2_PT_3 ;
  wire \outDATA<7>\$WA4.UIM ;
  wire \U4/ctrlr<7>_MC.D2_PT_4 ;
  wire \outDATA<7>\$WA5.UIM ;
  wire \U4/ctrlr<7>_MC.D2_PT_5 ;
  wire \Enc15ctrl_MC.Q_tsimrenamed_net_ ;
  wire \Enc15ctrl_MC.D ;
  wire \Enc15ctrl_MC.D1 ;
  wire \Enc15ctrl_MC.D2 ;
  wire \GP_Motor0_1_MC.Q_tsimrenamed_net_ ;
  wire GP_Motor0_1_MC_tsimcreated_prld_;
  wire \GP_Motor0_1_MC.D ;
  wire \GP_Motor0_1_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR8__ctinst/4 ;
  wire \GP_Motor0_1_MC.D1 ;
  wire \GP_Motor0_1_MC.D2 ;
  wire \DCOROUTw_MC.Q ;
  wire DCOROUTw;
  wire \DCOROUTw_MC.D ;
  wire \DCOROUTw_MC.D1 ;
  wire \DCOROUTw_MC.D2 ;
  wire \GP_Motor1_1_MC.Q_tsimrenamed_net_ ;
  wire GP_Motor1_1_MC_tsimcreated_prld_;
  wire \GP_Motor1_1_MC.D ;
  wire \GP_Motor1_1_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR15__ctinst/4 ;
  wire \GP_Motor1_1_MC.D1 ;
  wire \GP_Motor1_1_MC.D2 ;
  wire \HSO_MC.Q_tsimrenamed_net_ ;
  wire \HSO_MC.D ;
  wire \HSO_MC.D1 ;
  wire \HSO_MC.D2 ;
  wire \Home033ctrl_MC.Q_tsimrenamed_net_ ;
  wire \Home033ctrl_MC.D ;
  wire \Home033ctrl_MC.D1 ;
  wire \Home033ctrl_MC.D2 ;
  wire \U4/ctrlr<0>_MC.D ;
  wire \U4/ctrlr<0>_MC.BUFOE.OUT ;
  wire \U4/ctrlr<0>_MC.D1 ;
  wire \U4/ctrlr<0>_MC.D2 ;
  wire \outDATA<0>\$WA0.UIM ;
  wire \U4/ctrlr<0>_MC.D2_PT_0 ;
  wire \outDATA<0>\$WA1.UIM ;
  wire \U4/ctrlr<0>_MC.D2_PT_1 ;
  wire \outDATA<0>\$WA2.UIM ;
  wire \U4/ctrlr<0>_MC.D2_PT_2 ;
  wire \outDATA<0>\$WA3.UIM ;
  wire \U4/ctrlr<0>_MC.D2_PT_3 ;
  wire \outDATA<0>\$WA4.UIM ;
  wire \U4/ctrlr<0>_MC.D2_PT_4 ;
  wire \outDATA<0>\$WA5.UIM ;
  wire \U4/ctrlr<0>_MC.D2_PT_5 ;
  wire \U4/ctrlr<1>_MC.D ;
  wire \U4/ctrlr<1>_MC.BUFOE.OUT ;
  wire \U4/ctrlr<1>_MC.D1 ;
  wire \U4/ctrlr<1>_MC.D2 ;
  wire \outDATA<1>\$WA0.UIM ;
  wire \U4/ctrlr<1>_MC.D2_PT_0 ;
  wire \outDATA<1>\$WA1.UIM ;
  wire \U4/ctrlr<1>_MC.D2_PT_1 ;
  wire \outDATA<1>\$WA2.UIM ;
  wire \U4/ctrlr<1>_MC.D2_PT_2 ;
  wire \outDATA<1>\$WA3.UIM ;
  wire \U4/ctrlr<1>_MC.D2_PT_3 ;
  wire \outDATA<1>\$WA4.UIM ;
  wire \U4/ctrlr<1>_MC.D2_PT_4 ;
  wire \outDATA<1>\$WA5.UIM ;
  wire \U4/ctrlr<1>_MC.D2_PT_5 ;
  wire DCORIFGr;
  wire \U4/ctrlr<1>_MC.D2_PT_6 ;
  wire \Home05ctrl_MC.Q_tsimrenamed_net_ ;
  wire \Home05ctrl_MC.D ;
  wire \Home05ctrl_MC.D1 ;
  wire \Home05ctrl_MC.D2 ;
  wire \Home133ctrl_MC.Q_tsimrenamed_net_ ;
  wire \Home133ctrl_MC.D ;
  wire \Home133ctrl_MC.D1 ;
  wire \Home133ctrl_MC.D2 ;
  wire \U4/ctrlr<4>_MC.D ;
  wire \U4/ctrlr<4>_MC.BUFOE.OUT ;
  wire \U4/ctrlr<4>_MC.D1 ;
  wire \U4/ctrlr<4>_MC.D2 ;
  wire \outDATA<4>\$WA0.UIM ;
  wire \U4/ctrlr<4>_MC.D2_PT_0 ;
  wire \outDATA<4>\$WA1.UIM ;
  wire \U4/ctrlr<4>_MC.D2_PT_1 ;
  wire \outDATA<4>\$WA2.UIM ;
  wire \U4/ctrlr<4>_MC.D2_PT_2 ;
  wire \outDATA<4>\$WA3.UIM ;
  wire \U4/ctrlr<4>_MC.D2_PT_3 ;
  wire \outDATA<4>\$WA4.UIM ;
  wire \U4/ctrlr<4>_MC.D2_PT_4 ;
  wire \outDATA<4>\$WA5.UIM ;
  wire \U4/ctrlr<4>_MC.D2_PT_5 ;
  wire \U4/ctrlr<5>_MC.D ;
  wire \U4/ctrlr<5>_MC.BUFOE.OUT ;
  wire \U4/ctrlr<5>_MC.D1 ;
  wire \U4/ctrlr<5>_MC.D2 ;
  wire \outDATA<5>\$WA0.UIM ;
  wire \U4/ctrlr<5>_MC.D2_PT_0 ;
  wire \outDATA<5>\$WA1.UIM ;
  wire \U4/ctrlr<5>_MC.D2_PT_1 ;
  wire \outDATA<5>\$WA2.UIM ;
  wire \U4/ctrlr<5>_MC.D2_PT_2 ;
  wire \outDATA<5>\$WA3.UIM ;
  wire \U4/ctrlr<5>_MC.D2_PT_3 ;
  wire \outDATA<5>\$WA4.UIM ;
  wire \U4/ctrlr<5>_MC.D2_PT_4 ;
  wire \outDATA<5>\$WA5.UIM ;
  wire \U4/ctrlr<5>_MC.D2_PT_5 ;
  wire \Home15ctrl_MC.Q_tsimrenamed_net_ ;
  wire \Home15ctrl_MC.D ;
  wire \Home15ctrl_MC.D1 ;
  wire \Home15ctrl_MC.D2 ;
  wire \INT_MC.Q_tsimrenamed_net_ ;
  wire \INT_MC.D ;
  wire \INT_MC.D1 ;
  wire \INT_MC.D2 ;
  wire \INT_MC.D2_PT_0 ;
  wire NET2528;
  wire \INT_MC.D2_PT_1 ;
  wire NET2482;
  wire \INT_MC.D2_PT_2 ;
  wire NET2493;
  wire \INT_MC.D2_PT_3 ;
  wire NET2575;
  wire \INT_MC.D2_PT_4 ;
  wire NET2501;
  wire \INT_MC.D2_PT_5 ;
  wire NET2512;
  wire \INT_MC.D2_PT_6 ;
  wire \INT_MC.D2_PT_7 ;
  wire \U3/DCORIE<0>_MC.Q ;
  wire \U3/DCORIE<0>_MC.D ;
  wire \U3/DCORIE<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U3/DCORIE<0>_MC.D1 ;
  wire \U3/DCORIE<0>_MC.D2 ;
  wire DCORIEw;
  wire \U3/DCORIE<0>_MC.D2_PT_0 ;
  wire \U3/DCORIE<0>_MC.D2_PT_1 ;
  wire \DCORIEw_MC.Q ;
  wire \DCORIEw_MC.D ;
  wire \DCORIEw_MC.D1 ;
  wire \DCORIEw_MC.D2 ;
  wire \NET2528_MC.Q ;
  wire \NET2528_MC.D ;
  wire \NET2528_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \NET2528_MC.D1 ;
  wire \NET2528_MC.D2 ;
  wire DCORIFGw;
  wire \NET2528_MC.D2_PT_0 ;
  wire \NET2528_MC.D2_PT_1 ;
  wire \U4/orFLGs ;
  wire \NET2528_MC.D2_PT_2 ;
  wire \DCORIFGw_MC.Q ;
  wire \DCORIFGw_MC.D ;
  wire \DCORIFGw_MC.D1 ;
  wire \DCORIFGw_MC.D2 ;
  wire \U4/orFLGs_MC.Q ;
  wire \U4/orFLGs_MC.D ;
  wire \U4/orFLGs_MC.D1 ;
  wire \U4/orFLGs_MC.D2 ;
  wire \U3/DCORIE<1>_MC.Q ;
  wire \U3/DCORIE<1>_MC.D ;
  wire \U3/DCORIE<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U3/DCORIE<1>_MC.D1 ;
  wire \U3/DCORIE<1>_MC.D2 ;
  wire \U3/DCORIE<1>_MC.D2_PT_0 ;
  wire \U3/DCORIE<1>_MC.D2_PT_1 ;
  wire \NET2482_MC.Q ;
  wire \NET2482_MC.D ;
  wire NET2482_MC_tsimcreated_xor_;
  wire \NET2482_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \NET2482_MC.D1 ;
  wire \NET2482_MC.D2 ;
  wire DCORENCCTLw;
  wire \NET2482_MC.D2_PT_0 ;
  wire \NET2482_MC.D2_PT_1 ;
  wire \U1/U4/RF0r ;
  wire \U1/U4/HE0statelastr ;
  wire \NET2482_MC.D2_PT_2 ;
  wire \NET2482_MC.D2_PT_3 ;
  wire \DCORENCCTLw_MC.Q ;
  wire \DCORENCCTLw_MC.D ;
  wire \DCORENCCTLw_MC.D1 ;
  wire \DCORENCCTLw_MC.D2 ;
  wire \U1/U4/RF0r_MC.Q ;
  wire \U1/U4/RF0r_MC.D ;
  wire \U1/U4/RF0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/RF0r_MC.D1 ;
  wire \U1/U4/RF0r_MC.D2 ;
  wire \U1/U4/RF0r_MC.D2_PT_0 ;
  wire \U1/U4/RF0r_MC.D2_PT_1 ;
  wire \U1/U4/HE0statelastr_MC.Q ;
  wire \U1/U4/HE0statelastr_MC.D ;
  wire \U1/U4/HE0statelastr_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/HE0statelastr_MC.D1 ;
  wire \U1/U4/HE0statelastr_MC.D2 ;
  wire \U3/DCORIE<2>_MC.Q ;
  wire \U3/DCORIE<2>_MC.D ;
  wire \U3/DCORIE<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U3/DCORIE<2>_MC.D1 ;
  wire \U3/DCORIE<2>_MC.D2 ;
  wire \U3/DCORIE<2>_MC.D2_PT_0 ;
  wire \U3/DCORIE<2>_MC.D2_PT_1 ;
  wire \NET2493_MC.Q ;
  wire \NET2493_MC.D ;
  wire NET2493_MC_tsimcreated_xor_;
  wire \NET2493_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \NET2493_MC.D1 ;
  wire \NET2493_MC.D2 ;
  wire \NET2493_MC.D2_PT_0 ;
  wire \NET2493_MC.D2_PT_1 ;
  wire \U1/U4/RF1r ;
  wire \U1/U4/E1r ;
  wire \U1/U4/HE1statelastr ;
  wire \NET2493_MC.D2_PT_2 ;
  wire \NET2493_MC.D2_PT_3 ;
  wire \U1/U4/RF1r_MC.Q ;
  wire \U1/U4/RF1r_MC.D ;
  wire \U1/U4/RF1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/RF1r_MC.D1 ;
  wire \U1/U4/RF1r_MC.D2 ;
  wire \U1/U4/RF1r_MC.D2_PT_0 ;
  wire \U1/U4/RF1r_MC.D2_PT_1 ;
  wire \U1/U4/E1r_MC.Q ;
  wire \U1/U4/E1r_MC.D ;
  wire \U1/U4/E1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/E1r_MC.D1 ;
  wire \U1/U4/E1r_MC.D2 ;
  wire \U1/U4/E1r_MC.D2_PT_0 ;
  wire \U1/U4/E1r_MC.D2_PT_1 ;
  wire \U1/U4/HE1statelastr_MC.Q ;
  wire \U1/U4/HE1statelastr_MC.D ;
  wire \U1/U4/HE1statelastr_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/HE1statelastr_MC.D1 ;
  wire \U1/U4/HE1statelastr_MC.D2 ;
  wire \U3/DCORIE<3>_MC.Q ;
  wire \U3/DCORIE<3>_MC.D ;
  wire \U3/DCORIE<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U3/DCORIE<3>_MC.D1 ;
  wire \U3/DCORIE<3>_MC.D2 ;
  wire \U3/DCORIE<3>_MC.D2_PT_0 ;
  wire \U3/DCORIE<3>_MC.D2_PT_1 ;
  wire \NET2575_MC.Q ;
  wire \NET2575_MC.D ;
  wire \NET2575_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \NET2575_MC.D1 ;
  wire \NET2575_MC.D2 ;
  wire \NET2575_MC.D2_PT_0 ;
  wire \NET2575_MC.D2_PT_1 ;
  wire \NET2575_MC.D2_PT_2 ;
  wire \NET2575_MC.D2_PT_3 ;
  wire \NET2575_MC.D2_PT_4 ;
  wire \NET2575_MC.D2_PT_5 ;
  wire \U3/DCORIE<4>_MC.Q ;
  wire \U3/DCORIE<4>_MC.D ;
  wire \U3/DCORIE<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U3/DCORIE<4>_MC.D1 ;
  wire \U3/DCORIE<4>_MC.D2 ;
  wire \U3/DCORIE<4>_MC.D2_PT_0 ;
  wire \U3/DCORIE<4>_MC.D2_PT_1 ;
  wire \NET2501_MC.Q ;
  wire \NET2501_MC.D ;
  wire NET2501_MC_tsimcreated_xor_;
  wire \NET2501_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \NET2501_MC.D1 ;
  wire \NET2501_MC.D2 ;
  wire N_PZ_1113;
  wire \NET2501_MC.D2_PT_0 ;
  wire \NET2501_MC.D2_PT_1 ;
  wire \NET2501_MC.D2_PT_2 ;
  wire \N_PZ_1113_MC.Q ;
  wire \N_PZ_1113_MC.D ;
  wire \N_PZ_1113_MC.D1 ;
  wire \N_PZ_1113_MC.D2 ;
  wire \U1/U4/LatchEdge0r ;
  wire \N_PZ_1113_MC.D2_PT_0 ;
  wire \N_PZ_1113_MC.D2_PT_1 ;
  wire \U1/U4/LatchEdge0r_MC.Q ;
  wire \U1/U4/LatchEdge0r_MC.D ;
  wire \U1/U4/LatchEdge0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/LatchEdge0r_MC.D1 ;
  wire \U1/U4/LatchEdge0r_MC.D2 ;
  wire \U1/U4/LatchEdge0r_MC.D2_PT_0 ;
  wire \U1/U4/LatchEdge0r_MC.D2_PT_1 ;
  wire \outDATA<6>\$WA1.UIM_MC.Q ;
  wire \outDATA<6>\$WA1.UIM_MC.D ;
  wire \outDATA<6>\$WA1.UIM_MC.D1 ;
  wire \outDATA<6>\$WA1.UIM_MC.D2 ;
  wire \U3/DCORIE<5>_MC.Q ;
  wire \U3/DCORIE<5>_MC.D ;
  wire \U3/DCORIE<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U3/DCORIE<5>_MC.D1 ;
  wire \U3/DCORIE<5>_MC.D2 ;
  wire \U3/DCORIE<5>_MC.D2_PT_0 ;
  wire \U3/DCORIE<5>_MC.D2_PT_1 ;
  wire \NET2512_MC.Q ;
  wire \NET2512_MC.D ;
  wire NET2512_MC_tsimcreated_xor_;
  wire \NET2512_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \NET2512_MC.D1 ;
  wire \NET2512_MC.D2 ;
  wire \NET2512_MC.D2_PT_0 ;
  wire \NET2512_MC.D2_PT_1 ;
  wire \U1/U4/LatchEdge1r ;
  wire \NET2512_MC.D2_PT_2 ;
  wire \NET2512_MC.D2_PT_3 ;
  wire \U1/U4/LatchEdge1r_MC.Q ;
  wire \U1/U4/LatchEdge1r_MC.D ;
  wire \U1/U4/LatchEdge1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/LatchEdge1r_MC.D1 ;
  wire \U1/U4/LatchEdge1r_MC.D2 ;
  wire \U1/U4/LatchEdge1r_MC.D2_PT_0 ;
  wire \U1/U4/LatchEdge1r_MC.D2_PT_1 ;
  wire \U3/DCORIE<6>_MC.Q ;
  wire \U3/DCORIE<6>_MC.D ;
  wire \U3/DCORIE<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U3/DCORIE<6>_MC.D1 ;
  wire \U3/DCORIE<6>_MC.D2 ;
  wire \U3/DCORIE<6>_MC.D2_PT_0 ;
  wire \U3/DCORIE<6>_MC.D2_PT_1 ;
  wire \U3/DCORIE<7>_MC.Q ;
  wire \U3/DCORIE<7>_MC.D ;
  wire \U3/DCORIE<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U3/DCORIE<7>_MC.D1 ;
  wire \U3/DCORIE<7>_MC.D2 ;
  wire \U3/DCORIE<7>_MC.D2_PT_0 ;
  wire \U3/DCORIE<7>_MC.D2_PT_1 ;
  wire \U11_U3_counterr<3>_MC.Q ;
  wire \U11_U3_counterr<3>_MC.D ;
  wire \U11_U3_counterr<3>_MC_tsimcreated_xor_ ;
  wire \U11_U3_counterr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U11_U3_counterr<3>_MC.D1 ;
  wire \U11_U3_counterr<3>_MC.D2 ;
  wire \U11_U3_counterr<3>_MC.D2_PT_0 ;
  wire N_PZ_1389;
  wire \U11_U3_counterr<3>_MC.D2_PT_1 ;
  wire U11_Incdetect;
  wire \U11_U3_counterr<3>_MC.D2_PT_2 ;
  wire \U11_U3_counterr<3>_MC.D2_PT_3 ;
  wire \U11_U3_counterr<3>_MC.D2_PT_4 ;
  wire U11_SCLdetect;
  wire \U11_U3_counterr<3>_MC.D2_PT_5 ;
  wire \U11_U3_counterr<3>_MC.D2_PT_6 ;
  wire N_PZ_1332;
  wire \U11_U3_counterr<3>_MC.D2_PT_7 ;
  wire \N_PZ_1389_MC.Q ;
  wire \N_PZ_1389_MC.D ;
  wire \N_PZ_1389_MC.D1 ;
  wire \N_PZ_1389_MC.D2 ;
  wire \N_PZ_1389_MC.D2_PT_0 ;
  wire U11_ResetDetect;
  wire \N_PZ_1389_MC.D2_PT_1 ;
  wire \U11_Incdetect_MC.Q ;
  wire \U11_Incdetect_MC.D ;
  wire \U11_Incdetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U11_Incdetect_MC.D1 ;
  wire \U11_Incdetect_MC.D2 ;
  wire \U11_ResetDetect_MC.Q ;
  wire \U11_ResetDetect_MC.D ;
  wire \U11_ResetDetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U11_ResetDetect_MC.D1 ;
  wire \U11_ResetDetect_MC.D2 ;
  wire \U11_U3_counterr<0>_MC.Q ;
  wire \U11_U3_counterr<0>_MC.D ;
  wire \U11_U3_counterr<0>_MC_tsimcreated_xor_ ;
  wire \U11_U3_counterr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U11_U3_counterr<0>_MC.D1 ;
  wire \U11_U3_counterr<0>_MC.D2 ;
  wire \U11_U3_counterr<0>_MC.D2_PT_0 ;
  wire \U11_U3_counterr<0>_MC.D2_PT_1 ;
  wire \U11_U3_counterr<0>_MC.D2_PT_2 ;
  wire \U11_U3_counterr<0>_MC.D2_PT_3 ;
  wire \U11_U3_counterr<0>_MC.D2_PT_4 ;
  wire \U11_U3_counterr<0>_MC.D2_PT_5 ;
  wire \U11_SCLdetect_MC.Q ;
  wire \U11_SCLdetect_MC.D ;
  wire \U11_SCLdetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U11_SCLdetect_MC.D1 ;
  wire \U11_SCLdetect_MC.D2 ;
  wire \U11_U2/Line_last_MC.D ;
  wire \U11_U2/Line_last_MC.BUFOE.OUT ;
  wire \FOOBAR4__ctinst/0 ;
  wire \U11_U2/Line_last_MC.D1 ;
  wire \U11_U2/Line_last_MC.D2 ;
  wire \U11_U3_counterr<4>_MC.Q ;
  wire \U11_U3_counterr<4>_MC.D ;
  wire \U11_U3_counterr<4>_MC_tsimcreated_xor_ ;
  wire \U11_U3_counterr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U11_U3_counterr<4>_MC.D1 ;
  wire \U11_U3_counterr<4>_MC.D2 ;
  wire \U11_U3_counterr<4>_MC.D2_PT_0 ;
  wire \U11_U3_counterr<4>_MC.D2_PT_1 ;
  wire \U11_U3_counterr<4>_MC.D2_PT_2 ;
  wire \U11_U3_counterr<4>_MC.D2_PT_3 ;
  wire \U11_U3_counterr<1>_MC.Q ;
  wire \U11_U3_counterr<1>_MC.D ;
  wire \U11_U3_counterr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U11_U3_counterr<1>_MC.D1 ;
  wire \U11_U3_counterr<1>_MC.D2 ;
  wire \U11_U3_counterr<1>_MC.D2_PT_0 ;
  wire \U11_U3_counterr<1>_MC.D2_PT_1 ;
  wire \U11_U3_counterr<1>_MC.D2_PT_2 ;
  wire \U11_U3_counterr<1>_MC.D2_PT_3 ;
  wire \U11_U3_counterr<1>_MC.D2_PT_4 ;
  wire \U11_U3_counterr<1>_MC.D2_PT_5 ;
  wire \U11_U3_counterr<1>_MC.D2_PT_6 ;
  wire \U11_U3_counterr<1>_MC.D2_PT_7 ;
  wire \U11_U3_counterr<2>_MC.Q ;
  wire \U11_U3_counterr<2>_MC.D ;
  wire \U11_U3_counterr<2>_MC_tsimcreated_xor_ ;
  wire \U11_U3_counterr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U11_U3_counterr<2>_MC.D1 ;
  wire \U11_U3_counterr<2>_MC.D2 ;
  wire \U11_U3_counterr<2>_MC.D2_PT_0 ;
  wire \U11_U3_counterr<2>_MC.D2_PT_1 ;
  wire \U11_U3_counterr<2>_MC.D2_PT_2 ;
  wire \U11_U3_counterr<2>_MC.D2_PT_3 ;
  wire \U11_U3_counterr<2>_MC.D2_PT_4 ;
  wire \U11_U3_counterr<2>_MC.D2_PT_5 ;
  wire \U11_U3_counterr<5>_MC.Q ;
  wire \U11_U3_counterr<5>_MC.D ;
  wire \U11_U3_counterr<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U11_U3_counterr<5>_MC.D1 ;
  wire \U11_U3_counterr<5>_MC.D2 ;
  wire \U11_U3_counterr<5>_MC.D2_PT_0 ;
  wire \U11_U3_counterr<5>_MC.D2_PT_1 ;
  wire \U11_U3_counterr<5>_MC.D2_PT_2 ;
  wire \N_PZ_1332_MC.Q ;
  wire \N_PZ_1332_MC.D ;
  wire \N_PZ_1332_MC.D1 ;
  wire \N_PZ_1332_MC.D2 ;
  wire \N_PZ_1332_MC.D2_PT_0 ;
  wire \N_PZ_1332_MC.D2_PT_1 ;
  wire \LED1_MC.Q_tsimrenamed_net_ ;
  wire \LED1_MC.D ;
  wire \LED1_MC.D1 ;
  wire \LED1_MC.D2 ;
  wire \U9/MISCr<0>_MC.Q ;
  wire \U9/MISCr<0>_MC_tsimcreated_prld_ ;
  wire \U9/MISCr<0>_MC.D ;
  wire \U9/MISCr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR1__ctinst/4 ;
  wire \U9/MISCr<0>_MC.D1 ;
  wire \U9/MISCr<0>_MC.D2 ;
  wire \LED2_MC.Q_tsimrenamed_net_ ;
  wire \LED2_MC.D ;
  wire \LED2_MC.D1 ;
  wire \LED2_MC.D2 ;
  wire \U9/MISCr<1>_MC.Q ;
  wire \U9/MISCr<1>_MC_tsimcreated_prld_ ;
  wire \U9/MISCr<1>_MC.D ;
  wire \U9/MISCr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U9/MISCr<1>_MC.D1 ;
  wire \U9/MISCr<1>_MC.D2 ;
  wire \LED3_MC.Q_tsimrenamed_net_ ;
  wire \LED3_MC.D ;
  wire \LED3_MC.D1 ;
  wire \LED3_MC.D2 ;
  wire \U9/MISCr<2>_MC.Q ;
  wire \U9/MISCr<2>_MC_tsimcreated_prld_ ;
  wire \U9/MISCr<2>_MC.D ;
  wire \U9/MISCr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U9/MISCr<2>_MC.D1 ;
  wire \U9/MISCr<2>_MC.D2 ;
  wire \LED4_MC.Q_tsimrenamed_net_ ;
  wire \LED4_MC.D ;
  wire \LED4_MC.D1 ;
  wire \LED4_MC.D2 ;
  wire \U9/MISCr<3>_MC.Q ;
  wire \U9/MISCr<3>_MC_tsimcreated_prld_ ;
  wire \U9/MISCr<3>_MC.D ;
  wire \U9/MISCr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U9/MISCr<3>_MC.D1 ;
  wire \U9/MISCr<3>_MC.D2 ;
  wire \LED5_MC.Q_tsimrenamed_net_ ;
  wire \LED5_MC.D ;
  wire \LED5_MC.D1 ;
  wire \LED5_MC.D2 ;
  wire \U9/MISCr<4>_MC.Q ;
  wire \U9/MISCr<4>_MC_tsimcreated_prld_ ;
  wire \U9/MISCr<4>_MC.D ;
  wire \U9/MISCr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U9/MISCr<4>_MC.D1 ;
  wire \U9/MISCr<4>_MC.D2 ;
  wire \MHSI_MC.Q_tsimrenamed_net_ ;
  wire \MHSI_MC.D ;
  wire \MHSI_MC.D1 ;
  wire \MHSI_MC.D2 ;
  wire \MTRpwr_MC.Q_tsimrenamed_net_ ;
  wire MTRpwr_MC_tsimcreated_prld_;
  wire \MTRpwr_MC.D ;
  wire \MTRpwr_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR18__ctinst/4 ;
  wire \MTRpwr_MC.D1 ;
  wire \MTRpwr_MC.D2 ;
  wire \MTRpwrn_MC.Q_tsimrenamed_net_ ;
  wire \FOOBAR7__ctinst/0 ;
  wire MTRpwrn_MC_tsimcreated_prld_;
  wire \MTRpwrn_MC.D ;
  wire \MTRpwrn_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \FOOBAR7__ctinst/4 ;
  wire \MTRpwrn_MC.D1 ;
  wire \MTRpwrn_MC.D2 ;
  wire \MTXI_MC.Q_tsimrenamed_net_ ;
  wire \MTXI_MC.D ;
  wire \MTXI_MC.D1 ;
  wire \MTXI_MC.D2 ;
  wire \PAH0_MC.Q_tsimrenamed_net_ ;
  wire \PAH0_MC.D ;
  wire \PAH0_MC.D1 ;
  wire \PAH0_MC.D2 ;
  wire NET3248;
  wire \NET3248_MC.Q ;
  wire \NET3248_MC.D ;
  wire \NET3248_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \NET3248_MC.D1 ;
  wire \NET3248_MC.D2 ;
  wire \NET3248_MC.D2_PT_0 ;
  wire \NET3248_MC.D2_PT_1 ;
  wire \NET3248_MC.D2_PT_2 ;
  wire \PAH1_MC.Q_tsimrenamed_net_ ;
  wire \PAH1_MC.D ;
  wire \PAH1_MC.D1 ;
  wire \PAH1_MC.D2 ;
  wire NET3253;
  wire \PAH1_MC.D2_PT_0 ;
  wire \PAH1_MC.D2_PT_1 ;
  wire \NET3253_MC.Q ;
  wire \NET3253_MC.D ;
  wire \NET3253_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \NET3253_MC.D1 ;
  wire \NET3253_MC.D2 ;
  wire \NET3253_MC.D2_PT_0 ;
  wire \NET3253_MC.D2_PT_1 ;
  wire \NET3253_MC.D2_PT_2 ;
  wire \PAL0_MC.Q_tsimrenamed_net_ ;
  wire \PAL0_MC.D ;
  wire \PAL0_MC.D1 ;
  wire \PAL0_MC.D2 ;
  wire \PAL0_MC.D2_PT_0 ;
  wire \PAL0_MC.D2_PT_1 ;
  wire \PAL1_MC.Q_tsimrenamed_net_ ;
  wire \PAL1_MC.D ;
  wire \PAL1_MC.D1 ;
  wire \PAL1_MC.D2 ;
  wire \PBH0_MC.Q_tsimrenamed_net_ ;
  wire \PBH0_MC.D ;
  wire \PBH0_MC.D1 ;
  wire \PBH0_MC.D2 ;
  wire \PBH1_MC.Q_tsimrenamed_net_ ;
  wire \PBH1_MC.D ;
  wire \PBH1_MC.D1 ;
  wire \PBH1_MC.D2 ;
  wire \PBH1_MC.D2_PT_0 ;
  wire \PBH1_MC.D2_PT_1 ;
  wire \PBL0_MC.Q_tsimrenamed_net_ ;
  wire \PBL0_MC.D ;
  wire \PBL0_MC.D1 ;
  wire \PBL0_MC.D2 ;
  wire \PBL0_MC.D2_PT_0 ;
  wire \PBL0_MC.D2_PT_1 ;
  wire \PBL1_MC.Q_tsimrenamed_net_ ;
  wire \PBL1_MC.D ;
  wire \PBL1_MC.D1 ;
  wire \PBL1_MC.D2 ;
  wire \SCLout_MC.Q_tsimrenamed_net_ ;
  wire \SCLout_MC.D ;
  wire \SCLout_MC.D1 ;
  wire \SCLout_MC.D2 ;
  wire \TP10_MC.Q_tsimrenamed_net_ ;
  wire \TP10_MC.D ;
  wire \TP10_MC.D1 ;
  wire \TP10_MC.D2 ;
  wire \TP11_MC.Q_tsimrenamed_net_ ;
  wire \TP11_MC.D ;
  wire \TP11_MC.D1 ;
  wire \TP11_MC.D2 ;
  wire \TP12_MC.Q_tsimrenamed_net_ ;
  wire \TP12_MC.D ;
  wire \TP12_MC.D1 ;
  wire \TP12_MC.D2 ;
  wire \DCORI2CCNTr_MC.Q ;
  wire \DCORI2CCNTr_MC.D ;
  wire \DCORI2CCNTr_MC.D1 ;
  wire \DCORI2CCNTr_MC.D2 ;
  wire \outDATA<0>\$WA0.UIM_MC.Q ;
  wire \outDATA<0>\$WA0.UIM_MC.D ;
  wire \outDATA<0>\$WA0.UIM_MC.D1 ;
  wire \outDATA<0>\$WA0.UIM_MC.D2 ;
  wire \DCORCONFIGr_MC.Q ;
  wire \DCORCONFIGr_MC.D ;
  wire \DCORCONFIGr_MC.D1 ;
  wire \DCORCONFIGr_MC.D2 ;
  wire \outDATA<0>\$WA1.UIM_MC.Q ;
  wire \outDATA<0>\$WA1.UIM_MC.D ;
  wire \outDATA<0>\$WA1.UIM_MC.D1 ;
  wire \outDATA<0>\$WA1.UIM_MC.D2 ;
  wire \DCORLIMITSr_MC.Q ;
  wire \DCORLIMITSr_MC.D ;
  wire \DCORLIMITSr_MC.D1 ;
  wire \DCORLIMITSr_MC.D2 ;
  wire \outDATA<0>\$WA2.UIM_MC.Q ;
  wire \outDATA<0>\$WA2.UIM_MC.D ;
  wire \outDATA<0>\$WA2.UIM_MC.D1 ;
  wire \outDATA<0>\$WA2.UIM_MC.D2 ;
  wire \DCORENCPWRr_MC.Q ;
  wire \DCORENCPWRr_MC.D ;
  wire \DCORENCPWRr_MC.D1 ;
  wire \DCORENCPWRr_MC.D2 ;
  wire \outDATA<0>\$WA3.UIM_MC.Q ;
  wire \outDATA<0>\$WA3.UIM_MC.D ;
  wire \outDATA<0>\$WA3.UIM_MC.D1 ;
  wire \outDATA<0>\$WA3.UIM_MC.D2 ;
  wire \outDATA<0>\$WA3.UIM_MC.D2_PT_0 ;
  wire \outDATA<0>\$WA3.UIM_MC.D2_PT_1 ;
  wire \outDATA<0>\$WA4.UIM_MC.Q ;
  wire \outDATA<0>\$WA4.UIM_MC.D ;
  wire \outDATA<0>\$WA4.UIM_MC.D1 ;
  wire \outDATA<0>\$WA4.UIM_MC.D2 ;
  wire DCOR0THRESLOWr;
  wire \outDATA<0>\$WA4.UIM_MC.D2_PT_0 ;
  wire DCOR0THRESMIDr;
  wire \outDATA<0>\$WA4.UIM_MC.D2_PT_1 ;
  wire DCOR1THRESLOWr;
  wire \outDATA<0>\$WA4.UIM_MC.D2_PT_2 ;
  wire \outDATA<0>\$WA4.UIM_MC.D2_PT_3 ;
  wire \U1/U4/Latch0r<0>_MC.Q ;
  wire \U1/U4/Latch0r<0>_MC.D ;
  wire \U1/U4/Latch0r<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<0>_MC.D1 ;
  wire \U1/U4/Latch0r<0>_MC.D2 ;
  wire \U1/U4/Latch0r<0>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<0>_MC.D2_PT_1 ;
  wire \U1/Channel0<0>_MC.Q ;
  wire \U1/Channel0<0>_MC.D ;
  wire \U1/Channel0<0>_MC.D1 ;
  wire \U1/Channel0<0>_MC.D2 ;
  wire N_PZ_1074;
  wire N_PZ_1132;
  wire \U1/Channel0<0>_MC.D2_PT_0 ;
  wire \U1/Channel0<0>_MC.D2_PT_1 ;
  wire \N_PZ_1074_MC.Q ;
  wire \N_PZ_1074_MC.D ;
  wire \N_PZ_1074_MC.D1 ;
  wire \N_PZ_1074_MC.D2 ;
  wire \U1/Zero0 ;
  wire \U1/Zero0_MC.Q ;
  wire \U1/Zero0_MC.D ;
  wire \U1/Zero0_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/Zero0_MC.D1 ;
  wire \U1/Zero0_MC.D2 ;
  wire \U1/Zero0_MC.D2_PT_0 ;
  wire N_PZ_1116;
  wire \U1/Zero0_MC.D2_PT_1 ;
  wire \U1/U4/E0r ;
  wire \U1/Zero0_MC.D2_PT_2 ;
  wire \U1/Zero0_MC.D2_PT_3 ;
  wire \N_PZ_1116_MC.Q ;
  wire \N_PZ_1116_MC.D ;
  wire \N_PZ_1116_MC.D1 ;
  wire \N_PZ_1116_MC.D2 ;
  wire \N_PZ_1116_MC.D2_PT_0 ;
  wire \N_PZ_1116_MC.D2_PT_1 ;
  wire \U1/U4/E0r_MC.Q ;
  wire \U1/U4/E0r_MC.D ;
  wire \U1/U4/E0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/E0r_MC.D1 ;
  wire \U1/U4/E0r_MC.D2 ;
  wire \U1/U4/E0r_MC.D2_PT_0 ;
  wire \U1/U4/E0r_MC.D2_PT_1 ;
  wire \N_PZ_1132_MC.Q ;
  wire \N_PZ_1132_MC.D ;
  wire \N_PZ_1132_MC.D1 ;
  wire \N_PZ_1132_MC.D2 ;
  wire \U1/U1/CurrState_Sreg0_FFD3 ;
  wire \U1/U1/CurrState_Sreg0_FFD2 ;
  wire \U1/U1/CurrState_Sreg0_FFD4 ;
  wire \U1/U1/CurrState_Sreg0_FFD1 ;
  wire \N_PZ_1132_MC.D2_PT_0 ;
  wire \N_PZ_1132_MC.D2_PT_1 ;
  wire \U1/U1/CurrState_Sreg0_FFD3_MC.Q ;
  wire \U1/U1/CurrState_Sreg0_FFD3_MC.D ;
  wire \U1/U1/CurrState_Sreg0_FFD3_MC.D1 ;
  wire \U1/U1/CurrState_Sreg0_FFD3_MC.D2 ;
  wire N_PZ_1289;
  wire \U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0 ;
  wire \U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1 ;
  wire \U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2 ;
  wire \U1/U1/CurrState_Sreg0_FFD2_MC.Q ;
  wire \U1/U1/CurrState_Sreg0_FFD2_MC.D ;
  wire \U1/U1/CurrState_Sreg0_FFD2_MC.D1 ;
  wire \U1/U1/CurrState_Sreg0_FFD2_MC.D2 ;
  wire \U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0 ;
  wire \U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1 ;
  wire \U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2 ;
  wire \U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3 ;
  wire \U1/U1/CurrState_Sreg0_FFD4_MC.Q ;
  wire \U1/U1/CurrState_Sreg0_FFD4_MC.D ;
  wire \U1/U1/CurrState_Sreg0_FFD4_MC.D1 ;
  wire \U1/U1/CurrState_Sreg0_FFD4_MC.D2 ;
  wire \U1/U1/CurrState_Sreg0_FFD1_MC.Q ;
  wire \U1/U1/CurrState_Sreg0_FFD1_MC.D ;
  wire \U1/U1/CurrState_Sreg0_FFD1_MC.D1 ;
  wire \U1/U1/CurrState_Sreg0_FFD1_MC.D2 ;
  wire \U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0 ;
  wire \U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1 ;
  wire \U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2 ;
  wire \N_PZ_1289_MC.Q ;
  wire \N_PZ_1289_MC.D ;
  wire \N_PZ_1289_MC.D1 ;
  wire \N_PZ_1289_MC.D2 ;
  wire \N_PZ_1289_MC.D2_PT_0 ;
  wire \N_PZ_1289_MC.D2_PT_1 ;
  wire \DCOR0THRESLOWr_MC.Q ;
  wire \DCOR0THRESLOWr_MC.D ;
  wire \DCOR0THRESLOWr_MC.D1 ;
  wire \DCOR0THRESLOWr_MC.D2 ;
  wire \U1/U4/Latch0r<8>_MC.Q ;
  wire \U1/U4/Latch0r<8>_MC.D ;
  wire \U1/U4/Latch0r<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<8>_MC.D1 ;
  wire \U1/U4/Latch0r<8>_MC.D2 ;
  wire \U1/U4/Latch0r<8>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<8>_MC.D2_PT_1 ;
  wire \U1/Channel0<8>_MC.Q ;
  wire \U1/Channel0<8>_MC.D ;
  wire \U1/Channel0<8>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<8>_MC.D1 ;
  wire \U1/Channel0<8>_MC.D2 ;
  wire \U1/Channel0<8>_MC.D2_PT_0 ;
  wire N_PZ_1090;
  wire \U1/Channel0<8>_MC.D2_PT_1 ;
  wire \U1/Channel0<8>_MC.D2_PT_2 ;
  wire \U1/Channel0<7>_MC.Q ;
  wire \U1/Channel0<7>_MC.D ;
  wire \U1/Channel0<7>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<7>_MC.D1 ;
  wire \U1/Channel0<7>_MC.D2 ;
  wire \U1/Channel0<7>_MC.D2_PT_0 ;
  wire \U1/Channel0<7>_MC.D2_PT_1 ;
  wire \U1/Channel0<7>_MC.D2_PT_2 ;
  wire \U1/U2/location_Maddsub__n0000__n0103<0>_MC.Q ;
  wire \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D ;
  wire \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D1 ;
  wire \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2 ;
  wire N_PZ_1086;
  wire \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_0 ;
  wire \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1 ;
  wire \N_PZ_1086_MC.Q ;
  wire \N_PZ_1086_MC.D ;
  wire \N_PZ_1086_MC.D1 ;
  wire \N_PZ_1086_MC.D2 ;
  wire \U1/NET3721 ;
  wire \N_PZ_1086_MC.D2_PT_0 ;
  wire \N_PZ_1086_MC.D2_PT_1 ;
  wire \N_PZ_1086_MC.D2_PT_2 ;
  wire \N_PZ_1086_MC.D2_PT_3 ;
  wire \U1/NET3721_MC.Q ;
  wire \U1/NET3721_MC.D ;
  wire \U1/NET3721_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/NET3721_MC.D1 ;
  wire \U1/NET3721_MC.D2 ;
  wire \U1/NET3721_MC.D2_PT_0 ;
  wire \U1/NET3721_MC.D2_PT_1 ;
  wire \N_PZ_1090_MC.Q ;
  wire \N_PZ_1090_MC.D ;
  wire \N_PZ_1090_MC.D1 ;
  wire \N_PZ_1090_MC.D2 ;
  wire \N_PZ_1090_MC.D2_PT_0 ;
  wire \N_PZ_1090_MC.D2_PT_1 ;
  wire \U1/Channel0<1>_MC.Q ;
  wire \U1/Channel0<1>_MC.D ;
  wire \U1/Channel0<1>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<1>_MC.D1 ;
  wire \U1/Channel0<1>_MC.D2 ;
  wire \U1/Channel0<1>_MC.D2_PT_0 ;
  wire \U1/Channel0<1>_MC.D2_PT_1 ;
  wire \U1/Channel0<1>_MC.D2_PT_2 ;
  wire \U1/Channel0<2>_MC.Q ;
  wire \U1/Channel0<2>_MC.D ;
  wire \U1/Channel0<2>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<2>_MC.D1 ;
  wire \U1/Channel0<2>_MC.D2 ;
  wire \U1/Channel0<2>_MC.D2_PT_0 ;
  wire \U1/Channel0<2>_MC.D2_PT_1 ;
  wire \U1/Channel0<2>_MC.D2_PT_2 ;
  wire \U1/Channel0<3>_MC.Q ;
  wire \U1/Channel0<3>_MC.D ;
  wire \U1/Channel0<3>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<3>_MC.D1 ;
  wire \U1/Channel0<3>_MC.D2 ;
  wire \U1/Channel0<3>_MC.D2_PT_0 ;
  wire \U1/Channel0<3>_MC.D2_PT_1 ;
  wire \U1/Channel0<3>_MC.D2_PT_2 ;
  wire \U1/Channel0<4>_MC.Q ;
  wire \U1/Channel0<4>_MC.D ;
  wire \U1/Channel0<4>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<4>_MC.D1 ;
  wire \U1/Channel0<4>_MC.D2 ;
  wire \U1/Channel0<4>_MC.D2_PT_0 ;
  wire \U1/Channel0<4>_MC.D2_PT_1 ;
  wire \U1/Channel0<4>_MC.D2_PT_2 ;
  wire \U1/Channel0<5>_MC.Q ;
  wire \U1/Channel0<5>_MC.D ;
  wire \U1/Channel0<5>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<5>_MC.D1 ;
  wire \U1/Channel0<5>_MC.D2 ;
  wire \U1/Channel0<5>_MC.D2_PT_0 ;
  wire \U1/Channel0<5>_MC.D2_PT_1 ;
  wire \U1/Channel0<5>_MC.D2_PT_2 ;
  wire \U1/Channel0<6>_MC.Q ;
  wire \U1/Channel0<6>_MC.D ;
  wire \U1/Channel0<6>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<6>_MC.D1 ;
  wire \U1/Channel0<6>_MC.D2 ;
  wire \U1/Channel0<6>_MC.D2_PT_0 ;
  wire \U1/Channel0<6>_MC.D2_PT_1 ;
  wire \U1/Channel0<6>_MC.D2_PT_2 ;
  wire \U1/Channel0<6>_MC.D2_PT_3 ;
  wire \U1/Channel0<6>_MC.D2_PT_4 ;
  wire \U1/Channel0<6>_MC.D2_PT_5 ;
  wire \DCOR0THRESMIDr_MC.Q ;
  wire \DCOR0THRESMIDr_MC.D ;
  wire \DCOR0THRESMIDr_MC.D1 ;
  wire \DCOR0THRESMIDr_MC.D2 ;
  wire \U1/U4/Latch1r<0>_MC.Q ;
  wire \U1/U4/Latch1r<0>_MC.D ;
  wire \U1/U4/Latch1r<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<0>_MC.D1 ;
  wire \U1/U4/Latch1r<0>_MC.D2 ;
  wire \U1/U4/Latch1r<0>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<0>_MC.D2_PT_1 ;
  wire \U1/Channel1<0>_MC.Q ;
  wire \U1/Channel1<0>_MC.D ;
  wire \U1/Channel1<0>_MC.D1 ;
  wire \U1/Channel1<0>_MC.D2 ;
  wire N_PZ_1073;
  wire N_PZ_1187;
  wire \U1/Channel1<0>_MC.D2_PT_0 ;
  wire \U1/Channel1<0>_MC.D2_PT_1 ;
  wire \N_PZ_1073_MC.Q ;
  wire \N_PZ_1073_MC.D ;
  wire \N_PZ_1073_MC.D1 ;
  wire \N_PZ_1073_MC.D2 ;
  wire \U1/Zero1 ;
  wire \U1/Zero1_MC.Q ;
  wire \U1/Zero1_MC.D ;
  wire \U1/Zero1_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/Zero1_MC.D1 ;
  wire \U1/Zero1_MC.D2 ;
  wire \U1/Zero1_MC.D2_PT_0 ;
  wire \U1/Zero1_MC.D2_PT_1 ;
  wire \U1/Zero1_MC.D2_PT_2 ;
  wire \U1/Zero1_MC.D2_PT_3 ;
  wire \N_PZ_1187_MC.Q ;
  wire \N_PZ_1187_MC.D ;
  wire \N_PZ_1187_MC.D1 ;
  wire \N_PZ_1187_MC.D2 ;
  wire \U1/U6/CurrState_Sreg0_FFD3 ;
  wire \U1/U6/CurrState_Sreg0_FFD2 ;
  wire \U1/U6/CurrState_Sreg0_FFD4 ;
  wire \U1/U6/CurrState_Sreg0_FFD1 ;
  wire \N_PZ_1187_MC.D2_PT_0 ;
  wire \N_PZ_1187_MC.D2_PT_1 ;
  wire \U1/U6/CurrState_Sreg0_FFD3_MC.Q ;
  wire \U1/U6/CurrState_Sreg0_FFD3_MC.D ;
  wire \U1/U6/CurrState_Sreg0_FFD3_MC.D1 ;
  wire \U1/U6/CurrState_Sreg0_FFD3_MC.D2 ;
  wire N_PZ_1290;
  wire \U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0 ;
  wire \U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1 ;
  wire \U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2 ;
  wire \U1/U6/CurrState_Sreg0_FFD2_MC.Q ;
  wire \U1/U6/CurrState_Sreg0_FFD2_MC.D ;
  wire \U1/U6/CurrState_Sreg0_FFD2_MC.D1 ;
  wire \U1/U6/CurrState_Sreg0_FFD2_MC.D2 ;
  wire \U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0 ;
  wire \U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1 ;
  wire \U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2 ;
  wire \U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3 ;
  wire \U1/U6/CurrState_Sreg0_FFD4_MC.Q ;
  wire \U1/U6/CurrState_Sreg0_FFD4_MC.D ;
  wire \U1/U6/CurrState_Sreg0_FFD4_MC.D1 ;
  wire \U1/U6/CurrState_Sreg0_FFD4_MC.D2 ;
  wire \U1/U6/CurrState_Sreg0_FFD1_MC.Q ;
  wire \U1/U6/CurrState_Sreg0_FFD1_MC.D ;
  wire \U1/U6/CurrState_Sreg0_FFD1_MC.D1 ;
  wire \U1/U6/CurrState_Sreg0_FFD1_MC.D2 ;
  wire \U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0 ;
  wire \U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1 ;
  wire \U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2 ;
  wire \N_PZ_1290_MC.Q ;
  wire \N_PZ_1290_MC.D ;
  wire \N_PZ_1290_MC.D1 ;
  wire \N_PZ_1290_MC.D2 ;
  wire \N_PZ_1290_MC.D2_PT_0 ;
  wire \N_PZ_1290_MC.D2_PT_1 ;
  wire \DCOR1THRESLOWr_MC.Q ;
  wire \DCOR1THRESLOWr_MC.D ;
  wire \DCOR1THRESLOWr_MC.D1 ;
  wire \DCOR1THRESLOWr_MC.D2 ;
  wire \U1/U4/Latch1r<8>_MC.Q ;
  wire \U1/U4/Latch1r<8>_MC.D ;
  wire \U1/U4/Latch1r<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<8>_MC.D1 ;
  wire \U1/U4/Latch1r<8>_MC.D2 ;
  wire \U1/U4/Latch1r<8>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<8>_MC.D2_PT_1 ;
  wire \U1/Channel1<8>_MC.Q ;
  wire \U1/Channel1<8>_MC.D ;
  wire \U1/Channel1<8>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<8>_MC.D1 ;
  wire \U1/Channel1<8>_MC.D2 ;
  wire \U1/Channel1<8>_MC.D2_PT_0 ;
  wire N_PZ_1104;
  wire \U1/Channel1<8>_MC.D2_PT_1 ;
  wire \U1/Channel1<8>_MC.D2_PT_2 ;
  wire \U1/Channel1<7>_MC.Q ;
  wire \U1/Channel1<7>_MC.D ;
  wire \U1/Channel1<7>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<7>_MC.D1 ;
  wire \U1/Channel1<7>_MC.D2 ;
  wire \U1/Channel1<7>_MC.D2_PT_0 ;
  wire \U1/Channel1<7>_MC.D2_PT_1 ;
  wire \U1/Channel1<7>_MC.D2_PT_2 ;
  wire \U1/U5/location_Maddsub__n0000__n0103<0>_MC.Q ;
  wire \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D ;
  wire \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D1 ;
  wire \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2 ;
  wire N_PZ_1087;
  wire N_PZ_1327;
  wire \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_0 ;
  wire \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1 ;
  wire \N_PZ_1087_MC.Q ;
  wire \N_PZ_1087_MC.D ;
  wire \N_PZ_1087_MC.D1 ;
  wire \N_PZ_1087_MC.D2 ;
  wire \U1/NET3720 ;
  wire \N_PZ_1087_MC.D2_PT_0 ;
  wire \N_PZ_1087_MC.D2_PT_1 ;
  wire \N_PZ_1087_MC.D2_PT_2 ;
  wire \N_PZ_1087_MC.D2_PT_3 ;
  wire \U1/NET3720_MC.Q ;
  wire \U1/NET3720_MC.D ;
  wire \U1/NET3720_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/NET3720_MC.D1 ;
  wire \U1/NET3720_MC.D2 ;
  wire \U1/NET3720_MC.D2_PT_0 ;
  wire \U1/NET3720_MC.D2_PT_1 ;
  wire \N_PZ_1104_MC.Q ;
  wire \N_PZ_1104_MC.D ;
  wire \N_PZ_1104_MC.D1 ;
  wire \N_PZ_1104_MC.D2 ;
  wire \N_PZ_1104_MC.D2_PT_0 ;
  wire \N_PZ_1104_MC.D2_PT_1 ;
  wire \U1/Channel1<1>_MC.Q ;
  wire \U1/Channel1<1>_MC.D ;
  wire \U1/Channel1<1>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<1>_MC.D1 ;
  wire \U1/Channel1<1>_MC.D2 ;
  wire \U1/Channel1<1>_MC.D2_PT_0 ;
  wire \U1/Channel1<1>_MC.D2_PT_1 ;
  wire \U1/Channel1<1>_MC.D2_PT_2 ;
  wire \U1/Channel1<2>_MC.Q ;
  wire \U1/Channel1<2>_MC.D ;
  wire \U1/Channel1<2>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<2>_MC.D1 ;
  wire \U1/Channel1<2>_MC.D2 ;
  wire \U1/Channel1<2>_MC.D2_PT_0 ;
  wire \U1/Channel1<2>_MC.D2_PT_1 ;
  wire \U1/Channel1<2>_MC.D2_PT_2 ;
  wire \U1/Channel1<3>_MC.Q ;
  wire \U1/Channel1<3>_MC.D ;
  wire \U1/Channel1<3>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<3>_MC.D1 ;
  wire \U1/Channel1<3>_MC.D2 ;
  wire \U1/Channel1<3>_MC.D2_PT_0 ;
  wire \U1/Channel1<3>_MC.D2_PT_1 ;
  wire \U1/Channel1<3>_MC.D2_PT_2 ;
  wire \U1/Channel1<4>_MC.Q ;
  wire \U1/Channel1<4>_MC.D ;
  wire \U1/Channel1<4>_MC.D1 ;
  wire \U1/Channel1<4>_MC.D2 ;
  wire \U1/Channel1<4>_MC.D2_PT_0 ;
  wire \U1/Channel1<4>_MC.D2_PT_1 ;
  wire \U1/Channel1<4>_MC.D2_PT_2 ;
  wire \U1/Channel1<4>_MC.D2_PT_3 ;
  wire \N_PZ_1327_MC.Q ;
  wire \N_PZ_1327_MC.D ;
  wire \N_PZ_1327_MC.D1 ;
  wire \N_PZ_1327_MC.D2 ;
  wire \U1/Channel1<5>_MC.Q ;
  wire \U1/Channel1<5>_MC.D ;
  wire \U1/Channel1<5>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<5>_MC.D1 ;
  wire \U1/Channel1<5>_MC.D2 ;
  wire \U1/Channel1<5>_MC.D2_PT_0 ;
  wire \U1/Channel1<5>_MC.D2_PT_1 ;
  wire \U1/Channel1<5>_MC.D2_PT_2 ;
  wire \U1/Channel1<6>_MC.Q ;
  wire \U1/Channel1<6>_MC.D ;
  wire \U1/Channel1<6>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<6>_MC.D1 ;
  wire \U1/Channel1<6>_MC.D2 ;
  wire \U1/Channel1<6>_MC.D2_PT_0 ;
  wire \U1/Channel1<6>_MC.D2_PT_1 ;
  wire \U1/Channel1<6>_MC.D2_PT_2 ;
  wire \U1/Channel1<6>_MC.D2_PT_3 ;
  wire \U1/Channel1<6>_MC.D2_PT_4 ;
  wire \U1/Channel1<6>_MC.D2_PT_5 ;
  wire \N_PZ_1110_MC.Q ;
  wire \N_PZ_1110_MC.D ;
  wire \N_PZ_1110_MC.D1 ;
  wire \N_PZ_1110_MC.D2 ;
  wire DCOR1THRESMIDr;
  wire \DCOR1THRESMIDr_MC.Q ;
  wire \DCOR1THRESMIDr_MC.D ;
  wire \DCOR1THRESMIDr_MC.D1 ;
  wire \DCOR1THRESMIDr_MC.D2 ;
  wire \outDATA<0>\$WA5.UIM_MC.Q ;
  wire \outDATA<0>\$WA5.UIM_MC.D ;
  wire \outDATA<0>\$WA5.UIM_MC.D1 ;
  wire \outDATA<0>\$WA5.UIM_MC.D2 ;
  wire DCOR0CNTLOWr;
  wire \outDATA<0>\$WA5.UIM_MC.D2_PT_0 ;
  wire DCOR1CNTLOWr;
  wire \outDATA<0>\$WA5.UIM_MC.D2_PT_1 ;
  wire DCOR0CNTMIDr;
  wire \outDATA<0>\$WA5.UIM_MC.D2_PT_2 ;
  wire DCOR1CNTMIDr;
  wire \outDATA<0>\$WA5.UIM_MC.D2_PT_3 ;
  wire DCOR0CNTHIGHr;
  wire \outDATA<0>\$WA5.UIM_MC.D2_PT_4 ;
  wire \outDATA<0>\$WA5.UIM_MC.D2_PT_5 ;
  wire \U1/U3/holdingreg0<0>_MC.Q ;
  wire \U1/U3/holdingreg0<0>_MC.D ;
  wire \U1/U3/holdingreg0<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<0>_MC.D1 ;
  wire \U1/U3/holdingreg0<0>_MC.D2 ;
  wire \U1/U3/holdingreg0<0>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<0>_MC.D2_PT_1 ;
  wire \DCOR0CNTLOWr_MC.Q ;
  wire \DCOR0CNTLOWr_MC.D ;
  wire \DCOR0CNTLOWr_MC.D1 ;
  wire \DCOR0CNTLOWr_MC.D2 ;
  wire \U1/U3/holdingreg1<0>_MC.Q ;
  wire \U1/U3/holdingreg1<0>_MC.D ;
  wire \U1/U3/holdingreg1<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<0>_MC.D1 ;
  wire \U1/U3/holdingreg1<0>_MC.D2 ;
  wire \U1/U3/holdingreg1<0>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<0>_MC.D2_PT_1 ;
  wire \DCOR1CNTLOWr_MC.Q ;
  wire \DCOR1CNTLOWr_MC.D ;
  wire \DCOR1CNTLOWr_MC.D1 ;
  wire \DCOR1CNTLOWr_MC.D2 ;
  wire \U1/U3/holdingreg0<8>_MC.Q ;
  wire \U1/U3/holdingreg0<8>_MC.D ;
  wire \U1/U3/holdingreg0<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<8>_MC.D1 ;
  wire \U1/U3/holdingreg0<8>_MC.D2 ;
  wire \U1/U3/holdingreg0<8>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<8>_MC.D2_PT_1 ;
  wire \DCOR0CNTMIDr_MC.Q ;
  wire \DCOR0CNTMIDr_MC.D ;
  wire \DCOR0CNTMIDr_MC.D1 ;
  wire \DCOR0CNTMIDr_MC.D2 ;
  wire \U1/U3/holdingreg1<8>_MC.Q ;
  wire \U1/U3/holdingreg1<8>_MC.D ;
  wire \U1/U3/holdingreg1<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<8>_MC.D1 ;
  wire \U1/U3/holdingreg1<8>_MC.D2 ;
  wire \U1/U3/holdingreg1<8>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<8>_MC.D2_PT_1 ;
  wire \DCOR1CNTMIDr_MC.Q ;
  wire \DCOR1CNTMIDr_MC.D ;
  wire \DCOR1CNTMIDr_MC.D1 ;
  wire \DCOR1CNTMIDr_MC.D2 ;
  wire \U1/U3/holdingreg0<16>_MC.Q ;
  wire \U1/U3/holdingreg0<16>_MC.D ;
  wire \U1/U3/holdingreg0<16>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<16>_MC.D1 ;
  wire \U1/U3/holdingreg0<16>_MC.D2 ;
  wire \U1/U3/holdingreg0<16>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<16>_MC.D2_PT_1 ;
  wire \U1/Channel0<16>_MC.Q ;
  wire \U1/Channel0<16>_MC.D ;
  wire \U1/Channel0<16>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<16>_MC.D1 ;
  wire \U1/Channel0<16>_MC.D2 ;
  wire \U1/Channel0<16>_MC.D2_PT_0 ;
  wire \U1/Channel0<16>_MC.D2_PT_1 ;
  wire \U1/Channel0<16>_MC.D2_PT_2 ;
  wire \U1/Channel0<13>_MC.Q ;
  wire \U1/Channel0<13>_MC.D ;
  wire \U1/Channel0<13>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<13>_MC.D1 ;
  wire \U1/Channel0<13>_MC.D2 ;
  wire \U1/Channel0<13>_MC.D2_PT_0 ;
  wire \U1/Channel0<13>_MC.D2_PT_1 ;
  wire \U1/Channel0<13>_MC.D2_PT_2 ;
  wire \U1/U2/location_Maddsub__n0000__n0115<0>_MC.Q ;
  wire \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D ;
  wire \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D1 ;
  wire \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2 ;
  wire \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0 ;
  wire \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1 ;
  wire \U1/Channel0<10>_MC.Q ;
  wire \U1/Channel0<10>_MC.D ;
  wire \U1/Channel0<10>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<10>_MC.D1 ;
  wire \U1/Channel0<10>_MC.D2 ;
  wire \U1/Channel0<10>_MC.D2_PT_0 ;
  wire \U1/Channel0<10>_MC.D2_PT_1 ;
  wire \U1/Channel0<10>_MC.D2_PT_2 ;
  wire \U1/Channel0<9>_MC.Q ;
  wire \U1/Channel0<9>_MC.D ;
  wire \U1/Channel0<9>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<9>_MC.D1 ;
  wire \U1/Channel0<9>_MC.D2 ;
  wire \U1/Channel0<9>_MC.D2_PT_0 ;
  wire \U1/Channel0<9>_MC.D2_PT_1 ;
  wire \U1/Channel0<9>_MC.D2_PT_2 ;
  wire \U1/Channel0<11>_MC.Q ;
  wire \U1/Channel0<11>_MC.D ;
  wire \U1/Channel0<11>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<11>_MC.D1 ;
  wire \U1/Channel0<11>_MC.D2 ;
  wire \U1/Channel0<11>_MC.D2_PT_0 ;
  wire \U1/Channel0<11>_MC.D2_PT_1 ;
  wire \U1/Channel0<11>_MC.D2_PT_2 ;
  wire \U1/Channel0<12>_MC.Q ;
  wire \U1/Channel0<12>_MC.D ;
  wire \U1/Channel0<12>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<12>_MC.D1 ;
  wire \U1/Channel0<12>_MC.D2 ;
  wire \U1/Channel0<12>_MC.D2_PT_0 ;
  wire \U1/Channel0<12>_MC.D2_PT_1 ;
  wire \U1/Channel0<12>_MC.D2_PT_2 ;
  wire \U1/Channel0<12>_MC.D2_PT_3 ;
  wire \U1/Channel0<12>_MC.D2_PT_4 ;
  wire \U1/Channel0<12>_MC.D2_PT_5 ;
  wire \U1/Channel0<14>_MC.Q ;
  wire \U1/Channel0<14>_MC.D ;
  wire \U1/Channel0<14>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<14>_MC.D1 ;
  wire \U1/Channel0<14>_MC.D2 ;
  wire \U1/Channel0<14>_MC.D2_PT_0 ;
  wire \U1/Channel0<14>_MC.D2_PT_1 ;
  wire \U1/Channel0<14>_MC.D2_PT_2 ;
  wire \U1/Channel0<15>_MC.Q ;
  wire \U1/Channel0<15>_MC.D ;
  wire \U1/Channel0<15>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<15>_MC.D1 ;
  wire \U1/Channel0<15>_MC.D2 ;
  wire \U1/Channel0<15>_MC.D2_PT_0 ;
  wire \U1/Channel0<15>_MC.D2_PT_1 ;
  wire \U1/Channel0<15>_MC.D2_PT_2 ;
  wire \DCOR0CNTHIGHr_MC.Q ;
  wire \DCOR0CNTHIGHr_MC.D ;
  wire \DCOR0CNTHIGHr_MC.D1 ;
  wire \DCOR0CNTHIGHr_MC.D2 ;
  wire \U1/U3/holdingreg1<16>_MC.Q ;
  wire \U1/U3/holdingreg1<16>_MC.D ;
  wire \U1/U3/holdingreg1<16>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<16>_MC.D1 ;
  wire \U1/U3/holdingreg1<16>_MC.D2 ;
  wire \U1/U3/holdingreg1<16>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<16>_MC.D2_PT_1 ;
  wire \U1/Channel1<16>_MC.Q ;
  wire \U1/Channel1<16>_MC.D ;
  wire \U1/Channel1<16>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<16>_MC.D1 ;
  wire \U1/Channel1<16>_MC.D2 ;
  wire \U1/Channel1<16>_MC.D2_PT_0 ;
  wire \U1/Channel1<16>_MC.D2_PT_1 ;
  wire \U1/Channel1<16>_MC.D2_PT_2 ;
  wire \U1/Channel1<13>_MC.Q ;
  wire \U1/Channel1<13>_MC.D ;
  wire \U1/Channel1<13>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<13>_MC.D1 ;
  wire \U1/Channel1<13>_MC.D2 ;
  wire \U1/Channel1<13>_MC.D2_PT_0 ;
  wire \U1/Channel1<13>_MC.D2_PT_1 ;
  wire \U1/Channel1<13>_MC.D2_PT_2 ;
  wire \U1/U5/location_Maddsub__n0000__n0115<0>_MC.Q ;
  wire \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D ;
  wire \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D1 ;
  wire \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2 ;
  wire N_PZ_1154;
  wire \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0 ;
  wire \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1 ;
  wire \U1/Channel1<10>_MC.Q ;
  wire \U1/Channel1<10>_MC.D ;
  wire \U1/Channel1<10>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<10>_MC.D1 ;
  wire \U1/Channel1<10>_MC.D2 ;
  wire \U1/Channel1<10>_MC.D2_PT_0 ;
  wire \U1/Channel1<10>_MC.D2_PT_1 ;
  wire \U1/Channel1<10>_MC.D2_PT_2 ;
  wire \U1/Channel1<9>_MC.Q ;
  wire \U1/Channel1<9>_MC.D ;
  wire \U1/Channel1<9>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<9>_MC.D1 ;
  wire \U1/Channel1<9>_MC.D2 ;
  wire \U1/Channel1<9>_MC.D2_PT_0 ;
  wire \U1/Channel1<9>_MC.D2_PT_1 ;
  wire \U1/Channel1<9>_MC.D2_PT_2 ;
  wire \U1/Channel1<11>_MC.Q ;
  wire \U1/Channel1<11>_MC.D ;
  wire \U1/Channel1<11>_MC.D1 ;
  wire \U1/Channel1<11>_MC.D2 ;
  wire \U1/Channel1<11>_MC.D2_PT_0 ;
  wire \U1/Channel1<11>_MC.D2_PT_1 ;
  wire \U1/Channel1<11>_MC.D2_PT_2 ;
  wire \U1/Channel1<11>_MC.D2_PT_3 ;
  wire \N_PZ_1154_MC.Q ;
  wire \N_PZ_1154_MC.D ;
  wire \N_PZ_1154_MC.D1 ;
  wire \N_PZ_1154_MC.D2 ;
  wire \U1/Channel1<12>_MC.Q ;
  wire \U1/Channel1<12>_MC.D ;
  wire \U1/Channel1<12>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<12>_MC.D1 ;
  wire \U1/Channel1<12>_MC.D2 ;
  wire \U1/Channel1<12>_MC.D2_PT_0 ;
  wire \U1/Channel1<12>_MC.D2_PT_1 ;
  wire \U1/Channel1<12>_MC.D2_PT_2 ;
  wire \U1/Channel1<12>_MC.D2_PT_3 ;
  wire \U1/Channel1<12>_MC.D2_PT_4 ;
  wire \U1/Channel1<12>_MC.D2_PT_5 ;
  wire \U1/Channel1<14>_MC.Q ;
  wire \U1/Channel1<14>_MC.D ;
  wire \U1/Channel1<14>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<14>_MC.D1 ;
  wire \U1/Channel1<14>_MC.D2 ;
  wire \U1/Channel1<14>_MC.D2_PT_0 ;
  wire \U1/Channel1<14>_MC.D2_PT_1 ;
  wire \U1/Channel1<14>_MC.D2_PT_2 ;
  wire \U1/Channel1<15>_MC.Q ;
  wire \U1/Channel1<15>_MC.D ;
  wire \U1/Channel1<15>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<15>_MC.D1 ;
  wire \U1/Channel1<15>_MC.D2 ;
  wire \U1/Channel1<15>_MC.D2_PT_0 ;
  wire \U1/Channel1<15>_MC.D2_PT_1 ;
  wire \U1/Channel1<15>_MC.D2_PT_2 ;
  wire \N_PZ_1111_MC.Q ;
  wire \N_PZ_1111_MC.D ;
  wire \N_PZ_1111_MC.D1 ;
  wire \N_PZ_1111_MC.D2 ;
  wire DCOR1CNTHIGHr;
  wire \DCOR1CNTHIGHr_MC.Q ;
  wire \DCOR1CNTHIGHr_MC.D ;
  wire \DCOR1CNTHIGHr_MC.D1 ;
  wire \DCOR1CNTHIGHr_MC.D2 ;
  wire \outDATA<1>\$WA0.UIM_MC.Q ;
  wire \outDATA<1>\$WA0.UIM_MC.D ;
  wire \outDATA<1>\$WA0.UIM_MC.D1 ;
  wire \outDATA<1>\$WA0.UIM_MC.D2 ;
  wire \outDATA<1>\$WA1.UIM_MC.Q ;
  wire \outDATA<1>\$WA1.UIM_MC.D ;
  wire \outDATA<1>\$WA1.UIM_MC.D1 ;
  wire \outDATA<1>\$WA1.UIM_MC.D2 ;
  wire \outDATA<1>\$WA2.UIM_MC.Q ;
  wire \outDATA<1>\$WA2.UIM_MC.D ;
  wire \outDATA<1>\$WA2.UIM_MC.D1 ;
  wire \outDATA<1>\$WA2.UIM_MC.D2 ;
  wire \outDATA<1>\$WA3.UIM_MC.Q ;
  wire \outDATA<1>\$WA3.UIM_MC.D ;
  wire \outDATA<1>\$WA3.UIM_MC.D1 ;
  wire \outDATA<1>\$WA3.UIM_MC.D2 ;
  wire \outDATA<1>\$WA3.UIM_MC.D2_PT_0 ;
  wire \outDATA<1>\$WA3.UIM_MC.D2_PT_1 ;
  wire \outDATA<1>\$WA3.UIM_MC.D2_PT_2 ;
  wire \DCORIFGr_MC.Q ;
  wire \DCORIFGr_MC.D ;
  wire \DCORIFGr_MC.D1 ;
  wire \DCORIFGr_MC.D2 ;
  wire \outDATA<1>\$WA4.UIM_MC.Q ;
  wire \outDATA<1>\$WA4.UIM_MC.D ;
  wire \outDATA<1>\$WA4.UIM_MC.D1 ;
  wire \outDATA<1>\$WA4.UIM_MC.D2 ;
  wire \outDATA<1>\$WA4.UIM_MC.D2_PT_0 ;
  wire \outDATA<1>\$WA4.UIM_MC.D2_PT_1 ;
  wire \outDATA<1>\$WA4.UIM_MC.D2_PT_2 ;
  wire \outDATA<1>\$WA4.UIM_MC.D2_PT_3 ;
  wire \U1/U4/Latch0r<1>_MC.Q ;
  wire \U1/U4/Latch0r<1>_MC.D ;
  wire \U1/U4/Latch0r<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<1>_MC.D1 ;
  wire \U1/U4/Latch0r<1>_MC.D2 ;
  wire \U1/U4/Latch0r<1>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<1>_MC.D2_PT_1 ;
  wire \U1/U4/Latch0r<9>_MC.Q ;
  wire \U1/U4/Latch0r<9>_MC.D ;
  wire \U1/U4/Latch0r<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<9>_MC.D1 ;
  wire \U1/U4/Latch0r<9>_MC.D2 ;
  wire \U1/U4/Latch0r<9>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<9>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<1>_MC.Q ;
  wire \U1/U4/Latch1r<1>_MC.D ;
  wire \U1/U4/Latch1r<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<1>_MC.D1 ;
  wire \U1/U4/Latch1r<1>_MC.D2 ;
  wire \U1/U4/Latch1r<1>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<1>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<9>_MC.Q ;
  wire \U1/U4/Latch1r<9>_MC.D ;
  wire \U1/U4/Latch1r<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<9>_MC.D1 ;
  wire \U1/U4/Latch1r<9>_MC.D2 ;
  wire \U1/U4/Latch1r<9>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<9>_MC.D2_PT_1 ;
  wire \outDATA<1>\$WA5.UIM_MC.Q ;
  wire \outDATA<1>\$WA5.UIM_MC.D ;
  wire \outDATA<1>\$WA5.UIM_MC.D1 ;
  wire \outDATA<1>\$WA5.UIM_MC.D2 ;
  wire \outDATA<1>\$WA5.UIM_MC.D2_PT_0 ;
  wire \outDATA<1>\$WA5.UIM_MC.D2_PT_1 ;
  wire \outDATA<1>\$WA5.UIM_MC.D2_PT_2 ;
  wire \outDATA<1>\$WA5.UIM_MC.D2_PT_3 ;
  wire \outDATA<1>\$WA5.UIM_MC.D2_PT_4 ;
  wire \outDATA<1>\$WA5.UIM_MC.D2_PT_5 ;
  wire \U1/U3/holdingreg0<1>_MC.Q ;
  wire \U1/U3/holdingreg0<1>_MC.D ;
  wire \U1/U3/holdingreg0<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<1>_MC.D1 ;
  wire \U1/U3/holdingreg0<1>_MC.D2 ;
  wire \U1/U3/holdingreg0<1>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<1>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<1>_MC.Q ;
  wire \U1/U3/holdingreg1<1>_MC.D ;
  wire \U1/U3/holdingreg1<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<1>_MC.D1 ;
  wire \U1/U3/holdingreg1<1>_MC.D2 ;
  wire \U1/U3/holdingreg1<1>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<1>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<9>_MC.Q ;
  wire \U1/U3/holdingreg0<9>_MC.D ;
  wire \U1/U3/holdingreg0<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<9>_MC.D1 ;
  wire \U1/U3/holdingreg0<9>_MC.D2 ;
  wire \U1/U3/holdingreg0<9>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<9>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<9>_MC.Q ;
  wire \U1/U3/holdingreg1<9>_MC.D ;
  wire \U1/U3/holdingreg1<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<9>_MC.D1 ;
  wire \U1/U3/holdingreg1<9>_MC.D2 ;
  wire \U1/U3/holdingreg1<9>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<9>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<17>_MC.Q ;
  wire \U1/U3/holdingreg0<17>_MC.D ;
  wire \U1/U3/holdingreg0<17>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<17>_MC.D1 ;
  wire \U1/U3/holdingreg0<17>_MC.D2 ;
  wire \U1/U3/holdingreg0<17>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<17>_MC.D2_PT_1 ;
  wire \U1/Channel0<17>_MC.Q ;
  wire \U1/Channel0<17>_MC.D ;
  wire \U1/Channel0<17>_MC.D1 ;
  wire \U1/Channel0<17>_MC.D2 ;
  wire \U1/Channel0<17>_MC.D2_PT_0 ;
  wire \U1/Channel0<17>_MC.D2_PT_1 ;
  wire \U1/Channel0<17>_MC.D2_PT_2 ;
  wire \U1/Channel0<17>_MC.D2_PT_3 ;
  wire \U1/Channel0<17>_MC.D2_PT_4 ;
  wire \U1/U3/holdingreg1<17>_MC.Q ;
  wire \U1/U3/holdingreg1<17>_MC.D ;
  wire \U1/U3/holdingreg1<17>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<17>_MC.D1 ;
  wire \U1/U3/holdingreg1<17>_MC.D2 ;
  wire \U1/U3/holdingreg1<17>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<17>_MC.D2_PT_1 ;
  wire \U1/Channel1<17>_MC.Q ;
  wire \U1/Channel1<17>_MC.D ;
  wire \U1/Channel1<17>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<17>_MC.D1 ;
  wire \U1/Channel1<17>_MC.D2 ;
  wire \U1/Channel1<17>_MC.D2_PT_0 ;
  wire \U1/Channel1<17>_MC.D2_PT_1 ;
  wire \U1/Channel1<17>_MC.D2_PT_2 ;
  wire \outDATA<2>\$WA0.UIM_MC.Q ;
  wire \outDATA<2>\$WA0.UIM_MC.D ;
  wire \outDATA<2>\$WA0.UIM_MC.D1 ;
  wire \outDATA<2>\$WA0.UIM_MC.D2 ;
  wire \outDATA<2>\$WA1.UIM_MC.Q ;
  wire \outDATA<2>\$WA1.UIM_MC.D ;
  wire \outDATA<2>\$WA1.UIM_MC.D1 ;
  wire \outDATA<2>\$WA1.UIM_MC.D2 ;
  wire \outDATA<2>\$WA2.UIM_MC.Q ;
  wire \outDATA<2>\$WA2.UIM_MC.D ;
  wire \outDATA<2>\$WA2.UIM_MC.D1 ;
  wire \outDATA<2>\$WA2.UIM_MC.D2 ;
  wire \outDATA<2>\$WA3.UIM_MC.Q ;
  wire \outDATA<2>\$WA3.UIM_MC.D ;
  wire \outDATA<2>\$WA3.UIM_MC.D1 ;
  wire \outDATA<2>\$WA3.UIM_MC.D2 ;
  wire \outDATA<2>\$WA3.UIM_MC.D2_PT_0 ;
  wire \outDATA<2>\$WA3.UIM_MC.D2_PT_1 ;
  wire \outDATA<2>\$WA4.UIM_MC.Q ;
  wire \outDATA<2>\$WA4.UIM_MC.D ;
  wire \outDATA<2>\$WA4.UIM_MC.D1 ;
  wire \outDATA<2>\$WA4.UIM_MC.D2 ;
  wire \outDATA<2>\$WA4.UIM_MC.D2_PT_0 ;
  wire \outDATA<2>\$WA4.UIM_MC.D2_PT_1 ;
  wire \outDATA<2>\$WA4.UIM_MC.D2_PT_2 ;
  wire \outDATA<2>\$WA4.UIM_MC.D2_PT_3 ;
  wire \U1/U4/Latch0r<2>_MC.Q ;
  wire \U1/U4/Latch0r<2>_MC.D ;
  wire \U1/U4/Latch0r<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<2>_MC.D1 ;
  wire \U1/U4/Latch0r<2>_MC.D2 ;
  wire \U1/U4/Latch0r<2>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<2>_MC.D2_PT_1 ;
  wire \U1/U4/Latch0r<10>_MC.Q ;
  wire \U1/U4/Latch0r<10>_MC.D ;
  wire \U1/U4/Latch0r<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<10>_MC.D1 ;
  wire \U1/U4/Latch0r<10>_MC.D2 ;
  wire \U1/U4/Latch0r<10>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<10>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<2>_MC.Q ;
  wire \U1/U4/Latch1r<2>_MC.D ;
  wire \U1/U4/Latch1r<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<2>_MC.D1 ;
  wire \U1/U4/Latch1r<2>_MC.D2 ;
  wire \U1/U4/Latch1r<2>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<2>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<10>_MC.Q ;
  wire \U1/U4/Latch1r<10>_MC.D ;
  wire \U1/U4/Latch1r<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<10>_MC.D1 ;
  wire \U1/U4/Latch1r<10>_MC.D2 ;
  wire \U1/U4/Latch1r<10>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<10>_MC.D2_PT_1 ;
  wire \outDATA<2>\$WA5.UIM_MC.Q ;
  wire \outDATA<2>\$WA5.UIM_MC.D ;
  wire \outDATA<2>\$WA5.UIM_MC.D1 ;
  wire \outDATA<2>\$WA5.UIM_MC.D2 ;
  wire \outDATA<2>\$WA5.UIM_MC.D2_PT_0 ;
  wire \outDATA<2>\$WA5.UIM_MC.D2_PT_1 ;
  wire \outDATA<2>\$WA5.UIM_MC.D2_PT_2 ;
  wire \outDATA<2>\$WA5.UIM_MC.D2_PT_3 ;
  wire \outDATA<2>\$WA5.UIM_MC.D2_PT_4 ;
  wire \outDATA<2>\$WA5.UIM_MC.D2_PT_5 ;
  wire \U1/U3/holdingreg0<2>_MC.Q ;
  wire \U1/U3/holdingreg0<2>_MC.D ;
  wire \U1/U3/holdingreg0<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<2>_MC.D1 ;
  wire \U1/U3/holdingreg0<2>_MC.D2 ;
  wire \U1/U3/holdingreg0<2>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<2>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<2>_MC.Q ;
  wire \U1/U3/holdingreg1<2>_MC.D ;
  wire \U1/U3/holdingreg1<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<2>_MC.D1 ;
  wire \U1/U3/holdingreg1<2>_MC.D2 ;
  wire \U1/U3/holdingreg1<2>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<2>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<10>_MC.Q ;
  wire \U1/U3/holdingreg0<10>_MC.D ;
  wire \U1/U3/holdingreg0<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<10>_MC.D1 ;
  wire \U1/U3/holdingreg0<10>_MC.D2 ;
  wire \U1/U3/holdingreg0<10>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<10>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<10>_MC.Q ;
  wire \U1/U3/holdingreg1<10>_MC.D ;
  wire \U1/U3/holdingreg1<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<10>_MC.D1 ;
  wire \U1/U3/holdingreg1<10>_MC.D2 ;
  wire \U1/U3/holdingreg1<10>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<10>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<18>_MC.Q ;
  wire \U1/U3/holdingreg0<18>_MC.D ;
  wire \U1/U3/holdingreg0<18>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<18>_MC.D1 ;
  wire \U1/U3/holdingreg0<18>_MC.D2 ;
  wire \U1/U3/holdingreg0<18>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<18>_MC.D2_PT_1 ;
  wire \U1/Channel0<18>_MC.Q ;
  wire \U1/Channel0<18>_MC.D ;
  wire \U1/Channel0<18>_MC.D1 ;
  wire \U1/Channel0<18>_MC.D2 ;
  wire \U1/Channel0<18>_MC.D2_PT_0 ;
  wire \U1/Channel0<18>_MC.D2_PT_1 ;
  wire \U1/Channel0<18>_MC.D2_PT_2 ;
  wire \U1/Channel0<18>_MC.D2_PT_3 ;
  wire \U1/Channel0<18>_MC.D2_PT_4 ;
  wire \U1/U3/holdingreg1<18>_MC.Q ;
  wire \U1/U3/holdingreg1<18>_MC.D ;
  wire \U1/U3/holdingreg1<18>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<18>_MC.D1 ;
  wire \U1/U3/holdingreg1<18>_MC.D2 ;
  wire \U1/U3/holdingreg1<18>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<18>_MC.D2_PT_1 ;
  wire \U1/Channel1<18>_MC.Q ;
  wire \U1/Channel1<18>_MC.D ;
  wire \U1/Channel1<18>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<18>_MC.D1 ;
  wire \U1/Channel1<18>_MC.D2 ;
  wire \U1/Channel1<18>_MC.D2_PT_0 ;
  wire \U1/Channel1<18>_MC.D2_PT_1 ;
  wire \U1/Channel1<18>_MC.D2_PT_2 ;
  wire \outDATA<3>\$WA0.UIM_MC.Q ;
  wire \outDATA<3>\$WA0.UIM_MC.D ;
  wire \outDATA<3>\$WA0.UIM_MC.D1 ;
  wire \outDATA<3>\$WA0.UIM_MC.D2 ;
  wire \outDATA<3>\$WA1.UIM_MC.Q ;
  wire \outDATA<3>\$WA1.UIM_MC.D ;
  wire \outDATA<3>\$WA1.UIM_MC.D1 ;
  wire \outDATA<3>\$WA1.UIM_MC.D2 ;
  wire \outDATA<3>\$WA2.UIM_MC.Q ;
  wire \outDATA<3>\$WA2.UIM_MC.D ;
  wire \outDATA<3>\$WA2.UIM_MC.D1 ;
  wire \outDATA<3>\$WA2.UIM_MC.D2 ;
  wire \outDATA<3>\$WA3.UIM_MC.Q ;
  wire \outDATA<3>\$WA3.UIM_MC.D ;
  wire \outDATA<3>\$WA3.UIM_MC.D1 ;
  wire \outDATA<3>\$WA3.UIM_MC.D2 ;
  wire \outDATA<3>\$WA3.UIM_MC.D2_PT_0 ;
  wire \outDATA<3>\$WA3.UIM_MC.D2_PT_1 ;
  wire \outDATA<3>\$WA4.UIM_MC.Q ;
  wire \outDATA<3>\$WA4.UIM_MC.D ;
  wire \outDATA<3>\$WA4.UIM_MC.D1 ;
  wire \outDATA<3>\$WA4.UIM_MC.D2 ;
  wire \outDATA<3>\$WA4.UIM_MC.D2_PT_0 ;
  wire \outDATA<3>\$WA4.UIM_MC.D2_PT_1 ;
  wire \outDATA<3>\$WA4.UIM_MC.D2_PT_2 ;
  wire \outDATA<3>\$WA4.UIM_MC.D2_PT_3 ;
  wire \U1/U4/Latch0r<3>_MC.Q ;
  wire \U1/U4/Latch0r<3>_MC.D ;
  wire \U1/U4/Latch0r<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<3>_MC.D1 ;
  wire \U1/U4/Latch0r<3>_MC.D2 ;
  wire \U1/U4/Latch0r<3>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<3>_MC.D2_PT_1 ;
  wire \U1/U4/Latch0r<11>_MC.Q ;
  wire \U1/U4/Latch0r<11>_MC.D ;
  wire \U1/U4/Latch0r<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<11>_MC.D1 ;
  wire \U1/U4/Latch0r<11>_MC.D2 ;
  wire \U1/U4/Latch0r<11>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<11>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<3>_MC.Q ;
  wire \U1/U4/Latch1r<3>_MC.D ;
  wire \U1/U4/Latch1r<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<3>_MC.D1 ;
  wire \U1/U4/Latch1r<3>_MC.D2 ;
  wire \U1/U4/Latch1r<3>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<3>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<11>_MC.Q ;
  wire \U1/U4/Latch1r<11>_MC.D ;
  wire \U1/U4/Latch1r<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<11>_MC.D1 ;
  wire \U1/U4/Latch1r<11>_MC.D2 ;
  wire \U1/U4/Latch1r<11>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<11>_MC.D2_PT_1 ;
  wire \outDATA<3>\$WA5.UIM_MC.Q ;
  wire \outDATA<3>\$WA5.UIM_MC.D ;
  wire \outDATA<3>\$WA5.UIM_MC.D1 ;
  wire \outDATA<3>\$WA5.UIM_MC.D2 ;
  wire \outDATA<3>\$WA5.UIM_MC.D2_PT_0 ;
  wire \outDATA<3>\$WA5.UIM_MC.D2_PT_1 ;
  wire \outDATA<3>\$WA5.UIM_MC.D2_PT_2 ;
  wire \outDATA<3>\$WA5.UIM_MC.D2_PT_3 ;
  wire \outDATA<3>\$WA5.UIM_MC.D2_PT_4 ;
  wire \outDATA<3>\$WA5.UIM_MC.D2_PT_5 ;
  wire \U1/U3/holdingreg0<3>_MC.Q ;
  wire \U1/U3/holdingreg0<3>_MC.D ;
  wire \U1/U3/holdingreg0<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<3>_MC.D1 ;
  wire \U1/U3/holdingreg0<3>_MC.D2 ;
  wire \U1/U3/holdingreg0<3>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<3>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<3>_MC.Q ;
  wire \U1/U3/holdingreg1<3>_MC.D ;
  wire \U1/U3/holdingreg1<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<3>_MC.D1 ;
  wire \U1/U3/holdingreg1<3>_MC.D2 ;
  wire \U1/U3/holdingreg1<3>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<3>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<11>_MC.Q ;
  wire \U1/U3/holdingreg0<11>_MC.D ;
  wire \U1/U3/holdingreg0<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<11>_MC.D1 ;
  wire \U1/U3/holdingreg0<11>_MC.D2 ;
  wire \U1/U3/holdingreg0<11>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<11>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<11>_MC.Q ;
  wire \U1/U3/holdingreg1<11>_MC.D ;
  wire \U1/U3/holdingreg1<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<11>_MC.D1 ;
  wire \U1/U3/holdingreg1<11>_MC.D2 ;
  wire \U1/U3/holdingreg1<11>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<11>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<19>_MC.Q ;
  wire \U1/U3/holdingreg0<19>_MC.D ;
  wire \U1/U3/holdingreg0<19>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<19>_MC.D1 ;
  wire \U1/U3/holdingreg0<19>_MC.D2 ;
  wire \U1/U3/holdingreg0<19>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<19>_MC.D2_PT_1 ;
  wire \U1/Channel0<19>_MC.Q ;
  wire \U1/Channel0<19>_MC.D ;
  wire \U1/Channel0<19>_MC.D1 ;
  wire \U1/Channel0<19>_MC.D2 ;
  wire \U1/Channel0<19>_MC.D2_PT_0 ;
  wire \U1/Channel0<19>_MC.D2_PT_1 ;
  wire \U1/Channel0<19>_MC.D2_PT_2 ;
  wire \U1/Channel0<19>_MC.D2_PT_3 ;
  wire \U1/Channel0<19>_MC.D2_PT_4 ;
  wire \U1/U3/holdingreg1<19>_MC.Q ;
  wire \U1/U3/holdingreg1<19>_MC.D ;
  wire \U1/U3/holdingreg1<19>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<19>_MC.D1 ;
  wire \U1/U3/holdingreg1<19>_MC.D2 ;
  wire \U1/U3/holdingreg1<19>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<19>_MC.D2_PT_1 ;
  wire \U1/Channel1<19>_MC.Q ;
  wire \U1/Channel1<19>_MC.D ;
  wire \U1/Channel1<19>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<19>_MC.D1 ;
  wire \U1/Channel1<19>_MC.D2 ;
  wire \U1/Channel1<19>_MC.D2_PT_0 ;
  wire \U1/Channel1<19>_MC.D2_PT_1 ;
  wire \U1/Channel1<19>_MC.D2_PT_2 ;
  wire \outDATA<4>\$WA0.UIM_MC.Q ;
  wire \outDATA<4>\$WA0.UIM_MC.D ;
  wire \outDATA<4>\$WA0.UIM_MC.D1 ;
  wire \outDATA<4>\$WA0.UIM_MC.D2 ;
  wire \outDATA<4>\$WA1.UIM_MC.Q ;
  wire \outDATA<4>\$WA1.UIM_MC.D ;
  wire \outDATA<4>\$WA1.UIM_MC.D1 ;
  wire \outDATA<4>\$WA1.UIM_MC.D2 ;
  wire \outDATA<4>\$WA2.UIM_MC.Q ;
  wire \outDATA<4>\$WA2.UIM_MC.D ;
  wire \outDATA<4>\$WA2.UIM_MC.D1 ;
  wire \outDATA<4>\$WA2.UIM_MC.D2 ;
  wire \outDATA<4>\$WA3.UIM_MC.Q ;
  wire \outDATA<4>\$WA3.UIM_MC.D ;
  wire \outDATA<4>\$WA3.UIM_MC.D1 ;
  wire \outDATA<4>\$WA3.UIM_MC.D2 ;
  wire \outDATA<4>\$WA3.UIM_MC.D2_PT_0 ;
  wire \outDATA<4>\$WA3.UIM_MC.D2_PT_1 ;
  wire \outDATA<4>\$WA4.UIM_MC.Q ;
  wire \outDATA<4>\$WA4.UIM_MC.D ;
  wire \outDATA<4>\$WA4.UIM_MC.D1 ;
  wire \outDATA<4>\$WA4.UIM_MC.D2 ;
  wire \outDATA<4>\$WA4.UIM_MC.D2_PT_0 ;
  wire \outDATA<4>\$WA4.UIM_MC.D2_PT_1 ;
  wire \outDATA<4>\$WA4.UIM_MC.D2_PT_2 ;
  wire \outDATA<4>\$WA4.UIM_MC.D2_PT_3 ;
  wire \U1/U4/Latch0r<4>_MC.Q ;
  wire \U1/U4/Latch0r<4>_MC.D ;
  wire \U1/U4/Latch0r<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<4>_MC.D1 ;
  wire \U1/U4/Latch0r<4>_MC.D2 ;
  wire \U1/U4/Latch0r<4>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<4>_MC.D2_PT_1 ;
  wire \U1/U4/Latch0r<12>_MC.Q ;
  wire \U1/U4/Latch0r<12>_MC.D ;
  wire \U1/U4/Latch0r<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<12>_MC.D1 ;
  wire \U1/U4/Latch0r<12>_MC.D2 ;
  wire \U1/U4/Latch0r<12>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<12>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<4>_MC.Q ;
  wire \U1/U4/Latch1r<4>_MC.D ;
  wire \U1/U4/Latch1r<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<4>_MC.D1 ;
  wire \U1/U4/Latch1r<4>_MC.D2 ;
  wire \U1/U4/Latch1r<4>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<4>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<12>_MC.Q ;
  wire \U1/U4/Latch1r<12>_MC.D ;
  wire \U1/U4/Latch1r<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<12>_MC.D1 ;
  wire \U1/U4/Latch1r<12>_MC.D2 ;
  wire \U1/U4/Latch1r<12>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<12>_MC.D2_PT_1 ;
  wire \outDATA<4>\$WA5.UIM_MC.Q ;
  wire \outDATA<4>\$WA5.UIM_MC.D ;
  wire \outDATA<4>\$WA5.UIM_MC.D1 ;
  wire \outDATA<4>\$WA5.UIM_MC.D2 ;
  wire \outDATA<4>\$WA5.UIM_MC.D2_PT_0 ;
  wire \outDATA<4>\$WA5.UIM_MC.D2_PT_1 ;
  wire \outDATA<4>\$WA5.UIM_MC.D2_PT_2 ;
  wire \outDATA<4>\$WA5.UIM_MC.D2_PT_3 ;
  wire \outDATA<4>\$WA5.UIM_MC.D2_PT_4 ;
  wire \outDATA<4>\$WA5.UIM_MC.D2_PT_5 ;
  wire \U1/U3/holdingreg0<4>_MC.Q ;
  wire \U1/U3/holdingreg0<4>_MC.D ;
  wire \U1/U3/holdingreg0<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<4>_MC.D1 ;
  wire \U1/U3/holdingreg0<4>_MC.D2 ;
  wire \U1/U3/holdingreg0<4>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<4>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<4>_MC.Q ;
  wire \U1/U3/holdingreg1<4>_MC.D ;
  wire \U1/U3/holdingreg1<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<4>_MC.D1 ;
  wire \U1/U3/holdingreg1<4>_MC.D2 ;
  wire \U1/U3/holdingreg1<4>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<4>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<12>_MC.Q ;
  wire \U1/U3/holdingreg0<12>_MC.D ;
  wire \U1/U3/holdingreg0<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<12>_MC.D1 ;
  wire \U1/U3/holdingreg0<12>_MC.D2 ;
  wire \U1/U3/holdingreg0<12>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<12>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<12>_MC.Q ;
  wire \U1/U3/holdingreg1<12>_MC.D ;
  wire \U1/U3/holdingreg1<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<12>_MC.D1 ;
  wire \U1/U3/holdingreg1<12>_MC.D2 ;
  wire \U1/U3/holdingreg1<12>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<12>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<20>_MC.Q ;
  wire \U1/U3/holdingreg0<20>_MC.D ;
  wire \U1/U3/holdingreg0<20>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<20>_MC.D1 ;
  wire \U1/U3/holdingreg0<20>_MC.D2 ;
  wire \U1/U3/holdingreg0<20>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<20>_MC.D2_PT_1 ;
  wire \U1/Channel0<20>_MC.Q ;
  wire \U1/Channel0<20>_MC.D ;
  wire \U1/Channel0<20>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<20>_MC.D1 ;
  wire \U1/Channel0<20>_MC.D2 ;
  wire \U1/Channel0<20>_MC.D2_PT_0 ;
  wire \U1/Channel0<20>_MC.D2_PT_1 ;
  wire \U1/Channel0<20>_MC.D2_PT_2 ;
  wire \U1/U3/holdingreg1<20>_MC.Q ;
  wire \U1/U3/holdingreg1<20>_MC.D ;
  wire \U1/U3/holdingreg1<20>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<20>_MC.D1 ;
  wire \U1/U3/holdingreg1<20>_MC.D2 ;
  wire \U1/U3/holdingreg1<20>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<20>_MC.D2_PT_1 ;
  wire \U1/Channel1<20>_MC.Q ;
  wire \U1/Channel1<20>_MC.D ;
  wire \U1/Channel1<20>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<20>_MC.D1 ;
  wire \U1/Channel1<20>_MC.D2 ;
  wire \U1/Channel1<20>_MC.D2_PT_0 ;
  wire \U1/Channel1<20>_MC.D2_PT_1 ;
  wire \U1/Channel1<20>_MC.D2_PT_2 ;
  wire \outDATA<5>\$WA0.UIM_MC.Q ;
  wire \outDATA<5>\$WA0.UIM_MC.D ;
  wire \outDATA<5>\$WA0.UIM_MC.D1 ;
  wire \outDATA<5>\$WA0.UIM_MC.D2 ;
  wire \outDATA<5>\$WA1.UIM_MC.Q ;
  wire \outDATA<5>\$WA1.UIM_MC.D ;
  wire \outDATA<5>\$WA1.UIM_MC.D1 ;
  wire \outDATA<5>\$WA1.UIM_MC.D2 ;
  wire \outDATA<5>\$WA2.UIM_MC.Q ;
  wire \outDATA<5>\$WA2.UIM_MC.D ;
  wire \outDATA<5>\$WA2.UIM_MC.D1 ;
  wire \outDATA<5>\$WA2.UIM_MC.D2 ;
  wire \outDATA<5>\$WA3.UIM_MC.Q ;
  wire \outDATA<5>\$WA3.UIM_MC.D ;
  wire \outDATA<5>\$WA3.UIM_MC.D1 ;
  wire \outDATA<5>\$WA3.UIM_MC.D2 ;
  wire \outDATA<5>\$WA3.UIM_MC.D2_PT_0 ;
  wire \outDATA<5>\$WA3.UIM_MC.D2_PT_1 ;
  wire \outDATA<5>\$WA4.UIM_MC.Q ;
  wire \outDATA<5>\$WA4.UIM_MC.D ;
  wire \outDATA<5>\$WA4.UIM_MC.D1 ;
  wire \outDATA<5>\$WA4.UIM_MC.D2 ;
  wire \outDATA<5>\$WA4.UIM_MC.D2_PT_0 ;
  wire \outDATA<5>\$WA4.UIM_MC.D2_PT_1 ;
  wire \outDATA<5>\$WA4.UIM_MC.D2_PT_2 ;
  wire \outDATA<5>\$WA4.UIM_MC.D2_PT_3 ;
  wire \U1/U4/Latch0r<5>_MC.Q ;
  wire \U1/U4/Latch0r<5>_MC.D ;
  wire \U1/U4/Latch0r<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<5>_MC.D1 ;
  wire \U1/U4/Latch0r<5>_MC.D2 ;
  wire \U1/U4/Latch0r<5>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<5>_MC.D2_PT_1 ;
  wire \U1/U4/Latch0r<13>_MC.Q ;
  wire \U1/U4/Latch0r<13>_MC.D ;
  wire \U1/U4/Latch0r<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<13>_MC.D1 ;
  wire \U1/U4/Latch0r<13>_MC.D2 ;
  wire \U1/U4/Latch0r<13>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<13>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<5>_MC.Q ;
  wire \U1/U4/Latch1r<5>_MC.D ;
  wire \U1/U4/Latch1r<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<5>_MC.D1 ;
  wire \U1/U4/Latch1r<5>_MC.D2 ;
  wire \U1/U4/Latch1r<5>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<5>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<13>_MC.Q ;
  wire \U1/U4/Latch1r<13>_MC.D ;
  wire \U1/U4/Latch1r<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<13>_MC.D1 ;
  wire \U1/U4/Latch1r<13>_MC.D2 ;
  wire \U1/U4/Latch1r<13>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<13>_MC.D2_PT_1 ;
  wire \outDATA<5>\$WA5.UIM_MC.Q ;
  wire \outDATA<5>\$WA5.UIM_MC.D ;
  wire \outDATA<5>\$WA5.UIM_MC.D1 ;
  wire \outDATA<5>\$WA5.UIM_MC.D2 ;
  wire \outDATA<5>\$WA5.UIM_MC.D2_PT_0 ;
  wire \outDATA<5>\$WA5.UIM_MC.D2_PT_1 ;
  wire \outDATA<5>\$WA5.UIM_MC.D2_PT_2 ;
  wire \outDATA<5>\$WA5.UIM_MC.D2_PT_3 ;
  wire \outDATA<5>\$WA5.UIM_MC.D2_PT_4 ;
  wire \outDATA<5>\$WA5.UIM_MC.D2_PT_5 ;
  wire \U1/U3/holdingreg0<5>_MC.Q ;
  wire \U1/U3/holdingreg0<5>_MC.D ;
  wire \U1/U3/holdingreg0<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<5>_MC.D1 ;
  wire \U1/U3/holdingreg0<5>_MC.D2 ;
  wire \U1/U3/holdingreg0<5>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<5>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<5>_MC.Q ;
  wire \U1/U3/holdingreg1<5>_MC.D ;
  wire \U1/U3/holdingreg1<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<5>_MC.D1 ;
  wire \U1/U3/holdingreg1<5>_MC.D2 ;
  wire \U1/U3/holdingreg1<5>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<5>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<13>_MC.Q ;
  wire \U1/U3/holdingreg0<13>_MC.D ;
  wire \U1/U3/holdingreg0<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<13>_MC.D1 ;
  wire \U1/U3/holdingreg0<13>_MC.D2 ;
  wire \U1/U3/holdingreg0<13>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<13>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<13>_MC.Q ;
  wire \U1/U3/holdingreg1<13>_MC.D ;
  wire \U1/U3/holdingreg1<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<13>_MC.D1 ;
  wire \U1/U3/holdingreg1<13>_MC.D2 ;
  wire \U1/U3/holdingreg1<13>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<13>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<21>_MC.Q ;
  wire \U1/U3/holdingreg0<21>_MC.D ;
  wire \U1/U3/holdingreg0<21>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<21>_MC.D1 ;
  wire \U1/U3/holdingreg0<21>_MC.D2 ;
  wire \U1/U3/holdingreg0<21>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<21>_MC.D2_PT_1 ;
  wire \U1/Channel0<21>_MC.Q ;
  wire \U1/Channel0<21>_MC.D ;
  wire \U1/Channel0<21>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<21>_MC.D1 ;
  wire \U1/Channel0<21>_MC.D2 ;
  wire \U1/Channel0<21>_MC.D2_PT_0 ;
  wire \U1/Channel0<21>_MC.D2_PT_1 ;
  wire \U1/Channel0<21>_MC.D2_PT_2 ;
  wire \U1/U3/holdingreg1<21>_MC.Q ;
  wire \U1/U3/holdingreg1<21>_MC.D ;
  wire \U1/U3/holdingreg1<21>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<21>_MC.D1 ;
  wire \U1/U3/holdingreg1<21>_MC.D2 ;
  wire \U1/U3/holdingreg1<21>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<21>_MC.D2_PT_1 ;
  wire \U1/Channel1<21>_MC.Q ;
  wire \U1/Channel1<21>_MC.D ;
  wire \U1/Channel1<21>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<21>_MC.D1 ;
  wire \U1/Channel1<21>_MC.D2 ;
  wire \U1/Channel1<21>_MC.D2_PT_0 ;
  wire \U1/Channel1<21>_MC.D2_PT_1 ;
  wire \U1/Channel1<21>_MC.D2_PT_2 ;
  wire \outDATA<6>\$WA0.UIM_MC.Q ;
  wire \outDATA<6>\$WA0.UIM_MC.D ;
  wire \outDATA<6>\$WA0.UIM_MC.D1 ;
  wire \outDATA<6>\$WA0.UIM_MC.D2 ;
  wire \outDATA<6>\$WA2.UIM_MC.Q ;
  wire \outDATA<6>\$WA2.UIM_MC.D ;
  wire \outDATA<6>\$WA2.UIM_MC.D1 ;
  wire \outDATA<6>\$WA2.UIM_MC.D2 ;
  wire \outDATA<6>\$WA3.UIM_MC.Q ;
  wire \outDATA<6>\$WA3.UIM_MC.D ;
  wire \outDATA<6>\$WA3.UIM_MC.D1 ;
  wire \outDATA<6>\$WA3.UIM_MC.D2 ;
  wire \outDATA<6>\$WA3.UIM_MC.D2_PT_0 ;
  wire \outDATA<6>\$WA3.UIM_MC.D2_PT_1 ;
  wire \outDATA<6>\$WA4.UIM_MC.Q ;
  wire \outDATA<6>\$WA4.UIM_MC.D ;
  wire \outDATA<6>\$WA4.UIM_MC.D1 ;
  wire \outDATA<6>\$WA4.UIM_MC.D2 ;
  wire \outDATA<6>\$WA4.UIM_MC.D2_PT_0 ;
  wire \outDATA<6>\$WA4.UIM_MC.D2_PT_1 ;
  wire \outDATA<6>\$WA4.UIM_MC.D2_PT_2 ;
  wire \outDATA<6>\$WA4.UIM_MC.D2_PT_3 ;
  wire \U1/U4/Latch0r<6>_MC.Q ;
  wire \U1/U4/Latch0r<6>_MC.D ;
  wire \U1/U4/Latch0r<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<6>_MC.D1 ;
  wire \U1/U4/Latch0r<6>_MC.D2 ;
  wire \U1/U4/Latch0r<6>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<6>_MC.D2_PT_1 ;
  wire \U1/U4/Latch0r<14>_MC.Q ;
  wire \U1/U4/Latch0r<14>_MC.D ;
  wire \U1/U4/Latch0r<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<14>_MC.D1 ;
  wire \U1/U4/Latch0r<14>_MC.D2 ;
  wire \U1/U4/Latch0r<14>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<14>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<6>_MC.Q ;
  wire \U1/U4/Latch1r<6>_MC.D ;
  wire \U1/U4/Latch1r<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<6>_MC.D1 ;
  wire \U1/U4/Latch1r<6>_MC.D2 ;
  wire \U1/U4/Latch1r<6>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<6>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<14>_MC.Q ;
  wire \U1/U4/Latch1r<14>_MC.D ;
  wire \U1/U4/Latch1r<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<14>_MC.D1 ;
  wire \U1/U4/Latch1r<14>_MC.D2 ;
  wire \U1/U4/Latch1r<14>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<14>_MC.D2_PT_1 ;
  wire \outDATA<6>\$WA5.UIM_MC.Q ;
  wire \outDATA<6>\$WA5.UIM_MC.D ;
  wire \outDATA<6>\$WA5.UIM_MC.D1 ;
  wire \outDATA<6>\$WA5.UIM_MC.D2 ;
  wire \outDATA<6>\$WA5.UIM_MC.D2_PT_0 ;
  wire \outDATA<6>\$WA5.UIM_MC.D2_PT_1 ;
  wire \outDATA<6>\$WA5.UIM_MC.D2_PT_2 ;
  wire \outDATA<6>\$WA5.UIM_MC.D2_PT_3 ;
  wire \outDATA<6>\$WA5.UIM_MC.D2_PT_4 ;
  wire \outDATA<6>\$WA5.UIM_MC.D2_PT_5 ;
  wire \U1/U3/holdingreg0<6>_MC.Q ;
  wire \U1/U3/holdingreg0<6>_MC.D ;
  wire \U1/U3/holdingreg0<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<6>_MC.D1 ;
  wire \U1/U3/holdingreg0<6>_MC.D2 ;
  wire \U1/U3/holdingreg0<6>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<6>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<6>_MC.Q ;
  wire \U1/U3/holdingreg1<6>_MC.D ;
  wire \U1/U3/holdingreg1<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<6>_MC.D1 ;
  wire \U1/U3/holdingreg1<6>_MC.D2 ;
  wire \U1/U3/holdingreg1<6>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<6>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<14>_MC.Q ;
  wire \U1/U3/holdingreg0<14>_MC.D ;
  wire \U1/U3/holdingreg0<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<14>_MC.D1 ;
  wire \U1/U3/holdingreg0<14>_MC.D2 ;
  wire \U1/U3/holdingreg0<14>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<14>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<14>_MC.Q ;
  wire \U1/U3/holdingreg1<14>_MC.D ;
  wire \U1/U3/holdingreg1<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<14>_MC.D1 ;
  wire \U1/U3/holdingreg1<14>_MC.D2 ;
  wire \U1/U3/holdingreg1<14>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<14>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<22>_MC.Q ;
  wire \U1/U3/holdingreg0<22>_MC.D ;
  wire \U1/U3/holdingreg0<22>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<22>_MC.D1 ;
  wire \U1/U3/holdingreg0<22>_MC.D2 ;
  wire \U1/U3/holdingreg0<22>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<22>_MC.D2_PT_1 ;
  wire \U1/Channel0<22>_MC.Q ;
  wire \U1/Channel0<22>_MC.D ;
  wire \U1/Channel0<22>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<22>_MC.D1 ;
  wire \U1/Channel0<22>_MC.D2 ;
  wire \U1/Channel0<22>_MC.D2_PT_0 ;
  wire \U1/Channel0<22>_MC.D2_PT_1 ;
  wire \U1/Channel0<22>_MC.D2_PT_2 ;
  wire \U1/U3/holdingreg1<22>_MC.Q ;
  wire \U1/U3/holdingreg1<22>_MC.D ;
  wire \U1/U3/holdingreg1<22>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<22>_MC.D1 ;
  wire \U1/U3/holdingreg1<22>_MC.D2 ;
  wire \U1/U3/holdingreg1<22>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<22>_MC.D2_PT_1 ;
  wire \U1/Channel1<22>_MC.Q ;
  wire \U1/Channel1<22>_MC.D ;
  wire \U1/Channel1<22>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<22>_MC.D1 ;
  wire \U1/Channel1<22>_MC.D2 ;
  wire \U1/Channel1<22>_MC.D2_PT_0 ;
  wire \U1/Channel1<22>_MC.D2_PT_1 ;
  wire \U1/Channel1<22>_MC.D2_PT_2 ;
  wire \outDATA<7>\$WA0.UIM_MC.Q ;
  wire \outDATA<7>\$WA0.UIM_MC.D ;
  wire \outDATA<7>\$WA0.UIM_MC.D1 ;
  wire \outDATA<7>\$WA0.UIM_MC.D2 ;
  wire \outDATA<7>\$WA1.UIM_MC.Q ;
  wire \outDATA<7>\$WA1.UIM_MC.D ;
  wire \outDATA<7>\$WA1.UIM_MC.D1 ;
  wire \outDATA<7>\$WA1.UIM_MC.D2 ;
  wire \outDATA<7>\$WA2.UIM_MC.Q ;
  wire \outDATA<7>\$WA2.UIM_MC.D ;
  wire \outDATA<7>\$WA2.UIM_MC.D1 ;
  wire \outDATA<7>\$WA2.UIM_MC.D2 ;
  wire \outDATA<7>\$WA3.UIM_MC.Q ;
  wire \outDATA<7>\$WA3.UIM_MC.D ;
  wire \outDATA<7>\$WA3.UIM_MC.D1 ;
  wire \outDATA<7>\$WA3.UIM_MC.D2 ;
  wire \outDATA<7>\$WA3.UIM_MC.D2_PT_0 ;
  wire \outDATA<7>\$WA3.UIM_MC.D2_PT_1 ;
  wire \outDATA<7>\$WA4.UIM_MC.Q ;
  wire \outDATA<7>\$WA4.UIM_MC.D ;
  wire \outDATA<7>\$WA4.UIM_MC.D1 ;
  wire \outDATA<7>\$WA4.UIM_MC.D2 ;
  wire \outDATA<7>\$WA4.UIM_MC.D2_PT_0 ;
  wire \outDATA<7>\$WA4.UIM_MC.D2_PT_1 ;
  wire \outDATA<7>\$WA4.UIM_MC.D2_PT_2 ;
  wire \outDATA<7>\$WA4.UIM_MC.D2_PT_3 ;
  wire \U1/U4/Latch0r<7>_MC.Q ;
  wire \U1/U4/Latch0r<7>_MC.D ;
  wire \U1/U4/Latch0r<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<7>_MC.D1 ;
  wire \U1/U4/Latch0r<7>_MC.D2 ;
  wire \U1/U4/Latch0r<7>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<7>_MC.D2_PT_1 ;
  wire \U1/U4/Latch0r<15>_MC.Q ;
  wire \U1/U4/Latch0r<15>_MC.D ;
  wire \U1/U4/Latch0r<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch0r<15>_MC.D1 ;
  wire \U1/U4/Latch0r<15>_MC.D2 ;
  wire \U1/U4/Latch0r<15>_MC.D2_PT_0 ;
  wire \U1/U4/Latch0r<15>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<7>_MC.Q ;
  wire \U1/U4/Latch1r<7>_MC.D ;
  wire \U1/U4/Latch1r<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<7>_MC.D1 ;
  wire \U1/U4/Latch1r<7>_MC.D2 ;
  wire \U1/U4/Latch1r<7>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<7>_MC.D2_PT_1 ;
  wire \U1/U4/Latch1r<15>_MC.Q ;
  wire \U1/U4/Latch1r<15>_MC.D ;
  wire \U1/U4/Latch1r<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U4/Latch1r<15>_MC.D1 ;
  wire \U1/U4/Latch1r<15>_MC.D2 ;
  wire \U1/U4/Latch1r<15>_MC.D2_PT_0 ;
  wire \U1/U4/Latch1r<15>_MC.D2_PT_1 ;
  wire \outDATA<7>\$WA5.UIM_MC.Q ;
  wire \outDATA<7>\$WA5.UIM_MC.D ;
  wire \outDATA<7>\$WA5.UIM_MC.D1 ;
  wire \outDATA<7>\$WA5.UIM_MC.D2 ;
  wire \outDATA<7>\$WA5.UIM_MC.D2_PT_0 ;
  wire \outDATA<7>\$WA5.UIM_MC.D2_PT_1 ;
  wire \outDATA<7>\$WA5.UIM_MC.D2_PT_2 ;
  wire \outDATA<7>\$WA5.UIM_MC.D2_PT_3 ;
  wire \outDATA<7>\$WA5.UIM_MC.D2_PT_4 ;
  wire \outDATA<7>\$WA5.UIM_MC.D2_PT_5 ;
  wire \U1/U3/holdingreg0<7>_MC.Q ;
  wire \U1/U3/holdingreg0<7>_MC.D ;
  wire \U1/U3/holdingreg0<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<7>_MC.D1 ;
  wire \U1/U3/holdingreg0<7>_MC.D2 ;
  wire \U1/U3/holdingreg0<7>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<7>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<7>_MC.Q ;
  wire \U1/U3/holdingreg1<7>_MC.D ;
  wire \U1/U3/holdingreg1<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<7>_MC.D1 ;
  wire \U1/U3/holdingreg1<7>_MC.D2 ;
  wire \U1/U3/holdingreg1<7>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<7>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<15>_MC.Q ;
  wire \U1/U3/holdingreg0<15>_MC.D ;
  wire \U1/U3/holdingreg0<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<15>_MC.D1 ;
  wire \U1/U3/holdingreg0<15>_MC.D2 ;
  wire \U1/U3/holdingreg0<15>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<15>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg1<15>_MC.Q ;
  wire \U1/U3/holdingreg1<15>_MC.D ;
  wire \U1/U3/holdingreg1<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<15>_MC.D1 ;
  wire \U1/U3/holdingreg1<15>_MC.D2 ;
  wire \U1/U3/holdingreg1<15>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<15>_MC.D2_PT_1 ;
  wire \U1/U3/holdingreg0<23>_MC.Q ;
  wire \U1/U3/holdingreg0<23>_MC.D ;
  wire \U1/U3/holdingreg0<23>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg0<23>_MC.D1 ;
  wire \U1/U3/holdingreg0<23>_MC.D2 ;
  wire \U1/U3/holdingreg0<23>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg0<23>_MC.D2_PT_1 ;
  wire \U1/Channel0<23>_MC.Q ;
  wire \U1/Channel0<23>_MC.D ;
  wire \U1/Channel0<23>_MC_tsimcreated_xor_ ;
  wire \U1/Channel0<23>_MC.D1 ;
  wire \U1/Channel0<23>_MC.D2 ;
  wire \U1/Channel0<23>_MC.D2_PT_0 ;
  wire \U1/Channel0<23>_MC.D2_PT_1 ;
  wire \U1/Channel0<23>_MC.D2_PT_2 ;
  wire \U1/U3/holdingreg1<23>_MC.Q ;
  wire \U1/U3/holdingreg1<23>_MC.D ;
  wire \U1/U3/holdingreg1<23>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ;
  wire \U1/U3/holdingreg1<23>_MC.D1 ;
  wire \U1/U3/holdingreg1<23>_MC.D2 ;
  wire \U1/U3/holdingreg1<23>_MC.D2_PT_0 ;
  wire \U1/U3/holdingreg1<23>_MC.D2_PT_1 ;
  wire \U1/Channel1<23>_MC.Q ;
  wire \U1/Channel1<23>_MC.D ;
  wire \U1/Channel1<23>_MC_tsimcreated_xor_ ;
  wire \U1/Channel1<23>_MC.D1 ;
  wire \U1/Channel1<23>_MC.D2 ;
  wire \U1/Channel1<23>_MC.D2_PT_0 ;
  wire \U1/Channel1<23>_MC.D2_PT_1 ;
  wire \U1/Channel1<23>_MC.D2_PT_2 ;
  wire \NlwInverterSignal_Enc033ctrl_MC.D/IN0 ;
  wire \NlwInverterSignal_Enc033ctrl_MC.D1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<2>_MC.D/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_DCORENCPWRw_MC.D1/IN0 ;
  wire \NlwInverterSignal_DCORENCPWRw_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCORENCPWRw_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCORENCPWRw_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCORENCPWRw_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCORENCPWRw_MC.D1/IN7 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN7 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN6 ;
  wire \NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U2_AutoInc_MC.D/IN0 ;
  wire \NlwInverterSignal_N_PZ_1082_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_N_PZ_1082_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1082_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN5 ;
  wire \NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN8 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN5 ;
  wire \NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN9 ;
  wire \NlwInverterSignal_U2_Enable_AD_MC.D1/IN1 ;
  wire \NlwInverterSignal_U2_Enable_AD_MC.D1/IN2 ;
  wire \NlwInverterSignal_U2_Enable_AD_MC.D1/IN3 ;
  wire \NlwInverterSignal_U2_Enable_AD_MC.D1/IN4 ;
  wire \NlwInverterSignal_U2_Enable_AD_MC.D1/IN5 ;
  wire \NlwInverterSignal_U4/ctrlr<3>_MC.D/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_Enc05ctrl_MC.D/IN0 ;
  wire \NlwInverterSignal_Enc05ctrl_MC.D1/IN0 ;
  wire \NlwInverterSignal_Enc133ctrl_MC.D/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<6>_MC.D/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<7>_MC.D/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_Enc15ctrl_MC.D/IN0 ;
  wire \NlwInverterSignal_Enc15ctrl_MC.D1/IN0 ;
  wire \NlwInverterSignal_DCOROUTw_MC.D1/IN0 ;
  wire \NlwInverterSignal_DCOROUTw_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOROUTw_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOROUTw_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOROUTw_MC.D1/IN7 ;
  wire \NlwInverterSignal_Home033ctrl_MC.D/IN0 ;
  wire \NlwInverterSignal_Home033ctrl_MC.D1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<0>_MC.D/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_6/IN0 ;
  wire \NlwInverterSignal_Home05ctrl_MC.D/IN0 ;
  wire \NlwInverterSignal_Home05ctrl_MC.D1/IN0 ;
  wire \NlwInverterSignal_Home133ctrl_MC.D/IN0 ;
  wire \NlwInverterSignal_Home133ctrl_MC.D1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<4>_MC.D/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<5>_MC.D/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_Home15ctrl_MC.D/IN0 ;
  wire \NlwInverterSignal_Home15ctrl_MC.D1/IN0 ;
  wire \NlwInverterSignal_INT_MC.D2_PT_7/IN1 ;
  wire \NlwInverterSignal_INT_MC.D2_PT_7/IN2 ;
  wire \NlwInverterSignal_INT_MC.D2_PT_7/IN3 ;
  wire \NlwInverterSignal_INT_MC.D2_PT_7/IN4 ;
  wire \NlwInverterSignal_INT_MC.D2_PT_7/IN5 ;
  wire \NlwInverterSignal_INT_MC.D2_PT_7/IN6 ;
  wire \NlwInverterSignal_U3/DCORIE<0>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<0>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_DCORIEw_MC.D1/IN0 ;
  wire \NlwInverterSignal_DCORIEw_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCORIEw_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCORIEw_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCORIEw_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCORIEw_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCORIEw_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCORIEw_MC.D1/IN8 ;
  wire \NlwInverterSignal_DCORIEw_MC.D1/IN9 ;
  wire \NlwInverterSignal_NET2528_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_NET2528_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_NET2528_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET2528_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_NET2528_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_NET2528_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_DCORIFGw_MC.D1/IN0 ;
  wire \NlwInverterSignal_DCORIFGw_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCORIFGw_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCORIFGw_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCORIFGw_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCORIFGw_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCORIFGw_MC.D1/IN8 ;
  wire \NlwInverterSignal_DCORIFGw_MC.D1/IN9 ;
  wire \NlwInverterSignal_U3/DCORIE<1>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<1>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<1>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_0/IN4 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_NET2482_MC.D2_PT_3/IN5 ;
  wire \NlwInverterSignal_DCORENCCTLw_MC.D1/IN0 ;
  wire \NlwInverterSignal_DCORENCCTLw_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCORENCCTLw_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCORENCCTLw_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCORENCCTLw_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCORENCCTLw_MC.D1/IN8 ;
  wire \NlwInverterSignal_DCORENCCTLw_MC.D1/IN9 ;
  wire \NlwInverterSignal_U1/U4/RF0r_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/RF0r_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/RF0r_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U3/DCORIE<2>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<2>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<2>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_0/IN4 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_2/IN7 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_NET2493_MC.D2_PT_3/IN6 ;
  wire \NlwInverterSignal_U1/U4/RF1r_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/RF1r_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/RF1r_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/E1r_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/E1r_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/E1r_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U3/DCORIE<3>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<3>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<3>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_NET2575_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_U3/DCORIE<4>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<4>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<4>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET2501_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_NET2501_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_NET2501_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET2501_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_NET2501_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_NET2501_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_NET2501_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN5 ;
  wire \NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/U4/LatchEdge0r_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/LatchEdge0r_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/LatchEdge0r_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U3/DCORIE<5>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<5>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<5>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_0/IN4 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_NET2512_MC.D2_PT_3/IN5 ;
  wire \NlwInverterSignal_U1/U4/LatchEdge1r_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/LatchEdge1r_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/LatchEdge1r_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U3/DCORIE<6>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<6>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<6>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U3/DCORIE<7>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<7>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U3/DCORIE<7>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_6/IN3 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_6/IN4 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN3 ;
  wire \NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN4 ;
  wire \NlwInverterSignal_N_PZ_1389_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U11_Incdetect_MC.D1/IN0 ;
  wire \NlwInverterSignal_U11_ResetDetect_MC.D1/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN5 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN6 ;
  wire \NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN7 ;
  wire \NlwInverterSignal_U11_SCLdetect_MC.D1/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN5 ;
  wire \NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN7 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_6/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_6/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_6/IN3 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN3 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN4 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN5 ;
  wire \NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN6 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN7 ;
  wire \NlwInverterSignal_N_PZ_1332_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_LED1_MC.D/IN0 ;
  wire \NlwInverterSignal_LED1_MC.D1/IN1 ;
  wire \NlwInverterSignal_LED2_MC.D/IN0 ;
  wire \NlwInverterSignal_LED2_MC.D1/IN1 ;
  wire \NlwInverterSignal_LED3_MC.D/IN0 ;
  wire \NlwInverterSignal_LED3_MC.D1/IN1 ;
  wire \NlwInverterSignal_LED4_MC.D/IN0 ;
  wire \NlwInverterSignal_LED4_MC.D1/IN1 ;
  wire \NlwInverterSignal_LED5_MC.D/IN0 ;
  wire \NlwInverterSignal_LED5_MC.D1/IN1 ;
  wire \NlwInverterSignal_MTRpwrn_MC.D/IN0 ;
  wire \NlwInverterSignal_PAH0_MC.D1/IN0 ;
  wire \NlwInverterSignal_PAH0_MC.D1/IN1 ;
  wire \NlwInverterSignal_PAH0_MC.D1/IN3 ;
  wire \NlwInverterSignal_NET3248_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_NET3248_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_NET3248_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_NET3248_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET3248_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_NET3248_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_NET3248_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_PAH1_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_PAH1_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_PAH1_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_PAH1_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_PAH1_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_PAH1_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_NET3253_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_NET3253_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_NET3253_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_NET3253_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_NET3253_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_NET3253_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_NET3253_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_PAL0_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_PAL0_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_PAL0_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_PAL0_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_PAL0_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_PAL0_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_PAL1_MC.D1/IN0 ;
  wire \NlwInverterSignal_PAL1_MC.D1/IN3 ;
  wire \NlwInverterSignal_PBH0_MC.D1/IN0 ;
  wire \NlwInverterSignal_PBH0_MC.D1/IN3 ;
  wire \NlwInverterSignal_PBH1_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_PBH1_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_PBH1_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_PBH1_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_PBH1_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_PBH1_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_PBL0_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_PBL0_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_PBL0_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_PBL0_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_PBL0_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_PBL0_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_PBL1_MC.D1/IN0 ;
  wire \NlwInverterSignal_PBL1_MC.D1/IN1 ;
  wire \NlwInverterSignal_PBL1_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCORI2CCNTr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCORI2CCNTr_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCORI2CCNTr_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCORI2CCNTr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCORI2CCNTr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCORI2CCNTr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCORI2CCNTr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCORI2CCNTr_MC.D1/IN8 ;
  wire \NlwInverterSignal_DCORI2CCNTr_MC.D1/IN9 ;
  wire \NlwInverterSignal_DCORCONFIGr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCORCONFIGr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCORCONFIGr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCORCONFIGr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCORCONFIGr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCORLIMITSr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCORLIMITSr_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCORLIMITSr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCORLIMITSr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCORLIMITSr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCORLIMITSr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCORLIMITSr_MC.D1/IN8 ;
  wire \NlwInverterSignal_DCORLIMITSr_MC.D1/IN9 ;
  wire \NlwInverterSignal_DCORENCPWRr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCORENCPWRr_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCORENCPWRr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCORENCPWRr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCORENCPWRr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCORENCPWRr_MC.D1/IN7 ;
  wire \NlwInverterSignal_outDATA<0>\$WA3.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<0>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<0>_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1074_MC.D1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1074_MC.D1/IN1 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN5 ;
  wire \NlwInverterSignal_N_PZ_1116_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_N_PZ_1116_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/E0r_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/E0r_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/E0r_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1132_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_N_PZ_1132_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_N_PZ_1132_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1132_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN4 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN1 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN2 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN4 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN5 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN6 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_N_PZ_1289_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_N_PZ_1289_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN8 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<8>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<8>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<8>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<7>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<7>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<7>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_N_PZ_1086_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1086_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1086_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_N_PZ_1086_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_N_PZ_1086_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_N_PZ_1086_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/NET3721_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/NET3721_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/NET3721_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1090_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1090_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<1>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<1>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<1>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_5/IN9 ;
  wire \NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN8 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<0>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<0>_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1073_MC.D1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1073_MC.D1/IN1 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN6 ;
  wire \NlwInverterSignal_N_PZ_1187_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_N_PZ_1187_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_N_PZ_1187_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1187_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN3 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN4 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN1 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN2 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN4 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN5 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN6 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_N_PZ_1290_MC.D2_PT_0/IN1 ;
  wire \NlwInverterSignal_N_PZ_1290_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN7 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<8>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<8>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<8>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<7>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<7>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<7>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_N_PZ_1087_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1087_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1087_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_N_PZ_1087_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_N_PZ_1087_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_N_PZ_1087_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/NET3720_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/NET3720_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/NET3720_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1104_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1104_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<1>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<1>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<1>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_3/IN8 ;
  wire \NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_4/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN8 ;
  wire \NlwInverterSignal_N_PZ_1110_MC.D1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1110_MC.D1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1110_MC.D1/IN2 ;
  wire \NlwInverterSignal_N_PZ_1110_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN7 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN3 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN9 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN9 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<8>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<8>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN9 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<8>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<8>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN8 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<16>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<16>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<13>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<13>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<13>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0/IN2 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_3/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_5/IN9 ;
  wire \NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN3 ;
  wire \NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN9 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<16>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<16>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<13>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<13>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<13>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN7 ;
  wire \NlwInverterSignal_N_PZ_1154_MC.D1/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_4/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN8 ;
  wire \NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_N_PZ_1111_MC.D1/IN0 ;
  wire \NlwInverterSignal_N_PZ_1111_MC.D1/IN1 ;
  wire \NlwInverterSignal_N_PZ_1111_MC.D1/IN2 ;
  wire \NlwInverterSignal_N_PZ_1111_MC.D1/IN3 ;
  wire \NlwInverterSignal_N_PZ_1111_MC.D1/IN4 ;
  wire \NlwInverterSignal_N_PZ_1111_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN8 ;
  wire \NlwInverterSignal_outDATA<1>\$WA3.UIM_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_outDATA<1>\$WA3.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_DCORIFGr_MC.D1/IN1 ;
  wire \NlwInverterSignal_DCORIFGr_MC.D1/IN2 ;
  wire \NlwInverterSignal_DCORIFGr_MC.D1/IN4 ;
  wire \NlwInverterSignal_DCORIFGr_MC.D1/IN5 ;
  wire \NlwInverterSignal_DCORIFGr_MC.D1/IN6 ;
  wire \NlwInverterSignal_DCORIFGr_MC.D1/IN7 ;
  wire \NlwInverterSignal_DCORIFGr_MC.D1/IN8 ;
  wire \NlwInverterSignal_DCORIFGr_MC.D1/IN9 ;
  wire \NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<1>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<1>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<1>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<9>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<9>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<9>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<1>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<1>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<1>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<9>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<9>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<9>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN3 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<1>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<1>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<1>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<1>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<9>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<9>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<9>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<9>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<17>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<17>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN8 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_4/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_4/IN8 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<17>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<17>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_outDATA<2>\$WA3.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<2>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<2>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<2>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<10>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<10>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<10>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<2>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<2>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<2>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<10>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<10>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<10>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN3 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<2>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<2>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<2>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<2>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<10>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<10>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<10>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<10>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<18>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<18>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN8 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN9 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_4/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_4/IN9 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<18>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<18>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_outDATA<3>\$WA3.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<3>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<3>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<3>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<11>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<11>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<11>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<3>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<3>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<3>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<11>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<11>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<11>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN3 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<3>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<3>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<3>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<3>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<11>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<11>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<11>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<11>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<19>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<19>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_2/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN8 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN9 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN10 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_4/IN5 ;
  wire \NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_4/IN10 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<19>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<19>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN9 ;
  wire \NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_outDATA<4>\$WA3.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<4>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<4>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<4>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<12>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<12>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<12>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<4>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<4>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<4>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<12>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<12>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<12>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN3 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<4>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<4>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<4>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<4>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<12>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<12>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<12>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<12>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<20>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<20>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN9 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN10 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<20>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<20>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN9 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN10 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_outDATA<5>\$WA3.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<5>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<5>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<5>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<13>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<13>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<13>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<5>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<5>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<5>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<13>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<13>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<13>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN3 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<5>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<5>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<5>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<5>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<13>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<13>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<13>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<13>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<21>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<21>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN9 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN10 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN11 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<21>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<21>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN9 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN10 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN11 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_outDATA<6>\$WA3.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<6>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<6>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<6>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<14>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<14>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<14>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<6>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<6>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<6>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<14>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<14>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<14>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN3 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<6>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<6>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<6>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<6>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<14>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<14>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<14>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<14>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<22>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<22>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN9 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN10 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN11 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN12 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<22>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<22>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN9 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN10 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN11 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN12 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_outDATA<7>\$WA3.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<7>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<7>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<7>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<15>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<15>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch0r<15>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<7>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<7>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<7>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<15>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<15>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U4/Latch1r<15>_MC.D2_PT_1/IN2 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_2/IN0 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_2/IN1 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN0 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN1 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN2 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN0 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN1 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN2 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN3 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN0 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN1 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN2 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN3 ;
  wire \NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN4 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<7>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<7>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<7>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<7>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<15>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<15>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<15>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<15>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<23>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg0<23>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN9 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN10 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN11 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN12 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN13 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<23>_MC.D2_PT_1/IN0 ;
  wire \NlwInverterSignal_U1/U3/holdingreg1<23>_MC.D2_PT_1/IN1 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_0/IN0 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN3 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN4 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN6 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN7 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN8 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN9 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN10 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN11 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN12 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN13 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_2/IN2 ;
  wire \NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_2/IN5 ;
  wire \NlwInverterSignal_FOOBAR4__ctinst/0/IN0 ;
  wire \NlwInverterSignal_FOOBAR4__ctinst/0/IN1 ;
  wire \NlwInverterSignal_FOOBAR4__ctinst/0/IN2 ;
  wire \NlwInverterSignal_FOOBAR4__ctinst/0/IN3 ;
  wire \NlwInverterSignal_FOOBAR4__ctinst/0/IN4 ;
  wire \NlwInverterSignal_FOOBAR4__ctinst/0/IN5 ;
  wire \NlwInverterSignal_FOOBAR11__ctinst/4/IN0 ;
  wire \NlwInverterSignal_FOOBAR21__ctinst/4/IN0 ;
  wire \NlwInverterSignal_FOOBAR21__ctinst/4/IN1 ;
  wire \NlwInverterSignal_FOOBAR24__ctinst/4/IN0 ;
  wire \NlwInverterSignal_FOOBAR24__ctinst/4/IN1 ;
  wire [7 : 0] \U4/ctrlr ;
  wire [5 : 0] NlwRenamedSig_IO_I2CS;
  wire [7 : 0] \U4/Flgreg ;
  wire [7 : 0] U2_ADDR_reg;
  wire [7 : 0] \U3/DCORIE ;
  wire [5 : 0] U11_U3_counterr;
  wire [4 : 0] \U9/MISCr ;
  wire [15 : 0] \U1/U4/Latch0r ;
  wire [15 : 0] \U1/U4/Latch1r ;
  wire [23 : 0] \U1/Channel0 ;
  wire [0 : 0] \U1/U2/location_Maddsub__n0000__n0103 ;
  wire [23 : 0] \U1/Channel1 ;
  wire [0 : 0] \U1/U5/location_Maddsub__n0000__n0103 ;
  wire [23 : 0] \U1/U3/holdingreg0 ;
  wire [23 : 0] \U1/U3/holdingreg1 ;
  wire [0 : 0] \U1/U2/location_Maddsub__n0000__n0115 ;
  wire [0 : 0] \U1/U5/location_Maddsub__n0000__n0115 ;
  assign
    NlwRenamedSig_IO_Brake0 = Brake0,
    NlwRenamedSig_IO_Brake1 = Brake1,
    NlwRenamedSig_IO_DIR0 = DIR0,
    NlwRenamedSig_IO_DIR1 = DIR1,
    NlwRenamedSig_IO_WR = WR,
    NlwRenamedSig_IO_RD = RD,
    NlwRenamedSig_IO_Reset = Reset,
    NlwRenamedSig_IO_AS = AS,
    NlwRenamedSig_IO_Mclk = Mclk,
    NlwRenamedSig_IO_FLS0 = FLS0,
    NlwRenamedSig_IO_FLS1 = FLS1,
    NlwRenamedSig_IO_HSI = HSI,
    NlwRenamedSig_IO_MHSO = MHSO,
    NlwRenamedSig_IO_I2CS[0] = I2CS[0],
    NlwRenamedSig_IO_I2CS[1] = I2CS[1],
    NlwRenamedSig_IO_I2CS[2] = I2CS[2],
    NlwRenamedSig_IO_I2CS[3] = I2CS[3],
    NlwRenamedSig_IO_I2CS[4] = I2CS[4],
    NlwRenamedSig_IO_I2CS[5] = I2CS[5],
    NlwRenamedSig_IO_INTbus = INTbus,
    NlwRenamedSig_IO_Home033FLG = Home033FLG,
    NlwRenamedSig_IO_Home05FLG = Home05FLG,
    NlwRenamedSig_IO_Enc033FLG = Enc033FLG,
    NlwRenamedSig_IO_Enc05FLG = Enc05FLG,
    NlwRenamedSig_IO_Home133FLG = Home133FLG,
    NlwRenamedSig_IO_Home15FLG = Home15FLG,
    NlwRenamedSig_IO_Enc133FLG = Enc133FLG,
    NlwRenamedSig_IO_Enc15FLG = Enc15FLG,
    NlwRenamedSig_IO_RLS0 = RLS0,
    NlwRenamedSig_IO_RLS1 = RLS1,
    NlwRenamedSig_IO_GP_Motor0_0 = GP_Motor0_0,
    NlwRenamedSig_IO_GP_Motor1_0 = GP_Motor1_0,
    NlwRenamedSig_IO_SCLreset = SCLreset,
    NlwRenamedSig_IO_SCLinc = SCLinc,
    NlwRenamedSig_IO_LightSense = LightSense,
    NlwRenamedSig_IO_TXI = TXI,
    NlwRenamedSig_IO_PWM1 = PWM1,
    NlwRenamedSig_IO_PWM2 = PWM2,
    NlwRenamedSig_IO_PhaseA_Encoder0 = PhaseA_Encoder0,
    NlwRenamedSig_IO_PhaseA_Encoder1 = PhaseA_Encoder1,
    NlwRenamedSig_IO_PhaseB_Encoder0 = PhaseB_Encoder0,
    NlwRenamedSig_IO_PhaseB_Encoder1 = PhaseB_Encoder1,
    NlwRenamedSig_IO_Home0 = Home0,
    NlwRenamedSig_IO_Home1 = Home1;
  initial $sdf_annotate("c:/projects/genosensor/2g/cplds/core/u21/implement/ver0/rev1/time_sim.sdf");
  X_IPAD \Brake0.PAD  (
    .PAD(NlwRenamedSig_IO_Brake0)
  );
  X_PU Brake0_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Brake0)
  );
  X_BUF \Brake0_II/UIM_0  (
    .I(NlwRenamedSig_IO_Brake0),
    .O(\Brake0_II/UIM )
  );
  X_IPAD \Brake1.PAD  (
    .PAD(NlwRenamedSig_IO_Brake1)
  );
  X_PU Brake1_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Brake1)
  );
  X_BUF \Brake1_II/UIM_1  (
    .I(NlwRenamedSig_IO_Brake1),
    .O(\Brake1_II/UIM )
  );
  X_IPAD \DIR0.PAD  (
    .PAD(NlwRenamedSig_IO_DIR0)
  );
  X_PU DIR0_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_DIR0)
  );
  X_BUF \DIR0_II/UIM_2  (
    .I(NlwRenamedSig_IO_DIR0),
    .O(\DIR0_II/UIM )
  );
  X_IPAD \DIR1.PAD  (
    .PAD(NlwRenamedSig_IO_DIR1)
  );
  X_PU DIR1_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_DIR1)
  );
  X_BUF \DIR1_II/UIM_3  (
    .I(NlwRenamedSig_IO_DIR1),
    .O(\DIR1_II/UIM )
  );
  X_IPAD \WR.PAD  (
    .PAD(NlwRenamedSig_IO_WR)
  );
  X_PU WR_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_WR)
  );
  X_BUF \WR_II/UIM_4  (
    .I(NlwRenamedSig_IO_WR),
    .O(\WR_II/UIM )
  );
  X_IPAD \RD.PAD  (
    .PAD(NlwRenamedSig_IO_RD)
  );
  X_PU RD_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_RD)
  );
  X_BUF \RD_II/UIM_5  (
    .I(NlwRenamedSig_IO_RD),
    .O(\RD_II/UIM )
  );
  X_IPAD \Reset.PAD  (
    .PAD(NlwRenamedSig_IO_Reset)
  );
  X_PU Reset_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Reset)
  );
  X_BUF \Reset_II/UIM_6  (
    .I(NlwRenamedSig_IO_Reset),
    .O(\Reset_II/UIM )
  );
  X_BUF \AD<1>_II/UIM_7  (
    .I(AD[1]),
    .O(\AD<1>_II/UIM )
  );
  X_BUF \AD<1>_II/IREG_8  (
    .I(\U4/ctrlr [1]),
    .O(\AD<1>_II/IREG )
  );
  X_OR2 \U4/ctrlr<1>_MC_tsimcreated_prld__9  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U4/ctrlr<1>_MC_tsimcreated_prld_ )
  );
  X_FF \U4/ctrlr<1>_MC.REG  (
    .I(AD[1]),
    .CE(\FOOBAR12__ctinst/4 ),
    .CLK(\U4/ctrlr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U4/ctrlr<1>_MC_tsimcreated_prld_ ),
    .O(\U4/ctrlr [1])
  );
  X_INV \U4/ctrlr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_10  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/ctrlr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_ZERO Gnd_11 (
    .O(Gnd)
  );
  X_IPAD \AS.PAD  (
    .PAD(NlwRenamedSig_IO_AS)
  );
  X_PU AS_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_AS)
  );
  X_BUF \AS_II/UIM_12  (
    .I(NlwRenamedSig_IO_AS),
    .O(\AS_II/UIM )
  );
  X_BUF \AS_II/IREG_13  (
    .I(U2_ASedge),
    .O(\AS_II/IREG )
  );
  X_FF \U2_ASedge_MC.REG  (
    .I(NlwRenamedSig_IO_AS),
    .CE(Vcc),
    .CLK(\U2_ASedge_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(U2_ASedge)
  );
  X_INV \U2_ASedge_MC.REG_tsimcreated_inv_Mclk_II/FCLK_14  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_ASedge_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_ONE Vcc_15 (
    .O(Vcc)
  );
  X_IPAD \Mclk.PAD  (
    .PAD(NlwRenamedSig_IO_Mclk)
  );
  X_PU Mclk_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Mclk)
  );
  X_BUF \Mclk_II/FCLK_16  (
    .I(NlwRenamedSig_IO_Mclk),
    .O(\Mclk_II/FCLK )
  );
  X_BUF \AD<0>_II/UIM_17  (
    .I(AD[0]),
    .O(\AD<0>_II/UIM )
  );
  X_BUF \AD<0>_II/IREG_18  (
    .I(\U4/ctrlr [0]),
    .O(\AD<0>_II/IREG )
  );
  X_OR2 \U4/ctrlr<0>_MC_tsimcreated_prld__19  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U4/ctrlr<0>_MC_tsimcreated_prld_ )
  );
  X_FF \U4/ctrlr<0>_MC.REG  (
    .I(AD[0]),
    .CE(\FOOBAR12__ctinst/4 ),
    .CLK(\U4/ctrlr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U4/ctrlr<0>_MC_tsimcreated_prld_ ),
    .O(\U4/ctrlr [0])
  );
  X_INV \U4/ctrlr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_20  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/ctrlr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_BUF \AD<4>_II/UIM_21  (
    .I(AD[4]),
    .O(\AD<4>_II/UIM )
  );
  X_BUF \AD<4>_II/IREG_22  (
    .I(\U4/ctrlr [4]),
    .O(\AD<4>_II/IREG )
  );
  X_OR2 \U4/ctrlr<4>_MC_tsimcreated_prld__23  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U4/ctrlr<4>_MC_tsimcreated_prld_ )
  );
  X_FF \U4/ctrlr<4>_MC.REG  (
    .I(AD[4]),
    .CE(\FOOBAR10__ctinst/4 ),
    .CLK(\U4/ctrlr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U4/ctrlr<4>_MC_tsimcreated_prld_ ),
    .O(\U4/ctrlr [4])
  );
  X_INV \U4/ctrlr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_24  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/ctrlr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_BUF \AD<5>_II/UIM_25  (
    .I(AD[5]),
    .O(\AD<5>_II/UIM )
  );
  X_BUF \AD<5>_II/IREG_26  (
    .I(\U4/ctrlr [5]),
    .O(\AD<5>_II/IREG )
  );
  X_OR2 \U4/ctrlr<5>_MC_tsimcreated_prld__27  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U4/ctrlr<5>_MC_tsimcreated_prld_ )
  );
  X_FF \U4/ctrlr<5>_MC.REG  (
    .I(AD[5]),
    .CE(\FOOBAR10__ctinst/4 ),
    .CLK(\U4/ctrlr<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U4/ctrlr<5>_MC_tsimcreated_prld_ ),
    .O(\U4/ctrlr [5])
  );
  X_INV \U4/ctrlr<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_28  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/ctrlr<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_BUF \AD<6>_II/UIM_29  (
    .I(AD[6]),
    .O(\AD<6>_II/UIM )
  );
  X_BUF \AD<6>_II/IREG_30  (
    .I(\U4/ctrlr [6]),
    .O(\AD<6>_II/IREG )
  );
  X_OR2 \U4/ctrlr<6>_MC_tsimcreated_prld__31  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U4/ctrlr<6>_MC_tsimcreated_prld_ )
  );
  X_FF \U4/ctrlr<6>_MC.REG  (
    .I(AD[6]),
    .CE(\FOOBAR10__ctinst/4 ),
    .CLK(\U4/ctrlr<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U4/ctrlr<6>_MC_tsimcreated_prld_ ),
    .O(\U4/ctrlr [6])
  );
  X_INV \U4/ctrlr<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_32  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/ctrlr<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_BUF \AD<7>_II/UIM_33  (
    .I(AD[7]),
    .O(\AD<7>_II/UIM )
  );
  X_BUF \AD<7>_II/IREG_34  (
    .I(\U4/ctrlr [7]),
    .O(\AD<7>_II/IREG )
  );
  X_OR2 \U4/ctrlr<7>_MC_tsimcreated_prld__35  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U4/ctrlr<7>_MC_tsimcreated_prld_ )
  );
  X_FF \U4/ctrlr<7>_MC.REG  (
    .I(AD[7]),
    .CE(\FOOBAR9__ctinst/4 ),
    .CLK(\U4/ctrlr<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U4/ctrlr<7>_MC_tsimcreated_prld_ ),
    .O(\U4/ctrlr [7])
  );
  X_INV \U4/ctrlr<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_36  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/ctrlr<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_BUF \AD<2>_II/UIM_37  (
    .I(AD[2]),
    .O(\AD<2>_II/UIM )
  );
  X_BUF \AD<2>_II/IREG_38  (
    .I(\U4/ctrlr [2]),
    .O(\AD<2>_II/IREG )
  );
  X_OR2 \U4/ctrlr<2>_MC_tsimcreated_prld__39  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U4/ctrlr<2>_MC_tsimcreated_prld_ )
  );
  X_FF \U4/ctrlr<2>_MC.REG  (
    .I(AD[2]),
    .CE(\FOOBAR12__ctinst/4 ),
    .CLK(\U4/ctrlr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U4/ctrlr<2>_MC_tsimcreated_prld_ ),
    .O(\U4/ctrlr [2])
  );
  X_INV \U4/ctrlr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_40  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/ctrlr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_BUF \AD<3>_II/UIM_41  (
    .I(AD[3]),
    .O(\AD<3>_II/UIM )
  );
  X_BUF \AD<3>_II/IREG_42  (
    .I(\U4/ctrlr [3]),
    .O(\AD<3>_II/IREG )
  );
  X_OR2 \U4/ctrlr<3>_MC_tsimcreated_prld__43  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U4/ctrlr<3>_MC_tsimcreated_prld_ )
  );
  X_FF \U4/ctrlr<3>_MC.REG  (
    .I(AD[3]),
    .CE(\FOOBAR12__ctinst/4 ),
    .CLK(\U4/ctrlr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U4/ctrlr<3>_MC_tsimcreated_prld_ ),
    .O(\U4/ctrlr [3])
  );
  X_INV \U4/ctrlr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_44  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/ctrlr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \FLS0.PAD  (
    .PAD(NlwRenamedSig_IO_FLS0)
  );
  X_PU FLS0_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_FLS0)
  );
  X_BUF \FLS0_II/UIM_45  (
    .I(NlwRenamedSig_IO_FLS0),
    .O(\FLS0_II/UIM )
  );
  X_IPAD \FLS1.PAD  (
    .PAD(NlwRenamedSig_IO_FLS1)
  );
  X_PU FLS1_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_FLS1)
  );
  X_BUF \FLS1_II/UIM_46  (
    .I(NlwRenamedSig_IO_FLS1),
    .O(\FLS1_II/UIM )
  );
  X_IPAD \HSI.PAD  (
    .PAD(NlwRenamedSig_IO_HSI)
  );
  X_PU HSI_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_HSI)
  );
  X_BUF \HSI_II/UIM_47  (
    .I(NlwRenamedSig_IO_HSI),
    .O(\HSI_II/UIM )
  );
  X_IPAD \MHSO.PAD  (
    .PAD(NlwRenamedSig_IO_MHSO)
  );
  X_PU MHSO_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_MHSO)
  );
  X_BUF \MHSO_II/UIM_48  (
    .I(NlwRenamedSig_IO_MHSO),
    .O(\MHSO_II/UIM )
  );
  X_IPAD \I2CS<0>.PAD  (
    .PAD(NlwRenamedSig_IO_I2CS[0])
  );
  X_PU \I2CS<0>_tsimcreated__pullup_  (
    .O(NlwRenamedSig_IO_I2CS[0])
  );
  X_BUF \I2CS<0>_II/UIM_49  (
    .I(NlwRenamedSig_IO_I2CS[0]),
    .O(\I2CS<0>_II/UIM )
  );
  X_IPAD \I2CS<1>.PAD  (
    .PAD(NlwRenamedSig_IO_I2CS[1])
  );
  X_PU \I2CS<1>_tsimcreated__pullup_  (
    .O(NlwRenamedSig_IO_I2CS[1])
  );
  X_BUF \I2CS<1>_II/UIM_50  (
    .I(NlwRenamedSig_IO_I2CS[1]),
    .O(\I2CS<1>_II/UIM )
  );
  X_IPAD \I2CS<2>.PAD  (
    .PAD(NlwRenamedSig_IO_I2CS[2])
  );
  X_PU \I2CS<2>_tsimcreated__pullup_  (
    .O(NlwRenamedSig_IO_I2CS[2])
  );
  X_BUF \I2CS<2>_II/UIM_51  (
    .I(NlwRenamedSig_IO_I2CS[2]),
    .O(\I2CS<2>_II/UIM )
  );
  X_IPAD \I2CS<3>.PAD  (
    .PAD(NlwRenamedSig_IO_I2CS[3])
  );
  X_PU \I2CS<3>_tsimcreated__pullup_  (
    .O(NlwRenamedSig_IO_I2CS[3])
  );
  X_BUF \I2CS<3>_II/UIM_52  (
    .I(NlwRenamedSig_IO_I2CS[3]),
    .O(\I2CS<3>_II/UIM )
  );
  X_IPAD \I2CS<4>.PAD  (
    .PAD(NlwRenamedSig_IO_I2CS[4])
  );
  X_PU \I2CS<4>_tsimcreated__pullup_  (
    .O(NlwRenamedSig_IO_I2CS[4])
  );
  X_BUF \I2CS<4>_II/UIM_53  (
    .I(NlwRenamedSig_IO_I2CS[4]),
    .O(\I2CS<4>_II/UIM )
  );
  X_IPAD \I2CS<5>.PAD  (
    .PAD(NlwRenamedSig_IO_I2CS[5])
  );
  X_PU \I2CS<5>_tsimcreated__pullup_  (
    .O(NlwRenamedSig_IO_I2CS[5])
  );
  X_BUF \I2CS<5>_II/UIM_54  (
    .I(NlwRenamedSig_IO_I2CS[5]),
    .O(\I2CS<5>_II/UIM )
  );
  X_IPAD \INTbus.PAD  (
    .PAD(NlwRenamedSig_IO_INTbus)
  );
  X_PU INTbus_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_INTbus)
  );
  X_BUF \INTbus_II/UIM_55  (
    .I(NlwRenamedSig_IO_INTbus),
    .O(\INTbus_II/UIM )
  );
  X_IPAD \Home033FLG.PAD  (
    .PAD(NlwRenamedSig_IO_Home033FLG)
  );
  X_PU Home033FLG_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Home033FLG)
  );
  X_BUF \Home033FLG_II/UIM_56  (
    .I(NlwRenamedSig_IO_Home033FLG),
    .O(\Home033FLG_II/UIM )
  );
  X_BUF \Home033FLG_II/IREG_57  (
    .I(\U4/Flgreg [0]),
    .O(\Home033FLG_II/IREG )
  );
  X_FF \U4/Flgreg<0>_MC.REG  (
    .I(NlwRenamedSig_IO_Home033FLG),
    .CE(\FOOBAR21__ctinst/4 ),
    .CLK(\U4/Flgreg<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U4/Flgreg [0])
  );
  X_INV \U4/Flgreg<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_58  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/Flgreg<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \Home05FLG.PAD  (
    .PAD(NlwRenamedSig_IO_Home05FLG)
  );
  X_PU Home05FLG_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Home05FLG)
  );
  X_BUF \Home05FLG_II/UIM_59  (
    .I(NlwRenamedSig_IO_Home05FLG),
    .O(\Home05FLG_II/UIM )
  );
  X_BUF \Home05FLG_II/IREG_60  (
    .I(\U4/Flgreg [1]),
    .O(\Home05FLG_II/IREG )
  );
  X_FF \U4/Flgreg<1>_MC.REG  (
    .I(NlwRenamedSig_IO_Home05FLG),
    .CE(\FOOBAR21__ctinst/4 ),
    .CLK(\U4/Flgreg<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U4/Flgreg [1])
  );
  X_INV \U4/Flgreg<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_61  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/Flgreg<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \Enc033FLG.PAD  (
    .PAD(NlwRenamedSig_IO_Enc033FLG)
  );
  X_PU Enc033FLG_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Enc033FLG)
  );
  X_BUF \Enc033FLG_II/UIM_62  (
    .I(NlwRenamedSig_IO_Enc033FLG),
    .O(\Enc033FLG_II/UIM )
  );
  X_BUF \Enc033FLG_II/IREG_63  (
    .I(\U4/Flgreg [2]),
    .O(\Enc033FLG_II/IREG )
  );
  X_FF \U4/Flgreg<2>_MC.REG  (
    .I(NlwRenamedSig_IO_Enc033FLG),
    .CE(\FOOBAR24__ctinst/4 ),
    .CLK(\U4/Flgreg<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U4/Flgreg [2])
  );
  X_INV \U4/Flgreg<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_64  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/Flgreg<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \Enc05FLG.PAD  (
    .PAD(NlwRenamedSig_IO_Enc05FLG)
  );
  X_PU Enc05FLG_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Enc05FLG)
  );
  X_BUF \Enc05FLG_II/UIM_65  (
    .I(NlwRenamedSig_IO_Enc05FLG),
    .O(\Enc05FLG_II/UIM )
  );
  X_BUF \Enc05FLG_II/IREG_66  (
    .I(\U4/Flgreg [3]),
    .O(\Enc05FLG_II/IREG )
  );
  X_FF \U4/Flgreg<3>_MC.REG  (
    .I(NlwRenamedSig_IO_Enc05FLG),
    .CE(\FOOBAR24__ctinst/4 ),
    .CLK(\U4/Flgreg<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U4/Flgreg [3])
  );
  X_INV \U4/Flgreg<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_67  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/Flgreg<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \Home133FLG.PAD  (
    .PAD(NlwRenamedSig_IO_Home133FLG)
  );
  X_PU Home133FLG_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Home133FLG)
  );
  X_BUF \Home133FLG_II/UIM_68  (
    .I(NlwRenamedSig_IO_Home133FLG),
    .O(\Home133FLG_II/UIM )
  );
  X_BUF \Home133FLG_II/IREG_69  (
    .I(\U4/Flgreg [4]),
    .O(\Home133FLG_II/IREG )
  );
  X_FF \U4/Flgreg<4>_MC.REG  (
    .I(NlwRenamedSig_IO_Home133FLG),
    .CE(\FOOBAR21__ctinst/4 ),
    .CLK(\U4/Flgreg<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U4/Flgreg [4])
  );
  X_INV \U4/Flgreg<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_70  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/Flgreg<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \Home15FLG.PAD  (
    .PAD(NlwRenamedSig_IO_Home15FLG)
  );
  X_PU Home15FLG_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Home15FLG)
  );
  X_BUF \Home15FLG_II/UIM_71  (
    .I(NlwRenamedSig_IO_Home15FLG),
    .O(\Home15FLG_II/UIM )
  );
  X_BUF \Home15FLG_II/IREG_72  (
    .I(\U4/Flgreg [5]),
    .O(\Home15FLG_II/IREG )
  );
  X_FF \U4/Flgreg<5>_MC.REG  (
    .I(NlwRenamedSig_IO_Home15FLG),
    .CE(\FOOBAR21__ctinst/4 ),
    .CLK(\U4/Flgreg<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U4/Flgreg [5])
  );
  X_INV \U4/Flgreg<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_73  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/Flgreg<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \Enc133FLG.PAD  (
    .PAD(NlwRenamedSig_IO_Enc133FLG)
  );
  X_PU Enc133FLG_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Enc133FLG)
  );
  X_BUF \Enc133FLG_II/UIM_74  (
    .I(NlwRenamedSig_IO_Enc133FLG),
    .O(\Enc133FLG_II/UIM )
  );
  X_BUF \Enc133FLG_II/IREG_75  (
    .I(\U4/Flgreg [6]),
    .O(\Enc133FLG_II/IREG )
  );
  X_FF \U4/Flgreg<6>_MC.REG  (
    .I(NlwRenamedSig_IO_Enc133FLG),
    .CE(\FOOBAR24__ctinst/4 ),
    .CLK(\U4/Flgreg<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U4/Flgreg [6])
  );
  X_INV \U4/Flgreg<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_76  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/Flgreg<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \Enc15FLG.PAD  (
    .PAD(NlwRenamedSig_IO_Enc15FLG)
  );
  X_PU Enc15FLG_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Enc15FLG)
  );
  X_BUF \Enc15FLG_II/UIM_77  (
    .I(NlwRenamedSig_IO_Enc15FLG),
    .O(\Enc15FLG_II/UIM )
  );
  X_BUF \Enc15FLG_II/IREG_78  (
    .I(\U4/Flgreg [7]),
    .O(\Enc15FLG_II/IREG )
  );
  X_FF \U4/Flgreg<7>_MC.REG  (
    .I(NlwRenamedSig_IO_Enc15FLG),
    .CE(\FOOBAR24__ctinst/4 ),
    .CLK(\U4/Flgreg<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U4/Flgreg [7])
  );
  X_INV \U4/Flgreg<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_79  (
    .I(\Mclk_II/FCLK ),
    .O(\U4/Flgreg<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \RLS0.PAD  (
    .PAD(NlwRenamedSig_IO_RLS0)
  );
  X_PU RLS0_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_RLS0)
  );
  X_BUF \RLS0_II/UIM_80  (
    .I(NlwRenamedSig_IO_RLS0),
    .O(\RLS0_II/UIM )
  );
  X_IPAD \RLS1.PAD  (
    .PAD(NlwRenamedSig_IO_RLS1)
  );
  X_PU RLS1_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_RLS1)
  );
  X_BUF \RLS1_II/UIM_81  (
    .I(NlwRenamedSig_IO_RLS1),
    .O(\RLS1_II/UIM )
  );
  X_IPAD \GP_Motor0_0.PAD  (
    .PAD(NlwRenamedSig_IO_GP_Motor0_0)
  );
  X_PU GP_Motor0_0_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_GP_Motor0_0)
  );
  X_BUF \GP_Motor0_0_II/UIM_82  (
    .I(NlwRenamedSig_IO_GP_Motor0_0),
    .O(\GP_Motor0_0_II/UIM )
  );
  X_BUF \GP_Motor0_0_II/IREG_83  (
    .I(\U1/U4/InEdge0r ),
    .O(\GP_Motor0_0_II/IREG )
  );
  X_FF \U1/U4/InEdge0r_MC.REG  (
    .I(NlwRenamedSig_IO_GP_Motor0_0),
    .CE(Vcc),
    .CLK(\U1/U4/InEdge0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/InEdge0r )
  );
  X_INV \U1/U4/InEdge0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK_84  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/InEdge0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \GP_Motor1_0.PAD  (
    .PAD(NlwRenamedSig_IO_GP_Motor1_0)
  );
  X_PU GP_Motor1_0_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_GP_Motor1_0)
  );
  X_BUF \GP_Motor1_0_II/UIM_85  (
    .I(NlwRenamedSig_IO_GP_Motor1_0),
    .O(\GP_Motor1_0_II/UIM )
  );
  X_BUF \GP_Motor1_0_II/IREG_86  (
    .I(\U1/U4/InEdge1r ),
    .O(\GP_Motor1_0_II/IREG )
  );
  X_FF \U1/U4/InEdge1r_MC.REG  (
    .I(NlwRenamedSig_IO_GP_Motor1_0),
    .CE(Vcc),
    .CLK(\U1/U4/InEdge1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/InEdge1r )
  );
  X_INV \U1/U4/InEdge1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK_87  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/InEdge1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \SCLreset.PAD  (
    .PAD(NlwRenamedSig_IO_SCLreset)
  );
  X_PU SCLreset_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_SCLreset)
  );
  X_BUF \SCLreset_II/UIM_88  (
    .I(NlwRenamedSig_IO_SCLreset),
    .O(\SCLreset_II/UIM )
  );
  X_BUF \SCLreset_II/IREG_89  (
    .I(\U11_U4/Line_last ),
    .O(\SCLreset_II/IREG )
  );
  X_FF \U11_U4/Line_last_MC.REG  (
    .I(NlwRenamedSig_IO_SCLreset),
    .CE(Vcc),
    .CLK(\U11_U4/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_U4/Line_last )
  );
  X_INV \U11_U4/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK_90  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_U4/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \SCLinc.PAD  (
    .PAD(NlwRenamedSig_IO_SCLinc)
  );
  X_PU SCLinc_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_SCLinc)
  );
  X_BUF \SCLinc_II/UIM_91  (
    .I(NlwRenamedSig_IO_SCLinc),
    .O(\SCLinc_II/UIM )
  );
  X_BUF \SCLinc_II/IREG_92  (
    .I(\U11_U1/Line_last ),
    .O(\SCLinc_II/IREG )
  );
  X_FF \U11_U1/Line_last_MC.REG  (
    .I(NlwRenamedSig_IO_SCLinc),
    .CE(Vcc),
    .CLK(\U11_U1/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_U1/Line_last )
  );
  X_INV \U11_U1/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK_93  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_U1/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_BUF \SCL_II/UIM_94  (
    .I(SCL),
    .O(\SCL_II/UIM )
  );
  X_BUF \SCL_II/IREG_95  (
    .I(\U11_U2/Line_last ),
    .O(\SCL_II/IREG )
  );
  X_FF \U11_U2/Line_last_MC.REG  (
    .I(SCL),
    .CE(Vcc),
    .CLK(\U11_U2/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_U2/Line_last )
  );
  X_INV \U11_U2/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK_96  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_U2/Line_last_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \LightSense.PAD  (
    .PAD(NlwRenamedSig_IO_LightSense)
  );
  X_PU LightSense_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_LightSense)
  );
  X_BUF \LightSense_II/UIM_97  (
    .I(NlwRenamedSig_IO_LightSense),
    .O(\LightSense_II/UIM )
  );
  X_IPAD \TXI.PAD  (
    .PAD(NlwRenamedSig_IO_TXI)
  );
  X_PU TXI_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_TXI)
  );
  X_BUF \TXI_II/UIM_98  (
    .I(NlwRenamedSig_IO_TXI),
    .O(\TXI_II/UIM )
  );
  X_IPAD \PWM1.PAD  (
    .PAD(NlwRenamedSig_IO_PWM1)
  );
  X_PU PWM1_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_PWM1)
  );
  X_BUF \PWM1_II/UIM_99  (
    .I(NlwRenamedSig_IO_PWM1),
    .O(\PWM1_II/UIM )
  );
  X_IPAD \PWM2.PAD  (
    .PAD(NlwRenamedSig_IO_PWM2)
  );
  X_PU PWM2_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_PWM2)
  );
  X_BUF \PWM2_II/UIM_100  (
    .I(NlwRenamedSig_IO_PWM2),
    .O(\PWM2_II/UIM )
  );
  X_IPAD \PhaseA_Encoder0.PAD  (
    .PAD(NlwRenamedSig_IO_PhaseA_Encoder0)
  );
  X_PU PhaseA_Encoder0_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_PhaseA_Encoder0)
  );
  X_BUF \PhaseA_Encoder0_II/UIM_101  (
    .I(NlwRenamedSig_IO_PhaseA_Encoder0),
    .O(\PhaseA_Encoder0_II/UIM )
  );
  X_IPAD \PhaseA_Encoder1.PAD  (
    .PAD(NlwRenamedSig_IO_PhaseA_Encoder1)
  );
  X_PU PhaseA_Encoder1_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_PhaseA_Encoder1)
  );
  X_BUF \PhaseA_Encoder1_II/UIM_102  (
    .I(NlwRenamedSig_IO_PhaseA_Encoder1),
    .O(\PhaseA_Encoder1_II/UIM )
  );
  X_IPAD \PhaseB_Encoder0.PAD  (
    .PAD(NlwRenamedSig_IO_PhaseB_Encoder0)
  );
  X_PU PhaseB_Encoder0_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_PhaseB_Encoder0)
  );
  X_BUF \PhaseB_Encoder0_II/UIM_103  (
    .I(NlwRenamedSig_IO_PhaseB_Encoder0),
    .O(\PhaseB_Encoder0_II/UIM )
  );
  X_IPAD \PhaseB_Encoder1.PAD  (
    .PAD(NlwRenamedSig_IO_PhaseB_Encoder1)
  );
  X_PU PhaseB_Encoder1_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_PhaseB_Encoder1)
  );
  X_BUF \PhaseB_Encoder1_II/UIM_104  (
    .I(NlwRenamedSig_IO_PhaseB_Encoder1),
    .O(\PhaseB_Encoder1_II/UIM )
  );
  X_IPAD \Home0.PAD  (
    .PAD(NlwRenamedSig_IO_Home0)
  );
  X_PU Home0_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Home0)
  );
  X_BUF \Home0_II/UIM_105  (
    .I(NlwRenamedSig_IO_Home0),
    .O(\Home0_II/UIM )
  );
  X_BUF \Home0_II/IREG_106  (
    .I(\U1/U4/HE0stater ),
    .O(\Home0_II/IREG )
  );
  X_FF \U1/U4/HE0stater_MC.REG  (
    .I(NlwRenamedSig_IO_Home0),
    .CE(Vcc),
    .CLK(\U1/U4/HE0stater_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/HE0stater )
  );
  X_INV \U1/U4/HE0stater_MC.REG_tsimcreated_inv_Mclk_II/FCLK_107  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/HE0stater_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_IPAD \Home1.PAD  (
    .PAD(NlwRenamedSig_IO_Home1)
  );
  X_PU Home1_tsimcreated__pullup_ (
    .O(NlwRenamedSig_IO_Home1)
  );
  X_BUF \Home1_II/UIM_108  (
    .I(NlwRenamedSig_IO_Home1),
    .O(\Home1_II/UIM )
  );
  X_BUF \Home1_II/IREG_109  (
    .I(\U1/U4/HE1stater ),
    .O(\Home1_II/IREG )
  );
  X_FF \U1/U4/HE1stater_MC.REG  (
    .I(NlwRenamedSig_IO_Home1),
    .CE(Vcc),
    .CLK(\U1/U4/HE1stater_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/HE1stater )
  );
  X_INV \U1/U4/HE1stater_MC.REG_tsimcreated_inv_Mclk_II/FCLK_110  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/HE1stater_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_OPAD \Enc033ctrl.PAD  (
    .PAD(Enc033ctrl)
  );
  X_BUF Enc033ctrl_111 (
    .I(\Enc033ctrl_MC.Q ),
    .O(Enc033ctrl)
  );
  X_OPAD \Enc05ctrl.PAD  (
    .PAD(Enc05ctrl)
  );
  X_BUF Enc05ctrl_112 (
    .I(\Enc05ctrl_MC.Q ),
    .O(Enc05ctrl)
  );
  X_OPAD \Enc133ctrl.PAD  (
    .PAD(Enc133ctrl)
  );
  X_BUF Enc133ctrl_113 (
    .I(\Enc133ctrl_MC.Q ),
    .O(Enc133ctrl)
  );
  X_OPAD \Enc15ctrl.PAD  (
    .PAD(Enc15ctrl)
  );
  X_BUF Enc15ctrl_114 (
    .I(\Enc15ctrl_MC.Q ),
    .O(Enc15ctrl)
  );
  X_OPAD \GP_Motor0_1.PAD  (
    .PAD(GP_Motor0_1)
  );
  X_BUF GP_Motor0_1_115 (
    .I(\GP_Motor0_1_MC.Q ),
    .O(GP_Motor0_1)
  );
  X_OPAD \GP_Motor1_1.PAD  (
    .PAD(GP_Motor1_1)
  );
  X_BUF GP_Motor1_1_116 (
    .I(\GP_Motor1_1_MC.Q ),
    .O(GP_Motor1_1)
  );
  X_OPAD \HSO.PAD  (
    .PAD(HSO)
  );
  X_BUF HSO_117 (
    .I(\HSO_MC.Q ),
    .O(HSO)
  );
  X_OPAD \Home033ctrl.PAD  (
    .PAD(Home033ctrl)
  );
  X_BUF Home033ctrl_118 (
    .I(\Home033ctrl_MC.Q ),
    .O(Home033ctrl)
  );
  X_OPAD \Home05ctrl.PAD  (
    .PAD(Home05ctrl)
  );
  X_BUF Home05ctrl_119 (
    .I(\Home05ctrl_MC.Q ),
    .O(Home05ctrl)
  );
  X_OPAD \Home133ctrl.PAD  (
    .PAD(Home133ctrl)
  );
  X_BUF Home133ctrl_120 (
    .I(\Home133ctrl_MC.Q ),
    .O(Home133ctrl)
  );
  X_OPAD \Home15ctrl.PAD  (
    .PAD(Home15ctrl)
  );
  X_BUF Home15ctrl_121 (
    .I(\Home15ctrl_MC.Q ),
    .O(Home15ctrl)
  );
  X_OPAD \INT.PAD  (
    .PAD(INT)
  );
  X_BUF INT_122 (
    .I(\INT_MC.Q ),
    .O(INT)
  );
  X_OPAD \LED1.PAD  (
    .PAD(LED1)
  );
  X_BUF LED1_123 (
    .I(\LED1_MC.Q ),
    .O(LED1)
  );
  X_OPAD \LED2.PAD  (
    .PAD(LED2)
  );
  X_BUF LED2_124 (
    .I(\LED2_MC.Q ),
    .O(LED2)
  );
  X_OPAD \LED3.PAD  (
    .PAD(LED3)
  );
  X_BUF LED3_125 (
    .I(\LED3_MC.Q ),
    .O(LED3)
  );
  X_OPAD \LED4.PAD  (
    .PAD(LED4)
  );
  X_BUF LED4_126 (
    .I(\LED4_MC.Q ),
    .O(LED4)
  );
  X_OPAD \LED5.PAD  (
    .PAD(LED5)
  );
  X_BUF LED5_127 (
    .I(\LED5_MC.Q ),
    .O(LED5)
  );
  X_OPAD \MHSI.PAD  (
    .PAD(MHSI)
  );
  X_BUF MHSI_128 (
    .I(\MHSI_MC.Q ),
    .O(MHSI)
  );
  X_OPAD \MTRpwr.PAD  (
    .PAD(MTRpwr)
  );
  X_BUF MTRpwr_129 (
    .I(\MTRpwr_MC.Q ),
    .O(MTRpwr)
  );
  X_OPAD \MTRpwrn.PAD  (
    .PAD(MTRpwrn)
  );
  X_BUF MTRpwrn_130 (
    .I(\MTRpwrn_MC.Q ),
    .O(MTRpwrn)
  );
  X_OPAD \MTXI.PAD  (
    .PAD(MTXI)
  );
  X_BUF MTXI_131 (
    .I(\MTXI_MC.Q ),
    .O(MTXI)
  );
  X_OPAD \PAH0.PAD  (
    .PAD(PAH0)
  );
  X_BUF PAH0_132 (
    .I(\PAH0_MC.Q ),
    .O(PAH0)
  );
  X_OPAD \PAH1.PAD  (
    .PAD(PAH1)
  );
  X_BUF PAH1_133 (
    .I(\PAH1_MC.Q ),
    .O(PAH1)
  );
  X_OPAD \PAL0.PAD  (
    .PAD(PAL0)
  );
  X_BUF PAL0_134 (
    .I(\PAL0_MC.Q ),
    .O(PAL0)
  );
  X_OPAD \PAL1.PAD  (
    .PAD(PAL1)
  );
  X_BUF PAL1_135 (
    .I(\PAL1_MC.Q ),
    .O(PAL1)
  );
  X_OPAD \PBH0.PAD  (
    .PAD(PBH0)
  );
  X_BUF PBH0_136 (
    .I(\PBH0_MC.Q ),
    .O(PBH0)
  );
  X_OPAD \PBH1.PAD  (
    .PAD(PBH1)
  );
  X_BUF PBH1_137 (
    .I(\PBH1_MC.Q ),
    .O(PBH1)
  );
  X_OPAD \PBL0.PAD  (
    .PAD(PBL0)
  );
  X_BUF PBL0_138 (
    .I(\PBL0_MC.Q ),
    .O(PBL0)
  );
  X_OPAD \PBL1.PAD  (
    .PAD(PBL1)
  );
  X_BUF PBL1_139 (
    .I(\PBL1_MC.Q ),
    .O(PBL1)
  );
  X_OPAD \SCLout.PAD  (
    .PAD(SCLout)
  );
  X_BUF SCLout_140 (
    .I(\SCLout_MC.Q ),
    .O(SCLout)
  );
  X_OPAD \TP10.PAD  (
    .PAD(TP10)
  );
  X_BUF TP10_141 (
    .I(\TP10_MC.Q ),
    .O(TP10)
  );
  X_OPAD \TP11.PAD  (
    .PAD(TP11)
  );
  X_BUF TP11_142 (
    .I(\TP11_MC.Q ),
    .O(TP11)
  );
  X_OPAD \TP12.PAD  (
    .PAD(TP12)
  );
  X_BUF TP12_143 (
    .I(\TP12_MC.Q ),
    .O(TP12)
  );
  X_BPAD \SCL.PAD  (
    .PAD(SCL)
  );
  X_TRI SCL_144 (
    .I(\U11_U2/Line_last_MC.Q ),
    .CTL(\U11_U2/Line_last_MC.OE ),
    .O(SCL)
  );
  X_BPAD \AD<0>.PAD  (
    .PAD(AD[0])
  );
  X_TRI \AD<0>  (
    .I(\U4/ctrlr<0>_MC.Q ),
    .CTL(\U4/ctrlr<0>_MC.OE ),
    .O(AD[0])
  );
  X_BPAD \AD<1>.PAD  (
    .PAD(AD[1])
  );
  X_TRI \AD<1>  (
    .I(\U4/ctrlr<1>_MC.Q ),
    .CTL(\U4/ctrlr<1>_MC.OE ),
    .O(AD[1])
  );
  X_BPAD \AD<2>.PAD  (
    .PAD(AD[2])
  );
  X_TRI \AD<2>  (
    .I(\U4/ctrlr<2>_MC.Q ),
    .CTL(\U4/ctrlr<2>_MC.OE ),
    .O(AD[2])
  );
  X_BPAD \AD<3>.PAD  (
    .PAD(AD[3])
  );
  X_TRI \AD<3>  (
    .I(\U4/ctrlr<3>_MC.Q ),
    .CTL(\U4/ctrlr<3>_MC.OE ),
    .O(AD[3])
  );
  X_BPAD \AD<4>.PAD  (
    .PAD(AD[4])
  );
  X_TRI \AD<4>  (
    .I(\U4/ctrlr<4>_MC.Q ),
    .CTL(\U4/ctrlr<4>_MC.OE ),
    .O(AD[4])
  );
  X_BPAD \AD<5>.PAD  (
    .PAD(AD[5])
  );
  X_TRI \AD<5>  (
    .I(\U4/ctrlr<5>_MC.Q ),
    .CTL(\U4/ctrlr<5>_MC.OE ),
    .O(AD[5])
  );
  X_BPAD \AD<6>.PAD  (
    .PAD(AD[6])
  );
  X_TRI \AD<6>  (
    .I(\U4/ctrlr<6>_MC.Q ),
    .CTL(\U4/ctrlr<6>_MC.OE ),
    .O(AD[6])
  );
  X_BPAD \AD<7>.PAD  (
    .PAD(AD[7])
  );
  X_TRI \AD<7>  (
    .I(\U4/ctrlr<7>_MC.Q ),
    .CTL(\U4/ctrlr<7>_MC.OE ),
    .O(AD[7])
  );
  X_BUF \Enc033ctrl_MC.Q_145  (
    .I(\Enc033ctrl_MC.Q_tsimrenamed_net_ ),
    .O(\Enc033ctrl_MC.Q )
  );
  X_BUF \Enc033ctrl_MC.Q_tsimrenamed_net__146  (
    .I(\Enc033ctrl_MC.D ),
    .O(\Enc033ctrl_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \Enc033ctrl_MC.D_147  (
    .I0(\NlwInverterSignal_Enc033ctrl_MC.D/IN0 ),
    .I1(\Enc033ctrl_MC.D2 ),
    .O(\Enc033ctrl_MC.D )
  );
  X_AND2 \Enc033ctrl_MC.D1_148  (
    .I0(\U4/ctrlr [2]),
    .I1(\NlwInverterSignal_Enc033ctrl_MC.D1/IN1 ),
    .O(\Enc033ctrl_MC.D1 )
  );
  X_ZERO \Enc033ctrl_MC.D2_149  (
    .O(\Enc033ctrl_MC.D2 )
  );
  X_BUF \U4/ctrlr<2>_MC.Q_150  (
    .I(\U4/ctrlr<2>_MC.D ),
    .O(\U4/ctrlr<2>_MC.Q )
  );
  X_BUF \U4/ctrlr<2>_MC.OE_151  (
    .I(\U4/ctrlr<2>_MC.BUFOE.OUT ),
    .O(\U4/ctrlr<2>_MC.OE )
  );
  X_BUF \U4/ctrlr<2>_MC.BUFOE.OUT_152  (
    .I(\FOOBAR1__ctinst/7 ),
    .O(\U4/ctrlr<2>_MC.BUFOE.OUT )
  );
  X_XOR2 \U4/ctrlr<2>_MC.D_153  (
    .I0(\NlwInverterSignal_U4/ctrlr<2>_MC.D/IN0 ),
    .I1(\U4/ctrlr<2>_MC.D2 ),
    .O(\U4/ctrlr<2>_MC.D )
  );
  X_ZERO \U4/ctrlr<2>_MC.D1_154  (
    .O(\U4/ctrlr<2>_MC.D1 )
  );
  X_AND2 \U4/ctrlr<2>_MC.D2_PT_0_155  (
    .I0(DCORI2CCNTr),
    .I1(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_0/IN1 ),
    .O(\U4/ctrlr<2>_MC.D2_PT_0 )
  );
  X_AND2 \U4/ctrlr<2>_MC.D2_PT_1_156  (
    .I0(DCORCONFIGr),
    .I1(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_1/IN1 ),
    .O(\U4/ctrlr<2>_MC.D2_PT_1 )
  );
  X_AND2 \U4/ctrlr<2>_MC.D2_PT_2_157  (
    .I0(DCORLIMITSr),
    .I1(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_2/IN1 ),
    .O(\U4/ctrlr<2>_MC.D2_PT_2 )
  );
  X_AND2 \U4/ctrlr<2>_MC.D2_PT_3_158  (
    .I0(DCORENCPWRr),
    .I1(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_3/IN1 ),
    .O(\U4/ctrlr<2>_MC.D2_PT_3 )
  );
  X_AND2 \U4/ctrlr<2>_MC.D2_PT_4_159  (
    .I0(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_4/IN1 ),
    .O(\U4/ctrlr<2>_MC.D2_PT_4 )
  );
  X_AND2 \U4/ctrlr<2>_MC.D2_PT_5_160  (
    .I0(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_5/IN1 ),
    .O(\U4/ctrlr<2>_MC.D2_PT_5 )
  );
  X_OR6 \U4/ctrlr<2>_MC.D2_161  (
    .I0(\U4/ctrlr<2>_MC.D2_PT_0 ),
    .I1(\U4/ctrlr<2>_MC.D2_PT_1 ),
    .I2(\U4/ctrlr<2>_MC.D2_PT_2 ),
    .I3(\U4/ctrlr<2>_MC.D2_PT_3 ),
    .I4(\U4/ctrlr<2>_MC.D2_PT_4 ),
    .I5(\U4/ctrlr<2>_MC.D2_PT_5 ),
    .O(\U4/ctrlr<2>_MC.D2 )
  );
  X_BUF DCORENCPWRw_162 (
    .I(\DCORENCPWRw_MC.Q ),
    .O(DCORENCPWRw)
  );
  X_BUF \DCORENCPWRw_MC.Q_163  (
    .I(\DCORENCPWRw_MC.D ),
    .O(\DCORENCPWRw_MC.Q )
  );
  X_XOR2 \DCORENCPWRw_MC.D_164  (
    .I0(\DCORENCPWRw_MC.D1 ),
    .I1(\DCORENCPWRw_MC.D2 ),
    .O(\DCORENCPWRw_MC.D )
  );
  X_AND16 \DCORENCPWRw_MC.D1_165  (
    .I0(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN0 ),
    .I1(\RD_II/UIM ),
    .I2(U2_ADDR_reg[1]),
    .I3(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCORENCPWRw_MC.D1 )
  );
  X_ZERO \DCORENCPWRw_MC.D2_166  (
    .O(\DCORENCPWRw_MC.D2 )
  );
  X_BUF \U2_ADDR_reg<1>  (
    .I(\U2_ADDR_reg<1>_MC.Q ),
    .O(U2_ADDR_reg[1])
  );
  X_XOR2 \U2_ADDR_reg<1>_MC_tsimcreated_xor__167  (
    .I0(\U2_ADDR_reg<1>_MC.D ),
    .I1(\U2_ADDR_reg<1>_MC.Q ),
    .O(\U2_ADDR_reg<1>_MC_tsimcreated_xor_ )
  );
  X_FF \U2_ADDR_reg<1>_MC.REG  (
    .I(\U2_ADDR_reg<1>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U2_ADDR_reg<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_ADDR_reg<1>_MC.Q )
  );
  X_INV \U2_ADDR_reg<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_168  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_ADDR_reg<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_ADDR_reg<1>_MC.D_169  (
    .I0(\U2_ADDR_reg<1>_MC.D1 ),
    .I1(\U2_ADDR_reg<1>_MC.D2 ),
    .O(\U2_ADDR_reg<1>_MC.D )
  );
  X_ZERO \U2_ADDR_reg<1>_MC.D1_170  (
    .O(\U2_ADDR_reg<1>_MC.D1 )
  );
  X_AND2 \U2_ADDR_reg<1>_MC.D2_PT_0_171  (
    .I0(U2_ADDR_reg[1]),
    .I1(\Reset_II/UIM ),
    .O(\U2_ADDR_reg<1>_MC.D2_PT_0 )
  );
  X_AND5 \U2_ADDR_reg<1>_MC.D2_PT_1_172  (
    .I0(U2_ADDR_reg[1]),
    .I1(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_1/IN2 ),
    .I3(U2_ASedge),
    .I4(N15302),
    .O(\U2_ADDR_reg<1>_MC.D2_PT_1 )
  );
  X_AND6 \U2_ADDR_reg<1>_MC.D2_PT_2_173  (
    .I0(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_2/IN1 ),
    .I2(\AD<1>_II/UIM ),
    .I3(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_2/IN3 ),
    .I4(U2_ASedge),
    .I5(N15302),
    .O(\U2_ADDR_reg<1>_MC.D2_PT_2 )
  );
  X_AND16 \U2_ADDR_reg<1>_MC.D2_PT_3_174  (
    .I0(U2_ADDR_reg[0]),
    .I1(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN4 ),
    .I5(N15302),
    .I6(U2_AutoInc),
    .I7(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN7 ),
    .I8(N_PZ_1082),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U2_ADDR_reg<1>_MC.D2_PT_3 )
  );
  X_OR4 \U2_ADDR_reg<1>_MC.D2_175  (
    .I0(\U2_ADDR_reg<1>_MC.D2_PT_0 ),
    .I1(\U2_ADDR_reg<1>_MC.D2_PT_1 ),
    .I2(\U2_ADDR_reg<1>_MC.D2_PT_2 ),
    .I3(\U2_ADDR_reg<1>_MC.D2_PT_3 ),
    .O(\U2_ADDR_reg<1>_MC.D2 )
  );
  X_BUF N15302_176 (
    .I(\N15302_MC.Q ),
    .O(N15302)
  );
  X_BUF \N15302_MC.Q_177  (
    .I(\N15302_MC.D ),
    .O(\N15302_MC.Q )
  );
  X_XOR2 \N15302_MC.D_178  (
    .I0(\N15302_MC.D1 ),
    .I1(\N15302_MC.D2 ),
    .O(\N15302_MC.D )
  );
  X_AND2 \N15302_MC.D1_179  (
    .I0(\WR_II/UIM ),
    .I1(\RD_II/UIM ),
    .O(\N15302_MC.D1 )
  );
  X_ZERO \N15302_MC.D2_180  (
    .O(\N15302_MC.D2 )
  );
  X_BUF \U2_ADDR_reg<0>  (
    .I(\U2_ADDR_reg<0>_MC.Q ),
    .O(U2_ADDR_reg[0])
  );
  X_XOR2 \U2_ADDR_reg<0>_MC_tsimcreated_xor__181  (
    .I0(\U2_ADDR_reg<0>_MC.D ),
    .I1(\U2_ADDR_reg<0>_MC.Q ),
    .O(\U2_ADDR_reg<0>_MC_tsimcreated_xor_ )
  );
  X_FF \U2_ADDR_reg<0>_MC.REG  (
    .I(\U2_ADDR_reg<0>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U2_ADDR_reg<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_ADDR_reg<0>_MC.Q )
  );
  X_INV \U2_ADDR_reg<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_182  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_ADDR_reg<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_ADDR_reg<0>_MC.D_183  (
    .I0(\U2_ADDR_reg<0>_MC.D1 ),
    .I1(\U2_ADDR_reg<0>_MC.D2 ),
    .O(\U2_ADDR_reg<0>_MC.D )
  );
  X_ZERO \U2_ADDR_reg<0>_MC.D1_184  (
    .O(\U2_ADDR_reg<0>_MC.D1 )
  );
  X_AND2 \U2_ADDR_reg<0>_MC.D2_PT_0_185  (
    .I0(U2_ADDR_reg[0]),
    .I1(\Reset_II/UIM ),
    .O(\U2_ADDR_reg<0>_MC.D2_PT_0 )
  );
  X_AND5 \U2_ADDR_reg<0>_MC.D2_PT_1_186  (
    .I0(U2_ADDR_reg[0]),
    .I1(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(N15302),
    .I4(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_1/IN4 ),
    .O(\U2_ADDR_reg<0>_MC.D2_PT_1 )
  );
  X_AND6 \U2_ADDR_reg<0>_MC.D2_PT_2_187  (
    .I0(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_2/IN2 ),
    .I3(U2_ASedge),
    .I4(N15302),
    .I5(\AD<0>_II/UIM ),
    .O(\U2_ADDR_reg<0>_MC.D2_PT_2 )
  );
  X_AND8 \U2_ADDR_reg<0>_MC.D2_PT_3_188  (
    .I0(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN3 ),
    .I4(N15302),
    .I5(U2_AutoInc),
    .I6(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN6 ),
    .I7(N_PZ_1082),
    .O(\U2_ADDR_reg<0>_MC.D2_PT_3 )
  );
  X_OR4 \U2_ADDR_reg<0>_MC.D2_189  (
    .I0(\U2_ADDR_reg<0>_MC.D2_PT_0 ),
    .I1(\U2_ADDR_reg<0>_MC.D2_PT_1 ),
    .I2(\U2_ADDR_reg<0>_MC.D2_PT_2 ),
    .I3(\U2_ADDR_reg<0>_MC.D2_PT_3 ),
    .O(\U2_ADDR_reg<0>_MC.D2 )
  );
  X_BUF \U2_ADDR_reg<4>  (
    .I(\U2_ADDR_reg<4>_MC.Q ),
    .O(U2_ADDR_reg[4])
  );
  X_XOR2 \U2_ADDR_reg<4>_MC_tsimcreated_xor__190  (
    .I0(\U2_ADDR_reg<4>_MC.D ),
    .I1(\U2_ADDR_reg<4>_MC.Q ),
    .O(\U2_ADDR_reg<4>_MC_tsimcreated_xor_ )
  );
  X_FF \U2_ADDR_reg<4>_MC.REG  (
    .I(\U2_ADDR_reg<4>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U2_ADDR_reg<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_ADDR_reg<4>_MC.Q )
  );
  X_INV \U2_ADDR_reg<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_191  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_ADDR_reg<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_ADDR_reg<4>_MC.D_192  (
    .I0(\U2_ADDR_reg<4>_MC.D1 ),
    .I1(\U2_ADDR_reg<4>_MC.D2 ),
    .O(\U2_ADDR_reg<4>_MC.D )
  );
  X_ZERO \U2_ADDR_reg<4>_MC.D1_193  (
    .O(\U2_ADDR_reg<4>_MC.D1 )
  );
  X_AND2 \U2_ADDR_reg<4>_MC.D2_PT_0_194  (
    .I0(U2_ADDR_reg[4]),
    .I1(\Reset_II/UIM ),
    .O(\U2_ADDR_reg<4>_MC.D2_PT_0 )
  );
  X_AND5 \U2_ADDR_reg<4>_MC.D2_PT_1_195  (
    .I0(U2_ADDR_reg[4]),
    .I1(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(N15302),
    .I4(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_1/IN4 ),
    .O(\U2_ADDR_reg<4>_MC.D2_PT_1 )
  );
  X_AND6 \U2_ADDR_reg<4>_MC.D2_PT_2_196  (
    .I0(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_2/IN2 ),
    .I3(U2_ASedge),
    .I4(N15302),
    .I5(\AD<4>_II/UIM ),
    .O(\U2_ADDR_reg<4>_MC.D2_PT_2 )
  );
  X_OR3 \U2_ADDR_reg<4>_MC.D2_197  (
    .I0(\U2_ADDR_reg<4>_MC.D2_PT_0 ),
    .I1(\U2_ADDR_reg<4>_MC.D2_PT_1 ),
    .I2(\U2_ADDR_reg<4>_MC.D2_PT_2 ),
    .O(\U2_ADDR_reg<4>_MC.D2 )
  );
  X_BUF \U2_ADDR_reg<5>  (
    .I(\U2_ADDR_reg<5>_MC.Q ),
    .O(U2_ADDR_reg[5])
  );
  X_XOR2 \U2_ADDR_reg<5>_MC_tsimcreated_xor__198  (
    .I0(\U2_ADDR_reg<5>_MC.D ),
    .I1(\U2_ADDR_reg<5>_MC.Q ),
    .O(\U2_ADDR_reg<5>_MC_tsimcreated_xor_ )
  );
  X_FF \U2_ADDR_reg<5>_MC.REG  (
    .I(\U2_ADDR_reg<5>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U2_ADDR_reg<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_ADDR_reg<5>_MC.Q )
  );
  X_INV \U2_ADDR_reg<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_199  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_ADDR_reg<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_ADDR_reg<5>_MC.D_200  (
    .I0(\U2_ADDR_reg<5>_MC.D1 ),
    .I1(\U2_ADDR_reg<5>_MC.D2 ),
    .O(\U2_ADDR_reg<5>_MC.D )
  );
  X_ZERO \U2_ADDR_reg<5>_MC.D1_201  (
    .O(\U2_ADDR_reg<5>_MC.D1 )
  );
  X_AND2 \U2_ADDR_reg<5>_MC.D2_PT_0_202  (
    .I0(U2_ADDR_reg[5]),
    .I1(\Reset_II/UIM ),
    .O(\U2_ADDR_reg<5>_MC.D2_PT_0 )
  );
  X_AND5 \U2_ADDR_reg<5>_MC.D2_PT_1_203  (
    .I0(U2_ADDR_reg[5]),
    .I1(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(N15302),
    .I4(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_1/IN4 ),
    .O(\U2_ADDR_reg<5>_MC.D2_PT_1 )
  );
  X_AND6 \U2_ADDR_reg<5>_MC.D2_PT_2_204  (
    .I0(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_2/IN2 ),
    .I3(U2_ASedge),
    .I4(N15302),
    .I5(\AD<5>_II/UIM ),
    .O(\U2_ADDR_reg<5>_MC.D2_PT_2 )
  );
  X_OR3 \U2_ADDR_reg<5>_MC.D2_205  (
    .I0(\U2_ADDR_reg<5>_MC.D2_PT_0 ),
    .I1(\U2_ADDR_reg<5>_MC.D2_PT_1 ),
    .I2(\U2_ADDR_reg<5>_MC.D2_PT_2 ),
    .O(\U2_ADDR_reg<5>_MC.D2 )
  );
  X_BUF \U2_ADDR_reg<6>  (
    .I(\U2_ADDR_reg<6>_MC.Q ),
    .O(U2_ADDR_reg[6])
  );
  X_XOR2 \U2_ADDR_reg<6>_MC_tsimcreated_xor__206  (
    .I0(\U2_ADDR_reg<6>_MC.D ),
    .I1(\U2_ADDR_reg<6>_MC.Q ),
    .O(\U2_ADDR_reg<6>_MC_tsimcreated_xor_ )
  );
  X_FF \U2_ADDR_reg<6>_MC.REG  (
    .I(\U2_ADDR_reg<6>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U2_ADDR_reg<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_ADDR_reg<6>_MC.Q )
  );
  X_INV \U2_ADDR_reg<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_207  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_ADDR_reg<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_ADDR_reg<6>_MC.D_208  (
    .I0(\U2_ADDR_reg<6>_MC.D1 ),
    .I1(\U2_ADDR_reg<6>_MC.D2 ),
    .O(\U2_ADDR_reg<6>_MC.D )
  );
  X_ZERO \U2_ADDR_reg<6>_MC.D1_209  (
    .O(\U2_ADDR_reg<6>_MC.D1 )
  );
  X_AND2 \U2_ADDR_reg<6>_MC.D2_PT_0_210  (
    .I0(U2_ADDR_reg[6]),
    .I1(\Reset_II/UIM ),
    .O(\U2_ADDR_reg<6>_MC.D2_PT_0 )
  );
  X_AND5 \U2_ADDR_reg<6>_MC.D2_PT_1_211  (
    .I0(U2_ADDR_reg[6]),
    .I1(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(N15302),
    .I4(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_1/IN4 ),
    .O(\U2_ADDR_reg<6>_MC.D2_PT_1 )
  );
  X_AND6 \U2_ADDR_reg<6>_MC.D2_PT_2_212  (
    .I0(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_2/IN2 ),
    .I3(U2_ASedge),
    .I4(N15302),
    .I5(\AD<6>_II/UIM ),
    .O(\U2_ADDR_reg<6>_MC.D2_PT_2 )
  );
  X_OR3 \U2_ADDR_reg<6>_MC.D2_213  (
    .I0(\U2_ADDR_reg<6>_MC.D2_PT_0 ),
    .I1(\U2_ADDR_reg<6>_MC.D2_PT_1 ),
    .I2(\U2_ADDR_reg<6>_MC.D2_PT_2 ),
    .O(\U2_ADDR_reg<6>_MC.D2 )
  );
  X_BUF \U2_ADDR_reg<7>  (
    .I(\U2_ADDR_reg<7>_MC.Q ),
    .O(U2_ADDR_reg[7])
  );
  X_XOR2 \U2_ADDR_reg<7>_MC_tsimcreated_xor__214  (
    .I0(\U2_ADDR_reg<7>_MC.D ),
    .I1(\U2_ADDR_reg<7>_MC.Q ),
    .O(\U2_ADDR_reg<7>_MC_tsimcreated_xor_ )
  );
  X_FF \U2_ADDR_reg<7>_MC.REG  (
    .I(\U2_ADDR_reg<7>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U2_ADDR_reg<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_ADDR_reg<7>_MC.Q )
  );
  X_INV \U2_ADDR_reg<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_215  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_ADDR_reg<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_ADDR_reg<7>_MC.D_216  (
    .I0(\U2_ADDR_reg<7>_MC.D1 ),
    .I1(\U2_ADDR_reg<7>_MC.D2 ),
    .O(\U2_ADDR_reg<7>_MC.D )
  );
  X_ZERO \U2_ADDR_reg<7>_MC.D1_217  (
    .O(\U2_ADDR_reg<7>_MC.D1 )
  );
  X_AND2 \U2_ADDR_reg<7>_MC.D2_PT_0_218  (
    .I0(U2_ADDR_reg[7]),
    .I1(\Reset_II/UIM ),
    .O(\U2_ADDR_reg<7>_MC.D2_PT_0 )
  );
  X_AND5 \U2_ADDR_reg<7>_MC.D2_PT_1_219  (
    .I0(U2_ADDR_reg[7]),
    .I1(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(N15302),
    .I4(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_1/IN4 ),
    .O(\U2_ADDR_reg<7>_MC.D2_PT_1 )
  );
  X_AND6 \U2_ADDR_reg<7>_MC.D2_PT_2_220  (
    .I0(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_2/IN2 ),
    .I3(U2_ASedge),
    .I4(N15302),
    .I5(\AD<7>_II/UIM ),
    .O(\U2_ADDR_reg<7>_MC.D2_PT_2 )
  );
  X_OR3 \U2_ADDR_reg<7>_MC.D2_221  (
    .I0(\U2_ADDR_reg<7>_MC.D2_PT_0 ),
    .I1(\U2_ADDR_reg<7>_MC.D2_PT_1 ),
    .I2(\U2_ADDR_reg<7>_MC.D2_PT_2 ),
    .O(\U2_ADDR_reg<7>_MC.D2 )
  );
  X_BUF U2_AutoInc_222 (
    .I(\U2_AutoInc_MC.Q ),
    .O(U2_AutoInc)
  );
  X_FF \U2_AutoInc_MC.REG  (
    .I(\U2_AutoInc_MC.D ),
    .CE(\FOOBAR11__ctinst/4 ),
    .CLK(\U2_AutoInc_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_AutoInc_MC.Q )
  );
  X_INV \U2_AutoInc_MC.REG_tsimcreated_inv_Mclk_II/FCLK_223  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_AutoInc_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_AutoInc_MC.D_224  (
    .I0(\NlwInverterSignal_U2_AutoInc_MC.D/IN0 ),
    .I1(\U2_AutoInc_MC.D2 ),
    .O(\U2_AutoInc_MC.D )
  );
  X_AND2 \U2_AutoInc_MC.D1_225  (
    .I0(\AS_II/UIM ),
    .I1(\AS_II/UIM ),
    .O(\U2_AutoInc_MC.D1 )
  );
  X_ZERO \U2_AutoInc_MC.D2_226  (
    .O(\U2_AutoInc_MC.D2 )
  );
  X_BUF U2_WRRDedge_227 (
    .I(\U2_WRRDedge_MC.Q ),
    .O(U2_WRRDedge)
  );
  X_FF \U2_WRRDedge_MC.REG  (
    .I(\U2_WRRDedge_MC.D ),
    .CE(Vcc),
    .CLK(\U2_WRRDedge_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_WRRDedge_MC.Q )
  );
  X_INV \U2_WRRDedge_MC.REG_tsimcreated_inv_Mclk_II/FCLK_228  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_WRRDedge_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_WRRDedge_MC.D_229  (
    .I0(\U2_WRRDedge_MC.D1 ),
    .I1(\U2_WRRDedge_MC.D2 ),
    .O(\U2_WRRDedge_MC.D )
  );
  X_AND2 \U2_WRRDedge_MC.D1_230  (
    .I0(\WR_II/UIM ),
    .I1(\RD_II/UIM ),
    .O(\U2_WRRDedge_MC.D1 )
  );
  X_ZERO \U2_WRRDedge_MC.D2_231  (
    .O(\U2_WRRDedge_MC.D2 )
  );
  X_BUF N_PZ_1082_232 (
    .I(\N_PZ_1082_MC.Q ),
    .O(N_PZ_1082)
  );
  X_BUF \N_PZ_1082_MC.Q_233  (
    .I(\N_PZ_1082_MC.D ),
    .O(\N_PZ_1082_MC.Q )
  );
  X_XOR2 \N_PZ_1082_MC.D_234  (
    .I0(\N_PZ_1082_MC.D1 ),
    .I1(\N_PZ_1082_MC.D2 ),
    .O(\N_PZ_1082_MC.D )
  );
  X_ZERO \N_PZ_1082_MC.D1_235  (
    .O(\N_PZ_1082_MC.D1 )
  );
  X_AND2 \N_PZ_1082_MC.D2_PT_0_236  (
    .I0(\NlwInverterSignal_N_PZ_1082_MC.D2_PT_0/IN0 ),
    .I1(\AS_II/UIM ),
    .O(\N_PZ_1082_MC.D2_PT_0 )
  );
  X_AND2 \N_PZ_1082_MC.D2_PT_1_237  (
    .I0(\NlwInverterSignal_N_PZ_1082_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1082_MC.D2_PT_1/IN1 ),
    .O(\N_PZ_1082_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1082_MC.D2_238  (
    .I0(\N_PZ_1082_MC.D2_PT_0 ),
    .I1(\N_PZ_1082_MC.D2_PT_1 ),
    .O(\N_PZ_1082_MC.D2 )
  );
  X_BUF \U2_ADDR_reg<2>  (
    .I(\U2_ADDR_reg<2>_MC.Q ),
    .O(U2_ADDR_reg[2])
  );
  X_XOR2 \U2_ADDR_reg<2>_MC_tsimcreated_xor__239  (
    .I0(\U2_ADDR_reg<2>_MC.D ),
    .I1(\U2_ADDR_reg<2>_MC.Q ),
    .O(\U2_ADDR_reg<2>_MC_tsimcreated_xor_ )
  );
  X_FF \U2_ADDR_reg<2>_MC.REG  (
    .I(\U2_ADDR_reg<2>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U2_ADDR_reg<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_ADDR_reg<2>_MC.Q )
  );
  X_INV \U2_ADDR_reg<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_240  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_ADDR_reg<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_ADDR_reg<2>_MC.D_241  (
    .I0(\U2_ADDR_reg<2>_MC.D1 ),
    .I1(\U2_ADDR_reg<2>_MC.D2 ),
    .O(\U2_ADDR_reg<2>_MC.D )
  );
  X_ZERO \U2_ADDR_reg<2>_MC.D1_242  (
    .O(\U2_ADDR_reg<2>_MC.D1 )
  );
  X_AND2 \U2_ADDR_reg<2>_MC.D2_PT_0_243  (
    .I0(U2_ADDR_reg[2]),
    .I1(\Reset_II/UIM ),
    .O(\U2_ADDR_reg<2>_MC.D2_PT_0 )
  );
  X_AND5 \U2_ADDR_reg<2>_MC.D2_PT_1_244  (
    .I0(U2_ADDR_reg[2]),
    .I1(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(N15302),
    .I4(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_1/IN4 ),
    .O(\U2_ADDR_reg<2>_MC.D2_PT_1 )
  );
  X_AND6 \U2_ADDR_reg<2>_MC.D2_PT_2_245  (
    .I0(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_2/IN2 ),
    .I3(U2_ASedge),
    .I4(N15302),
    .I5(\AD<2>_II/UIM ),
    .O(\U2_ADDR_reg<2>_MC.D2_PT_2 )
  );
  X_AND16 \U2_ADDR_reg<2>_MC.D2_PT_3_246  (
    .I0(U2_ADDR_reg[1]),
    .I1(U2_ADDR_reg[0]),
    .I2(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN4 ),
    .I5(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN5 ),
    .I6(N15302),
    .I7(U2_AutoInc),
    .I8(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN8 ),
    .I9(N_PZ_1082),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U2_ADDR_reg<2>_MC.D2_PT_3 )
  );
  X_OR4 \U2_ADDR_reg<2>_MC.D2_247  (
    .I0(\U2_ADDR_reg<2>_MC.D2_PT_0 ),
    .I1(\U2_ADDR_reg<2>_MC.D2_PT_1 ),
    .I2(\U2_ADDR_reg<2>_MC.D2_PT_2 ),
    .I3(\U2_ADDR_reg<2>_MC.D2_PT_3 ),
    .O(\U2_ADDR_reg<2>_MC.D2 )
  );
  X_BUF \U2_ADDR_reg<3>  (
    .I(\U2_ADDR_reg<3>_MC.Q ),
    .O(U2_ADDR_reg[3])
  );
  X_XOR2 \U2_ADDR_reg<3>_MC_tsimcreated_xor__248  (
    .I0(\U2_ADDR_reg<3>_MC.D ),
    .I1(\U2_ADDR_reg<3>_MC.Q ),
    .O(\U2_ADDR_reg<3>_MC_tsimcreated_xor_ )
  );
  X_FF \U2_ADDR_reg<3>_MC.REG  (
    .I(\U2_ADDR_reg<3>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U2_ADDR_reg<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U2_ADDR_reg<3>_MC.Q )
  );
  X_INV \U2_ADDR_reg<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_249  (
    .I(\Mclk_II/FCLK ),
    .O(\U2_ADDR_reg<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U2_ADDR_reg<3>_MC.D_250  (
    .I0(\U2_ADDR_reg<3>_MC.D1 ),
    .I1(\U2_ADDR_reg<3>_MC.D2 ),
    .O(\U2_ADDR_reg<3>_MC.D )
  );
  X_ZERO \U2_ADDR_reg<3>_MC.D1_251  (
    .O(\U2_ADDR_reg<3>_MC.D1 )
  );
  X_AND2 \U2_ADDR_reg<3>_MC.D2_PT_0_252  (
    .I0(U2_ADDR_reg[3]),
    .I1(\Reset_II/UIM ),
    .O(\U2_ADDR_reg<3>_MC.D2_PT_0 )
  );
  X_AND5 \U2_ADDR_reg<3>_MC.D2_PT_1_253  (
    .I0(U2_ADDR_reg[3]),
    .I1(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(N15302),
    .I4(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_1/IN4 ),
    .O(\U2_ADDR_reg<3>_MC.D2_PT_1 )
  );
  X_AND6 \U2_ADDR_reg<3>_MC.D2_PT_2_254  (
    .I0(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_2/IN2 ),
    .I3(U2_ASedge),
    .I4(N15302),
    .I5(\AD<3>_II/UIM ),
    .O(\U2_ADDR_reg<3>_MC.D2_PT_2 )
  );
  X_AND16 \U2_ADDR_reg<3>_MC.D2_PT_3_255  (
    .I0(U2_ADDR_reg[1]),
    .I1(U2_ADDR_reg[0]),
    .I2(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN4 ),
    .I5(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN5 ),
    .I6(U2_ADDR_reg[2]),
    .I7(N15302),
    .I8(U2_AutoInc),
    .I9(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN9 ),
    .I10(N_PZ_1082),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U2_ADDR_reg<3>_MC.D2_PT_3 )
  );
  X_OR4 \U2_ADDR_reg<3>_MC.D2_256  (
    .I0(\U2_ADDR_reg<3>_MC.D2_PT_0 ),
    .I1(\U2_ADDR_reg<3>_MC.D2_PT_1 ),
    .I2(\U2_ADDR_reg<3>_MC.D2_PT_2 ),
    .I3(\U2_ADDR_reg<3>_MC.D2_PT_3 ),
    .O(\U2_ADDR_reg<3>_MC.D2 )
  );
  X_BUF U2_Enable_AD_257 (
    .I(\U2_Enable_AD_MC.Q ),
    .O(U2_Enable_AD)
  );
  X_BUF \U2_Enable_AD_MC.Q_258  (
    .I(\U2_Enable_AD_MC.D ),
    .O(\U2_Enable_AD_MC.Q )
  );
  X_XOR2 \U2_Enable_AD_MC.D_259  (
    .I0(\U2_Enable_AD_MC.D1 ),
    .I1(\U2_Enable_AD_MC.D2 ),
    .O(\U2_Enable_AD_MC.D )
  );
  X_AND6 \U2_Enable_AD_MC.D1_260  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN2 ),
    .I3(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN5 ),
    .O(\U2_Enable_AD_MC.D1 )
  );
  X_ZERO \U2_Enable_AD_MC.D2_261  (
    .O(\U2_Enable_AD_MC.D2 )
  );
  X_BUF \U4/ctrlr<3>_MC.Q_262  (
    .I(\U4/ctrlr<3>_MC.D ),
    .O(\U4/ctrlr<3>_MC.Q )
  );
  X_BUF \U4/ctrlr<3>_MC.OE_263  (
    .I(\U4/ctrlr<3>_MC.BUFOE.OUT ),
    .O(\U4/ctrlr<3>_MC.OE )
  );
  X_BUF \U4/ctrlr<3>_MC.BUFOE.OUT_264  (
    .I(\FOOBAR1__ctinst/7 ),
    .O(\U4/ctrlr<3>_MC.BUFOE.OUT )
  );
  X_XOR2 \U4/ctrlr<3>_MC.D_265  (
    .I0(\NlwInverterSignal_U4/ctrlr<3>_MC.D/IN0 ),
    .I1(\U4/ctrlr<3>_MC.D2 ),
    .O(\U4/ctrlr<3>_MC.D )
  );
  X_ZERO \U4/ctrlr<3>_MC.D1_266  (
    .O(\U4/ctrlr<3>_MC.D1 )
  );
  X_AND2 \U4/ctrlr<3>_MC.D2_PT_0_267  (
    .I0(DCORI2CCNTr),
    .I1(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_0/IN1 ),
    .O(\U4/ctrlr<3>_MC.D2_PT_0 )
  );
  X_AND2 \U4/ctrlr<3>_MC.D2_PT_1_268  (
    .I0(DCORCONFIGr),
    .I1(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_1/IN1 ),
    .O(\U4/ctrlr<3>_MC.D2_PT_1 )
  );
  X_AND2 \U4/ctrlr<3>_MC.D2_PT_2_269  (
    .I0(DCORLIMITSr),
    .I1(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_2/IN1 ),
    .O(\U4/ctrlr<3>_MC.D2_PT_2 )
  );
  X_AND2 \U4/ctrlr<3>_MC.D2_PT_3_270  (
    .I0(DCORENCPWRr),
    .I1(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_3/IN1 ),
    .O(\U4/ctrlr<3>_MC.D2_PT_3 )
  );
  X_AND2 \U4/ctrlr<3>_MC.D2_PT_4_271  (
    .I0(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_4/IN1 ),
    .O(\U4/ctrlr<3>_MC.D2_PT_4 )
  );
  X_AND2 \U4/ctrlr<3>_MC.D2_PT_5_272  (
    .I0(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_5/IN1 ),
    .O(\U4/ctrlr<3>_MC.D2_PT_5 )
  );
  X_OR6 \U4/ctrlr<3>_MC.D2_273  (
    .I0(\U4/ctrlr<3>_MC.D2_PT_0 ),
    .I1(\U4/ctrlr<3>_MC.D2_PT_1 ),
    .I2(\U4/ctrlr<3>_MC.D2_PT_2 ),
    .I3(\U4/ctrlr<3>_MC.D2_PT_3 ),
    .I4(\U4/ctrlr<3>_MC.D2_PT_4 ),
    .I5(\U4/ctrlr<3>_MC.D2_PT_5 ),
    .O(\U4/ctrlr<3>_MC.D2 )
  );
  X_BUF \Enc05ctrl_MC.Q_274  (
    .I(\Enc05ctrl_MC.Q_tsimrenamed_net_ ),
    .O(\Enc05ctrl_MC.Q )
  );
  X_BUF \Enc05ctrl_MC.Q_tsimrenamed_net__275  (
    .I(\Enc05ctrl_MC.D ),
    .O(\Enc05ctrl_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \Enc05ctrl_MC.D_276  (
    .I0(\NlwInverterSignal_Enc05ctrl_MC.D/IN0 ),
    .I1(\Enc05ctrl_MC.D2 ),
    .O(\Enc05ctrl_MC.D )
  );
  X_AND2 \Enc05ctrl_MC.D1_277  (
    .I0(\NlwInverterSignal_Enc05ctrl_MC.D1/IN0 ),
    .I1(\U4/ctrlr [3]),
    .O(\Enc05ctrl_MC.D1 )
  );
  X_ZERO \Enc05ctrl_MC.D2_278  (
    .O(\Enc05ctrl_MC.D2 )
  );
  X_BUF \Enc133ctrl_MC.Q_279  (
    .I(\Enc133ctrl_MC.Q_tsimrenamed_net_ ),
    .O(\Enc133ctrl_MC.Q )
  );
  X_BUF \Enc133ctrl_MC.Q_tsimrenamed_net__280  (
    .I(\Enc133ctrl_MC.D ),
    .O(\Enc133ctrl_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \Enc133ctrl_MC.D_281  (
    .I0(\NlwInverterSignal_Enc133ctrl_MC.D/IN0 ),
    .I1(\Enc133ctrl_MC.D2 ),
    .O(\Enc133ctrl_MC.D )
  );
  X_AND2 \Enc133ctrl_MC.D1_282  (
    .I0(\U4/ctrlr [6]),
    .I1(\U4/ctrlr [7]),
    .O(\Enc133ctrl_MC.D1 )
  );
  X_ZERO \Enc133ctrl_MC.D2_283  (
    .O(\Enc133ctrl_MC.D2 )
  );
  X_BUF \U4/ctrlr<6>_MC.Q_284  (
    .I(\U4/ctrlr<6>_MC.D ),
    .O(\U4/ctrlr<6>_MC.Q )
  );
  X_BUF \U4/ctrlr<6>_MC.OE_285  (
    .I(\U4/ctrlr<6>_MC.BUFOE.OUT ),
    .O(\U4/ctrlr<6>_MC.OE )
  );
  X_BUF \U4/ctrlr<6>_MC.BUFOE.OUT_286  (
    .I(\FOOBAR1__ctinst/7 ),
    .O(\U4/ctrlr<6>_MC.BUFOE.OUT )
  );
  X_XOR2 \U4/ctrlr<6>_MC.D_287  (
    .I0(\NlwInverterSignal_U4/ctrlr<6>_MC.D/IN0 ),
    .I1(\U4/ctrlr<6>_MC.D2 ),
    .O(\U4/ctrlr<6>_MC.D )
  );
  X_ZERO \U4/ctrlr<6>_MC.D1_288  (
    .O(\U4/ctrlr<6>_MC.D1 )
  );
  X_AND2 \U4/ctrlr<6>_MC.D2_PT_0_289  (
    .I0(DCORI2CCNTr),
    .I1(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_0/IN1 ),
    .O(\U4/ctrlr<6>_MC.D2_PT_0 )
  );
  X_AND2 \U4/ctrlr<6>_MC.D2_PT_1_290  (
    .I0(DCORCONFIGr),
    .I1(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_1/IN1 ),
    .O(\U4/ctrlr<6>_MC.D2_PT_1 )
  );
  X_AND2 \U4/ctrlr<6>_MC.D2_PT_2_291  (
    .I0(DCORLIMITSr),
    .I1(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_2/IN1 ),
    .O(\U4/ctrlr<6>_MC.D2_PT_2 )
  );
  X_AND2 \U4/ctrlr<6>_MC.D2_PT_3_292  (
    .I0(DCORENCPWRr),
    .I1(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_3/IN1 ),
    .O(\U4/ctrlr<6>_MC.D2_PT_3 )
  );
  X_AND2 \U4/ctrlr<6>_MC.D2_PT_4_293  (
    .I0(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_4/IN1 ),
    .O(\U4/ctrlr<6>_MC.D2_PT_4 )
  );
  X_AND2 \U4/ctrlr<6>_MC.D2_PT_5_294  (
    .I0(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_5/IN1 ),
    .O(\U4/ctrlr<6>_MC.D2_PT_5 )
  );
  X_OR6 \U4/ctrlr<6>_MC.D2_295  (
    .I0(\U4/ctrlr<6>_MC.D2_PT_0 ),
    .I1(\U4/ctrlr<6>_MC.D2_PT_1 ),
    .I2(\U4/ctrlr<6>_MC.D2_PT_2 ),
    .I3(\U4/ctrlr<6>_MC.D2_PT_3 ),
    .I4(\U4/ctrlr<6>_MC.D2_PT_4 ),
    .I5(\U4/ctrlr<6>_MC.D2_PT_5 ),
    .O(\U4/ctrlr<6>_MC.D2 )
  );
  X_BUF \U4/ctrlr<7>_MC.Q_296  (
    .I(\U4/ctrlr<7>_MC.D ),
    .O(\U4/ctrlr<7>_MC.Q )
  );
  X_BUF \U4/ctrlr<7>_MC.OE_297  (
    .I(\U4/ctrlr<7>_MC.BUFOE.OUT ),
    .O(\U4/ctrlr<7>_MC.OE )
  );
  X_BUF \U4/ctrlr<7>_MC.BUFOE.OUT_298  (
    .I(\FOOBAR1__ctinst/7 ),
    .O(\U4/ctrlr<7>_MC.BUFOE.OUT )
  );
  X_XOR2 \U4/ctrlr<7>_MC.D_299  (
    .I0(\NlwInverterSignal_U4/ctrlr<7>_MC.D/IN0 ),
    .I1(\U4/ctrlr<7>_MC.D2 ),
    .O(\U4/ctrlr<7>_MC.D )
  );
  X_ZERO \U4/ctrlr<7>_MC.D1_300  (
    .O(\U4/ctrlr<7>_MC.D1 )
  );
  X_AND2 \U4/ctrlr<7>_MC.D2_PT_0_301  (
    .I0(DCORI2CCNTr),
    .I1(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_0/IN1 ),
    .O(\U4/ctrlr<7>_MC.D2_PT_0 )
  );
  X_AND2 \U4/ctrlr<7>_MC.D2_PT_1_302  (
    .I0(DCORCONFIGr),
    .I1(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_1/IN1 ),
    .O(\U4/ctrlr<7>_MC.D2_PT_1 )
  );
  X_AND2 \U4/ctrlr<7>_MC.D2_PT_2_303  (
    .I0(DCORLIMITSr),
    .I1(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_2/IN1 ),
    .O(\U4/ctrlr<7>_MC.D2_PT_2 )
  );
  X_AND2 \U4/ctrlr<7>_MC.D2_PT_3_304  (
    .I0(DCORENCPWRr),
    .I1(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_3/IN1 ),
    .O(\U4/ctrlr<7>_MC.D2_PT_3 )
  );
  X_AND2 \U4/ctrlr<7>_MC.D2_PT_4_305  (
    .I0(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_4/IN1 ),
    .O(\U4/ctrlr<7>_MC.D2_PT_4 )
  );
  X_AND2 \U4/ctrlr<7>_MC.D2_PT_5_306  (
    .I0(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_5/IN1 ),
    .O(\U4/ctrlr<7>_MC.D2_PT_5 )
  );
  X_OR6 \U4/ctrlr<7>_MC.D2_307  (
    .I0(\U4/ctrlr<7>_MC.D2_PT_0 ),
    .I1(\U4/ctrlr<7>_MC.D2_PT_1 ),
    .I2(\U4/ctrlr<7>_MC.D2_PT_2 ),
    .I3(\U4/ctrlr<7>_MC.D2_PT_3 ),
    .I4(\U4/ctrlr<7>_MC.D2_PT_4 ),
    .I5(\U4/ctrlr<7>_MC.D2_PT_5 ),
    .O(\U4/ctrlr<7>_MC.D2 )
  );
  X_BUF \Enc15ctrl_MC.Q_308  (
    .I(\Enc15ctrl_MC.Q_tsimrenamed_net_ ),
    .O(\Enc15ctrl_MC.Q )
  );
  X_BUF \Enc15ctrl_MC.Q_tsimrenamed_net__309  (
    .I(\Enc15ctrl_MC.D ),
    .O(\Enc15ctrl_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \Enc15ctrl_MC.D_310  (
    .I0(\NlwInverterSignal_Enc15ctrl_MC.D/IN0 ),
    .I1(\Enc15ctrl_MC.D2 ),
    .O(\Enc15ctrl_MC.D )
  );
  X_AND2 \Enc15ctrl_MC.D1_311  (
    .I0(\NlwInverterSignal_Enc15ctrl_MC.D1/IN0 ),
    .I1(\U4/ctrlr [7]),
    .O(\Enc15ctrl_MC.D1 )
  );
  X_ZERO \Enc15ctrl_MC.D2_312  (
    .O(\Enc15ctrl_MC.D2 )
  );
  X_BUF \GP_Motor0_1_MC.Q_313  (
    .I(\GP_Motor0_1_MC.Q_tsimrenamed_net_ ),
    .O(\GP_Motor0_1_MC.Q )
  );
  X_OR2 GP_Motor0_1_MC_tsimcreated_prld__314 (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(GP_Motor0_1_MC_tsimcreated_prld_)
  );
  X_FF \GP_Motor0_1_MC.REG  (
    .I(\GP_Motor0_1_MC.D ),
    .CE(\FOOBAR8__ctinst/4 ),
    .CLK(\GP_Motor0_1_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(GP_Motor0_1_MC_tsimcreated_prld_),
    .O(\GP_Motor0_1_MC.Q_tsimrenamed_net_ )
  );
  X_INV \GP_Motor0_1_MC.REG_tsimcreated_inv_Mclk_II/FCLK_315  (
    .I(\Mclk_II/FCLK ),
    .O(\GP_Motor0_1_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \GP_Motor0_1_MC.D_316  (
    .I0(\GP_Motor0_1_MC.D1 ),
    .I1(\GP_Motor0_1_MC.D2 ),
    .O(\GP_Motor0_1_MC.D )
  );
  X_AND2 \GP_Motor0_1_MC.D1_317  (
    .I0(\AD<6>_II/UIM ),
    .I1(\AD<6>_II/UIM ),
    .O(\GP_Motor0_1_MC.D1 )
  );
  X_ZERO \GP_Motor0_1_MC.D2_318  (
    .O(\GP_Motor0_1_MC.D2 )
  );
  X_BUF DCOROUTw_319 (
    .I(\DCOROUTw_MC.Q ),
    .O(DCOROUTw)
  );
  X_BUF \DCOROUTw_MC.Q_320  (
    .I(\DCOROUTw_MC.D ),
    .O(\DCOROUTw_MC.Q )
  );
  X_XOR2 \DCOROUTw_MC.D_321  (
    .I0(\DCOROUTw_MC.D1 ),
    .I1(\DCOROUTw_MC.D2 ),
    .O(\DCOROUTw_MC.D )
  );
  X_AND16 \DCOROUTw_MC.D1_322  (
    .I0(\NlwInverterSignal_DCOROUTw_MC.D1/IN0 ),
    .I1(\RD_II/UIM ),
    .I2(U2_ADDR_reg[1]),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCOROUTw_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOROUTw_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOROUTw_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOROUTw_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOROUTw_MC.D1 )
  );
  X_ZERO \DCOROUTw_MC.D2_323  (
    .O(\DCOROUTw_MC.D2 )
  );
  X_BUF \GP_Motor1_1_MC.Q_324  (
    .I(\GP_Motor1_1_MC.Q_tsimrenamed_net_ ),
    .O(\GP_Motor1_1_MC.Q )
  );
  X_OR2 GP_Motor1_1_MC_tsimcreated_prld__325 (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(GP_Motor1_1_MC_tsimcreated_prld_)
  );
  X_FF \GP_Motor1_1_MC.REG  (
    .I(\GP_Motor1_1_MC.D ),
    .CE(\FOOBAR15__ctinst/4 ),
    .CLK(\GP_Motor1_1_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(GP_Motor1_1_MC_tsimcreated_prld_),
    .O(\GP_Motor1_1_MC.Q_tsimrenamed_net_ )
  );
  X_INV \GP_Motor1_1_MC.REG_tsimcreated_inv_Mclk_II/FCLK_326  (
    .I(\Mclk_II/FCLK ),
    .O(\GP_Motor1_1_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \GP_Motor1_1_MC.D_327  (
    .I0(\GP_Motor1_1_MC.D1 ),
    .I1(\GP_Motor1_1_MC.D2 ),
    .O(\GP_Motor1_1_MC.D )
  );
  X_AND2 \GP_Motor1_1_MC.D1_328  (
    .I0(\AD<7>_II/UIM ),
    .I1(\AD<7>_II/UIM ),
    .O(\GP_Motor1_1_MC.D1 )
  );
  X_ZERO \GP_Motor1_1_MC.D2_329  (
    .O(\GP_Motor1_1_MC.D2 )
  );
  X_BUF \HSO_MC.Q_330  (
    .I(\HSO_MC.Q_tsimrenamed_net_ ),
    .O(\HSO_MC.Q )
  );
  X_BUF \HSO_MC.Q_tsimrenamed_net__331  (
    .I(\HSO_MC.D ),
    .O(\HSO_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \HSO_MC.D_332  (
    .I0(\HSO_MC.D1 ),
    .I1(\HSO_MC.D2 ),
    .O(\HSO_MC.D )
  );
  X_AND2 \HSO_MC.D1_333  (
    .I0(\MHSO_II/UIM ),
    .I1(\MHSO_II/UIM ),
    .O(\HSO_MC.D1 )
  );
  X_ZERO \HSO_MC.D2_334  (
    .O(\HSO_MC.D2 )
  );
  X_BUF \Home033ctrl_MC.Q_335  (
    .I(\Home033ctrl_MC.Q_tsimrenamed_net_ ),
    .O(\Home033ctrl_MC.Q )
  );
  X_BUF \Home033ctrl_MC.Q_tsimrenamed_net__336  (
    .I(\Home033ctrl_MC.D ),
    .O(\Home033ctrl_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \Home033ctrl_MC.D_337  (
    .I0(\NlwInverterSignal_Home033ctrl_MC.D/IN0 ),
    .I1(\Home033ctrl_MC.D2 ),
    .O(\Home033ctrl_MC.D )
  );
  X_AND2 \Home033ctrl_MC.D1_338  (
    .I0(\U4/ctrlr [0]),
    .I1(\NlwInverterSignal_Home033ctrl_MC.D1/IN1 ),
    .O(\Home033ctrl_MC.D1 )
  );
  X_ZERO \Home033ctrl_MC.D2_339  (
    .O(\Home033ctrl_MC.D2 )
  );
  X_BUF \U4/ctrlr<0>_MC.Q_340  (
    .I(\U4/ctrlr<0>_MC.D ),
    .O(\U4/ctrlr<0>_MC.Q )
  );
  X_BUF \U4/ctrlr<0>_MC.OE_341  (
    .I(\U4/ctrlr<0>_MC.BUFOE.OUT ),
    .O(\U4/ctrlr<0>_MC.OE )
  );
  X_BUF \U4/ctrlr<0>_MC.BUFOE.OUT_342  (
    .I(\FOOBAR1__ctinst/7 ),
    .O(\U4/ctrlr<0>_MC.BUFOE.OUT )
  );
  X_XOR2 \U4/ctrlr<0>_MC.D_343  (
    .I0(\NlwInverterSignal_U4/ctrlr<0>_MC.D/IN0 ),
    .I1(\U4/ctrlr<0>_MC.D2 ),
    .O(\U4/ctrlr<0>_MC.D )
  );
  X_ZERO \U4/ctrlr<0>_MC.D1_344  (
    .O(\U4/ctrlr<0>_MC.D1 )
  );
  X_AND2 \U4/ctrlr<0>_MC.D2_PT_0_345  (
    .I0(DCORI2CCNTr),
    .I1(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_0/IN1 ),
    .O(\U4/ctrlr<0>_MC.D2_PT_0 )
  );
  X_AND2 \U4/ctrlr<0>_MC.D2_PT_1_346  (
    .I0(DCORCONFIGr),
    .I1(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_1/IN1 ),
    .O(\U4/ctrlr<0>_MC.D2_PT_1 )
  );
  X_AND2 \U4/ctrlr<0>_MC.D2_PT_2_347  (
    .I0(DCORLIMITSr),
    .I1(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_2/IN1 ),
    .O(\U4/ctrlr<0>_MC.D2_PT_2 )
  );
  X_AND2 \U4/ctrlr<0>_MC.D2_PT_3_348  (
    .I0(DCORENCPWRr),
    .I1(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_3/IN1 ),
    .O(\U4/ctrlr<0>_MC.D2_PT_3 )
  );
  X_AND2 \U4/ctrlr<0>_MC.D2_PT_4_349  (
    .I0(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_4/IN1 ),
    .O(\U4/ctrlr<0>_MC.D2_PT_4 )
  );
  X_AND2 \U4/ctrlr<0>_MC.D2_PT_5_350  (
    .I0(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_5/IN1 ),
    .O(\U4/ctrlr<0>_MC.D2_PT_5 )
  );
  X_OR6 \U4/ctrlr<0>_MC.D2_351  (
    .I0(\U4/ctrlr<0>_MC.D2_PT_0 ),
    .I1(\U4/ctrlr<0>_MC.D2_PT_1 ),
    .I2(\U4/ctrlr<0>_MC.D2_PT_2 ),
    .I3(\U4/ctrlr<0>_MC.D2_PT_3 ),
    .I4(\U4/ctrlr<0>_MC.D2_PT_4 ),
    .I5(\U4/ctrlr<0>_MC.D2_PT_5 ),
    .O(\U4/ctrlr<0>_MC.D2 )
  );
  X_BUF \U4/ctrlr<1>_MC.Q_352  (
    .I(\U4/ctrlr<1>_MC.D ),
    .O(\U4/ctrlr<1>_MC.Q )
  );
  X_BUF \U4/ctrlr<1>_MC.OE_353  (
    .I(\U4/ctrlr<1>_MC.BUFOE.OUT ),
    .O(\U4/ctrlr<1>_MC.OE )
  );
  X_BUF \U4/ctrlr<1>_MC.BUFOE.OUT_354  (
    .I(\FOOBAR1__ctinst/7 ),
    .O(\U4/ctrlr<1>_MC.BUFOE.OUT )
  );
  X_XOR2 \U4/ctrlr<1>_MC.D_355  (
    .I0(\NlwInverterSignal_U4/ctrlr<1>_MC.D/IN0 ),
    .I1(\U4/ctrlr<1>_MC.D2 ),
    .O(\U4/ctrlr<1>_MC.D )
  );
  X_ZERO \U4/ctrlr<1>_MC.D1_356  (
    .O(\U4/ctrlr<1>_MC.D1 )
  );
  X_AND2 \U4/ctrlr<1>_MC.D2_PT_0_357  (
    .I0(DCORI2CCNTr),
    .I1(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_0/IN1 ),
    .O(\U4/ctrlr<1>_MC.D2_PT_0 )
  );
  X_AND2 \U4/ctrlr<1>_MC.D2_PT_1_358  (
    .I0(DCORCONFIGr),
    .I1(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_1/IN1 ),
    .O(\U4/ctrlr<1>_MC.D2_PT_1 )
  );
  X_AND2 \U4/ctrlr<1>_MC.D2_PT_2_359  (
    .I0(DCORLIMITSr),
    .I1(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_2/IN1 ),
    .O(\U4/ctrlr<1>_MC.D2_PT_2 )
  );
  X_AND2 \U4/ctrlr<1>_MC.D2_PT_3_360  (
    .I0(DCORENCPWRr),
    .I1(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_3/IN1 ),
    .O(\U4/ctrlr<1>_MC.D2_PT_3 )
  );
  X_AND2 \U4/ctrlr<1>_MC.D2_PT_4_361  (
    .I0(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_4/IN1 ),
    .O(\U4/ctrlr<1>_MC.D2_PT_4 )
  );
  X_AND2 \U4/ctrlr<1>_MC.D2_PT_5_362  (
    .I0(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_5/IN1 ),
    .O(\U4/ctrlr<1>_MC.D2_PT_5 )
  );
  X_AND2 \U4/ctrlr<1>_MC.D2_PT_6_363  (
    .I0(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_6/IN0 ),
    .I1(DCORIFGr),
    .O(\U4/ctrlr<1>_MC.D2_PT_6 )
  );
  X_OR7 \U4/ctrlr<1>_MC.D2_364  (
    .I0(\U4/ctrlr<1>_MC.D2_PT_0 ),
    .I1(\U4/ctrlr<1>_MC.D2_PT_1 ),
    .I2(\U4/ctrlr<1>_MC.D2_PT_2 ),
    .I3(\U4/ctrlr<1>_MC.D2_PT_3 ),
    .I4(\U4/ctrlr<1>_MC.D2_PT_4 ),
    .I5(\U4/ctrlr<1>_MC.D2_PT_5 ),
    .I6(\U4/ctrlr<1>_MC.D2_PT_6 ),
    .O(\U4/ctrlr<1>_MC.D2 )
  );
  X_BUF \Home05ctrl_MC.Q_365  (
    .I(\Home05ctrl_MC.Q_tsimrenamed_net_ ),
    .O(\Home05ctrl_MC.Q )
  );
  X_BUF \Home05ctrl_MC.Q_tsimrenamed_net__366  (
    .I(\Home05ctrl_MC.D ),
    .O(\Home05ctrl_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \Home05ctrl_MC.D_367  (
    .I0(\NlwInverterSignal_Home05ctrl_MC.D/IN0 ),
    .I1(\Home05ctrl_MC.D2 ),
    .O(\Home05ctrl_MC.D )
  );
  X_AND2 \Home05ctrl_MC.D1_368  (
    .I0(\NlwInverterSignal_Home05ctrl_MC.D1/IN0 ),
    .I1(\U4/ctrlr [1]),
    .O(\Home05ctrl_MC.D1 )
  );
  X_ZERO \Home05ctrl_MC.D2_369  (
    .O(\Home05ctrl_MC.D2 )
  );
  X_BUF \Home133ctrl_MC.Q_370  (
    .I(\Home133ctrl_MC.Q_tsimrenamed_net_ ),
    .O(\Home133ctrl_MC.Q )
  );
  X_BUF \Home133ctrl_MC.Q_tsimrenamed_net__371  (
    .I(\Home133ctrl_MC.D ),
    .O(\Home133ctrl_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \Home133ctrl_MC.D_372  (
    .I0(\NlwInverterSignal_Home133ctrl_MC.D/IN0 ),
    .I1(\Home133ctrl_MC.D2 ),
    .O(\Home133ctrl_MC.D )
  );
  X_AND2 \Home133ctrl_MC.D1_373  (
    .I0(\U4/ctrlr [4]),
    .I1(\NlwInverterSignal_Home133ctrl_MC.D1/IN1 ),
    .O(\Home133ctrl_MC.D1 )
  );
  X_ZERO \Home133ctrl_MC.D2_374  (
    .O(\Home133ctrl_MC.D2 )
  );
  X_BUF \U4/ctrlr<4>_MC.Q_375  (
    .I(\U4/ctrlr<4>_MC.D ),
    .O(\U4/ctrlr<4>_MC.Q )
  );
  X_BUF \U4/ctrlr<4>_MC.OE_376  (
    .I(\U4/ctrlr<4>_MC.BUFOE.OUT ),
    .O(\U4/ctrlr<4>_MC.OE )
  );
  X_BUF \U4/ctrlr<4>_MC.BUFOE.OUT_377  (
    .I(\FOOBAR1__ctinst/7 ),
    .O(\U4/ctrlr<4>_MC.BUFOE.OUT )
  );
  X_XOR2 \U4/ctrlr<4>_MC.D_378  (
    .I0(\NlwInverterSignal_U4/ctrlr<4>_MC.D/IN0 ),
    .I1(\U4/ctrlr<4>_MC.D2 ),
    .O(\U4/ctrlr<4>_MC.D )
  );
  X_ZERO \U4/ctrlr<4>_MC.D1_379  (
    .O(\U4/ctrlr<4>_MC.D1 )
  );
  X_AND2 \U4/ctrlr<4>_MC.D2_PT_0_380  (
    .I0(DCORI2CCNTr),
    .I1(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_0/IN1 ),
    .O(\U4/ctrlr<4>_MC.D2_PT_0 )
  );
  X_AND2 \U4/ctrlr<4>_MC.D2_PT_1_381  (
    .I0(DCORCONFIGr),
    .I1(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_1/IN1 ),
    .O(\U4/ctrlr<4>_MC.D2_PT_1 )
  );
  X_AND2 \U4/ctrlr<4>_MC.D2_PT_2_382  (
    .I0(DCORLIMITSr),
    .I1(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_2/IN1 ),
    .O(\U4/ctrlr<4>_MC.D2_PT_2 )
  );
  X_AND2 \U4/ctrlr<4>_MC.D2_PT_3_383  (
    .I0(DCORENCPWRr),
    .I1(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_3/IN1 ),
    .O(\U4/ctrlr<4>_MC.D2_PT_3 )
  );
  X_AND2 \U4/ctrlr<4>_MC.D2_PT_4_384  (
    .I0(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_4/IN1 ),
    .O(\U4/ctrlr<4>_MC.D2_PT_4 )
  );
  X_AND2 \U4/ctrlr<4>_MC.D2_PT_5_385  (
    .I0(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_5/IN1 ),
    .O(\U4/ctrlr<4>_MC.D2_PT_5 )
  );
  X_OR6 \U4/ctrlr<4>_MC.D2_386  (
    .I0(\U4/ctrlr<4>_MC.D2_PT_0 ),
    .I1(\U4/ctrlr<4>_MC.D2_PT_1 ),
    .I2(\U4/ctrlr<4>_MC.D2_PT_2 ),
    .I3(\U4/ctrlr<4>_MC.D2_PT_3 ),
    .I4(\U4/ctrlr<4>_MC.D2_PT_4 ),
    .I5(\U4/ctrlr<4>_MC.D2_PT_5 ),
    .O(\U4/ctrlr<4>_MC.D2 )
  );
  X_BUF \U4/ctrlr<5>_MC.Q_387  (
    .I(\U4/ctrlr<5>_MC.D ),
    .O(\U4/ctrlr<5>_MC.Q )
  );
  X_BUF \U4/ctrlr<5>_MC.OE_388  (
    .I(\U4/ctrlr<5>_MC.BUFOE.OUT ),
    .O(\U4/ctrlr<5>_MC.OE )
  );
  X_BUF \U4/ctrlr<5>_MC.BUFOE.OUT_389  (
    .I(\FOOBAR1__ctinst/7 ),
    .O(\U4/ctrlr<5>_MC.BUFOE.OUT )
  );
  X_XOR2 \U4/ctrlr<5>_MC.D_390  (
    .I0(\NlwInverterSignal_U4/ctrlr<5>_MC.D/IN0 ),
    .I1(\U4/ctrlr<5>_MC.D2 ),
    .O(\U4/ctrlr<5>_MC.D )
  );
  X_ZERO \U4/ctrlr<5>_MC.D1_391  (
    .O(\U4/ctrlr<5>_MC.D1 )
  );
  X_AND2 \U4/ctrlr<5>_MC.D2_PT_0_392  (
    .I0(DCORI2CCNTr),
    .I1(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_0/IN1 ),
    .O(\U4/ctrlr<5>_MC.D2_PT_0 )
  );
  X_AND2 \U4/ctrlr<5>_MC.D2_PT_1_393  (
    .I0(DCORCONFIGr),
    .I1(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_1/IN1 ),
    .O(\U4/ctrlr<5>_MC.D2_PT_1 )
  );
  X_AND2 \U4/ctrlr<5>_MC.D2_PT_2_394  (
    .I0(DCORLIMITSr),
    .I1(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_2/IN1 ),
    .O(\U4/ctrlr<5>_MC.D2_PT_2 )
  );
  X_AND2 \U4/ctrlr<5>_MC.D2_PT_3_395  (
    .I0(DCORENCPWRr),
    .I1(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_3/IN1 ),
    .O(\U4/ctrlr<5>_MC.D2_PT_3 )
  );
  X_AND2 \U4/ctrlr<5>_MC.D2_PT_4_396  (
    .I0(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_4/IN1 ),
    .O(\U4/ctrlr<5>_MC.D2_PT_4 )
  );
  X_AND2 \U4/ctrlr<5>_MC.D2_PT_5_397  (
    .I0(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_5/IN1 ),
    .O(\U4/ctrlr<5>_MC.D2_PT_5 )
  );
  X_OR6 \U4/ctrlr<5>_MC.D2_398  (
    .I0(\U4/ctrlr<5>_MC.D2_PT_0 ),
    .I1(\U4/ctrlr<5>_MC.D2_PT_1 ),
    .I2(\U4/ctrlr<5>_MC.D2_PT_2 ),
    .I3(\U4/ctrlr<5>_MC.D2_PT_3 ),
    .I4(\U4/ctrlr<5>_MC.D2_PT_4 ),
    .I5(\U4/ctrlr<5>_MC.D2_PT_5 ),
    .O(\U4/ctrlr<5>_MC.D2 )
  );
  X_BUF \Home15ctrl_MC.Q_399  (
    .I(\Home15ctrl_MC.Q_tsimrenamed_net_ ),
    .O(\Home15ctrl_MC.Q )
  );
  X_BUF \Home15ctrl_MC.Q_tsimrenamed_net__400  (
    .I(\Home15ctrl_MC.D ),
    .O(\Home15ctrl_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \Home15ctrl_MC.D_401  (
    .I0(\NlwInverterSignal_Home15ctrl_MC.D/IN0 ),
    .I1(\Home15ctrl_MC.D2 ),
    .O(\Home15ctrl_MC.D )
  );
  X_AND2 \Home15ctrl_MC.D1_402  (
    .I0(\NlwInverterSignal_Home15ctrl_MC.D1/IN0 ),
    .I1(\U4/ctrlr [5]),
    .O(\Home15ctrl_MC.D1 )
  );
  X_ZERO \Home15ctrl_MC.D2_403  (
    .O(\Home15ctrl_MC.D2 )
  );
  X_BUF \INT_MC.Q_404  (
    .I(\INT_MC.Q_tsimrenamed_net_ ),
    .O(\INT_MC.Q )
  );
  X_BUF \INT_MC.Q_tsimrenamed_net__405  (
    .I(\INT_MC.D ),
    .O(\INT_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \INT_MC.D_406  (
    .I0(\INT_MC.D1 ),
    .I1(\INT_MC.D2 ),
    .O(\INT_MC.D )
  );
  X_ZERO \INT_MC.D1_407  (
    .O(\INT_MC.D1 )
  );
  X_AND2 \INT_MC.D2_PT_0_408  (
    .I0(\INTbus_II/UIM ),
    .I1(\U3/DCORIE [0]),
    .O(\INT_MC.D2_PT_0 )
  );
  X_AND2 \INT_MC.D2_PT_1_409  (
    .I0(NET2528),
    .I1(\U3/DCORIE [1]),
    .O(\INT_MC.D2_PT_1 )
  );
  X_AND2 \INT_MC.D2_PT_2_410  (
    .I0(NET2482),
    .I1(\U3/DCORIE [2]),
    .O(\INT_MC.D2_PT_2 )
  );
  X_AND2 \INT_MC.D2_PT_3_411  (
    .I0(NET2493),
    .I1(\U3/DCORIE [3]),
    .O(\INT_MC.D2_PT_3 )
  );
  X_AND2 \INT_MC.D2_PT_4_412  (
    .I0(NET2575),
    .I1(\U3/DCORIE [4]),
    .O(\INT_MC.D2_PT_4 )
  );
  X_AND2 \INT_MC.D2_PT_5_413  (
    .I0(NET2501),
    .I1(\U3/DCORIE [5]),
    .O(\INT_MC.D2_PT_5 )
  );
  X_AND2 \INT_MC.D2_PT_6_414  (
    .I0(NET2512),
    .I1(\U3/DCORIE [6]),
    .O(\INT_MC.D2_PT_6 )
  );
  X_AND7 \INT_MC.D2_PT_7_415  (
    .I0(\U3/DCORIE [7]),
    .I1(\NlwInverterSignal_INT_MC.D2_PT_7/IN1 ),
    .I2(\NlwInverterSignal_INT_MC.D2_PT_7/IN2 ),
    .I3(\NlwInverterSignal_INT_MC.D2_PT_7/IN3 ),
    .I4(\NlwInverterSignal_INT_MC.D2_PT_7/IN4 ),
    .I5(\NlwInverterSignal_INT_MC.D2_PT_7/IN5 ),
    .I6(\NlwInverterSignal_INT_MC.D2_PT_7/IN6 ),
    .O(\INT_MC.D2_PT_7 )
  );
  X_OR8 \INT_MC.D2_416  (
    .I0(\INT_MC.D2_PT_0 ),
    .I1(\INT_MC.D2_PT_1 ),
    .I2(\INT_MC.D2_PT_2 ),
    .I3(\INT_MC.D2_PT_3 ),
    .I4(\INT_MC.D2_PT_4 ),
    .I5(\INT_MC.D2_PT_5 ),
    .I6(\INT_MC.D2_PT_6 ),
    .I7(\INT_MC.D2_PT_7 ),
    .O(\INT_MC.D2 )
  );
  X_BUF \U3/DCORIE<0>  (
    .I(\U3/DCORIE<0>_MC.Q ),
    .O(\U3/DCORIE [0])
  );
  X_FF \U3/DCORIE<0>_MC.REG  (
    .I(\U3/DCORIE<0>_MC.D ),
    .CE(Vcc),
    .CLK(\U3/DCORIE<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U3/DCORIE<0>_MC.Q )
  );
  X_INV \U3/DCORIE<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_417  (
    .I(\Mclk_II/FCLK ),
    .O(\U3/DCORIE<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U3/DCORIE<0>_MC.D_418  (
    .I0(\U3/DCORIE<0>_MC.D1 ),
    .I1(\U3/DCORIE<0>_MC.D2 ),
    .O(\U3/DCORIE<0>_MC.D )
  );
  X_ZERO \U3/DCORIE<0>_MC.D1_419  (
    .O(\U3/DCORIE<0>_MC.D1 )
  );
  X_AND3 \U3/DCORIE<0>_MC.D2_PT_0_420  (
    .I0(\NlwInverterSignal_U3/DCORIE<0>_MC.D2_PT_0/IN0 ),
    .I1(\AD<0>_II/UIM ),
    .I2(DCORIEw),
    .O(\U3/DCORIE<0>_MC.D2_PT_0 )
  );
  X_AND3 \U3/DCORIE<0>_MC.D2_PT_1_421  (
    .I0(\NlwInverterSignal_U3/DCORIE<0>_MC.D2_PT_1/IN0 ),
    .I1(\U3/DCORIE [0]),
    .I2(\NlwInverterSignal_U3/DCORIE<0>_MC.D2_PT_1/IN2 ),
    .O(\U3/DCORIE<0>_MC.D2_PT_1 )
  );
  X_OR2 \U3/DCORIE<0>_MC.D2_422  (
    .I0(\U3/DCORIE<0>_MC.D2_PT_0 ),
    .I1(\U3/DCORIE<0>_MC.D2_PT_1 ),
    .O(\U3/DCORIE<0>_MC.D2 )
  );
  X_BUF DCORIEw_423 (
    .I(\DCORIEw_MC.Q ),
    .O(DCORIEw)
  );
  X_BUF \DCORIEw_MC.Q_424  (
    .I(\DCORIEw_MC.D ),
    .O(\DCORIEw_MC.Q )
  );
  X_XOR2 \DCORIEw_MC.D_425  (
    .I0(\DCORIEw_MC.D1 ),
    .I1(\DCORIEw_MC.D2 ),
    .O(\DCORIEw_MC.D )
  );
  X_AND16 \DCORIEw_MC.D1_426  (
    .I0(\NlwInverterSignal_DCORIEw_MC.D1/IN0 ),
    .I1(\RD_II/UIM ),
    .I2(\NlwInverterSignal_DCORIEw_MC.D1/IN2 ),
    .I3(\NlwInverterSignal_DCORIEw_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCORIEw_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCORIEw_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCORIEw_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCORIEw_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCORIEw_MC.D1/IN8 ),
    .I9(\NlwInverterSignal_DCORIEw_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCORIEw_MC.D1 )
  );
  X_ZERO \DCORIEw_MC.D2_427  (
    .O(\DCORIEw_MC.D2 )
  );
  X_BUF NET2528_428 (
    .I(\NET2528_MC.Q ),
    .O(NET2528)
  );
  X_FF \NET2528_MC.REG  (
    .I(\NET2528_MC.D ),
    .CE(Vcc),
    .CLK(\NET2528_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\NET2528_MC.Q )
  );
  X_INV \NET2528_MC.REG_tsimcreated_inv_Mclk_II/FCLK_429  (
    .I(\Mclk_II/FCLK ),
    .O(\NET2528_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \NET2528_MC.D_430  (
    .I0(\NET2528_MC.D1 ),
    .I1(\NET2528_MC.D2 ),
    .O(\NET2528_MC.D )
  );
  X_ZERO \NET2528_MC.D1_431  (
    .O(\NET2528_MC.D1 )
  );
  X_AND3 \NET2528_MC.D2_PT_0_432  (
    .I0(\NlwInverterSignal_NET2528_MC.D2_PT_0/IN0 ),
    .I1(\AD<1>_II/UIM ),
    .I2(DCORIFGw),
    .O(\NET2528_MC.D2_PT_0 )
  );
  X_AND3 \NET2528_MC.D2_PT_1_433  (
    .I0(\NlwInverterSignal_NET2528_MC.D2_PT_1/IN0 ),
    .I1(NET2528),
    .I2(\NlwInverterSignal_NET2528_MC.D2_PT_1/IN2 ),
    .O(\NET2528_MC.D2_PT_1 )
  );
  X_AND3 \NET2528_MC.D2_PT_2_434  (
    .I0(\NlwInverterSignal_NET2528_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_NET2528_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_NET2528_MC.D2_PT_2/IN2 ),
    .O(\NET2528_MC.D2_PT_2 )
  );
  X_OR3 \NET2528_MC.D2_435  (
    .I0(\NET2528_MC.D2_PT_0 ),
    .I1(\NET2528_MC.D2_PT_1 ),
    .I2(\NET2528_MC.D2_PT_2 ),
    .O(\NET2528_MC.D2 )
  );
  X_BUF DCORIFGw_436 (
    .I(\DCORIFGw_MC.Q ),
    .O(DCORIFGw)
  );
  X_BUF \DCORIFGw_MC.Q_437  (
    .I(\DCORIFGw_MC.D ),
    .O(\DCORIFGw_MC.Q )
  );
  X_XOR2 \DCORIFGw_MC.D_438  (
    .I0(\DCORIFGw_MC.D1 ),
    .I1(\DCORIFGw_MC.D2 ),
    .O(\DCORIFGw_MC.D )
  );
  X_AND16 \DCORIFGw_MC.D1_439  (
    .I0(\NlwInverterSignal_DCORIFGw_MC.D1/IN0 ),
    .I1(\RD_II/UIM ),
    .I2(\NlwInverterSignal_DCORIFGw_MC.D1/IN2 ),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCORIFGw_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCORIFGw_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCORIFGw_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCORIFGw_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCORIFGw_MC.D1/IN8 ),
    .I9(\NlwInverterSignal_DCORIFGw_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCORIFGw_MC.D1 )
  );
  X_ZERO \DCORIFGw_MC.D2_440  (
    .O(\DCORIFGw_MC.D2 )
  );
  X_BUF \U4/orFLGs_441  (
    .I(\U4/orFLGs_MC.Q ),
    .O(\U4/orFLGs )
  );
  X_BUF \U4/orFLGs_MC.Q_442  (
    .I(\U4/orFLGs_MC.D ),
    .O(\U4/orFLGs_MC.Q )
  );
  X_XOR2 \U4/orFLGs_MC.D_443  (
    .I0(\U4/orFLGs_MC.D1 ),
    .I1(\U4/orFLGs_MC.D2 ),
    .O(\U4/orFLGs_MC.D )
  );
  X_AND8 \U4/orFLGs_MC.D1_444  (
    .I0(\Home033FLG_II/UIM ),
    .I1(\Home05FLG_II/UIM ),
    .I2(\Enc033FLG_II/UIM ),
    .I3(\Enc05FLG_II/UIM ),
    .I4(\Home133FLG_II/UIM ),
    .I5(\Home15FLG_II/UIM ),
    .I6(\Enc133FLG_II/UIM ),
    .I7(\Enc15FLG_II/UIM ),
    .O(\U4/orFLGs_MC.D1 )
  );
  X_ZERO \U4/orFLGs_MC.D2_445  (
    .O(\U4/orFLGs_MC.D2 )
  );
  X_BUF \U3/DCORIE<1>  (
    .I(\U3/DCORIE<1>_MC.Q ),
    .O(\U3/DCORIE [1])
  );
  X_FF \U3/DCORIE<1>_MC.REG  (
    .I(\U3/DCORIE<1>_MC.D ),
    .CE(Vcc),
    .CLK(\U3/DCORIE<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U3/DCORIE<1>_MC.Q )
  );
  X_INV \U3/DCORIE<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_446  (
    .I(\Mclk_II/FCLK ),
    .O(\U3/DCORIE<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U3/DCORIE<1>_MC.D_447  (
    .I0(\U3/DCORIE<1>_MC.D1 ),
    .I1(\U3/DCORIE<1>_MC.D2 ),
    .O(\U3/DCORIE<1>_MC.D )
  );
  X_ZERO \U3/DCORIE<1>_MC.D1_448  (
    .O(\U3/DCORIE<1>_MC.D1 )
  );
  X_AND3 \U3/DCORIE<1>_MC.D2_PT_0_449  (
    .I0(\NlwInverterSignal_U3/DCORIE<1>_MC.D2_PT_0/IN0 ),
    .I1(\AD<1>_II/UIM ),
    .I2(DCORIEw),
    .O(\U3/DCORIE<1>_MC.D2_PT_0 )
  );
  X_AND3 \U3/DCORIE<1>_MC.D2_PT_1_450  (
    .I0(\NlwInverterSignal_U3/DCORIE<1>_MC.D2_PT_1/IN0 ),
    .I1(\U3/DCORIE [1]),
    .I2(\NlwInverterSignal_U3/DCORIE<1>_MC.D2_PT_1/IN2 ),
    .O(\U3/DCORIE<1>_MC.D2_PT_1 )
  );
  X_OR2 \U3/DCORIE<1>_MC.D2_451  (
    .I0(\U3/DCORIE<1>_MC.D2_PT_0 ),
    .I1(\U3/DCORIE<1>_MC.D2_PT_1 ),
    .O(\U3/DCORIE<1>_MC.D2 )
  );
  X_BUF NET2482_452 (
    .I(\NET2482_MC.Q ),
    .O(NET2482)
  );
  X_XOR2 NET2482_MC_tsimcreated_xor__453 (
    .I0(\NET2482_MC.D ),
    .I1(\NET2482_MC.Q ),
    .O(NET2482_MC_tsimcreated_xor_)
  );
  X_FF \NET2482_MC.REG  (
    .I(NET2482_MC_tsimcreated_xor_),
    .CE(Vcc),
    .CLK(\NET2482_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\NET2482_MC.Q )
  );
  X_INV \NET2482_MC.REG_tsimcreated_inv_Mclk_II/FCLK_454  (
    .I(\Mclk_II/FCLK ),
    .O(\NET2482_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \NET2482_MC.D_455  (
    .I0(\NET2482_MC.D1 ),
    .I1(\NET2482_MC.D2 ),
    .O(\NET2482_MC.D )
  );
  X_ZERO \NET2482_MC.D1_456  (
    .O(\NET2482_MC.D1 )
  );
  X_AND5 \NET2482_MC.D2_PT_0_457  (
    .I0(\NlwInverterSignal_NET2482_MC.D2_PT_0/IN0 ),
    .I1(\AD<2>_II/UIM ),
    .I2(\NlwInverterSignal_NET2482_MC.D2_PT_0/IN2 ),
    .I3(DCORIFGw),
    .I4(\NlwInverterSignal_NET2482_MC.D2_PT_0/IN4 ),
    .O(\NET2482_MC.D2_PT_0 )
  );
  X_AND5 \NET2482_MC.D2_PT_1_458  (
    .I0(\NlwInverterSignal_NET2482_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_NET2482_MC.D2_PT_1/IN1 ),
    .I2(NET2482),
    .I3(DCORIFGw),
    .I4(\NlwInverterSignal_NET2482_MC.D2_PT_1/IN4 ),
    .O(\NET2482_MC.D2_PT_1 )
  );
  X_AND7 \NET2482_MC.D2_PT_2_459  (
    .I0(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN3 ),
    .I4(\U1/U4/RF0r ),
    .I5(\U1/U4/HE0stater ),
    .I6(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN6 ),
    .O(\NET2482_MC.D2_PT_2 )
  );
  X_AND7 \NET2482_MC.D2_PT_3_460  (
    .I0(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN4 ),
    .I5(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN5 ),
    .I6(\U1/U4/HE0statelastr ),
    .O(\NET2482_MC.D2_PT_3 )
  );
  X_OR4 \NET2482_MC.D2_461  (
    .I0(\NET2482_MC.D2_PT_0 ),
    .I1(\NET2482_MC.D2_PT_1 ),
    .I2(\NET2482_MC.D2_PT_2 ),
    .I3(\NET2482_MC.D2_PT_3 ),
    .O(\NET2482_MC.D2 )
  );
  X_BUF DCORENCCTLw_462 (
    .I(\DCORENCCTLw_MC.Q ),
    .O(DCORENCCTLw)
  );
  X_BUF \DCORENCCTLw_MC.Q_463  (
    .I(\DCORENCCTLw_MC.D ),
    .O(\DCORENCCTLw_MC.Q )
  );
  X_XOR2 \DCORENCCTLw_MC.D_464  (
    .I0(\DCORENCCTLw_MC.D1 ),
    .I1(\DCORENCCTLw_MC.D2 ),
    .O(\DCORENCCTLw_MC.D )
  );
  X_AND16 \DCORENCCTLw_MC.D1_465  (
    .I0(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN0 ),
    .I1(\RD_II/UIM ),
    .I2(U2_ADDR_reg[1]),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN8 ),
    .I9(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCORENCCTLw_MC.D1 )
  );
  X_ZERO \DCORENCCTLw_MC.D2_466  (
    .O(\DCORENCCTLw_MC.D2 )
  );
  X_BUF \U1/U4/RF0r_467  (
    .I(\U1/U4/RF0r_MC.Q ),
    .O(\U1/U4/RF0r )
  );
  X_FF \U1/U4/RF0r_MC.REG  (
    .I(\U1/U4/RF0r_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/RF0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/RF0r_MC.Q )
  );
  X_INV \U1/U4/RF0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK_468  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/RF0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/RF0r_MC.D_469  (
    .I0(\U1/U4/RF0r_MC.D1 ),
    .I1(\U1/U4/RF0r_MC.D2 ),
    .O(\U1/U4/RF0r_MC.D )
  );
  X_ZERO \U1/U4/RF0r_MC.D1_470  (
    .O(\U1/U4/RF0r_MC.D1 )
  );
  X_AND3 \U1/U4/RF0r_MC.D2_PT_0_471  (
    .I0(\NlwInverterSignal_U1/U4/RF0r_MC.D2_PT_0/IN0 ),
    .I1(\AD<0>_II/UIM ),
    .I2(DCORENCCTLw),
    .O(\U1/U4/RF0r_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/RF0r_MC.D2_PT_1_472  (
    .I0(\NlwInverterSignal_U1/U4/RF0r_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/RF0r_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/RF0r ),
    .O(\U1/U4/RF0r_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/RF0r_MC.D2_473  (
    .I0(\U1/U4/RF0r_MC.D2_PT_0 ),
    .I1(\U1/U4/RF0r_MC.D2_PT_1 ),
    .O(\U1/U4/RF0r_MC.D2 )
  );
  X_BUF \U1/U4/HE0statelastr_474  (
    .I(\U1/U4/HE0statelastr_MC.Q ),
    .O(\U1/U4/HE0statelastr )
  );
  X_FF \U1/U4/HE0statelastr_MC.REG  (
    .I(\U1/U4/HE0statelastr_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/HE0statelastr_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/HE0statelastr_MC.Q )
  );
  X_INV \U1/U4/HE0statelastr_MC.REG_tsimcreated_inv_Mclk_II/FCLK_475  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/HE0statelastr_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/HE0statelastr_MC.D_476  (
    .I0(\U1/U4/HE0statelastr_MC.D1 ),
    .I1(\U1/U4/HE0statelastr_MC.D2 ),
    .O(\U1/U4/HE0statelastr_MC.D )
  );
  X_AND2 \U1/U4/HE0statelastr_MC.D1_477  (
    .I0(\U1/U4/HE0stater ),
    .I1(\U1/U4/HE0stater ),
    .O(\U1/U4/HE0statelastr_MC.D1 )
  );
  X_ZERO \U1/U4/HE0statelastr_MC.D2_478  (
    .O(\U1/U4/HE0statelastr_MC.D2 )
  );
  X_BUF \U3/DCORIE<2>  (
    .I(\U3/DCORIE<2>_MC.Q ),
    .O(\U3/DCORIE [2])
  );
  X_FF \U3/DCORIE<2>_MC.REG  (
    .I(\U3/DCORIE<2>_MC.D ),
    .CE(Vcc),
    .CLK(\U3/DCORIE<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U3/DCORIE<2>_MC.Q )
  );
  X_INV \U3/DCORIE<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_479  (
    .I(\Mclk_II/FCLK ),
    .O(\U3/DCORIE<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U3/DCORIE<2>_MC.D_480  (
    .I0(\U3/DCORIE<2>_MC.D1 ),
    .I1(\U3/DCORIE<2>_MC.D2 ),
    .O(\U3/DCORIE<2>_MC.D )
  );
  X_ZERO \U3/DCORIE<2>_MC.D1_481  (
    .O(\U3/DCORIE<2>_MC.D1 )
  );
  X_AND3 \U3/DCORIE<2>_MC.D2_PT_0_482  (
    .I0(\NlwInverterSignal_U3/DCORIE<2>_MC.D2_PT_0/IN0 ),
    .I1(\AD<2>_II/UIM ),
    .I2(DCORIEw),
    .O(\U3/DCORIE<2>_MC.D2_PT_0 )
  );
  X_AND3 \U3/DCORIE<2>_MC.D2_PT_1_483  (
    .I0(\NlwInverterSignal_U3/DCORIE<2>_MC.D2_PT_1/IN0 ),
    .I1(\U3/DCORIE [2]),
    .I2(\NlwInverterSignal_U3/DCORIE<2>_MC.D2_PT_1/IN2 ),
    .O(\U3/DCORIE<2>_MC.D2_PT_1 )
  );
  X_OR2 \U3/DCORIE<2>_MC.D2_484  (
    .I0(\U3/DCORIE<2>_MC.D2_PT_0 ),
    .I1(\U3/DCORIE<2>_MC.D2_PT_1 ),
    .O(\U3/DCORIE<2>_MC.D2 )
  );
  X_BUF NET2493_485 (
    .I(\NET2493_MC.Q ),
    .O(NET2493)
  );
  X_XOR2 NET2493_MC_tsimcreated_xor__486 (
    .I0(\NET2493_MC.D ),
    .I1(\NET2493_MC.Q ),
    .O(NET2493_MC_tsimcreated_xor_)
  );
  X_FF \NET2493_MC.REG  (
    .I(NET2493_MC_tsimcreated_xor_),
    .CE(Vcc),
    .CLK(\NET2493_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\NET2493_MC.Q )
  );
  X_INV \NET2493_MC.REG_tsimcreated_inv_Mclk_II/FCLK_487  (
    .I(\Mclk_II/FCLK ),
    .O(\NET2493_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \NET2493_MC.D_488  (
    .I0(\NET2493_MC.D1 ),
    .I1(\NET2493_MC.D2 ),
    .O(\NET2493_MC.D )
  );
  X_ZERO \NET2493_MC.D1_489  (
    .O(\NET2493_MC.D1 )
  );
  X_AND5 \NET2493_MC.D2_PT_0_490  (
    .I0(\NlwInverterSignal_NET2493_MC.D2_PT_0/IN0 ),
    .I1(\AD<3>_II/UIM ),
    .I2(\NlwInverterSignal_NET2493_MC.D2_PT_0/IN2 ),
    .I3(DCORIFGw),
    .I4(\NlwInverterSignal_NET2493_MC.D2_PT_0/IN4 ),
    .O(\NET2493_MC.D2_PT_0 )
  );
  X_AND5 \NET2493_MC.D2_PT_1_491  (
    .I0(\NlwInverterSignal_NET2493_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_NET2493_MC.D2_PT_1/IN1 ),
    .I2(NET2493),
    .I3(DCORIFGw),
    .I4(\NlwInverterSignal_NET2493_MC.D2_PT_1/IN4 ),
    .O(\NET2493_MC.D2_PT_1 )
  );
  X_AND8 \NET2493_MC.D2_PT_2_492  (
    .I0(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN3 ),
    .I4(\U1/U4/RF1r ),
    .I5(\U1/U4/E1r ),
    .I6(\U1/U4/HE1stater ),
    .I7(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN7 ),
    .O(\NET2493_MC.D2_PT_2 )
  );
  X_AND8 \NET2493_MC.D2_PT_3_493  (
    .I0(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN4 ),
    .I5(\U1/U4/E1r ),
    .I6(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN6 ),
    .I7(\U1/U4/HE1statelastr ),
    .O(\NET2493_MC.D2_PT_3 )
  );
  X_OR4 \NET2493_MC.D2_494  (
    .I0(\NET2493_MC.D2_PT_0 ),
    .I1(\NET2493_MC.D2_PT_1 ),
    .I2(\NET2493_MC.D2_PT_2 ),
    .I3(\NET2493_MC.D2_PT_3 ),
    .O(\NET2493_MC.D2 )
  );
  X_BUF \U1/U4/RF1r_495  (
    .I(\U1/U4/RF1r_MC.Q ),
    .O(\U1/U4/RF1r )
  );
  X_FF \U1/U4/RF1r_MC.REG  (
    .I(\U1/U4/RF1r_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/RF1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/RF1r_MC.Q )
  );
  X_INV \U1/U4/RF1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK_496  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/RF1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/RF1r_MC.D_497  (
    .I0(\U1/U4/RF1r_MC.D1 ),
    .I1(\U1/U4/RF1r_MC.D2 ),
    .O(\U1/U4/RF1r_MC.D )
  );
  X_ZERO \U1/U4/RF1r_MC.D1_498  (
    .O(\U1/U4/RF1r_MC.D1 )
  );
  X_AND3 \U1/U4/RF1r_MC.D2_PT_0_499  (
    .I0(\NlwInverterSignal_U1/U4/RF1r_MC.D2_PT_0/IN0 ),
    .I1(\AD<4>_II/UIM ),
    .I2(DCORENCCTLw),
    .O(\U1/U4/RF1r_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/RF1r_MC.D2_PT_1_500  (
    .I0(\NlwInverterSignal_U1/U4/RF1r_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/RF1r_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/RF1r ),
    .O(\U1/U4/RF1r_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/RF1r_MC.D2_501  (
    .I0(\U1/U4/RF1r_MC.D2_PT_0 ),
    .I1(\U1/U4/RF1r_MC.D2_PT_1 ),
    .O(\U1/U4/RF1r_MC.D2 )
  );
  X_BUF \U1/U4/E1r_502  (
    .I(\U1/U4/E1r_MC.Q ),
    .O(\U1/U4/E1r )
  );
  X_FF \U1/U4/E1r_MC.REG  (
    .I(\U1/U4/E1r_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/E1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/E1r_MC.Q )
  );
  X_INV \U1/U4/E1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK_503  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/E1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/E1r_MC.D_504  (
    .I0(\U1/U4/E1r_MC.D1 ),
    .I1(\U1/U4/E1r_MC.D2 ),
    .O(\U1/U4/E1r_MC.D )
  );
  X_ZERO \U1/U4/E1r_MC.D1_505  (
    .O(\U1/U4/E1r_MC.D1 )
  );
  X_AND3 \U1/U4/E1r_MC.D2_PT_0_506  (
    .I0(\NlwInverterSignal_U1/U4/E1r_MC.D2_PT_0/IN0 ),
    .I1(\AD<5>_II/UIM ),
    .I2(DCORENCCTLw),
    .O(\U1/U4/E1r_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/E1r_MC.D2_PT_1_507  (
    .I0(\NlwInverterSignal_U1/U4/E1r_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/E1r_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/E1r ),
    .O(\U1/U4/E1r_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/E1r_MC.D2_508  (
    .I0(\U1/U4/E1r_MC.D2_PT_0 ),
    .I1(\U1/U4/E1r_MC.D2_PT_1 ),
    .O(\U1/U4/E1r_MC.D2 )
  );
  X_BUF \U1/U4/HE1statelastr_509  (
    .I(\U1/U4/HE1statelastr_MC.Q ),
    .O(\U1/U4/HE1statelastr )
  );
  X_FF \U1/U4/HE1statelastr_MC.REG  (
    .I(\U1/U4/HE1statelastr_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/HE1statelastr_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/HE1statelastr_MC.Q )
  );
  X_INV \U1/U4/HE1statelastr_MC.REG_tsimcreated_inv_Mclk_II/FCLK_510  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/HE1statelastr_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/HE1statelastr_MC.D_511  (
    .I0(\U1/U4/HE1statelastr_MC.D1 ),
    .I1(\U1/U4/HE1statelastr_MC.D2 ),
    .O(\U1/U4/HE1statelastr_MC.D )
  );
  X_AND2 \U1/U4/HE1statelastr_MC.D1_512  (
    .I0(\U1/U4/HE1stater ),
    .I1(\U1/U4/HE1stater ),
    .O(\U1/U4/HE1statelastr_MC.D1 )
  );
  X_ZERO \U1/U4/HE1statelastr_MC.D2_513  (
    .O(\U1/U4/HE1statelastr_MC.D2 )
  );
  X_BUF \U3/DCORIE<3>  (
    .I(\U3/DCORIE<3>_MC.Q ),
    .O(\U3/DCORIE [3])
  );
  X_FF \U3/DCORIE<3>_MC.REG  (
    .I(\U3/DCORIE<3>_MC.D ),
    .CE(Vcc),
    .CLK(\U3/DCORIE<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U3/DCORIE<3>_MC.Q )
  );
  X_INV \U3/DCORIE<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_514  (
    .I(\Mclk_II/FCLK ),
    .O(\U3/DCORIE<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U3/DCORIE<3>_MC.D_515  (
    .I0(\U3/DCORIE<3>_MC.D1 ),
    .I1(\U3/DCORIE<3>_MC.D2 ),
    .O(\U3/DCORIE<3>_MC.D )
  );
  X_ZERO \U3/DCORIE<3>_MC.D1_516  (
    .O(\U3/DCORIE<3>_MC.D1 )
  );
  X_AND3 \U3/DCORIE<3>_MC.D2_PT_0_517  (
    .I0(\NlwInverterSignal_U3/DCORIE<3>_MC.D2_PT_0/IN0 ),
    .I1(\AD<3>_II/UIM ),
    .I2(DCORIEw),
    .O(\U3/DCORIE<3>_MC.D2_PT_0 )
  );
  X_AND3 \U3/DCORIE<3>_MC.D2_PT_1_518  (
    .I0(\NlwInverterSignal_U3/DCORIE<3>_MC.D2_PT_1/IN0 ),
    .I1(\U3/DCORIE [3]),
    .I2(\NlwInverterSignal_U3/DCORIE<3>_MC.D2_PT_1/IN2 ),
    .O(\U3/DCORIE<3>_MC.D2_PT_1 )
  );
  X_OR2 \U3/DCORIE<3>_MC.D2_519  (
    .I0(\U3/DCORIE<3>_MC.D2_PT_0 ),
    .I1(\U3/DCORIE<3>_MC.D2_PT_1 ),
    .O(\U3/DCORIE<3>_MC.D2 )
  );
  X_BUF NET2575_520 (
    .I(\NET2575_MC.Q ),
    .O(NET2575)
  );
  X_FF \NET2575_MC.REG  (
    .I(\NET2575_MC.D ),
    .CE(Vcc),
    .CLK(\NET2575_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\NET2575_MC.Q )
  );
  X_INV \NET2575_MC.REG_tsimcreated_inv_Mclk_II/FCLK_521  (
    .I(\Mclk_II/FCLK ),
    .O(\NET2575_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \NET2575_MC.D_522  (
    .I0(\NET2575_MC.D1 ),
    .I1(\NET2575_MC.D2 ),
    .O(\NET2575_MC.D )
  );
  X_ZERO \NET2575_MC.D1_523  (
    .O(\NET2575_MC.D1 )
  );
  X_AND3 \NET2575_MC.D2_PT_0_524  (
    .I0(\DIR0_II/UIM ),
    .I1(\NlwInverterSignal_NET2575_MC.D2_PT_0/IN1 ),
    .I2(\NlwInverterSignal_NET2575_MC.D2_PT_0/IN2 ),
    .O(\NET2575_MC.D2_PT_0 )
  );
  X_AND3 \NET2575_MC.D2_PT_1_525  (
    .I0(\NlwInverterSignal_NET2575_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_NET2575_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_NET2575_MC.D2_PT_1/IN2 ),
    .O(\NET2575_MC.D2_PT_1 )
  );
  X_AND3 \NET2575_MC.D2_PT_2_526  (
    .I0(\DIR1_II/UIM ),
    .I1(\NlwInverterSignal_NET2575_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_NET2575_MC.D2_PT_2/IN2 ),
    .O(\NET2575_MC.D2_PT_2 )
  );
  X_AND3 \NET2575_MC.D2_PT_3_527  (
    .I0(\NlwInverterSignal_NET2575_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_NET2575_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_NET2575_MC.D2_PT_3/IN2 ),
    .O(\NET2575_MC.D2_PT_3 )
  );
  X_AND3 \NET2575_MC.D2_PT_4_528  (
    .I0(\NlwInverterSignal_NET2575_MC.D2_PT_4/IN0 ),
    .I1(\AD<4>_II/UIM ),
    .I2(DCORIFGw),
    .O(\NET2575_MC.D2_PT_4 )
  );
  X_AND3 \NET2575_MC.D2_PT_5_529  (
    .I0(\NlwInverterSignal_NET2575_MC.D2_PT_5/IN0 ),
    .I1(NET2575),
    .I2(\NlwInverterSignal_NET2575_MC.D2_PT_5/IN2 ),
    .O(\NET2575_MC.D2_PT_5 )
  );
  X_OR6 \NET2575_MC.D2_530  (
    .I0(\NET2575_MC.D2_PT_0 ),
    .I1(\NET2575_MC.D2_PT_1 ),
    .I2(\NET2575_MC.D2_PT_2 ),
    .I3(\NET2575_MC.D2_PT_3 ),
    .I4(\NET2575_MC.D2_PT_4 ),
    .I5(\NET2575_MC.D2_PT_5 ),
    .O(\NET2575_MC.D2 )
  );
  X_BUF \U3/DCORIE<4>  (
    .I(\U3/DCORIE<4>_MC.Q ),
    .O(\U3/DCORIE [4])
  );
  X_FF \U3/DCORIE<4>_MC.REG  (
    .I(\U3/DCORIE<4>_MC.D ),
    .CE(Vcc),
    .CLK(\U3/DCORIE<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U3/DCORIE<4>_MC.Q )
  );
  X_INV \U3/DCORIE<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_531  (
    .I(\Mclk_II/FCLK ),
    .O(\U3/DCORIE<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U3/DCORIE<4>_MC.D_532  (
    .I0(\U3/DCORIE<4>_MC.D1 ),
    .I1(\U3/DCORIE<4>_MC.D2 ),
    .O(\U3/DCORIE<4>_MC.D )
  );
  X_ZERO \U3/DCORIE<4>_MC.D1_533  (
    .O(\U3/DCORIE<4>_MC.D1 )
  );
  X_AND3 \U3/DCORIE<4>_MC.D2_PT_0_534  (
    .I0(\NlwInverterSignal_U3/DCORIE<4>_MC.D2_PT_0/IN0 ),
    .I1(\AD<4>_II/UIM ),
    .I2(DCORIEw),
    .O(\U3/DCORIE<4>_MC.D2_PT_0 )
  );
  X_AND3 \U3/DCORIE<4>_MC.D2_PT_1_535  (
    .I0(\NlwInverterSignal_U3/DCORIE<4>_MC.D2_PT_1/IN0 ),
    .I1(\U3/DCORIE [4]),
    .I2(\NlwInverterSignal_U3/DCORIE<4>_MC.D2_PT_1/IN2 ),
    .O(\U3/DCORIE<4>_MC.D2_PT_1 )
  );
  X_OR2 \U3/DCORIE<4>_MC.D2_536  (
    .I0(\U3/DCORIE<4>_MC.D2_PT_0 ),
    .I1(\U3/DCORIE<4>_MC.D2_PT_1 ),
    .O(\U3/DCORIE<4>_MC.D2 )
  );
  X_BUF NET2501_537 (
    .I(\NET2501_MC.Q ),
    .O(NET2501)
  );
  X_XOR2 NET2501_MC_tsimcreated_xor__538 (
    .I0(\NET2501_MC.D ),
    .I1(\NET2501_MC.Q ),
    .O(NET2501_MC_tsimcreated_xor_)
  );
  X_FF \NET2501_MC.REG  (
    .I(NET2501_MC_tsimcreated_xor_),
    .CE(Vcc),
    .CLK(\NET2501_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\NET2501_MC.Q )
  );
  X_INV \NET2501_MC.REG_tsimcreated_inv_Mclk_II/FCLK_539  (
    .I(\Mclk_II/FCLK ),
    .O(\NET2501_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \NET2501_MC.D_540  (
    .I0(\NET2501_MC.D1 ),
    .I1(\NET2501_MC.D2 ),
    .O(\NET2501_MC.D )
  );
  X_ZERO \NET2501_MC.D1_541  (
    .O(\NET2501_MC.D1 )
  );
  X_AND2 \NET2501_MC.D2_PT_0_542  (
    .I0(\NlwInverterSignal_NET2501_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .O(\NET2501_MC.D2_PT_0 )
  );
  X_AND5 \NET2501_MC.D2_PT_1_543  (
    .I0(\NlwInverterSignal_NET2501_MC.D2_PT_1/IN0 ),
    .I1(\AD<5>_II/UIM ),
    .I2(\NlwInverterSignal_NET2501_MC.D2_PT_1/IN2 ),
    .I3(DCORIFGw),
    .I4(\NlwInverterSignal_NET2501_MC.D2_PT_1/IN4 ),
    .O(\NET2501_MC.D2_PT_1 )
  );
  X_AND5 \NET2501_MC.D2_PT_2_544  (
    .I0(\NlwInverterSignal_NET2501_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_NET2501_MC.D2_PT_2/IN1 ),
    .I2(NET2501),
    .I3(DCORIFGw),
    .I4(\NlwInverterSignal_NET2501_MC.D2_PT_2/IN4 ),
    .O(\NET2501_MC.D2_PT_2 )
  );
  X_OR3 \NET2501_MC.D2_545  (
    .I0(\NET2501_MC.D2_PT_0 ),
    .I1(\NET2501_MC.D2_PT_1 ),
    .I2(\NET2501_MC.D2_PT_2 ),
    .O(\NET2501_MC.D2 )
  );
  X_BUF N_PZ_1113_546 (
    .I(\N_PZ_1113_MC.Q ),
    .O(N_PZ_1113)
  );
  X_BUF \N_PZ_1113_MC.Q_547  (
    .I(\N_PZ_1113_MC.D ),
    .O(\N_PZ_1113_MC.Q )
  );
  X_XOR2 \N_PZ_1113_MC.D_548  (
    .I0(\N_PZ_1113_MC.D1 ),
    .I1(\N_PZ_1113_MC.D2 ),
    .O(\N_PZ_1113_MC.D )
  );
  X_ZERO \N_PZ_1113_MC.D1_549  (
    .O(\N_PZ_1113_MC.D1 )
  );
  X_AND6 \N_PZ_1113_MC.D2_PT_0_550  (
    .I0(\outDATA<6>\$WA1.UIM ),
    .I1(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN1 ),
    .I2(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN2 ),
    .I3(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN3 ),
    .I4(\U1/U4/LatchEdge0r ),
    .I5(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN5 ),
    .O(\N_PZ_1113_MC.D2_PT_0 )
  );
  X_AND6 \N_PZ_1113_MC.D2_PT_1_551  (
    .I0(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN2 ),
    .I3(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN4 ),
    .I5(\U1/U4/InEdge0r ),
    .O(\N_PZ_1113_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1113_MC.D2_552  (
    .I0(\N_PZ_1113_MC.D2_PT_0 ),
    .I1(\N_PZ_1113_MC.D2_PT_1 ),
    .O(\N_PZ_1113_MC.D2 )
  );
  X_BUF \U1/U4/LatchEdge0r_553  (
    .I(\U1/U4/LatchEdge0r_MC.Q ),
    .O(\U1/U4/LatchEdge0r )
  );
  X_FF \U1/U4/LatchEdge0r_MC.REG  (
    .I(\U1/U4/LatchEdge0r_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/LatchEdge0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/LatchEdge0r_MC.Q )
  );
  X_INV \U1/U4/LatchEdge0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK_554  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/LatchEdge0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/LatchEdge0r_MC.D_555  (
    .I0(\U1/U4/LatchEdge0r_MC.D1 ),
    .I1(\U1/U4/LatchEdge0r_MC.D2 ),
    .O(\U1/U4/LatchEdge0r_MC.D )
  );
  X_ZERO \U1/U4/LatchEdge0r_MC.D1_556  (
    .O(\U1/U4/LatchEdge0r_MC.D1 )
  );
  X_AND3 \U1/U4/LatchEdge0r_MC.D2_PT_0_557  (
    .I0(\NlwInverterSignal_U1/U4/LatchEdge0r_MC.D2_PT_0/IN0 ),
    .I1(\AD<2>_II/UIM ),
    .I2(DCORENCCTLw),
    .O(\U1/U4/LatchEdge0r_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/LatchEdge0r_MC.D2_PT_1_558  (
    .I0(\NlwInverterSignal_U1/U4/LatchEdge0r_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/LatchEdge0r_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/LatchEdge0r ),
    .O(\U1/U4/LatchEdge0r_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/LatchEdge0r_MC.D2_559  (
    .I0(\U1/U4/LatchEdge0r_MC.D2_PT_0 ),
    .I1(\U1/U4/LatchEdge0r_MC.D2_PT_1 ),
    .O(\U1/U4/LatchEdge0r_MC.D2 )
  );
  X_BUF \outDATA<6>\$WA1.UIM_560  (
    .I(\outDATA<6>\$WA1.UIM_MC.Q ),
    .O(\outDATA<6>\$WA1.UIM )
  );
  X_BUF \outDATA<6>\$WA1.UIM_MC.Q_561  (
    .I(\outDATA<6>\$WA1.UIM_MC.D ),
    .O(\outDATA<6>\$WA1.UIM_MC.Q )
  );
  X_XOR2 \outDATA<6>\$WA1.UIM_MC.D_562  (
    .I0(\outDATA<6>\$WA1.UIM_MC.D1 ),
    .I1(\outDATA<6>\$WA1.UIM_MC.D2 ),
    .O(\outDATA<6>\$WA1.UIM_MC.D )
  );
  X_AND2 \outDATA<6>\$WA1.UIM_MC.D1_563  (
    .I0(\GP_Motor0_0_II/UIM ),
    .I1(\GP_Motor0_0_II/UIM ),
    .O(\outDATA<6>\$WA1.UIM_MC.D1 )
  );
  X_ZERO \outDATA<6>\$WA1.UIM_MC.D2_564  (
    .O(\outDATA<6>\$WA1.UIM_MC.D2 )
  );
  X_BUF \U3/DCORIE<5>  (
    .I(\U3/DCORIE<5>_MC.Q ),
    .O(\U3/DCORIE [5])
  );
  X_FF \U3/DCORIE<5>_MC.REG  (
    .I(\U3/DCORIE<5>_MC.D ),
    .CE(Vcc),
    .CLK(\U3/DCORIE<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U3/DCORIE<5>_MC.Q )
  );
  X_INV \U3/DCORIE<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_565  (
    .I(\Mclk_II/FCLK ),
    .O(\U3/DCORIE<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U3/DCORIE<5>_MC.D_566  (
    .I0(\U3/DCORIE<5>_MC.D1 ),
    .I1(\U3/DCORIE<5>_MC.D2 ),
    .O(\U3/DCORIE<5>_MC.D )
  );
  X_ZERO \U3/DCORIE<5>_MC.D1_567  (
    .O(\U3/DCORIE<5>_MC.D1 )
  );
  X_AND3 \U3/DCORIE<5>_MC.D2_PT_0_568  (
    .I0(\NlwInverterSignal_U3/DCORIE<5>_MC.D2_PT_0/IN0 ),
    .I1(\AD<5>_II/UIM ),
    .I2(DCORIEw),
    .O(\U3/DCORIE<5>_MC.D2_PT_0 )
  );
  X_AND3 \U3/DCORIE<5>_MC.D2_PT_1_569  (
    .I0(\NlwInverterSignal_U3/DCORIE<5>_MC.D2_PT_1/IN0 ),
    .I1(\U3/DCORIE [5]),
    .I2(\NlwInverterSignal_U3/DCORIE<5>_MC.D2_PT_1/IN2 ),
    .O(\U3/DCORIE<5>_MC.D2_PT_1 )
  );
  X_OR2 \U3/DCORIE<5>_MC.D2_570  (
    .I0(\U3/DCORIE<5>_MC.D2_PT_0 ),
    .I1(\U3/DCORIE<5>_MC.D2_PT_1 ),
    .O(\U3/DCORIE<5>_MC.D2 )
  );
  X_BUF NET2512_571 (
    .I(\NET2512_MC.Q ),
    .O(NET2512)
  );
  X_XOR2 NET2512_MC_tsimcreated_xor__572 (
    .I0(\NET2512_MC.D ),
    .I1(\NET2512_MC.Q ),
    .O(NET2512_MC_tsimcreated_xor_)
  );
  X_FF \NET2512_MC.REG  (
    .I(NET2512_MC_tsimcreated_xor_),
    .CE(Vcc),
    .CLK(\NET2512_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\NET2512_MC.Q )
  );
  X_INV \NET2512_MC.REG_tsimcreated_inv_Mclk_II/FCLK_573  (
    .I(\Mclk_II/FCLK ),
    .O(\NET2512_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \NET2512_MC.D_574  (
    .I0(\NET2512_MC.D1 ),
    .I1(\NET2512_MC.D2 ),
    .O(\NET2512_MC.D )
  );
  X_ZERO \NET2512_MC.D1_575  (
    .O(\NET2512_MC.D1 )
  );
  X_AND5 \NET2512_MC.D2_PT_0_576  (
    .I0(\NlwInverterSignal_NET2512_MC.D2_PT_0/IN0 ),
    .I1(\AD<6>_II/UIM ),
    .I2(\NlwInverterSignal_NET2512_MC.D2_PT_0/IN2 ),
    .I3(DCORIFGw),
    .I4(\NlwInverterSignal_NET2512_MC.D2_PT_0/IN4 ),
    .O(\NET2512_MC.D2_PT_0 )
  );
  X_AND5 \NET2512_MC.D2_PT_1_577  (
    .I0(\NlwInverterSignal_NET2512_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_NET2512_MC.D2_PT_1/IN1 ),
    .I2(NET2512),
    .I3(DCORIFGw),
    .I4(\NlwInverterSignal_NET2512_MC.D2_PT_1/IN4 ),
    .O(\NET2512_MC.D2_PT_1 )
  );
  X_AND7 \NET2512_MC.D2_PT_2_578  (
    .I0(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN3 ),
    .I4(\GP_Motor1_0_II/UIM ),
    .I5(\U1/U4/LatchEdge1r ),
    .I6(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN6 ),
    .O(\NET2512_MC.D2_PT_2 )
  );
  X_AND7 \NET2512_MC.D2_PT_3_579  (
    .I0(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN4 ),
    .I5(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN5 ),
    .I6(\U1/U4/InEdge1r ),
    .O(\NET2512_MC.D2_PT_3 )
  );
  X_OR4 \NET2512_MC.D2_580  (
    .I0(\NET2512_MC.D2_PT_0 ),
    .I1(\NET2512_MC.D2_PT_1 ),
    .I2(\NET2512_MC.D2_PT_2 ),
    .I3(\NET2512_MC.D2_PT_3 ),
    .O(\NET2512_MC.D2 )
  );
  X_BUF \U1/U4/LatchEdge1r_581  (
    .I(\U1/U4/LatchEdge1r_MC.Q ),
    .O(\U1/U4/LatchEdge1r )
  );
  X_FF \U1/U4/LatchEdge1r_MC.REG  (
    .I(\U1/U4/LatchEdge1r_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/LatchEdge1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/LatchEdge1r_MC.Q )
  );
  X_INV \U1/U4/LatchEdge1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK_582  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/LatchEdge1r_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/LatchEdge1r_MC.D_583  (
    .I0(\U1/U4/LatchEdge1r_MC.D1 ),
    .I1(\U1/U4/LatchEdge1r_MC.D2 ),
    .O(\U1/U4/LatchEdge1r_MC.D )
  );
  X_ZERO \U1/U4/LatchEdge1r_MC.D1_584  (
    .O(\U1/U4/LatchEdge1r_MC.D1 )
  );
  X_AND3 \U1/U4/LatchEdge1r_MC.D2_PT_0_585  (
    .I0(\NlwInverterSignal_U1/U4/LatchEdge1r_MC.D2_PT_0/IN0 ),
    .I1(\AD<6>_II/UIM ),
    .I2(DCORENCCTLw),
    .O(\U1/U4/LatchEdge1r_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/LatchEdge1r_MC.D2_PT_1_586  (
    .I0(\NlwInverterSignal_U1/U4/LatchEdge1r_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/LatchEdge1r_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/LatchEdge1r ),
    .O(\U1/U4/LatchEdge1r_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/LatchEdge1r_MC.D2_587  (
    .I0(\U1/U4/LatchEdge1r_MC.D2_PT_0 ),
    .I1(\U1/U4/LatchEdge1r_MC.D2_PT_1 ),
    .O(\U1/U4/LatchEdge1r_MC.D2 )
  );
  X_BUF \U3/DCORIE<6>  (
    .I(\U3/DCORIE<6>_MC.Q ),
    .O(\U3/DCORIE [6])
  );
  X_FF \U3/DCORIE<6>_MC.REG  (
    .I(\U3/DCORIE<6>_MC.D ),
    .CE(Vcc),
    .CLK(\U3/DCORIE<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U3/DCORIE<6>_MC.Q )
  );
  X_INV \U3/DCORIE<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_588  (
    .I(\Mclk_II/FCLK ),
    .O(\U3/DCORIE<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U3/DCORIE<6>_MC.D_589  (
    .I0(\U3/DCORIE<6>_MC.D1 ),
    .I1(\U3/DCORIE<6>_MC.D2 ),
    .O(\U3/DCORIE<6>_MC.D )
  );
  X_ZERO \U3/DCORIE<6>_MC.D1_590  (
    .O(\U3/DCORIE<6>_MC.D1 )
  );
  X_AND3 \U3/DCORIE<6>_MC.D2_PT_0_591  (
    .I0(\NlwInverterSignal_U3/DCORIE<6>_MC.D2_PT_0/IN0 ),
    .I1(\AD<6>_II/UIM ),
    .I2(DCORIEw),
    .O(\U3/DCORIE<6>_MC.D2_PT_0 )
  );
  X_AND3 \U3/DCORIE<6>_MC.D2_PT_1_592  (
    .I0(\NlwInverterSignal_U3/DCORIE<6>_MC.D2_PT_1/IN0 ),
    .I1(\U3/DCORIE [6]),
    .I2(\NlwInverterSignal_U3/DCORIE<6>_MC.D2_PT_1/IN2 ),
    .O(\U3/DCORIE<6>_MC.D2_PT_1 )
  );
  X_OR2 \U3/DCORIE<6>_MC.D2_593  (
    .I0(\U3/DCORIE<6>_MC.D2_PT_0 ),
    .I1(\U3/DCORIE<6>_MC.D2_PT_1 ),
    .O(\U3/DCORIE<6>_MC.D2 )
  );
  X_BUF \U3/DCORIE<7>  (
    .I(\U3/DCORIE<7>_MC.Q ),
    .O(\U3/DCORIE [7])
  );
  X_FF \U3/DCORIE<7>_MC.REG  (
    .I(\U3/DCORIE<7>_MC.D ),
    .CE(Vcc),
    .CLK(\U3/DCORIE<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U3/DCORIE<7>_MC.Q )
  );
  X_INV \U3/DCORIE<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_594  (
    .I(\Mclk_II/FCLK ),
    .O(\U3/DCORIE<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U3/DCORIE<7>_MC.D_595  (
    .I0(\U3/DCORIE<7>_MC.D1 ),
    .I1(\U3/DCORIE<7>_MC.D2 ),
    .O(\U3/DCORIE<7>_MC.D )
  );
  X_ZERO \U3/DCORIE<7>_MC.D1_596  (
    .O(\U3/DCORIE<7>_MC.D1 )
  );
  X_AND3 \U3/DCORIE<7>_MC.D2_PT_0_597  (
    .I0(\NlwInverterSignal_U3/DCORIE<7>_MC.D2_PT_0/IN0 ),
    .I1(\AD<7>_II/UIM ),
    .I2(DCORIEw),
    .O(\U3/DCORIE<7>_MC.D2_PT_0 )
  );
  X_AND3 \U3/DCORIE<7>_MC.D2_PT_1_598  (
    .I0(\NlwInverterSignal_U3/DCORIE<7>_MC.D2_PT_1/IN0 ),
    .I1(\U3/DCORIE [7]),
    .I2(\NlwInverterSignal_U3/DCORIE<7>_MC.D2_PT_1/IN2 ),
    .O(\U3/DCORIE<7>_MC.D2_PT_1 )
  );
  X_OR2 \U3/DCORIE<7>_MC.D2_599  (
    .I0(\U3/DCORIE<7>_MC.D2_PT_0 ),
    .I1(\U3/DCORIE<7>_MC.D2_PT_1 ),
    .O(\U3/DCORIE<7>_MC.D2 )
  );
  X_BUF \U11_U3_counterr<3>  (
    .I(\U11_U3_counterr<3>_MC.Q ),
    .O(U11_U3_counterr[3])
  );
  X_XOR2 \U11_U3_counterr<3>_MC_tsimcreated_xor__600  (
    .I0(\U11_U3_counterr<3>_MC.D ),
    .I1(\U11_U3_counterr<3>_MC.Q ),
    .O(\U11_U3_counterr<3>_MC_tsimcreated_xor_ )
  );
  X_FF \U11_U3_counterr<3>_MC.REG  (
    .I(\U11_U3_counterr<3>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U11_U3_counterr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_U3_counterr<3>_MC.Q )
  );
  X_INV \U11_U3_counterr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_601  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_U3_counterr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U11_U3_counterr<3>_MC.D_602  (
    .I0(\NlwInverterSignal_U11_U3_counterr<3>_MC.D/IN0 ),
    .I1(\U11_U3_counterr<3>_MC.D2 ),
    .O(\U11_U3_counterr<3>_MC.D )
  );
  X_ZERO \U11_U3_counterr<3>_MC.D1_603  (
    .O(\U11_U3_counterr<3>_MC.D1 )
  );
  X_AND2 \U11_U3_counterr<3>_MC.D2_PT_0_604  (
    .I0(U11_U3_counterr[3]),
    .I1(\SCLreset_II/UIM ),
    .O(\U11_U3_counterr<3>_MC.D2_PT_0 )
  );
  X_AND3 \U11_U3_counterr<3>_MC.D2_PT_1_605  (
    .I0(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_1/IN1 ),
    .I2(N_PZ_1389),
    .O(\U11_U3_counterr<3>_MC.D2_PT_1 )
  );
  X_AND3 \U11_U3_counterr<3>_MC.D2_PT_2_606  (
    .I0(U11_U3_counterr[0]),
    .I1(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_2/IN2 ),
    .O(\U11_U3_counterr<3>_MC.D2_PT_2 )
  );
  X_AND3 \U11_U3_counterr<3>_MC.D2_PT_3_607  (
    .I0(U11_U3_counterr[1]),
    .I1(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_3/IN2 ),
    .O(\U11_U3_counterr<3>_MC.D2_PT_3 )
  );
  X_AND3 \U11_U3_counterr<3>_MC.D2_PT_4_608  (
    .I0(U11_U3_counterr[2]),
    .I1(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_4/IN2 ),
    .O(\U11_U3_counterr<3>_MC.D2_PT_4 )
  );
  X_AND3 \U11_U3_counterr<3>_MC.D2_PT_5_609  (
    .I0(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_5/IN2 ),
    .O(\U11_U3_counterr<3>_MC.D2_PT_5 )
  );
  X_AND5 \U11_U3_counterr<3>_MC.D2_PT_6_610  (
    .I0(U11_U3_counterr[0]),
    .I1(U11_U3_counterr[1]),
    .I2(U11_U3_counterr[2]),
    .I3(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_6/IN3 ),
    .I4(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_6/IN4 ),
    .O(\U11_U3_counterr<3>_MC.D2_PT_6 )
  );
  X_AND5 \U11_U3_counterr<3>_MC.D2_PT_7_611  (
    .I0(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN2 ),
    .I3(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN3 ),
    .I4(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN4 ),
    .O(\U11_U3_counterr<3>_MC.D2_PT_7 )
  );
  X_OR8 \U11_U3_counterr<3>_MC.D2_612  (
    .I0(\U11_U3_counterr<3>_MC.D2_PT_0 ),
    .I1(\U11_U3_counterr<3>_MC.D2_PT_1 ),
    .I2(\U11_U3_counterr<3>_MC.D2_PT_2 ),
    .I3(\U11_U3_counterr<3>_MC.D2_PT_3 ),
    .I4(\U11_U3_counterr<3>_MC.D2_PT_4 ),
    .I5(\U11_U3_counterr<3>_MC.D2_PT_5 ),
    .I6(\U11_U3_counterr<3>_MC.D2_PT_6 ),
    .I7(\U11_U3_counterr<3>_MC.D2_PT_7 ),
    .O(\U11_U3_counterr<3>_MC.D2 )
  );
  X_BUF N_PZ_1389_613 (
    .I(\N_PZ_1389_MC.Q ),
    .O(N_PZ_1389)
  );
  X_BUF \N_PZ_1389_MC.Q_614  (
    .I(\N_PZ_1389_MC.D ),
    .O(\N_PZ_1389_MC.Q )
  );
  X_XOR2 \N_PZ_1389_MC.D_615  (
    .I0(\N_PZ_1389_MC.D1 ),
    .I1(\N_PZ_1389_MC.D2 ),
    .O(\N_PZ_1389_MC.D )
  );
  X_ZERO \N_PZ_1389_MC.D1_616  (
    .O(\N_PZ_1389_MC.D1 )
  );
  X_AND2 \N_PZ_1389_MC.D2_PT_0_617  (
    .I0(\SCLreset_II/UIM ),
    .I1(\SCLreset_II/UIM ),
    .O(\N_PZ_1389_MC.D2_PT_0 )
  );
  X_AND3 \N_PZ_1389_MC.D2_PT_1_618  (
    .I0(U11_Incdetect),
    .I1(\NlwInverterSignal_N_PZ_1389_MC.D2_PT_1/IN1 ),
    .I2(U11_ResetDetect),
    .O(\N_PZ_1389_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1389_MC.D2_619  (
    .I0(\N_PZ_1389_MC.D2_PT_0 ),
    .I1(\N_PZ_1389_MC.D2_PT_1 ),
    .O(\N_PZ_1389_MC.D2 )
  );
  X_BUF U11_Incdetect_620 (
    .I(\U11_Incdetect_MC.Q ),
    .O(U11_Incdetect)
  );
  X_FF \U11_Incdetect_MC.REG  (
    .I(\U11_Incdetect_MC.D ),
    .CE(Vcc),
    .CLK(\U11_Incdetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_Incdetect_MC.Q )
  );
  X_INV \U11_Incdetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK_621  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_Incdetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U11_Incdetect_MC.D_622  (
    .I0(\U11_Incdetect_MC.D1 ),
    .I1(\U11_Incdetect_MC.D2 ),
    .O(\U11_Incdetect_MC.D )
  );
  X_AND2 \U11_Incdetect_MC.D1_623  (
    .I0(\NlwInverterSignal_U11_Incdetect_MC.D1/IN0 ),
    .I1(\U11_U1/Line_last ),
    .O(\U11_Incdetect_MC.D1 )
  );
  X_ZERO \U11_Incdetect_MC.D2_624  (
    .O(\U11_Incdetect_MC.D2 )
  );
  X_BUF U11_ResetDetect_625 (
    .I(\U11_ResetDetect_MC.Q ),
    .O(U11_ResetDetect)
  );
  X_FF \U11_ResetDetect_MC.REG  (
    .I(\U11_ResetDetect_MC.D ),
    .CE(Vcc),
    .CLK(\U11_ResetDetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_ResetDetect_MC.Q )
  );
  X_INV \U11_ResetDetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK_626  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_ResetDetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U11_ResetDetect_MC.D_627  (
    .I0(\U11_ResetDetect_MC.D1 ),
    .I1(\U11_ResetDetect_MC.D2 ),
    .O(\U11_ResetDetect_MC.D )
  );
  X_AND2 \U11_ResetDetect_MC.D1_628  (
    .I0(\NlwInverterSignal_U11_ResetDetect_MC.D1/IN0 ),
    .I1(\U11_U4/Line_last ),
    .O(\U11_ResetDetect_MC.D1 )
  );
  X_ZERO \U11_ResetDetect_MC.D2_629  (
    .O(\U11_ResetDetect_MC.D2 )
  );
  X_BUF \U11_U3_counterr<0>  (
    .I(\U11_U3_counterr<0>_MC.Q ),
    .O(U11_U3_counterr[0])
  );
  X_XOR2 \U11_U3_counterr<0>_MC_tsimcreated_xor__630  (
    .I0(\U11_U3_counterr<0>_MC.D ),
    .I1(\U11_U3_counterr<0>_MC.Q ),
    .O(\U11_U3_counterr<0>_MC_tsimcreated_xor_ )
  );
  X_FF \U11_U3_counterr<0>_MC.REG  (
    .I(\U11_U3_counterr<0>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U11_U3_counterr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_U3_counterr<0>_MC.Q )
  );
  X_INV \U11_U3_counterr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_631  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_U3_counterr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U11_U3_counterr<0>_MC.D_632  (
    .I0(\NlwInverterSignal_U11_U3_counterr<0>_MC.D/IN0 ),
    .I1(\U11_U3_counterr<0>_MC.D2 ),
    .O(\U11_U3_counterr<0>_MC.D )
  );
  X_ZERO \U11_U3_counterr<0>_MC.D1_633  (
    .O(\U11_U3_counterr<0>_MC.D1 )
  );
  X_AND3 \U11_U3_counterr<0>_MC.D2_PT_0_634  (
    .I0(U11_U3_counterr[0]),
    .I1(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_0/IN1 ),
    .I2(N_PZ_1389),
    .O(\U11_U3_counterr<0>_MC.D2_PT_0 )
  );
  X_AND3 \U11_U3_counterr<0>_MC.D2_PT_1_635  (
    .I0(U11_U3_counterr[0]),
    .I1(N_PZ_1389),
    .I2(\SCLinc_II/UIM ),
    .O(\U11_U3_counterr<0>_MC.D2_PT_1 )
  );
  X_AND3 \U11_U3_counterr<0>_MC.D2_PT_2_636  (
    .I0(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_2/IN0 ),
    .I1(\SCLreset_II/UIM ),
    .I2(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_2/IN2 ),
    .O(\U11_U3_counterr<0>_MC.D2_PT_2 )
  );
  X_AND3 \U11_U3_counterr<0>_MC.D2_PT_3_637  (
    .I0(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_3/IN0 ),
    .I1(U11_Incdetect),
    .I2(U11_SCLdetect),
    .O(\U11_U3_counterr<0>_MC.D2_PT_3 )
  );
  X_AND3 \U11_U3_counterr<0>_MC.D2_PT_4_638  (
    .I0(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_4/IN2 ),
    .O(\U11_U3_counterr<0>_MC.D2_PT_4 )
  );
  X_AND8 \U11_U3_counterr<0>_MC.D2_PT_5_639  (
    .I0(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN3 ),
    .I4(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN4 ),
    .I5(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN5 ),
    .I6(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN6 ),
    .I7(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN7 ),
    .O(\U11_U3_counterr<0>_MC.D2_PT_5 )
  );
  X_OR6 \U11_U3_counterr<0>_MC.D2_640  (
    .I0(\U11_U3_counterr<0>_MC.D2_PT_0 ),
    .I1(\U11_U3_counterr<0>_MC.D2_PT_1 ),
    .I2(\U11_U3_counterr<0>_MC.D2_PT_2 ),
    .I3(\U11_U3_counterr<0>_MC.D2_PT_3 ),
    .I4(\U11_U3_counterr<0>_MC.D2_PT_4 ),
    .I5(\U11_U3_counterr<0>_MC.D2_PT_5 ),
    .O(\U11_U3_counterr<0>_MC.D2 )
  );
  X_BUF U11_SCLdetect_641 (
    .I(\U11_SCLdetect_MC.Q ),
    .O(U11_SCLdetect)
  );
  X_FF \U11_SCLdetect_MC.REG  (
    .I(\U11_SCLdetect_MC.D ),
    .CE(Vcc),
    .CLK(\U11_SCLdetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_SCLdetect_MC.Q )
  );
  X_INV \U11_SCLdetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK_642  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_SCLdetect_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U11_SCLdetect_MC.D_643  (
    .I0(\U11_SCLdetect_MC.D1 ),
    .I1(\U11_SCLdetect_MC.D2 ),
    .O(\U11_SCLdetect_MC.D )
  );
  X_AND2 \U11_SCLdetect_MC.D1_644  (
    .I0(\NlwInverterSignal_U11_SCLdetect_MC.D1/IN0 ),
    .I1(\U11_U2/Line_last ),
    .O(\U11_SCLdetect_MC.D1 )
  );
  X_ZERO \U11_SCLdetect_MC.D2_645  (
    .O(\U11_SCLdetect_MC.D2 )
  );
  X_BUF \U11_U2/Line_last_MC.Q_646  (
    .I(\U11_U2/Line_last_MC.D ),
    .O(\U11_U2/Line_last_MC.Q )
  );
  X_BUF \U11_U2/Line_last_MC.OE_647  (
    .I(\U11_U2/Line_last_MC.BUFOE.OUT ),
    .O(\U11_U2/Line_last_MC.OE )
  );
  X_BUF \U11_U2/Line_last_MC.BUFOE.OUT_648  (
    .I(\FOOBAR4__ctinst/0 ),
    .O(\U11_U2/Line_last_MC.BUFOE.OUT )
  );
  X_XOR2 \U11_U2/Line_last_MC.D_649  (
    .I0(\U11_U2/Line_last_MC.D1 ),
    .I1(\U11_U2/Line_last_MC.D2 ),
    .O(\U11_U2/Line_last_MC.D )
  );
  X_ZERO \U11_U2/Line_last_MC.D1_650  (
    .O(\U11_U2/Line_last_MC.D1 )
  );
  X_ZERO \U11_U2/Line_last_MC.D2_651  (
    .O(\U11_U2/Line_last_MC.D2 )
  );
  X_BUF \U11_U3_counterr<4>  (
    .I(\U11_U3_counterr<4>_MC.Q ),
    .O(U11_U3_counterr[4])
  );
  X_XOR2 \U11_U3_counterr<4>_MC_tsimcreated_xor__652  (
    .I0(\U11_U3_counterr<4>_MC.D ),
    .I1(\U11_U3_counterr<4>_MC.Q ),
    .O(\U11_U3_counterr<4>_MC_tsimcreated_xor_ )
  );
  X_FF \U11_U3_counterr<4>_MC.REG  (
    .I(\U11_U3_counterr<4>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U11_U3_counterr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_U3_counterr<4>_MC.Q )
  );
  X_INV \U11_U3_counterr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_653  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_U3_counterr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U11_U3_counterr<4>_MC.D_654  (
    .I0(\U11_U3_counterr<4>_MC.D1 ),
    .I1(\U11_U3_counterr<4>_MC.D2 ),
    .O(\U11_U3_counterr<4>_MC.D )
  );
  X_ZERO \U11_U3_counterr<4>_MC.D1_655  (
    .O(\U11_U3_counterr<4>_MC.D1 )
  );
  X_AND2 \U11_U3_counterr<4>_MC.D2_PT_0_656  (
    .I0(U11_U3_counterr[4]),
    .I1(N_PZ_1389),
    .O(\U11_U3_counterr<4>_MC.D2_PT_0 )
  );
  X_AND3 \U11_U3_counterr<4>_MC.D2_PT_1_657  (
    .I0(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_1/IN0 ),
    .I1(U11_Incdetect),
    .I2(N_PZ_1332),
    .O(\U11_U3_counterr<4>_MC.D2_PT_1 )
  );
  X_AND7 \U11_U3_counterr<4>_MC.D2_PT_2_658  (
    .I0(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN0 ),
    .I1(U11_U3_counterr[4]),
    .I2(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN3 ),
    .I4(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN4 ),
    .I5(U11_SCLdetect),
    .I6(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN6 ),
    .O(\U11_U3_counterr<4>_MC.D2_PT_2 )
  );
  X_AND8 \U11_U3_counterr<4>_MC.D2_PT_3_659  (
    .I0(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN2 ),
    .I3(U11_U3_counterr[5]),
    .I4(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN4 ),
    .I5(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN5 ),
    .I6(U11_SCLdetect),
    .I7(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN7 ),
    .O(\U11_U3_counterr<4>_MC.D2_PT_3 )
  );
  X_OR4 \U11_U3_counterr<4>_MC.D2_660  (
    .I0(\U11_U3_counterr<4>_MC.D2_PT_0 ),
    .I1(\U11_U3_counterr<4>_MC.D2_PT_1 ),
    .I2(\U11_U3_counterr<4>_MC.D2_PT_2 ),
    .I3(\U11_U3_counterr<4>_MC.D2_PT_3 ),
    .O(\U11_U3_counterr<4>_MC.D2 )
  );
  X_BUF \U11_U3_counterr<1>  (
    .I(\U11_U3_counterr<1>_MC.Q ),
    .O(U11_U3_counterr[1])
  );
  X_FF \U11_U3_counterr<1>_MC.REG  (
    .I(\U11_U3_counterr<1>_MC.D ),
    .CE(Vcc),
    .CLK(\U11_U3_counterr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_U3_counterr<1>_MC.Q )
  );
  X_INV \U11_U3_counterr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_661  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_U3_counterr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U11_U3_counterr<1>_MC.D_662  (
    .I0(\NlwInverterSignal_U11_U3_counterr<1>_MC.D/IN0 ),
    .I1(\U11_U3_counterr<1>_MC.D2 ),
    .O(\U11_U3_counterr<1>_MC.D )
  );
  X_ZERO \U11_U3_counterr<1>_MC.D1_663  (
    .O(\U11_U3_counterr<1>_MC.D1 )
  );
  X_AND2 \U11_U3_counterr<1>_MC.D2_PT_0_664  (
    .I0(\SCLreset_II/UIM ),
    .I1(\SCLinc_II/UIM ),
    .O(\U11_U3_counterr<1>_MC.D2_PT_0 )
  );
  X_AND4 \U11_U3_counterr<1>_MC.D2_PT_1_665  (
    .I0(U11_U3_counterr[0]),
    .I1(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_1/IN2 ),
    .I3(U11_SCLdetect),
    .O(\U11_U3_counterr<1>_MC.D2_PT_1 )
  );
  X_AND4 \U11_U3_counterr<1>_MC.D2_PT_2_666  (
    .I0(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_2/IN2 ),
    .I3(U11_Incdetect),
    .O(\U11_U3_counterr<1>_MC.D2_PT_2 )
  );
  X_AND4 \U11_U3_counterr<1>_MC.D2_PT_3_667  (
    .I0(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN3 ),
    .O(\U11_U3_counterr<1>_MC.D2_PT_3 )
  );
  X_AND4 \U11_U3_counterr<1>_MC.D2_PT_4_668  (
    .I0(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_4/IN0 ),
    .I1(U11_Incdetect),
    .I2(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_4/IN2 ),
    .I3(U11_ResetDetect),
    .O(\U11_U3_counterr<1>_MC.D2_PT_4 )
  );
  X_AND5 \U11_U3_counterr<1>_MC.D2_PT_5_669  (
    .I0(U11_U3_counterr[0]),
    .I1(U11_U3_counterr[1]),
    .I2(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_5/IN2 ),
    .I3(U11_Incdetect),
    .I4(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_5/IN4 ),
    .O(\U11_U3_counterr<1>_MC.D2_PT_5 )
  );
  X_AND5 \U11_U3_counterr<1>_MC.D2_PT_6_670  (
    .I0(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_6/IN0 ),
    .I1(U11_U3_counterr[1]),
    .I2(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_6/IN2 ),
    .I3(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_6/IN3 ),
    .I4(U11_SCLdetect),
    .O(\U11_U3_counterr<1>_MC.D2_PT_6 )
  );
  X_AND7 \U11_U3_counterr<1>_MC.D2_PT_7_671  (
    .I0(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN2 ),
    .I3(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN3 ),
    .I4(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN4 ),
    .I5(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN5 ),
    .I6(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN6 ),
    .O(\U11_U3_counterr<1>_MC.D2_PT_7 )
  );
  X_OR8 \U11_U3_counterr<1>_MC.D2_672  (
    .I0(\U11_U3_counterr<1>_MC.D2_PT_0 ),
    .I1(\U11_U3_counterr<1>_MC.D2_PT_1 ),
    .I2(\U11_U3_counterr<1>_MC.D2_PT_2 ),
    .I3(\U11_U3_counterr<1>_MC.D2_PT_3 ),
    .I4(\U11_U3_counterr<1>_MC.D2_PT_4 ),
    .I5(\U11_U3_counterr<1>_MC.D2_PT_5 ),
    .I6(\U11_U3_counterr<1>_MC.D2_PT_6 ),
    .I7(\U11_U3_counterr<1>_MC.D2_PT_7 ),
    .O(\U11_U3_counterr<1>_MC.D2 )
  );
  X_BUF \U11_U3_counterr<2>  (
    .I(\U11_U3_counterr<2>_MC.Q ),
    .O(U11_U3_counterr[2])
  );
  X_XOR2 \U11_U3_counterr<2>_MC_tsimcreated_xor__673  (
    .I0(\U11_U3_counterr<2>_MC.D ),
    .I1(\U11_U3_counterr<2>_MC.Q ),
    .O(\U11_U3_counterr<2>_MC_tsimcreated_xor_ )
  );
  X_FF \U11_U3_counterr<2>_MC.REG  (
    .I(\U11_U3_counterr<2>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\U11_U3_counterr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_U3_counterr<2>_MC.Q )
  );
  X_INV \U11_U3_counterr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_674  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_U3_counterr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U11_U3_counterr<2>_MC.D_675  (
    .I0(\NlwInverterSignal_U11_U3_counterr<2>_MC.D/IN0 ),
    .I1(\U11_U3_counterr<2>_MC.D2 ),
    .O(\U11_U3_counterr<2>_MC.D )
  );
  X_ZERO \U11_U3_counterr<2>_MC.D1_676  (
    .O(\U11_U3_counterr<2>_MC.D1 )
  );
  X_AND2 \U11_U3_counterr<2>_MC.D2_PT_0_677  (
    .I0(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1389),
    .O(\U11_U3_counterr<2>_MC.D2_PT_0 )
  );
  X_AND3 \U11_U3_counterr<2>_MC.D2_PT_1_678  (
    .I0(U11_U3_counterr[0]),
    .I1(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_1/IN2 ),
    .O(\U11_U3_counterr<2>_MC.D2_PT_1 )
  );
  X_AND3 \U11_U3_counterr<2>_MC.D2_PT_2_679  (
    .I0(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_2/IN2 ),
    .O(\U11_U3_counterr<2>_MC.D2_PT_2 )
  );
  X_AND3 \U11_U3_counterr<2>_MC.D2_PT_3_680  (
    .I0(U11_U3_counterr[1]),
    .I1(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_3/IN2 ),
    .O(\U11_U3_counterr<2>_MC.D2_PT_3 )
  );
  X_AND3 \U11_U3_counterr<2>_MC.D2_PT_4_681  (
    .I0(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_4/IN0 ),
    .I1(U11_Incdetect),
    .I2(U11_SCLdetect),
    .O(\U11_U3_counterr<2>_MC.D2_PT_4 )
  );
  X_AND5 \U11_U3_counterr<2>_MC.D2_PT_5_682  (
    .I0(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN3 ),
    .I4(U11_SCLdetect),
    .O(\U11_U3_counterr<2>_MC.D2_PT_5 )
  );
  X_OR6 \U11_U3_counterr<2>_MC.D2_683  (
    .I0(\U11_U3_counterr<2>_MC.D2_PT_0 ),
    .I1(\U11_U3_counterr<2>_MC.D2_PT_1 ),
    .I2(\U11_U3_counterr<2>_MC.D2_PT_2 ),
    .I3(\U11_U3_counterr<2>_MC.D2_PT_3 ),
    .I4(\U11_U3_counterr<2>_MC.D2_PT_4 ),
    .I5(\U11_U3_counterr<2>_MC.D2_PT_5 ),
    .O(\U11_U3_counterr<2>_MC.D2 )
  );
  X_BUF \U11_U3_counterr<5>  (
    .I(\U11_U3_counterr<5>_MC.Q ),
    .O(U11_U3_counterr[5])
  );
  X_FF \U11_U3_counterr<5>_MC.REG  (
    .I(\U11_U3_counterr<5>_MC.D ),
    .CE(Vcc),
    .CLK(\U11_U3_counterr<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U11_U3_counterr<5>_MC.Q )
  );
  X_INV \U11_U3_counterr<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_684  (
    .I(\Mclk_II/FCLK ),
    .O(\U11_U3_counterr<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U11_U3_counterr<5>_MC.D_685  (
    .I0(\U11_U3_counterr<5>_MC.D1 ),
    .I1(\U11_U3_counterr<5>_MC.D2 ),
    .O(\U11_U3_counterr<5>_MC.D )
  );
  X_AND2 \U11_U3_counterr<5>_MC.D1_686  (
    .I0(U11_U3_counterr[5]),
    .I1(U11_U3_counterr[5]),
    .O(\U11_U3_counterr<5>_MC.D1 )
  );
  X_AND2 \U11_U3_counterr<5>_MC.D2_PT_0_687  (
    .I0(U11_U3_counterr[5]),
    .I1(N_PZ_1389),
    .O(\U11_U3_counterr<5>_MC.D2_PT_0 )
  );
  X_AND4 \U11_U3_counterr<5>_MC.D2_PT_1_688  (
    .I0(U11_U3_counterr[4]),
    .I1(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_1/IN1 ),
    .I2(U11_Incdetect),
    .I3(N_PZ_1332),
    .O(\U11_U3_counterr<5>_MC.D2_PT_1 )
  );
  X_AND8 \U11_U3_counterr<5>_MC.D2_PT_2_689  (
    .I0(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN3 ),
    .I4(U11_U3_counterr[5]),
    .I5(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN5 ),
    .I6(U11_SCLdetect),
    .I7(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN7 ),
    .O(\U11_U3_counterr<5>_MC.D2_PT_2 )
  );
  X_OR3 \U11_U3_counterr<5>_MC.D2_690  (
    .I0(\U11_U3_counterr<5>_MC.D2_PT_0 ),
    .I1(\U11_U3_counterr<5>_MC.D2_PT_1 ),
    .I2(\U11_U3_counterr<5>_MC.D2_PT_2 ),
    .O(\U11_U3_counterr<5>_MC.D2 )
  );
  X_BUF N_PZ_1332_691 (
    .I(\N_PZ_1332_MC.Q ),
    .O(N_PZ_1332)
  );
  X_BUF \N_PZ_1332_MC.Q_692  (
    .I(\N_PZ_1332_MC.D ),
    .O(\N_PZ_1332_MC.Q )
  );
  X_XOR2 \N_PZ_1332_MC.D_693  (
    .I0(\N_PZ_1332_MC.D1 ),
    .I1(\N_PZ_1332_MC.D2 ),
    .O(\N_PZ_1332_MC.D )
  );
  X_ZERO \N_PZ_1332_MC.D1_694  (
    .O(\N_PZ_1332_MC.D1 )
  );
  X_AND2 \N_PZ_1332_MC.D2_PT_0_695  (
    .I0(U11_U3_counterr[3]),
    .I1(U11_U3_counterr[3]),
    .O(\N_PZ_1332_MC.D2_PT_0 )
  );
  X_AND4 \N_PZ_1332_MC.D2_PT_1_696  (
    .I0(U11_U3_counterr[0]),
    .I1(U11_U3_counterr[1]),
    .I2(U11_U3_counterr[2]),
    .I3(\NlwInverterSignal_N_PZ_1332_MC.D2_PT_1/IN3 ),
    .O(\N_PZ_1332_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1332_MC.D2_697  (
    .I0(\N_PZ_1332_MC.D2_PT_0 ),
    .I1(\N_PZ_1332_MC.D2_PT_1 ),
    .O(\N_PZ_1332_MC.D2 )
  );
  X_BUF \LED1_MC.Q_698  (
    .I(\LED1_MC.Q_tsimrenamed_net_ ),
    .O(\LED1_MC.Q )
  );
  X_BUF \LED1_MC.Q_tsimrenamed_net__699  (
    .I(\LED1_MC.D ),
    .O(\LED1_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \LED1_MC.D_700  (
    .I0(\NlwInverterSignal_LED1_MC.D/IN0 ),
    .I1(\LED1_MC.D2 ),
    .O(\LED1_MC.D )
  );
  X_AND2 \LED1_MC.D1_701  (
    .I0(\LightSense_II/UIM ),
    .I1(\NlwInverterSignal_LED1_MC.D1/IN1 ),
    .O(\LED1_MC.D1 )
  );
  X_ZERO \LED1_MC.D2_702  (
    .O(\LED1_MC.D2 )
  );
  X_BUF \U9/MISCr<0>  (
    .I(\U9/MISCr<0>_MC.Q ),
    .O(\U9/MISCr [0])
  );
  X_OR2 \U9/MISCr<0>_MC_tsimcreated_prld__703  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U9/MISCr<0>_MC_tsimcreated_prld_ )
  );
  X_FF \U9/MISCr<0>_MC.REG  (
    .I(\U9/MISCr<0>_MC.D ),
    .CE(\FOOBAR1__ctinst/4 ),
    .CLK(\U9/MISCr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U9/MISCr<0>_MC_tsimcreated_prld_ ),
    .O(\U9/MISCr<0>_MC.Q )
  );
  X_INV \U9/MISCr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_704  (
    .I(\Mclk_II/FCLK ),
    .O(\U9/MISCr<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U9/MISCr<0>_MC.D_705  (
    .I0(\U9/MISCr<0>_MC.D1 ),
    .I1(\U9/MISCr<0>_MC.D2 ),
    .O(\U9/MISCr<0>_MC.D )
  );
  X_AND2 \U9/MISCr<0>_MC.D1_706  (
    .I0(\AD<0>_II/UIM ),
    .I1(\AD<0>_II/UIM ),
    .O(\U9/MISCr<0>_MC.D1 )
  );
  X_ZERO \U9/MISCr<0>_MC.D2_707  (
    .O(\U9/MISCr<0>_MC.D2 )
  );
  X_BUF \LED2_MC.Q_708  (
    .I(\LED2_MC.Q_tsimrenamed_net_ ),
    .O(\LED2_MC.Q )
  );
  X_BUF \LED2_MC.Q_tsimrenamed_net__709  (
    .I(\LED2_MC.D ),
    .O(\LED2_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \LED2_MC.D_710  (
    .I0(\NlwInverterSignal_LED2_MC.D/IN0 ),
    .I1(\LED2_MC.D2 ),
    .O(\LED2_MC.D )
  );
  X_AND2 \LED2_MC.D1_711  (
    .I0(\LightSense_II/UIM ),
    .I1(\NlwInverterSignal_LED2_MC.D1/IN1 ),
    .O(\LED2_MC.D1 )
  );
  X_ZERO \LED2_MC.D2_712  (
    .O(\LED2_MC.D2 )
  );
  X_BUF \U9/MISCr<1>  (
    .I(\U9/MISCr<1>_MC.Q ),
    .O(\U9/MISCr [1])
  );
  X_OR2 \U9/MISCr<1>_MC_tsimcreated_prld__713  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U9/MISCr<1>_MC_tsimcreated_prld_ )
  );
  X_FF \U9/MISCr<1>_MC.REG  (
    .I(\U9/MISCr<1>_MC.D ),
    .CE(\FOOBAR1__ctinst/4 ),
    .CLK(\U9/MISCr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U9/MISCr<1>_MC_tsimcreated_prld_ ),
    .O(\U9/MISCr<1>_MC.Q )
  );
  X_INV \U9/MISCr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_714  (
    .I(\Mclk_II/FCLK ),
    .O(\U9/MISCr<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U9/MISCr<1>_MC.D_715  (
    .I0(\U9/MISCr<1>_MC.D1 ),
    .I1(\U9/MISCr<1>_MC.D2 ),
    .O(\U9/MISCr<1>_MC.D )
  );
  X_AND2 \U9/MISCr<1>_MC.D1_716  (
    .I0(\AD<1>_II/UIM ),
    .I1(\AD<1>_II/UIM ),
    .O(\U9/MISCr<1>_MC.D1 )
  );
  X_ZERO \U9/MISCr<1>_MC.D2_717  (
    .O(\U9/MISCr<1>_MC.D2 )
  );
  X_BUF \LED3_MC.Q_718  (
    .I(\LED3_MC.Q_tsimrenamed_net_ ),
    .O(\LED3_MC.Q )
  );
  X_BUF \LED3_MC.Q_tsimrenamed_net__719  (
    .I(\LED3_MC.D ),
    .O(\LED3_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \LED3_MC.D_720  (
    .I0(\NlwInverterSignal_LED3_MC.D/IN0 ),
    .I1(\LED3_MC.D2 ),
    .O(\LED3_MC.D )
  );
  X_AND2 \LED3_MC.D1_721  (
    .I0(\LightSense_II/UIM ),
    .I1(\NlwInverterSignal_LED3_MC.D1/IN1 ),
    .O(\LED3_MC.D1 )
  );
  X_ZERO \LED3_MC.D2_722  (
    .O(\LED3_MC.D2 )
  );
  X_BUF \U9/MISCr<2>  (
    .I(\U9/MISCr<2>_MC.Q ),
    .O(\U9/MISCr [2])
  );
  X_OR2 \U9/MISCr<2>_MC_tsimcreated_prld__723  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U9/MISCr<2>_MC_tsimcreated_prld_ )
  );
  X_FF \U9/MISCr<2>_MC.REG  (
    .I(\U9/MISCr<2>_MC.D ),
    .CE(\FOOBAR1__ctinst/4 ),
    .CLK(\U9/MISCr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U9/MISCr<2>_MC_tsimcreated_prld_ ),
    .O(\U9/MISCr<2>_MC.Q )
  );
  X_INV \U9/MISCr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_724  (
    .I(\Mclk_II/FCLK ),
    .O(\U9/MISCr<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U9/MISCr<2>_MC.D_725  (
    .I0(\U9/MISCr<2>_MC.D1 ),
    .I1(\U9/MISCr<2>_MC.D2 ),
    .O(\U9/MISCr<2>_MC.D )
  );
  X_AND2 \U9/MISCr<2>_MC.D1_726  (
    .I0(\AD<2>_II/UIM ),
    .I1(\AD<2>_II/UIM ),
    .O(\U9/MISCr<2>_MC.D1 )
  );
  X_ZERO \U9/MISCr<2>_MC.D2_727  (
    .O(\U9/MISCr<2>_MC.D2 )
  );
  X_BUF \LED4_MC.Q_728  (
    .I(\LED4_MC.Q_tsimrenamed_net_ ),
    .O(\LED4_MC.Q )
  );
  X_BUF \LED4_MC.Q_tsimrenamed_net__729  (
    .I(\LED4_MC.D ),
    .O(\LED4_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \LED4_MC.D_730  (
    .I0(\NlwInverterSignal_LED4_MC.D/IN0 ),
    .I1(\LED4_MC.D2 ),
    .O(\LED4_MC.D )
  );
  X_AND2 \LED4_MC.D1_731  (
    .I0(\LightSense_II/UIM ),
    .I1(\NlwInverterSignal_LED4_MC.D1/IN1 ),
    .O(\LED4_MC.D1 )
  );
  X_ZERO \LED4_MC.D2_732  (
    .O(\LED4_MC.D2 )
  );
  X_BUF \U9/MISCr<3>  (
    .I(\U9/MISCr<3>_MC.Q ),
    .O(\U9/MISCr [3])
  );
  X_OR2 \U9/MISCr<3>_MC_tsimcreated_prld__733  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U9/MISCr<3>_MC_tsimcreated_prld_ )
  );
  X_FF \U9/MISCr<3>_MC.REG  (
    .I(\U9/MISCr<3>_MC.D ),
    .CE(\FOOBAR1__ctinst/4 ),
    .CLK(\U9/MISCr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U9/MISCr<3>_MC_tsimcreated_prld_ ),
    .O(\U9/MISCr<3>_MC.Q )
  );
  X_INV \U9/MISCr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_734  (
    .I(\Mclk_II/FCLK ),
    .O(\U9/MISCr<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U9/MISCr<3>_MC.D_735  (
    .I0(\U9/MISCr<3>_MC.D1 ),
    .I1(\U9/MISCr<3>_MC.D2 ),
    .O(\U9/MISCr<3>_MC.D )
  );
  X_AND2 \U9/MISCr<3>_MC.D1_736  (
    .I0(\AD<3>_II/UIM ),
    .I1(\AD<3>_II/UIM ),
    .O(\U9/MISCr<3>_MC.D1 )
  );
  X_ZERO \U9/MISCr<3>_MC.D2_737  (
    .O(\U9/MISCr<3>_MC.D2 )
  );
  X_BUF \LED5_MC.Q_738  (
    .I(\LED5_MC.Q_tsimrenamed_net_ ),
    .O(\LED5_MC.Q )
  );
  X_BUF \LED5_MC.Q_tsimrenamed_net__739  (
    .I(\LED5_MC.D ),
    .O(\LED5_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \LED5_MC.D_740  (
    .I0(\NlwInverterSignal_LED5_MC.D/IN0 ),
    .I1(\LED5_MC.D2 ),
    .O(\LED5_MC.D )
  );
  X_AND2 \LED5_MC.D1_741  (
    .I0(\LightSense_II/UIM ),
    .I1(\NlwInverterSignal_LED5_MC.D1/IN1 ),
    .O(\LED5_MC.D1 )
  );
  X_ZERO \LED5_MC.D2_742  (
    .O(\LED5_MC.D2 )
  );
  X_BUF \U9/MISCr<4>  (
    .I(\U9/MISCr<4>_MC.Q ),
    .O(\U9/MISCr [4])
  );
  X_OR2 \U9/MISCr<4>_MC_tsimcreated_prld__743  (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(\U9/MISCr<4>_MC_tsimcreated_prld_ )
  );
  X_FF \U9/MISCr<4>_MC.REG  (
    .I(\U9/MISCr<4>_MC.D ),
    .CE(\FOOBAR1__ctinst/4 ),
    .CLK(\U9/MISCr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(\U9/MISCr<4>_MC_tsimcreated_prld_ ),
    .O(\U9/MISCr<4>_MC.Q )
  );
  X_INV \U9/MISCr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_744  (
    .I(\Mclk_II/FCLK ),
    .O(\U9/MISCr<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U9/MISCr<4>_MC.D_745  (
    .I0(\U9/MISCr<4>_MC.D1 ),
    .I1(\U9/MISCr<4>_MC.D2 ),
    .O(\U9/MISCr<4>_MC.D )
  );
  X_AND2 \U9/MISCr<4>_MC.D1_746  (
    .I0(\AD<4>_II/UIM ),
    .I1(\AD<4>_II/UIM ),
    .O(\U9/MISCr<4>_MC.D1 )
  );
  X_ZERO \U9/MISCr<4>_MC.D2_747  (
    .O(\U9/MISCr<4>_MC.D2 )
  );
  X_BUF \MHSI_MC.Q_748  (
    .I(\MHSI_MC.Q_tsimrenamed_net_ ),
    .O(\MHSI_MC.Q )
  );
  X_BUF \MHSI_MC.Q_tsimrenamed_net__749  (
    .I(\MHSI_MC.D ),
    .O(\MHSI_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \MHSI_MC.D_750  (
    .I0(\MHSI_MC.D1 ),
    .I1(\MHSI_MC.D2 ),
    .O(\MHSI_MC.D )
  );
  X_AND2 \MHSI_MC.D1_751  (
    .I0(\HSI_II/UIM ),
    .I1(\HSI_II/UIM ),
    .O(\MHSI_MC.D1 )
  );
  X_ZERO \MHSI_MC.D2_752  (
    .O(\MHSI_MC.D2 )
  );
  X_BUF \MTRpwr_MC.Q_753  (
    .I(\MTRpwr_MC.Q_tsimrenamed_net_ ),
    .O(\MTRpwr_MC.Q )
  );
  X_OR2 MTRpwr_MC_tsimcreated_prld__754 (
    .I0(\FOOBAR2__ctinst/7 ),
    .I1(PRLD),
    .O(MTRpwr_MC_tsimcreated_prld_)
  );
  X_FF \MTRpwr_MC.REG  (
    .I(\MTRpwr_MC.D ),
    .CE(\FOOBAR18__ctinst/4 ),
    .CLK(\MTRpwr_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(MTRpwr_MC_tsimcreated_prld_),
    .O(\MTRpwr_MC.Q_tsimrenamed_net_ )
  );
  X_INV \MTRpwr_MC.REG_tsimcreated_inv_Mclk_II/FCLK_755  (
    .I(\Mclk_II/FCLK ),
    .O(\MTRpwr_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \MTRpwr_MC.D_756  (
    .I0(\MTRpwr_MC.D1 ),
    .I1(\MTRpwr_MC.D2 ),
    .O(\MTRpwr_MC.D )
  );
  X_AND2 \MTRpwr_MC.D1_757  (
    .I0(\AD<5>_II/UIM ),
    .I1(\AD<5>_II/UIM ),
    .O(\MTRpwr_MC.D1 )
  );
  X_ZERO \MTRpwr_MC.D2_758  (
    .O(\MTRpwr_MC.D2 )
  );
  X_BUF \MTRpwrn_MC.Q_759  (
    .I(\MTRpwrn_MC.Q_tsimrenamed_net_ ),
    .O(\MTRpwrn_MC.Q )
  );
  X_OR2 MTRpwrn_MC_tsimcreated_prld__760 (
    .I0(\FOOBAR7__ctinst/0 ),
    .I1(PRLD),
    .O(MTRpwrn_MC_tsimcreated_prld_)
  );
  X_FF \MTRpwrn_MC.REG  (
    .I(\MTRpwrn_MC.D ),
    .CE(\FOOBAR7__ctinst/4 ),
    .CLK(\MTRpwrn_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(MTRpwrn_MC_tsimcreated_prld_),
    .RST(Gnd),
    .O(\MTRpwrn_MC.Q_tsimrenamed_net_ )
  );
  X_INV \MTRpwrn_MC.REG_tsimcreated_inv_Mclk_II/FCLK_761  (
    .I(\Mclk_II/FCLK ),
    .O(\MTRpwrn_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \MTRpwrn_MC.D_762  (
    .I0(\NlwInverterSignal_MTRpwrn_MC.D/IN0 ),
    .I1(\MTRpwrn_MC.D2 ),
    .O(\MTRpwrn_MC.D )
  );
  X_AND2 \MTRpwrn_MC.D1_763  (
    .I0(\AD<5>_II/UIM ),
    .I1(\AD<5>_II/UIM ),
    .O(\MTRpwrn_MC.D1 )
  );
  X_ZERO \MTRpwrn_MC.D2_764  (
    .O(\MTRpwrn_MC.D2 )
  );
  X_BUF \MTXI_MC.Q_765  (
    .I(\MTXI_MC.Q_tsimrenamed_net_ ),
    .O(\MTXI_MC.Q )
  );
  X_BUF \MTXI_MC.Q_tsimrenamed_net__766  (
    .I(\MTXI_MC.D ),
    .O(\MTXI_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \MTXI_MC.D_767  (
    .I0(\MTXI_MC.D1 ),
    .I1(\MTXI_MC.D2 ),
    .O(\MTXI_MC.D )
  );
  X_AND2 \MTXI_MC.D1_768  (
    .I0(\TXI_II/UIM ),
    .I1(\TXI_II/UIM ),
    .O(\MTXI_MC.D1 )
  );
  X_ZERO \MTXI_MC.D2_769  (
    .O(\MTXI_MC.D2 )
  );
  X_BUF \PAH0_MC.Q_770  (
    .I(\PAH0_MC.Q_tsimrenamed_net_ ),
    .O(\PAH0_MC.Q )
  );
  X_BUF \PAH0_MC.Q_tsimrenamed_net__771  (
    .I(\PAH0_MC.D ),
    .O(\PAH0_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \PAH0_MC.D_772  (
    .I0(\PAH0_MC.D1 ),
    .I1(\PAH0_MC.D2 ),
    .O(\PAH0_MC.D )
  );
  X_AND4 \PAH0_MC.D1_773  (
    .I0(\NlwInverterSignal_PAH0_MC.D1/IN0 ),
    .I1(\NlwInverterSignal_PAH0_MC.D1/IN1 ),
    .I2(\PWM1_II/UIM ),
    .I3(\NlwInverterSignal_PAH0_MC.D1/IN3 ),
    .O(\PAH0_MC.D1 )
  );
  X_ZERO \PAH0_MC.D2_774  (
    .O(\PAH0_MC.D2 )
  );
  X_BUF NET3248_775 (
    .I(\NET3248_MC.Q ),
    .O(NET3248)
  );
  X_FF \NET3248_MC.REG  (
    .I(\NET3248_MC.D ),
    .CE(Vcc),
    .CLK(\NET3248_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\NET3248_MC.Q )
  );
  X_INV \NET3248_MC.REG_tsimcreated_inv_Mclk_II/FCLK_776  (
    .I(\Mclk_II/FCLK ),
    .O(\NET3248_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \NET3248_MC.D_777  (
    .I0(\NET3248_MC.D1 ),
    .I1(\NET3248_MC.D2 ),
    .O(\NET3248_MC.D )
  );
  X_ZERO \NET3248_MC.D1_778  (
    .O(\NET3248_MC.D1 )
  );
  X_AND3 \NET3248_MC.D2_PT_0_779  (
    .I0(\NlwInverterSignal_NET3248_MC.D2_PT_0/IN0 ),
    .I1(\NlwInverterSignal_NET3248_MC.D2_PT_0/IN1 ),
    .I2(NET3248),
    .O(\NET3248_MC.D2_PT_0 )
  );
  X_AND3 \NET3248_MC.D2_PT_1_780  (
    .I0(\DIR0_II/UIM ),
    .I1(\NlwInverterSignal_NET3248_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_NET3248_MC.D2_PT_1/IN2 ),
    .O(\NET3248_MC.D2_PT_1 )
  );
  X_AND3 \NET3248_MC.D2_PT_2_781  (
    .I0(\NlwInverterSignal_NET3248_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_NET3248_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_NET3248_MC.D2_PT_2/IN2 ),
    .O(\NET3248_MC.D2_PT_2 )
  );
  X_OR3 \NET3248_MC.D2_782  (
    .I0(\NET3248_MC.D2_PT_0 ),
    .I1(\NET3248_MC.D2_PT_1 ),
    .I2(\NET3248_MC.D2_PT_2 ),
    .O(\NET3248_MC.D2 )
  );
  X_BUF \PAH1_MC.Q_783  (
    .I(\PAH1_MC.Q_tsimrenamed_net_ ),
    .O(\PAH1_MC.Q )
  );
  X_BUF \PAH1_MC.Q_tsimrenamed_net__784  (
    .I(\PAH1_MC.D ),
    .O(\PAH1_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \PAH1_MC.D_785  (
    .I0(\PAH1_MC.D1 ),
    .I1(\PAH1_MC.D2 ),
    .O(\PAH1_MC.D )
  );
  X_ZERO \PAH1_MC.D1_786  (
    .O(\PAH1_MC.D1 )
  );
  X_AND4 \PAH1_MC.D2_PT_0_787  (
    .I0(\NlwInverterSignal_PAH1_MC.D2_PT_0/IN0 ),
    .I1(\DIR1_II/UIM ),
    .I2(\PWM2_II/UIM ),
    .I3(\NlwInverterSignal_PAH1_MC.D2_PT_0/IN3 ),
    .O(\PAH1_MC.D2_PT_0 )
  );
  X_AND4 \PAH1_MC.D2_PT_1_788  (
    .I0(\NlwInverterSignal_PAH1_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_PAH1_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_PAH1_MC.D2_PT_1/IN2 ),
    .I3(\NlwInverterSignal_PAH1_MC.D2_PT_1/IN3 ),
    .O(\PAH1_MC.D2_PT_1 )
  );
  X_OR2 \PAH1_MC.D2_789  (
    .I0(\PAH1_MC.D2_PT_0 ),
    .I1(\PAH1_MC.D2_PT_1 ),
    .O(\PAH1_MC.D2 )
  );
  X_BUF NET3253_790 (
    .I(\NET3253_MC.Q ),
    .O(NET3253)
  );
  X_FF \NET3253_MC.REG  (
    .I(\NET3253_MC.D ),
    .CE(Vcc),
    .CLK(\NET3253_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\NET3253_MC.Q )
  );
  X_INV \NET3253_MC.REG_tsimcreated_inv_Mclk_II/FCLK_791  (
    .I(\Mclk_II/FCLK ),
    .O(\NET3253_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \NET3253_MC.D_792  (
    .I0(\NET3253_MC.D1 ),
    .I1(\NET3253_MC.D2 ),
    .O(\NET3253_MC.D )
  );
  X_ZERO \NET3253_MC.D1_793  (
    .O(\NET3253_MC.D1 )
  );
  X_AND3 \NET3253_MC.D2_PT_0_794  (
    .I0(\NlwInverterSignal_NET3253_MC.D2_PT_0/IN0 ),
    .I1(\NlwInverterSignal_NET3253_MC.D2_PT_0/IN1 ),
    .I2(NET3253),
    .O(\NET3253_MC.D2_PT_0 )
  );
  X_AND3 \NET3253_MC.D2_PT_1_795  (
    .I0(\DIR1_II/UIM ),
    .I1(\NlwInverterSignal_NET3253_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_NET3253_MC.D2_PT_1/IN2 ),
    .O(\NET3253_MC.D2_PT_1 )
  );
  X_AND3 \NET3253_MC.D2_PT_2_796  (
    .I0(\NlwInverterSignal_NET3253_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_NET3253_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_NET3253_MC.D2_PT_2/IN2 ),
    .O(\NET3253_MC.D2_PT_2 )
  );
  X_OR3 \NET3253_MC.D2_797  (
    .I0(\NET3253_MC.D2_PT_0 ),
    .I1(\NET3253_MC.D2_PT_1 ),
    .I2(\NET3253_MC.D2_PT_2 ),
    .O(\NET3253_MC.D2 )
  );
  X_BUF \PAL0_MC.Q_798  (
    .I(\PAL0_MC.Q_tsimrenamed_net_ ),
    .O(\PAL0_MC.Q )
  );
  X_BUF \PAL0_MC.Q_tsimrenamed_net__799  (
    .I(\PAL0_MC.D ),
    .O(\PAL0_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \PAL0_MC.D_800  (
    .I0(\PAL0_MC.D1 ),
    .I1(\PAL0_MC.D2 ),
    .O(\PAL0_MC.D )
  );
  X_ZERO \PAL0_MC.D1_801  (
    .O(\PAL0_MC.D1 )
  );
  X_AND4 \PAL0_MC.D2_PT_0_802  (
    .I0(\NlwInverterSignal_PAL0_MC.D2_PT_0/IN0 ),
    .I1(\DIR0_II/UIM ),
    .I2(\NlwInverterSignal_PAL0_MC.D2_PT_0/IN2 ),
    .I3(\NlwInverterSignal_PAL0_MC.D2_PT_0/IN3 ),
    .O(\PAL0_MC.D2_PT_0 )
  );
  X_AND4 \PAL0_MC.D2_PT_1_803  (
    .I0(\NlwInverterSignal_PAL0_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_PAL0_MC.D2_PT_1/IN1 ),
    .I2(\PWM1_II/UIM ),
    .I3(\NlwInverterSignal_PAL0_MC.D2_PT_1/IN3 ),
    .O(\PAL0_MC.D2_PT_1 )
  );
  X_OR2 \PAL0_MC.D2_804  (
    .I0(\PAL0_MC.D2_PT_0 ),
    .I1(\PAL0_MC.D2_PT_1 ),
    .O(\PAL0_MC.D2 )
  );
  X_BUF \PAL1_MC.Q_805  (
    .I(\PAL1_MC.Q_tsimrenamed_net_ ),
    .O(\PAL1_MC.Q )
  );
  X_BUF \PAL1_MC.Q_tsimrenamed_net__806  (
    .I(\PAL1_MC.D ),
    .O(\PAL1_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \PAL1_MC.D_807  (
    .I0(\PAL1_MC.D1 ),
    .I1(\PAL1_MC.D2 ),
    .O(\PAL1_MC.D )
  );
  X_AND4 \PAL1_MC.D1_808  (
    .I0(\NlwInverterSignal_PAL1_MC.D1/IN0 ),
    .I1(\DIR1_II/UIM ),
    .I2(\PWM2_II/UIM ),
    .I3(\NlwInverterSignal_PAL1_MC.D1/IN3 ),
    .O(\PAL1_MC.D1 )
  );
  X_ZERO \PAL1_MC.D2_809  (
    .O(\PAL1_MC.D2 )
  );
  X_BUF \PBH0_MC.Q_810  (
    .I(\PBH0_MC.Q_tsimrenamed_net_ ),
    .O(\PBH0_MC.Q )
  );
  X_BUF \PBH0_MC.Q_tsimrenamed_net__811  (
    .I(\PBH0_MC.D ),
    .O(\PBH0_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \PBH0_MC.D_812  (
    .I0(\PBH0_MC.D1 ),
    .I1(\PBH0_MC.D2 ),
    .O(\PBH0_MC.D )
  );
  X_AND4 \PBH0_MC.D1_813  (
    .I0(\NlwInverterSignal_PBH0_MC.D1/IN0 ),
    .I1(\DIR0_II/UIM ),
    .I2(\PWM1_II/UIM ),
    .I3(\NlwInverterSignal_PBH0_MC.D1/IN3 ),
    .O(\PBH0_MC.D1 )
  );
  X_ZERO \PBH0_MC.D2_814  (
    .O(\PBH0_MC.D2 )
  );
  X_BUF \PBH1_MC.Q_815  (
    .I(\PBH1_MC.Q_tsimrenamed_net_ ),
    .O(\PBH1_MC.Q )
  );
  X_BUF \PBH1_MC.Q_tsimrenamed_net__816  (
    .I(\PBH1_MC.D ),
    .O(\PBH1_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \PBH1_MC.D_817  (
    .I0(\PBH1_MC.D1 ),
    .I1(\PBH1_MC.D2 ),
    .O(\PBH1_MC.D )
  );
  X_ZERO \PBH1_MC.D1_818  (
    .O(\PBH1_MC.D1 )
  );
  X_AND4 \PBH1_MC.D2_PT_0_819  (
    .I0(\NlwInverterSignal_PBH1_MC.D2_PT_0/IN0 ),
    .I1(\DIR1_II/UIM ),
    .I2(\NlwInverterSignal_PBH1_MC.D2_PT_0/IN2 ),
    .I3(\NlwInverterSignal_PBH1_MC.D2_PT_0/IN3 ),
    .O(\PBH1_MC.D2_PT_0 )
  );
  X_AND4 \PBH1_MC.D2_PT_1_820  (
    .I0(\NlwInverterSignal_PBH1_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_PBH1_MC.D2_PT_1/IN1 ),
    .I2(\PWM2_II/UIM ),
    .I3(\NlwInverterSignal_PBH1_MC.D2_PT_1/IN3 ),
    .O(\PBH1_MC.D2_PT_1 )
  );
  X_OR2 \PBH1_MC.D2_821  (
    .I0(\PBH1_MC.D2_PT_0 ),
    .I1(\PBH1_MC.D2_PT_1 ),
    .O(\PBH1_MC.D2 )
  );
  X_BUF \PBL0_MC.Q_822  (
    .I(\PBL0_MC.Q_tsimrenamed_net_ ),
    .O(\PBL0_MC.Q )
  );
  X_BUF \PBL0_MC.Q_tsimrenamed_net__823  (
    .I(\PBL0_MC.D ),
    .O(\PBL0_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \PBL0_MC.D_824  (
    .I0(\PBL0_MC.D1 ),
    .I1(\PBL0_MC.D2 ),
    .O(\PBL0_MC.D )
  );
  X_ZERO \PBL0_MC.D1_825  (
    .O(\PBL0_MC.D1 )
  );
  X_AND4 \PBL0_MC.D2_PT_0_826  (
    .I0(\NlwInverterSignal_PBL0_MC.D2_PT_0/IN0 ),
    .I1(\DIR0_II/UIM ),
    .I2(\PWM1_II/UIM ),
    .I3(\NlwInverterSignal_PBL0_MC.D2_PT_0/IN3 ),
    .O(\PBL0_MC.D2_PT_0 )
  );
  X_AND4 \PBL0_MC.D2_PT_1_827  (
    .I0(\NlwInverterSignal_PBL0_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_PBL0_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_PBL0_MC.D2_PT_1/IN2 ),
    .I3(\NlwInverterSignal_PBL0_MC.D2_PT_1/IN3 ),
    .O(\PBL0_MC.D2_PT_1 )
  );
  X_OR2 \PBL0_MC.D2_828  (
    .I0(\PBL0_MC.D2_PT_0 ),
    .I1(\PBL0_MC.D2_PT_1 ),
    .O(\PBL0_MC.D2 )
  );
  X_BUF \PBL1_MC.Q_829  (
    .I(\PBL1_MC.Q_tsimrenamed_net_ ),
    .O(\PBL1_MC.Q )
  );
  X_BUF \PBL1_MC.Q_tsimrenamed_net__830  (
    .I(\PBL1_MC.D ),
    .O(\PBL1_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \PBL1_MC.D_831  (
    .I0(\PBL1_MC.D1 ),
    .I1(\PBL1_MC.D2 ),
    .O(\PBL1_MC.D )
  );
  X_AND4 \PBL1_MC.D1_832  (
    .I0(\NlwInverterSignal_PBL1_MC.D1/IN0 ),
    .I1(\NlwInverterSignal_PBL1_MC.D1/IN1 ),
    .I2(\PWM2_II/UIM ),
    .I3(\NlwInverterSignal_PBL1_MC.D1/IN3 ),
    .O(\PBL1_MC.D1 )
  );
  X_ZERO \PBL1_MC.D2_833  (
    .O(\PBL1_MC.D2 )
  );
  X_BUF \SCLout_MC.Q_834  (
    .I(\SCLout_MC.Q_tsimrenamed_net_ ),
    .O(\SCLout_MC.Q )
  );
  X_BUF \SCLout_MC.Q_tsimrenamed_net__835  (
    .I(\SCLout_MC.D ),
    .O(\SCLout_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \SCLout_MC.D_836  (
    .I0(\SCLout_MC.D1 ),
    .I1(\SCLout_MC.D2 ),
    .O(\SCLout_MC.D )
  );
  X_AND2 \SCLout_MC.D1_837  (
    .I0(\SCL_II/UIM ),
    .I1(\SCL_II/UIM ),
    .O(\SCLout_MC.D1 )
  );
  X_ZERO \SCLout_MC.D2_838  (
    .O(\SCLout_MC.D2 )
  );
  X_BUF \TP10_MC.Q_839  (
    .I(\TP10_MC.Q_tsimrenamed_net_ ),
    .O(\TP10_MC.Q )
  );
  X_BUF \TP10_MC.Q_tsimrenamed_net__840  (
    .I(\TP10_MC.D ),
    .O(\TP10_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \TP10_MC.D_841  (
    .I0(\TP10_MC.D1 ),
    .I1(\TP10_MC.D2 ),
    .O(\TP10_MC.D )
  );
  X_AND2 \TP10_MC.D1_842  (
    .I0(\SCLreset_II/UIM ),
    .I1(\SCLreset_II/UIM ),
    .O(\TP10_MC.D1 )
  );
  X_ZERO \TP10_MC.D2_843  (
    .O(\TP10_MC.D2 )
  );
  X_BUF \TP11_MC.Q_844  (
    .I(\TP11_MC.Q_tsimrenamed_net_ ),
    .O(\TP11_MC.Q )
  );
  X_BUF \TP11_MC.Q_tsimrenamed_net__845  (
    .I(\TP11_MC.D ),
    .O(\TP11_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \TP11_MC.D_846  (
    .I0(\TP11_MC.D1 ),
    .I1(\TP11_MC.D2 ),
    .O(\TP11_MC.D )
  );
  X_AND2 \TP11_MC.D1_847  (
    .I0(\SCLinc_II/UIM ),
    .I1(\SCLinc_II/UIM ),
    .O(\TP11_MC.D1 )
  );
  X_ZERO \TP11_MC.D2_848  (
    .O(\TP11_MC.D2 )
  );
  X_BUF \TP12_MC.Q_849  (
    .I(\TP12_MC.Q_tsimrenamed_net_ ),
    .O(\TP12_MC.Q )
  );
  X_BUF \TP12_MC.Q_tsimrenamed_net__850  (
    .I(\TP12_MC.D ),
    .O(\TP12_MC.Q_tsimrenamed_net_ )
  );
  X_XOR2 \TP12_MC.D_851  (
    .I0(\TP12_MC.D1 ),
    .I1(\TP12_MC.D2 ),
    .O(\TP12_MC.D )
  );
  X_AND2 \TP12_MC.D1_852  (
    .I0(\SCL_II/UIM ),
    .I1(\SCL_II/UIM ),
    .O(\TP12_MC.D1 )
  );
  X_ZERO \TP12_MC.D2_853  (
    .O(\TP12_MC.D2 )
  );
  X_BUF DCORI2CCNTr_854 (
    .I(\DCORI2CCNTr_MC.Q ),
    .O(DCORI2CCNTr)
  );
  X_BUF \DCORI2CCNTr_MC.Q_855  (
    .I(\DCORI2CCNTr_MC.D ),
    .O(\DCORI2CCNTr_MC.Q )
  );
  X_XOR2 \DCORI2CCNTr_MC.D_856  (
    .I0(\DCORI2CCNTr_MC.D1 ),
    .I1(\DCORI2CCNTr_MC.D2 ),
    .O(\DCORI2CCNTr_MC.D )
  );
  X_AND16 \DCORI2CCNTr_MC.D1_857  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN2 ),
    .I3(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN8 ),
    .I9(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCORI2CCNTr_MC.D1 )
  );
  X_ZERO \DCORI2CCNTr_MC.D2_858  (
    .O(\DCORI2CCNTr_MC.D2 )
  );
  X_BUF \outDATA<0>\$WA0.UIM_859  (
    .I(\outDATA<0>\$WA0.UIM_MC.Q ),
    .O(\outDATA<0>\$WA0.UIM )
  );
  X_BUF \outDATA<0>\$WA0.UIM_MC.Q_860  (
    .I(\outDATA<0>\$WA0.UIM_MC.D ),
    .O(\outDATA<0>\$WA0.UIM_MC.Q )
  );
  X_XOR2 \outDATA<0>\$WA0.UIM_MC.D_861  (
    .I0(\outDATA<0>\$WA0.UIM_MC.D1 ),
    .I1(\outDATA<0>\$WA0.UIM_MC.D2 ),
    .O(\outDATA<0>\$WA0.UIM_MC.D )
  );
  X_AND2 \outDATA<0>\$WA0.UIM_MC.D1_862  (
    .I0(U11_U3_counterr[0]),
    .I1(U11_U3_counterr[0]),
    .O(\outDATA<0>\$WA0.UIM_MC.D1 )
  );
  X_ZERO \outDATA<0>\$WA0.UIM_MC.D2_863  (
    .O(\outDATA<0>\$WA0.UIM_MC.D2 )
  );
  X_BUF DCORCONFIGr_864 (
    .I(\DCORCONFIGr_MC.Q ),
    .O(DCORCONFIGr)
  );
  X_BUF \DCORCONFIGr_MC.Q_865  (
    .I(\DCORCONFIGr_MC.D ),
    .O(\DCORCONFIGr_MC.Q )
  );
  X_XOR2 \DCORCONFIGr_MC.D_866  (
    .I0(\DCORCONFIGr_MC.D1 ),
    .I1(\DCORCONFIGr_MC.D2 ),
    .O(\DCORCONFIGr_MC.D )
  );
  X_AND16 \DCORCONFIGr_MC.D1_867  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN1 ),
    .I2(U2_ADDR_reg[1]),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCORCONFIGr_MC.D1 )
  );
  X_ZERO \DCORCONFIGr_MC.D2_868  (
    .O(\DCORCONFIGr_MC.D2 )
  );
  X_BUF \outDATA<0>\$WA1.UIM_869  (
    .I(\outDATA<0>\$WA1.UIM_MC.Q ),
    .O(\outDATA<0>\$WA1.UIM )
  );
  X_BUF \outDATA<0>\$WA1.UIM_MC.Q_870  (
    .I(\outDATA<0>\$WA1.UIM_MC.D ),
    .O(\outDATA<0>\$WA1.UIM_MC.Q )
  );
  X_XOR2 \outDATA<0>\$WA1.UIM_MC.D_871  (
    .I0(\outDATA<0>\$WA1.UIM_MC.D1 ),
    .I1(\outDATA<0>\$WA1.UIM_MC.D2 ),
    .O(\outDATA<0>\$WA1.UIM_MC.D )
  );
  X_AND2 \outDATA<0>\$WA1.UIM_MC.D1_872  (
    .I0(\I2CS<0>_II/UIM ),
    .I1(\I2CS<0>_II/UIM ),
    .O(\outDATA<0>\$WA1.UIM_MC.D1 )
  );
  X_ZERO \outDATA<0>\$WA1.UIM_MC.D2_873  (
    .O(\outDATA<0>\$WA1.UIM_MC.D2 )
  );
  X_BUF DCORLIMITSr_874 (
    .I(\DCORLIMITSr_MC.Q ),
    .O(DCORLIMITSr)
  );
  X_BUF \DCORLIMITSr_MC.Q_875  (
    .I(\DCORLIMITSr_MC.D ),
    .O(\DCORLIMITSr_MC.Q )
  );
  X_XOR2 \DCORLIMITSr_MC.D_876  (
    .I0(\DCORLIMITSr_MC.D1 ),
    .I1(\DCORLIMITSr_MC.D2 ),
    .O(\DCORLIMITSr_MC.D )
  );
  X_AND16 \DCORLIMITSr_MC.D1_877  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN1 ),
    .I2(U2_ADDR_reg[1]),
    .I3(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN8 ),
    .I9(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCORLIMITSr_MC.D1 )
  );
  X_ZERO \DCORLIMITSr_MC.D2_878  (
    .O(\DCORLIMITSr_MC.D2 )
  );
  X_BUF \outDATA<0>\$WA2.UIM_879  (
    .I(\outDATA<0>\$WA2.UIM_MC.Q ),
    .O(\outDATA<0>\$WA2.UIM )
  );
  X_BUF \outDATA<0>\$WA2.UIM_MC.Q_880  (
    .I(\outDATA<0>\$WA2.UIM_MC.D ),
    .O(\outDATA<0>\$WA2.UIM_MC.Q )
  );
  X_XOR2 \outDATA<0>\$WA2.UIM_MC.D_881  (
    .I0(\outDATA<0>\$WA2.UIM_MC.D1 ),
    .I1(\outDATA<0>\$WA2.UIM_MC.D2 ),
    .O(\outDATA<0>\$WA2.UIM_MC.D )
  );
  X_AND2 \outDATA<0>\$WA2.UIM_MC.D1_882  (
    .I0(\RLS0_II/UIM ),
    .I1(\RLS0_II/UIM ),
    .O(\outDATA<0>\$WA2.UIM_MC.D1 )
  );
  X_ZERO \outDATA<0>\$WA2.UIM_MC.D2_883  (
    .O(\outDATA<0>\$WA2.UIM_MC.D2 )
  );
  X_BUF DCORENCPWRr_884 (
    .I(\DCORENCPWRr_MC.Q ),
    .O(DCORENCPWRr)
  );
  X_BUF \DCORENCPWRr_MC.Q_885  (
    .I(\DCORENCPWRr_MC.D ),
    .O(\DCORENCPWRr_MC.Q )
  );
  X_XOR2 \DCORENCPWRr_MC.D_886  (
    .I0(\DCORENCPWRr_MC.D1 ),
    .I1(\DCORENCPWRr_MC.D2 ),
    .O(\DCORENCPWRr_MC.D )
  );
  X_AND16 \DCORENCPWRr_MC.D1_887  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN1 ),
    .I2(U2_ADDR_reg[1]),
    .I3(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCORENCPWRr_MC.D1 )
  );
  X_ZERO \DCORENCPWRr_MC.D2_888  (
    .O(\DCORENCPWRr_MC.D2 )
  );
  X_BUF \outDATA<0>\$WA3.UIM_889  (
    .I(\outDATA<0>\$WA3.UIM_MC.Q ),
    .O(\outDATA<0>\$WA3.UIM )
  );
  X_BUF \outDATA<0>\$WA3.UIM_MC.Q_890  (
    .I(\outDATA<0>\$WA3.UIM_MC.D ),
    .O(\outDATA<0>\$WA3.UIM_MC.Q )
  );
  X_XOR2 \outDATA<0>\$WA3.UIM_MC.D_891  (
    .I0(\outDATA<0>\$WA3.UIM_MC.D1 ),
    .I1(\outDATA<0>\$WA3.UIM_MC.D2 ),
    .O(\outDATA<0>\$WA3.UIM_MC.D )
  );
  X_ZERO \outDATA<0>\$WA3.UIM_MC.D1_892  (
    .O(\outDATA<0>\$WA3.UIM_MC.D1 )
  );
  X_AND2 \outDATA<0>\$WA3.UIM_MC.D2_PT_0_893  (
    .I0(NET2528),
    .I1(\U4/Flgreg [0]),
    .O(\outDATA<0>\$WA3.UIM_MC.D2_PT_0 )
  );
  X_AND2 \outDATA<0>\$WA3.UIM_MC.D2_PT_1_894  (
    .I0(\NlwInverterSignal_outDATA<0>\$WA3.UIM_MC.D2_PT_1/IN0 ),
    .I1(\Home033FLG_II/UIM ),
    .O(\outDATA<0>\$WA3.UIM_MC.D2_PT_1 )
  );
  X_OR2 \outDATA<0>\$WA3.UIM_MC.D2_895  (
    .I0(\outDATA<0>\$WA3.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<0>\$WA3.UIM_MC.D2_PT_1 ),
    .O(\outDATA<0>\$WA3.UIM_MC.D2 )
  );
  X_BUF \outDATA<0>\$WA4.UIM_896  (
    .I(\outDATA<0>\$WA4.UIM_MC.Q ),
    .O(\outDATA<0>\$WA4.UIM )
  );
  X_BUF \outDATA<0>\$WA4.UIM_MC.Q_897  (
    .I(\outDATA<0>\$WA4.UIM_MC.D ),
    .O(\outDATA<0>\$WA4.UIM_MC.Q )
  );
  X_XOR2 \outDATA<0>\$WA4.UIM_MC.D_898  (
    .I0(\outDATA<0>\$WA4.UIM_MC.D1 ),
    .I1(\outDATA<0>\$WA4.UIM_MC.D2 ),
    .O(\outDATA<0>\$WA4.UIM_MC.D )
  );
  X_ZERO \outDATA<0>\$WA4.UIM_MC.D1_899  (
    .O(\outDATA<0>\$WA4.UIM_MC.D1 )
  );
  X_AND2 \outDATA<0>\$WA4.UIM_MC.D2_PT_0_900  (
    .I0(\U1/U4/Latch0r [0]),
    .I1(DCOR0THRESLOWr),
    .O(\outDATA<0>\$WA4.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<0>\$WA4.UIM_MC.D2_PT_1_901  (
    .I0(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_1/IN0 ),
    .I1(\U1/U4/Latch0r [8]),
    .I2(DCOR0THRESMIDr),
    .O(\outDATA<0>\$WA4.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<0>\$WA4.UIM_MC.D2_PT_2_902  (
    .I0(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_2/IN1 ),
    .I2(\U1/U4/Latch1r [0]),
    .I3(DCOR1THRESLOWr),
    .O(\outDATA<0>\$WA4.UIM_MC.D2_PT_2 )
  );
  X_AND4 \outDATA<0>\$WA4.UIM_MC.D2_PT_3_903  (
    .I0(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN2 ),
    .I3(\U1/U4/Latch1r [8]),
    .O(\outDATA<0>\$WA4.UIM_MC.D2_PT_3 )
  );
  X_OR4 \outDATA<0>\$WA4.UIM_MC.D2_904  (
    .I0(\outDATA<0>\$WA4.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<0>\$WA4.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<0>\$WA4.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<0>\$WA4.UIM_MC.D2_PT_3 ),
    .O(\outDATA<0>\$WA4.UIM_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<0>  (
    .I(\U1/U4/Latch0r<0>_MC.Q ),
    .O(\U1/U4/Latch0r [0])
  );
  X_FF \U1/U4/Latch0r<0>_MC.REG  (
    .I(\U1/U4/Latch0r<0>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<0>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_905  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<0>_MC.D_906  (
    .I0(\U1/U4/Latch0r<0>_MC.D1 ),
    .I1(\U1/U4/Latch0r<0>_MC.D2 ),
    .O(\U1/U4/Latch0r<0>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<0>_MC.D1_907  (
    .O(\U1/U4/Latch0r<0>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<0>_MC.D2_PT_0_908  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<0>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [0]),
    .O(\U1/U4/Latch0r<0>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<0>_MC.D2_PT_1_909  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<0>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<0>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [0]),
    .O(\U1/U4/Latch0r<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<0>_MC.D2_910  (
    .I0(\U1/U4/Latch0r<0>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<0>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<0>_MC.D2 )
  );
  X_BUF \U1/Channel0<0>  (
    .I(\U1/Channel0<0>_MC.Q ),
    .O(\U1/Channel0 [0])
  );
  X_FF \U1/Channel0<0>_MC.REG  (
    .I(\U1/Channel0<0>_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<0>_MC.Q )
  );
  X_XOR2 \U1/Channel0<0>_MC.D_911  (
    .I0(\U1/Channel0<0>_MC.D1 ),
    .I1(\U1/Channel0<0>_MC.D2 ),
    .O(\U1/Channel0<0>_MC.D )
  );
  X_ZERO \U1/Channel0<0>_MC.D1_912  (
    .O(\U1/Channel0<0>_MC.D1 )
  );
  X_AND3 \U1/Channel0<0>_MC.D2_PT_0_913  (
    .I0(\U1/Channel0 [0]),
    .I1(N_PZ_1074),
    .I2(\NlwInverterSignal_U1/Channel0<0>_MC.D2_PT_0/IN2 ),
    .O(\U1/Channel0<0>_MC.D2_PT_0 )
  );
  X_AND3 \U1/Channel0<0>_MC.D2_PT_1_914  (
    .I0(\NlwInverterSignal_U1/Channel0<0>_MC.D2_PT_1/IN0 ),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .O(\U1/Channel0<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/Channel0<0>_MC.D2_915  (
    .I0(\U1/Channel0<0>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<0>_MC.D2_PT_1 ),
    .O(\U1/Channel0<0>_MC.D2 )
  );
  X_BUF N_PZ_1074_916 (
    .I(\N_PZ_1074_MC.Q ),
    .O(N_PZ_1074)
  );
  X_BUF \N_PZ_1074_MC.Q_917  (
    .I(\N_PZ_1074_MC.D ),
    .O(\N_PZ_1074_MC.Q )
  );
  X_XOR2 \N_PZ_1074_MC.D_918  (
    .I0(\N_PZ_1074_MC.D1 ),
    .I1(\N_PZ_1074_MC.D2 ),
    .O(\N_PZ_1074_MC.D )
  );
  X_AND2 \N_PZ_1074_MC.D1_919  (
    .I0(\NlwInverterSignal_N_PZ_1074_MC.D1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1074_MC.D1/IN1 ),
    .O(\N_PZ_1074_MC.D1 )
  );
  X_ZERO \N_PZ_1074_MC.D2_920  (
    .O(\N_PZ_1074_MC.D2 )
  );
  X_BUF \U1/Zero0_921  (
    .I(\U1/Zero0_MC.Q ),
    .O(\U1/Zero0 )
  );
  X_FF \U1/Zero0_MC.REG  (
    .I(\U1/Zero0_MC.D ),
    .CE(Vcc),
    .CLK(\U1/Zero0_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Zero0_MC.Q )
  );
  X_INV \U1/Zero0_MC.REG_tsimcreated_inv_Mclk_II/FCLK_922  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/Zero0_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/Zero0_MC.D_923  (
    .I0(\U1/Zero0_MC.D1 ),
    .I1(\U1/Zero0_MC.D2 ),
    .O(\U1/Zero0_MC.D )
  );
  X_ZERO \U1/Zero0_MC.D1_924  (
    .O(\U1/Zero0_MC.D1 )
  );
  X_AND2 \U1/Zero0_MC.D2_PT_0_925  (
    .I0(\Reset_II/UIM ),
    .I1(\U1/Zero0 ),
    .O(\U1/Zero0_MC.D2_PT_0 )
  );
  X_AND2 \U1/Zero0_MC.D2_PT_1_926  (
    .I0(\NlwInverterSignal_U1/Zero0_MC.D2_PT_1/IN0 ),
    .I1(N_PZ_1116),
    .O(\U1/Zero0_MC.D2_PT_1 )
  );
  X_AND7 \U1/Zero0_MC.D2_PT_2_927  (
    .I0(\NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN1 ),
    .I2(\U1/U4/RF0r ),
    .I3(\U1/U4/HE0stater ),
    .I4(\NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN4 ),
    .I5(\NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN5 ),
    .I6(\U1/U4/E0r ),
    .O(\U1/Zero0_MC.D2_PT_2 )
  );
  X_AND7 \U1/Zero0_MC.D2_PT_3_928  (
    .I0(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN3 ),
    .I4(\U1/U4/HE0statelastr ),
    .I5(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN5 ),
    .I6(\U1/U4/E0r ),
    .O(\U1/Zero0_MC.D2_PT_3 )
  );
  X_OR4 \U1/Zero0_MC.D2_929  (
    .I0(\U1/Zero0_MC.D2_PT_0 ),
    .I1(\U1/Zero0_MC.D2_PT_1 ),
    .I2(\U1/Zero0_MC.D2_PT_2 ),
    .I3(\U1/Zero0_MC.D2_PT_3 ),
    .O(\U1/Zero0_MC.D2 )
  );
  X_BUF N_PZ_1116_930 (
    .I(\N_PZ_1116_MC.Q ),
    .O(N_PZ_1116)
  );
  X_BUF \N_PZ_1116_MC.Q_931  (
    .I(\N_PZ_1116_MC.D ),
    .O(\N_PZ_1116_MC.Q )
  );
  X_XOR2 \N_PZ_1116_MC.D_932  (
    .I0(\N_PZ_1116_MC.D1 ),
    .I1(\N_PZ_1116_MC.D2 ),
    .O(\N_PZ_1116_MC.D )
  );
  X_ZERO \N_PZ_1116_MC.D1_933  (
    .O(\N_PZ_1116_MC.D1 )
  );
  X_AND2 \N_PZ_1116_MC.D2_PT_0_934  (
    .I0(\NlwInverterSignal_N_PZ_1116_MC.D2_PT_0/IN0 ),
    .I1(DCORIFGw),
    .O(\N_PZ_1116_MC.D2_PT_0 )
  );
  X_AND2 \N_PZ_1116_MC.D2_PT_1_935  (
    .I0(\NlwInverterSignal_N_PZ_1116_MC.D2_PT_1/IN0 ),
    .I1(DCORENCCTLw),
    .O(\N_PZ_1116_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1116_MC.D2_936  (
    .I0(\N_PZ_1116_MC.D2_PT_0 ),
    .I1(\N_PZ_1116_MC.D2_PT_1 ),
    .O(\N_PZ_1116_MC.D2 )
  );
  X_BUF \U1/U4/E0r_937  (
    .I(\U1/U4/E0r_MC.Q ),
    .O(\U1/U4/E0r )
  );
  X_FF \U1/U4/E0r_MC.REG  (
    .I(\U1/U4/E0r_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/E0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/E0r_MC.Q )
  );
  X_INV \U1/U4/E0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK_938  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/E0r_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/E0r_MC.D_939  (
    .I0(\U1/U4/E0r_MC.D1 ),
    .I1(\U1/U4/E0r_MC.D2 ),
    .O(\U1/U4/E0r_MC.D )
  );
  X_ZERO \U1/U4/E0r_MC.D1_940  (
    .O(\U1/U4/E0r_MC.D1 )
  );
  X_AND3 \U1/U4/E0r_MC.D2_PT_0_941  (
    .I0(\NlwInverterSignal_U1/U4/E0r_MC.D2_PT_0/IN0 ),
    .I1(\AD<1>_II/UIM ),
    .I2(DCORENCCTLw),
    .O(\U1/U4/E0r_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/E0r_MC.D2_PT_1_942  (
    .I0(\NlwInverterSignal_U1/U4/E0r_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/E0r_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/E0r ),
    .O(\U1/U4/E0r_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/E0r_MC.D2_943  (
    .I0(\U1/U4/E0r_MC.D2_PT_0 ),
    .I1(\U1/U4/E0r_MC.D2_PT_1 ),
    .O(\U1/U4/E0r_MC.D2 )
  );
  X_BUF N_PZ_1132_944 (
    .I(\N_PZ_1132_MC.Q ),
    .O(N_PZ_1132)
  );
  X_BUF \N_PZ_1132_MC.Q_945  (
    .I(\N_PZ_1132_MC.D ),
    .O(\N_PZ_1132_MC.Q )
  );
  X_XOR2 \N_PZ_1132_MC.D_946  (
    .I0(\N_PZ_1132_MC.D1 ),
    .I1(\N_PZ_1132_MC.D2 ),
    .O(\N_PZ_1132_MC.D )
  );
  X_ZERO \N_PZ_1132_MC.D1_947  (
    .O(\N_PZ_1132_MC.D1 )
  );
  X_AND4 \N_PZ_1132_MC.D2_PT_0_948  (
    .I0(\U1/U1/CurrState_Sreg0_FFD3 ),
    .I1(\NlwInverterSignal_N_PZ_1132_MC.D2_PT_0/IN1 ),
    .I2(\U1/U1/CurrState_Sreg0_FFD4 ),
    .I3(\NlwInverterSignal_N_PZ_1132_MC.D2_PT_0/IN3 ),
    .O(\N_PZ_1132_MC.D2_PT_0 )
  );
  X_AND4 \N_PZ_1132_MC.D2_PT_1_949  (
    .I0(\U1/U1/CurrState_Sreg0_FFD3 ),
    .I1(\NlwInverterSignal_N_PZ_1132_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_N_PZ_1132_MC.D2_PT_1/IN2 ),
    .I3(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\N_PZ_1132_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1132_MC.D2_950  (
    .I0(\N_PZ_1132_MC.D2_PT_0 ),
    .I1(\N_PZ_1132_MC.D2_PT_1 ),
    .O(\N_PZ_1132_MC.D2 )
  );
  X_BUF \U1/U1/CurrState_Sreg0_FFD3_951  (
    .I(\U1/U1/CurrState_Sreg0_FFD3_MC.Q ),
    .O(\U1/U1/CurrState_Sreg0_FFD3 )
  );
  X_FF \U1/U1/CurrState_Sreg0_FFD3_MC.REG  (
    .I(\U1/U1/CurrState_Sreg0_FFD3_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U1/CurrState_Sreg0_FFD3_MC.Q )
  );
  X_XOR2 \U1/U1/CurrState_Sreg0_FFD3_MC.D_952  (
    .I0(\U1/U1/CurrState_Sreg0_FFD3_MC.D1 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD3_MC.D2 ),
    .O(\U1/U1/CurrState_Sreg0_FFD3_MC.D )
  );
  X_ZERO \U1/U1/CurrState_Sreg0_FFD3_MC.D1_953  (
    .O(\U1/U1/CurrState_Sreg0_FFD3_MC.D1 )
  );
  X_AND5 \U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0_954  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN0 ),
    .I1(\PhaseA_Encoder0_II/UIM ),
    .I2(\U1/U1/CurrState_Sreg0_FFD2 ),
    .I3(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN3 ),
    .I4(N_PZ_1289),
    .O(\U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0 )
  );
  X_AND5 \U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1_955  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN1 ),
    .I2(\U1/U1/CurrState_Sreg0_FFD3 ),
    .I3(\U1/U1/CurrState_Sreg0_FFD2 ),
    .I4(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN4 ),
    .O(\U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1 )
  );
  X_AND5 \U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2_956  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN0 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD3 ),
    .I2(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN3 ),
    .I4(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN4 ),
    .O(\U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2 )
  );
  X_OR3 \U1/U1/CurrState_Sreg0_FFD3_MC.D2_957  (
    .I0(\U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1 ),
    .I2(\U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2 ),
    .O(\U1/U1/CurrState_Sreg0_FFD3_MC.D2 )
  );
  X_BUF \U1/U1/CurrState_Sreg0_FFD2_958  (
    .I(\U1/U1/CurrState_Sreg0_FFD2_MC.Q ),
    .O(\U1/U1/CurrState_Sreg0_FFD2 )
  );
  X_FF \U1/U1/CurrState_Sreg0_FFD2_MC.REG  (
    .I(\U1/U1/CurrState_Sreg0_FFD2_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U1/CurrState_Sreg0_FFD2_MC.Q )
  );
  X_XOR2 \U1/U1/CurrState_Sreg0_FFD2_MC.D_959  (
    .I0(\U1/U1/CurrState_Sreg0_FFD2_MC.D1 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD2_MC.D2 ),
    .O(\U1/U1/CurrState_Sreg0_FFD2_MC.D )
  );
  X_ZERO \U1/U1/CurrState_Sreg0_FFD2_MC.D1_960  (
    .O(\U1/U1/CurrState_Sreg0_FFD2_MC.D1 )
  );
  X_AND5 \U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0_961  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN0 ),
    .I1(\PhaseA_Encoder0_II/UIM ),
    .I2(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN2 ),
    .I3(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN3 ),
    .I4(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN4 ),
    .O(\U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0 )
  );
  X_AND5 \U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1_962  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN0 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD3 ),
    .I2(\U1/U1/CurrState_Sreg0_FFD2 ),
    .I3(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN4 ),
    .O(\U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1 )
  );
  X_AND5 \U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2_963  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN1 ),
    .I2(\U1/U1/CurrState_Sreg0_FFD2 ),
    .I3(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN3 ),
    .I4(N_PZ_1289),
    .O(\U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2 )
  );
  X_AND6 \U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3_964  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN0 ),
    .I1(\PhaseA_Encoder0_II/UIM ),
    .I2(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN2 ),
    .I3(\U1/U1/CurrState_Sreg0_FFD3 ),
    .I4(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN4 ),
    .I5(N_PZ_1289),
    .O(\U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3 )
  );
  X_OR4 \U1/U1/CurrState_Sreg0_FFD2_MC.D2_965  (
    .I0(\U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1 ),
    .I2(\U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2 ),
    .I3(\U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3 ),
    .O(\U1/U1/CurrState_Sreg0_FFD2_MC.D2 )
  );
  X_BUF \U1/U1/CurrState_Sreg0_FFD4_966  (
    .I(\U1/U1/CurrState_Sreg0_FFD4_MC.Q ),
    .O(\U1/U1/CurrState_Sreg0_FFD4 )
  );
  X_FF \U1/U1/CurrState_Sreg0_FFD4_MC.REG  (
    .I(\U1/U1/CurrState_Sreg0_FFD4_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U1/CurrState_Sreg0_FFD4_MC.Q )
  );
  X_XOR2 \U1/U1/CurrState_Sreg0_FFD4_MC.D_967  (
    .I0(\U1/U1/CurrState_Sreg0_FFD4_MC.D1 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD4_MC.D2 ),
    .O(\U1/U1/CurrState_Sreg0_FFD4_MC.D )
  );
  X_AND7 \U1/U1/CurrState_Sreg0_FFD4_MC.D1_968  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN0 ),
    .I1(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN2 ),
    .I3(\U1/U1/CurrState_Sreg0_FFD3 ),
    .I4(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN6 ),
    .O(\U1/U1/CurrState_Sreg0_FFD4_MC.D1 )
  );
  X_ZERO \U1/U1/CurrState_Sreg0_FFD4_MC.D2_969  (
    .O(\U1/U1/CurrState_Sreg0_FFD4_MC.D2 )
  );
  X_BUF \U1/U1/CurrState_Sreg0_FFD1_970  (
    .I(\U1/U1/CurrState_Sreg0_FFD1_MC.Q ),
    .O(\U1/U1/CurrState_Sreg0_FFD1 )
  );
  X_FF \U1/U1/CurrState_Sreg0_FFD1_MC.REG  (
    .I(\U1/U1/CurrState_Sreg0_FFD1_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U1/CurrState_Sreg0_FFD1_MC.Q )
  );
  X_XOR2 \U1/U1/CurrState_Sreg0_FFD1_MC.D_971  (
    .I0(\U1/U1/CurrState_Sreg0_FFD1_MC.D1 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD1_MC.D2 ),
    .O(\U1/U1/CurrState_Sreg0_FFD1_MC.D )
  );
  X_ZERO \U1/U1/CurrState_Sreg0_FFD1_MC.D1_972  (
    .O(\U1/U1/CurrState_Sreg0_FFD1_MC.D1 )
  );
  X_AND4 \U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0_973  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN0 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD2 ),
    .I2(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN2 ),
    .I3(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0 )
  );
  X_AND5 \U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1_974  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN0 ),
    .I1(\PhaseA_Encoder0_II/UIM ),
    .I2(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN2 ),
    .I3(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN3 ),
    .I4(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1 )
  );
  X_AND6 \U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2_975  (
    .I0(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN1 ),
    .I2(\PhaseB_Encoder0_II/UIM ),
    .I3(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN3 ),
    .I4(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN4 ),
    .I5(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN5 ),
    .O(\U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2 )
  );
  X_OR3 \U1/U1/CurrState_Sreg0_FFD1_MC.D2_976  (
    .I0(\U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1 ),
    .I2(\U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2 ),
    .O(\U1/U1/CurrState_Sreg0_FFD1_MC.D2 )
  );
  X_BUF N_PZ_1289_977 (
    .I(\N_PZ_1289_MC.Q ),
    .O(N_PZ_1289)
  );
  X_BUF \N_PZ_1289_MC.Q_978  (
    .I(\N_PZ_1289_MC.D ),
    .O(\N_PZ_1289_MC.Q )
  );
  X_XOR2 \N_PZ_1289_MC.D_979  (
    .I0(\N_PZ_1289_MC.D1 ),
    .I1(\N_PZ_1289_MC.D2 ),
    .O(\N_PZ_1289_MC.D )
  );
  X_ZERO \N_PZ_1289_MC.D1_980  (
    .O(\N_PZ_1289_MC.D1 )
  );
  X_AND2 \N_PZ_1289_MC.D2_PT_0_981  (
    .I0(\PhaseB_Encoder0_II/UIM ),
    .I1(\NlwInverterSignal_N_PZ_1289_MC.D2_PT_0/IN1 ),
    .O(\N_PZ_1289_MC.D2_PT_0 )
  );
  X_AND2 \N_PZ_1289_MC.D2_PT_1_982  (
    .I0(\NlwInverterSignal_N_PZ_1289_MC.D2_PT_1/IN0 ),
    .I1(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\N_PZ_1289_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1289_MC.D2_983  (
    .I0(\N_PZ_1289_MC.D2_PT_0 ),
    .I1(\N_PZ_1289_MC.D2_PT_1 ),
    .O(\N_PZ_1289_MC.D2 )
  );
  X_BUF DCOR0THRESLOWr_984 (
    .I(\DCOR0THRESLOWr_MC.Q ),
    .O(DCOR0THRESLOWr)
  );
  X_BUF \DCOR0THRESLOWr_MC.Q_985  (
    .I(\DCOR0THRESLOWr_MC.D ),
    .O(\DCOR0THRESLOWr_MC.Q )
  );
  X_XOR2 \DCOR0THRESLOWr_MC.D_986  (
    .I0(\DCOR0THRESLOWr_MC.D1 ),
    .I1(\DCOR0THRESLOWr_MC.D2 ),
    .O(\DCOR0THRESLOWr_MC.D )
  );
  X_AND16 \DCOR0THRESLOWr_MC.D1_987  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN1 ),
    .I2(U2_ADDR_reg[1]),
    .I3(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN8 ),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR0THRESLOWr_MC.D1 )
  );
  X_ZERO \DCOR0THRESLOWr_MC.D2_988  (
    .O(\DCOR0THRESLOWr_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<8>  (
    .I(\U1/U4/Latch0r<8>_MC.Q ),
    .O(\U1/U4/Latch0r [8])
  );
  X_FF \U1/U4/Latch0r<8>_MC.REG  (
    .I(\U1/U4/Latch0r<8>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<8>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_989  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<8>_MC.D_990  (
    .I0(\U1/U4/Latch0r<8>_MC.D1 ),
    .I1(\U1/U4/Latch0r<8>_MC.D2 ),
    .O(\U1/U4/Latch0r<8>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<8>_MC.D1_991  (
    .O(\U1/U4/Latch0r<8>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<8>_MC.D2_PT_0_992  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<8>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [8]),
    .O(\U1/U4/Latch0r<8>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<8>_MC.D2_PT_1_993  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<8>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<8>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [8]),
    .O(\U1/U4/Latch0r<8>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<8>_MC.D2_994  (
    .I0(\U1/U4/Latch0r<8>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<8>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<8>_MC.D2 )
  );
  X_BUF \U1/Channel0<8>  (
    .I(\U1/Channel0<8>_MC.Q ),
    .O(\U1/Channel0 [8])
  );
  X_XOR2 \U1/Channel0<8>_MC_tsimcreated_xor__995  (
    .I0(\U1/Channel0<8>_MC.D ),
    .I1(\U1/Channel0<8>_MC.Q ),
    .O(\U1/Channel0<8>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<8>_MC.REG  (
    .I(\U1/Channel0<8>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<8>_MC.Q )
  );
  X_XOR2 \U1/Channel0<8>_MC.D_996  (
    .I0(\U1/Channel0<8>_MC.D1 ),
    .I1(\U1/Channel0<8>_MC.D2 ),
    .O(\U1/Channel0<8>_MC.D )
  );
  X_ZERO \U1/Channel0<8>_MC.D1_997  (
    .O(\U1/Channel0<8>_MC.D1 )
  );
  X_AND2 \U1/Channel0<8>_MC.D2_PT_0_998  (
    .I0(\NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [8]),
    .O(\U1/Channel0<8>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel0<8>_MC.D2_PT_1_999  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\U1/Channel0 [7]),
    .I3(\NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_1/IN4 ),
    .O(\U1/Channel0<8>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel0<8>_MC.D2_PT_2_1000  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_2/IN2 ),
    .I3(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .I4(N_PZ_1090),
    .O(\U1/Channel0<8>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<8>_MC.D2_1001  (
    .I0(\U1/Channel0<8>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<8>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<8>_MC.D2_PT_2 ),
    .O(\U1/Channel0<8>_MC.D2 )
  );
  X_BUF \U1/Channel0<7>  (
    .I(\U1/Channel0<7>_MC.Q ),
    .O(\U1/Channel0 [7])
  );
  X_XOR2 \U1/Channel0<7>_MC_tsimcreated_xor__1002  (
    .I0(\U1/Channel0<7>_MC.D ),
    .I1(\U1/Channel0<7>_MC.Q ),
    .O(\U1/Channel0<7>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<7>_MC.REG  (
    .I(\U1/Channel0<7>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<7>_MC.Q )
  );
  X_XOR2 \U1/Channel0<7>_MC.D_1003  (
    .I0(\U1/Channel0<7>_MC.D1 ),
    .I1(\U1/Channel0<7>_MC.D2 ),
    .O(\U1/Channel0<7>_MC.D )
  );
  X_ZERO \U1/Channel0<7>_MC.D1_1004  (
    .O(\U1/Channel0<7>_MC.D1 )
  );
  X_AND2 \U1/Channel0<7>_MC.D2_PT_0_1005  (
    .I0(\NlwInverterSignal_U1/Channel0<7>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [7]),
    .O(\U1/Channel0<7>_MC.D2_PT_0 )
  );
  X_AND4 \U1/Channel0<7>_MC.D2_PT_1_1006  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .I3(N_PZ_1090),
    .O(\U1/Channel0<7>_MC.D2_PT_1 )
  );
  X_AND4 \U1/Channel0<7>_MC.D2_PT_2_1007  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<7>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<7>_MC.D2_PT_2/IN3 ),
    .O(\U1/Channel0<7>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<7>_MC.D2_1008  (
    .I0(\U1/Channel0<7>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<7>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<7>_MC.D2_PT_2 ),
    .O(\U1/Channel0<7>_MC.D2 )
  );
  X_BUF \U1/U2/location_Maddsub__n0000__n0103<0>  (
    .I(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.Q ),
    .O(\U1/U2/location_Maddsub__n0000__n0103 [0])
  );
  X_BUF \U1/U2/location_Maddsub__n0000__n0103<0>_MC.Q_1009  (
    .I(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D ),
    .O(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.Q )
  );
  X_XOR2 \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D_1010  (
    .I0(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D1 ),
    .I1(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2 ),
    .O(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D )
  );
  X_AND2 \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D1_1011  (
    .I0(N_PZ_1086),
    .I1(N_PZ_1086),
    .O(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D1 )
  );
  X_AND8 \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_0_1012  (
    .I0(\U1/Channel0 [0]),
    .I1(N_PZ_1086),
    .I2(\U1/Channel0 [1]),
    .I3(\U1/Channel0 [2]),
    .I4(\U1/Channel0 [3]),
    .I5(\U1/Channel0 [4]),
    .I6(\U1/Channel0 [5]),
    .I7(\U1/Channel0 [6]),
    .O(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_0 )
  );
  X_AND8 \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1_1013  (
    .I0(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN2 ),
    .I3(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN4 ),
    .I5(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN5 ),
    .I6(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN7 ),
    .O(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_1014  (
    .I0(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_0 ),
    .I1(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1 ),
    .O(\U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2 )
  );
  X_BUF N_PZ_1086_1015 (
    .I(\N_PZ_1086_MC.Q ),
    .O(N_PZ_1086)
  );
  X_BUF \N_PZ_1086_MC.Q_1016  (
    .I(\N_PZ_1086_MC.D ),
    .O(\N_PZ_1086_MC.Q )
  );
  X_XOR2 \N_PZ_1086_MC.D_1017  (
    .I0(\N_PZ_1086_MC.D1 ),
    .I1(\N_PZ_1086_MC.D2 ),
    .O(\N_PZ_1086_MC.D )
  );
  X_ZERO \N_PZ_1086_MC.D1_1018  (
    .O(\N_PZ_1086_MC.D1 )
  );
  X_AND2 \N_PZ_1086_MC.D2_PT_0_1019  (
    .I0(\U1/U1/CurrState_Sreg0_FFD1 ),
    .I1(\U1/NET3721 ),
    .O(\N_PZ_1086_MC.D2_PT_0 )
  );
  X_AND3 \N_PZ_1086_MC.D2_PT_1_1020  (
    .I0(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_1/IN1 ),
    .I2(\U1/NET3721 ),
    .O(\N_PZ_1086_MC.D2_PT_1 )
  );
  X_AND3 \N_PZ_1086_MC.D2_PT_2_1021  (
    .I0(\U1/U1/CurrState_Sreg0_FFD2 ),
    .I1(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_2/IN1 ),
    .I2(N_PZ_1090),
    .O(\N_PZ_1086_MC.D2_PT_2 )
  );
  X_AND4 \N_PZ_1086_MC.D2_PT_3_1022  (
    .I0(\U1/U1/CurrState_Sreg0_FFD3 ),
    .I1(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_3/IN3 ),
    .O(\N_PZ_1086_MC.D2_PT_3 )
  );
  X_OR4 \N_PZ_1086_MC.D2_1023  (
    .I0(\N_PZ_1086_MC.D2_PT_0 ),
    .I1(\N_PZ_1086_MC.D2_PT_1 ),
    .I2(\N_PZ_1086_MC.D2_PT_2 ),
    .I3(\N_PZ_1086_MC.D2_PT_3 ),
    .O(\N_PZ_1086_MC.D2 )
  );
  X_BUF \U1/NET3721_1024  (
    .I(\U1/NET3721_MC.Q ),
    .O(\U1/NET3721 )
  );
  X_FF \U1/NET3721_MC.REG  (
    .I(\U1/NET3721_MC.D ),
    .CE(Vcc),
    .CLK(\U1/NET3721_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/NET3721_MC.Q )
  );
  X_INV \U1/NET3721_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1025  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/NET3721_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/NET3721_MC.D_1026  (
    .I0(\U1/NET3721_MC.D1 ),
    .I1(\U1/NET3721_MC.D2 ),
    .O(\U1/NET3721_MC.D )
  );
  X_ZERO \U1/NET3721_MC.D1_1027  (
    .O(\U1/NET3721_MC.D1 )
  );
  X_AND3 \U1/NET3721_MC.D2_PT_0_1028  (
    .I0(\NlwInverterSignal_U1/NET3721_MC.D2_PT_0/IN0 ),
    .I1(\AD<3>_II/UIM ),
    .I2(DCORENCCTLw),
    .O(\U1/NET3721_MC.D2_PT_0 )
  );
  X_AND3 \U1/NET3721_MC.D2_PT_1_1029  (
    .I0(\NlwInverterSignal_U1/NET3721_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/NET3721_MC.D2_PT_1/IN1 ),
    .I2(\U1/NET3721 ),
    .O(\U1/NET3721_MC.D2_PT_1 )
  );
  X_OR2 \U1/NET3721_MC.D2_1030  (
    .I0(\U1/NET3721_MC.D2_PT_0 ),
    .I1(\U1/NET3721_MC.D2_PT_1 ),
    .O(\U1/NET3721_MC.D2 )
  );
  X_BUF N_PZ_1090_1031 (
    .I(\N_PZ_1090_MC.Q ),
    .O(N_PZ_1090)
  );
  X_BUF \N_PZ_1090_MC.Q_1032  (
    .I(\N_PZ_1090_MC.D ),
    .O(\N_PZ_1090_MC.Q )
  );
  X_XOR2 \N_PZ_1090_MC.D_1033  (
    .I0(\N_PZ_1090_MC.D1 ),
    .I1(\N_PZ_1090_MC.D2 ),
    .O(\N_PZ_1090_MC.D )
  );
  X_ZERO \N_PZ_1090_MC.D1_1034  (
    .O(\N_PZ_1090_MC.D1 )
  );
  X_AND2 \N_PZ_1090_MC.D2_PT_0_1035  (
    .I0(\U1/U1/CurrState_Sreg0_FFD4 ),
    .I1(\U1/NET3721 ),
    .O(\N_PZ_1090_MC.D2_PT_0 )
  );
  X_AND2 \N_PZ_1090_MC.D2_PT_1_1036  (
    .I0(\NlwInverterSignal_N_PZ_1090_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1090_MC.D2_PT_1/IN1 ),
    .O(\N_PZ_1090_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1090_MC.D2_1037  (
    .I0(\N_PZ_1090_MC.D2_PT_0 ),
    .I1(\N_PZ_1090_MC.D2_PT_1 ),
    .O(\N_PZ_1090_MC.D2 )
  );
  X_BUF \U1/Channel0<1>  (
    .I(\U1/Channel0<1>_MC.Q ),
    .O(\U1/Channel0 [1])
  );
  X_XOR2 \U1/Channel0<1>_MC_tsimcreated_xor__1038  (
    .I0(\U1/Channel0<1>_MC.D ),
    .I1(\U1/Channel0<1>_MC.Q ),
    .O(\U1/Channel0<1>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<1>_MC.REG  (
    .I(\U1/Channel0<1>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<1>_MC.Q )
  );
  X_XOR2 \U1/Channel0<1>_MC.D_1039  (
    .I0(\U1/Channel0<1>_MC.D1 ),
    .I1(\U1/Channel0<1>_MC.D2 ),
    .O(\U1/Channel0<1>_MC.D )
  );
  X_ZERO \U1/Channel0<1>_MC.D1_1040  (
    .O(\U1/Channel0<1>_MC.D1 )
  );
  X_AND2 \U1/Channel0<1>_MC.D2_PT_0_1041  (
    .I0(\NlwInverterSignal_U1/Channel0<1>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [1]),
    .O(\U1/Channel0<1>_MC.D2_PT_0 )
  );
  X_AND4 \U1/Channel0<1>_MC.D2_PT_1_1042  (
    .I0(\U1/Channel0 [0]),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(\NlwInverterSignal_U1/Channel0<1>_MC.D2_PT_1/IN3 ),
    .O(\U1/Channel0<1>_MC.D2_PT_1 )
  );
  X_AND4 \U1/Channel0<1>_MC.D2_PT_2_1043  (
    .I0(\NlwInverterSignal_U1/Channel0<1>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(N_PZ_1090),
    .O(\U1/Channel0<1>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<1>_MC.D2_1044  (
    .I0(\U1/Channel0<1>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<1>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<1>_MC.D2_PT_2 ),
    .O(\U1/Channel0<1>_MC.D2 )
  );
  X_BUF \U1/Channel0<2>  (
    .I(\U1/Channel0<2>_MC.Q ),
    .O(\U1/Channel0 [2])
  );
  X_XOR2 \U1/Channel0<2>_MC_tsimcreated_xor__1045  (
    .I0(\U1/Channel0<2>_MC.D ),
    .I1(\U1/Channel0<2>_MC.Q ),
    .O(\U1/Channel0<2>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<2>_MC.REG  (
    .I(\U1/Channel0<2>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<2>_MC.Q )
  );
  X_XOR2 \U1/Channel0<2>_MC.D_1046  (
    .I0(\U1/Channel0<2>_MC.D1 ),
    .I1(\U1/Channel0<2>_MC.D2 ),
    .O(\U1/Channel0<2>_MC.D )
  );
  X_ZERO \U1/Channel0<2>_MC.D1_1047  (
    .O(\U1/Channel0<2>_MC.D1 )
  );
  X_AND2 \U1/Channel0<2>_MC.D2_PT_0_1048  (
    .I0(\NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [2]),
    .O(\U1/Channel0<2>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel0<2>_MC.D2_PT_1_1049  (
    .I0(\U1/Channel0 [0]),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(\NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_1/IN3 ),
    .I4(\U1/Channel0 [1]),
    .O(\U1/Channel0<2>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel0<2>_MC.D2_PT_2_1050  (
    .I0(\NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(N_PZ_1090),
    .I4(\NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_2/IN4 ),
    .O(\U1/Channel0<2>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<2>_MC.D2_1051  (
    .I0(\U1/Channel0<2>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<2>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<2>_MC.D2_PT_2 ),
    .O(\U1/Channel0<2>_MC.D2 )
  );
  X_BUF \U1/Channel0<3>  (
    .I(\U1/Channel0<3>_MC.Q ),
    .O(\U1/Channel0 [3])
  );
  X_XOR2 \U1/Channel0<3>_MC_tsimcreated_xor__1052  (
    .I0(\U1/Channel0<3>_MC.D ),
    .I1(\U1/Channel0<3>_MC.Q ),
    .O(\U1/Channel0<3>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<3>_MC.REG  (
    .I(\U1/Channel0<3>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<3>_MC.Q )
  );
  X_XOR2 \U1/Channel0<3>_MC.D_1053  (
    .I0(\U1/Channel0<3>_MC.D1 ),
    .I1(\U1/Channel0<3>_MC.D2 ),
    .O(\U1/Channel0<3>_MC.D )
  );
  X_ZERO \U1/Channel0<3>_MC.D1_1054  (
    .O(\U1/Channel0<3>_MC.D1 )
  );
  X_AND2 \U1/Channel0<3>_MC.D2_PT_0_1055  (
    .I0(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [3]),
    .O(\U1/Channel0<3>_MC.D2_PT_0 )
  );
  X_AND6 \U1/Channel0<3>_MC.D2_PT_1_1056  (
    .I0(\U1/Channel0 [0]),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_1/IN3 ),
    .I4(\U1/Channel0 [1]),
    .I5(\U1/Channel0 [2]),
    .O(\U1/Channel0<3>_MC.D2_PT_1 )
  );
  X_AND6 \U1/Channel0<3>_MC.D2_PT_2_1057  (
    .I0(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(N_PZ_1090),
    .I4(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_2/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_2/IN5 ),
    .O(\U1/Channel0<3>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<3>_MC.D2_1058  (
    .I0(\U1/Channel0<3>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<3>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<3>_MC.D2_PT_2 ),
    .O(\U1/Channel0<3>_MC.D2 )
  );
  X_BUF \U1/Channel0<4>  (
    .I(\U1/Channel0<4>_MC.Q ),
    .O(\U1/Channel0 [4])
  );
  X_XOR2 \U1/Channel0<4>_MC_tsimcreated_xor__1059  (
    .I0(\U1/Channel0<4>_MC.D ),
    .I1(\U1/Channel0<4>_MC.Q ),
    .O(\U1/Channel0<4>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<4>_MC.REG  (
    .I(\U1/Channel0<4>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<4>_MC.Q )
  );
  X_XOR2 \U1/Channel0<4>_MC.D_1060  (
    .I0(\U1/Channel0<4>_MC.D1 ),
    .I1(\U1/Channel0<4>_MC.D2 ),
    .O(\U1/Channel0<4>_MC.D )
  );
  X_ZERO \U1/Channel0<4>_MC.D1_1061  (
    .O(\U1/Channel0<4>_MC.D1 )
  );
  X_AND2 \U1/Channel0<4>_MC.D2_PT_0_1062  (
    .I0(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [4]),
    .O(\U1/Channel0<4>_MC.D2_PT_0 )
  );
  X_AND7 \U1/Channel0<4>_MC.D2_PT_1_1063  (
    .I0(\U1/Channel0 [0]),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_1/IN3 ),
    .I4(\U1/Channel0 [1]),
    .I5(\U1/Channel0 [2]),
    .I6(\U1/Channel0 [3]),
    .O(\U1/Channel0<4>_MC.D2_PT_1 )
  );
  X_AND7 \U1/Channel0<4>_MC.D2_PT_2_1064  (
    .I0(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(N_PZ_1090),
    .I4(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN6 ),
    .O(\U1/Channel0<4>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<4>_MC.D2_1065  (
    .I0(\U1/Channel0<4>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<4>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<4>_MC.D2_PT_2 ),
    .O(\U1/Channel0<4>_MC.D2 )
  );
  X_BUF \U1/Channel0<5>  (
    .I(\U1/Channel0<5>_MC.Q ),
    .O(\U1/Channel0 [5])
  );
  X_XOR2 \U1/Channel0<5>_MC_tsimcreated_xor__1066  (
    .I0(\U1/Channel0<5>_MC.D ),
    .I1(\U1/Channel0<5>_MC.Q ),
    .O(\U1/Channel0<5>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<5>_MC.REG  (
    .I(\U1/Channel0<5>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<5>_MC.Q )
  );
  X_XOR2 \U1/Channel0<5>_MC.D_1067  (
    .I0(\U1/Channel0<5>_MC.D1 ),
    .I1(\U1/Channel0<5>_MC.D2 ),
    .O(\U1/Channel0<5>_MC.D )
  );
  X_ZERO \U1/Channel0<5>_MC.D1_1068  (
    .O(\U1/Channel0<5>_MC.D1 )
  );
  X_AND2 \U1/Channel0<5>_MC.D2_PT_0_1069  (
    .I0(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [5]),
    .O(\U1/Channel0<5>_MC.D2_PT_0 )
  );
  X_AND8 \U1/Channel0<5>_MC.D2_PT_1_1070  (
    .I0(\U1/Channel0 [0]),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_1/IN3 ),
    .I4(\U1/Channel0 [1]),
    .I5(\U1/Channel0 [2]),
    .I6(\U1/Channel0 [3]),
    .I7(\U1/Channel0 [4]),
    .O(\U1/Channel0<5>_MC.D2_PT_1 )
  );
  X_AND8 \U1/Channel0<5>_MC.D2_PT_2_1071  (
    .I0(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(N_PZ_1090),
    .I4(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN7 ),
    .O(\U1/Channel0<5>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<5>_MC.D2_1072  (
    .I0(\U1/Channel0<5>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<5>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<5>_MC.D2_PT_2 ),
    .O(\U1/Channel0<5>_MC.D2 )
  );
  X_BUF \U1/Channel0<6>  (
    .I(\U1/Channel0<6>_MC.Q ),
    .O(\U1/Channel0 [6])
  );
  X_XOR2 \U1/Channel0<6>_MC_tsimcreated_xor__1073  (
    .I0(\U1/Channel0<6>_MC.D ),
    .I1(\U1/Channel0<6>_MC.Q ),
    .O(\U1/Channel0<6>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<6>_MC.REG  (
    .I(\U1/Channel0<6>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<6>_MC.Q )
  );
  X_XOR2 \U1/Channel0<6>_MC.D_1074  (
    .I0(\U1/Channel0<6>_MC.D1 ),
    .I1(\U1/Channel0<6>_MC.D2 ),
    .O(\U1/Channel0<6>_MC.D )
  );
  X_ZERO \U1/Channel0<6>_MC.D1_1075  (
    .O(\U1/Channel0<6>_MC.D1 )
  );
  X_AND2 \U1/Channel0<6>_MC.D2_PT_0_1076  (
    .I0(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [6]),
    .O(\U1/Channel0<6>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel0<6>_MC.D2_PT_1_1077  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .I3(N_PZ_1090),
    .I4(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_1/IN4 ),
    .O(\U1/Channel0<6>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel0<6>_MC.D2_PT_2_1078  (
    .I0(N_PZ_1132),
    .I1(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_2/IN3 ),
    .I4(\U1/Channel0 [6]),
    .O(\U1/Channel0<6>_MC.D2_PT_2 )
  );
  X_AND16 \U1/Channel0<6>_MC.D2_PT_3_1079  (
    .I0(\U1/Channel0 [0]),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_3/IN3 ),
    .I4(\U1/Channel0 [1]),
    .I5(\U1/Channel0 [2]),
    .I6(\U1/Channel0 [3]),
    .I7(\U1/Channel0 [4]),
    .I8(\U1/Channel0 [6]),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<6>_MC.D2_PT_3 )
  );
  X_AND16 \U1/Channel0<6>_MC.D2_PT_4_1080  (
    .I0(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN0 ),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN7 ),
    .I8(\U1/Channel0 [6]),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<6>_MC.D2_PT_4 )
  );
  X_AND16 \U1/Channel0<6>_MC.D2_PT_5_1081  (
    .I0(\U1/Channel0 [0]),
    .I1(N_PZ_1074),
    .I2(N_PZ_1132),
    .I3(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .I4(\U1/Channel0 [1]),
    .I5(\U1/Channel0 [2]),
    .I6(\U1/Channel0 [3]),
    .I7(\U1/Channel0 [4]),
    .I8(\U1/Channel0 [5]),
    .I9(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_5/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<6>_MC.D2_PT_5 )
  );
  X_OR6 \U1/Channel0<6>_MC.D2_1082  (
    .I0(\U1/Channel0<6>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<6>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<6>_MC.D2_PT_2 ),
    .I3(\U1/Channel0<6>_MC.D2_PT_3 ),
    .I4(\U1/Channel0<6>_MC.D2_PT_4 ),
    .I5(\U1/Channel0<6>_MC.D2_PT_5 ),
    .O(\U1/Channel0<6>_MC.D2 )
  );
  X_BUF DCOR0THRESMIDr_1083 (
    .I(\DCOR0THRESMIDr_MC.Q ),
    .O(DCOR0THRESMIDr)
  );
  X_BUF \DCOR0THRESMIDr_MC.Q_1084  (
    .I(\DCOR0THRESMIDr_MC.D ),
    .O(\DCOR0THRESMIDr_MC.Q )
  );
  X_XOR2 \DCOR0THRESMIDr_MC.D_1085  (
    .I0(\DCOR0THRESMIDr_MC.D1 ),
    .I1(\DCOR0THRESMIDr_MC.D2 ),
    .O(\DCOR0THRESMIDr_MC.D )
  );
  X_AND16 \DCOR0THRESMIDr_MC.D1_1086  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN1 ),
    .I2(U2_ADDR_reg[1]),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN8 ),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR0THRESMIDr_MC.D1 )
  );
  X_ZERO \DCOR0THRESMIDr_MC.D2_1087  (
    .O(\DCOR0THRESMIDr_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<0>  (
    .I(\U1/U4/Latch1r<0>_MC.Q ),
    .O(\U1/U4/Latch1r [0])
  );
  X_FF \U1/U4/Latch1r<0>_MC.REG  (
    .I(\U1/U4/Latch1r<0>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<0>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1088  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<0>_MC.D_1089  (
    .I0(\U1/U4/Latch1r<0>_MC.D1 ),
    .I1(\U1/U4/Latch1r<0>_MC.D2 ),
    .O(\U1/U4/Latch1r<0>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<0>_MC.D1_1090  (
    .O(\U1/U4/Latch1r<0>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<0>_MC.D2_PT_0_1091  (
    .I0(\U1/U4/Latch1r [0]),
    .I1(N_PZ_1116),
    .O(\U1/U4/Latch1r<0>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<0>_MC.D2_PT_1_1092  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<0>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<0>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<0>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [0]),
    .O(\U1/U4/Latch1r<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<0>_MC.D2_1093  (
    .I0(\U1/U4/Latch1r<0>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<0>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<0>_MC.D2 )
  );
  X_BUF \U1/Channel1<0>  (
    .I(\U1/Channel1<0>_MC.Q ),
    .O(\U1/Channel1 [0])
  );
  X_FF \U1/Channel1<0>_MC.REG  (
    .I(\U1/Channel1<0>_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<0>_MC.Q )
  );
  X_XOR2 \U1/Channel1<0>_MC.D_1094  (
    .I0(\U1/Channel1<0>_MC.D1 ),
    .I1(\U1/Channel1<0>_MC.D2 ),
    .O(\U1/Channel1<0>_MC.D )
  );
  X_ZERO \U1/Channel1<0>_MC.D1_1095  (
    .O(\U1/Channel1<0>_MC.D1 )
  );
  X_AND3 \U1/Channel1<0>_MC.D2_PT_0_1096  (
    .I0(\U1/Channel1 [0]),
    .I1(N_PZ_1073),
    .I2(\NlwInverterSignal_U1/Channel1<0>_MC.D2_PT_0/IN2 ),
    .O(\U1/Channel1<0>_MC.D2_PT_0 )
  );
  X_AND3 \U1/Channel1<0>_MC.D2_PT_1_1097  (
    .I0(\NlwInverterSignal_U1/Channel1<0>_MC.D2_PT_1/IN0 ),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .O(\U1/Channel1<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/Channel1<0>_MC.D2_1098  (
    .I0(\U1/Channel1<0>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<0>_MC.D2_PT_1 ),
    .O(\U1/Channel1<0>_MC.D2 )
  );
  X_BUF N_PZ_1073_1099 (
    .I(\N_PZ_1073_MC.Q ),
    .O(N_PZ_1073)
  );
  X_BUF \N_PZ_1073_MC.Q_1100  (
    .I(\N_PZ_1073_MC.D ),
    .O(\N_PZ_1073_MC.Q )
  );
  X_XOR2 \N_PZ_1073_MC.D_1101  (
    .I0(\N_PZ_1073_MC.D1 ),
    .I1(\N_PZ_1073_MC.D2 ),
    .O(\N_PZ_1073_MC.D )
  );
  X_AND2 \N_PZ_1073_MC.D1_1102  (
    .I0(\NlwInverterSignal_N_PZ_1073_MC.D1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1073_MC.D1/IN1 ),
    .O(\N_PZ_1073_MC.D1 )
  );
  X_ZERO \N_PZ_1073_MC.D2_1103  (
    .O(\N_PZ_1073_MC.D2 )
  );
  X_BUF \U1/Zero1_1104  (
    .I(\U1/Zero1_MC.Q ),
    .O(\U1/Zero1 )
  );
  X_FF \U1/Zero1_MC.REG  (
    .I(\U1/Zero1_MC.D ),
    .CE(Vcc),
    .CLK(\U1/Zero1_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Zero1_MC.Q )
  );
  X_INV \U1/Zero1_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1105  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/Zero1_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/Zero1_MC.D_1106  (
    .I0(\U1/Zero1_MC.D1 ),
    .I1(\U1/Zero1_MC.D2 ),
    .O(\U1/Zero1_MC.D )
  );
  X_ZERO \U1/Zero1_MC.D1_1107  (
    .O(\U1/Zero1_MC.D1 )
  );
  X_AND2 \U1/Zero1_MC.D2_PT_0_1108  (
    .I0(\Reset_II/UIM ),
    .I1(\U1/Zero1 ),
    .O(\U1/Zero1_MC.D2_PT_0 )
  );
  X_AND2 \U1/Zero1_MC.D2_PT_1_1109  (
    .I0(N_PZ_1116),
    .I1(\NlwInverterSignal_U1/Zero1_MC.D2_PT_1/IN1 ),
    .O(\U1/Zero1_MC.D2_PT_1 )
  );
  X_AND7 \U1/Zero1_MC.D2_PT_2_1110  (
    .I0(\NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN1 ),
    .I2(\U1/U4/RF1r ),
    .I3(\U1/U4/E1r ),
    .I4(\U1/U4/HE1stater ),
    .I5(\NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN5 ),
    .I6(\NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN6 ),
    .O(\U1/Zero1_MC.D2_PT_2 )
  );
  X_AND7 \U1/Zero1_MC.D2_PT_3_1111  (
    .I0(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN2 ),
    .I3(\U1/U4/E1r ),
    .I4(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN4 ),
    .I5(\U1/U4/HE1statelastr ),
    .I6(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN6 ),
    .O(\U1/Zero1_MC.D2_PT_3 )
  );
  X_OR4 \U1/Zero1_MC.D2_1112  (
    .I0(\U1/Zero1_MC.D2_PT_0 ),
    .I1(\U1/Zero1_MC.D2_PT_1 ),
    .I2(\U1/Zero1_MC.D2_PT_2 ),
    .I3(\U1/Zero1_MC.D2_PT_3 ),
    .O(\U1/Zero1_MC.D2 )
  );
  X_BUF N_PZ_1187_1113 (
    .I(\N_PZ_1187_MC.Q ),
    .O(N_PZ_1187)
  );
  X_BUF \N_PZ_1187_MC.Q_1114  (
    .I(\N_PZ_1187_MC.D ),
    .O(\N_PZ_1187_MC.Q )
  );
  X_XOR2 \N_PZ_1187_MC.D_1115  (
    .I0(\N_PZ_1187_MC.D1 ),
    .I1(\N_PZ_1187_MC.D2 ),
    .O(\N_PZ_1187_MC.D )
  );
  X_ZERO \N_PZ_1187_MC.D1_1116  (
    .O(\N_PZ_1187_MC.D1 )
  );
  X_AND4 \N_PZ_1187_MC.D2_PT_0_1117  (
    .I0(\U1/U6/CurrState_Sreg0_FFD3 ),
    .I1(\NlwInverterSignal_N_PZ_1187_MC.D2_PT_0/IN1 ),
    .I2(\U1/U6/CurrState_Sreg0_FFD4 ),
    .I3(\NlwInverterSignal_N_PZ_1187_MC.D2_PT_0/IN3 ),
    .O(\N_PZ_1187_MC.D2_PT_0 )
  );
  X_AND4 \N_PZ_1187_MC.D2_PT_1_1118  (
    .I0(\U1/U6/CurrState_Sreg0_FFD3 ),
    .I1(\NlwInverterSignal_N_PZ_1187_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_N_PZ_1187_MC.D2_PT_1/IN2 ),
    .I3(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\N_PZ_1187_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1187_MC.D2_1119  (
    .I0(\N_PZ_1187_MC.D2_PT_0 ),
    .I1(\N_PZ_1187_MC.D2_PT_1 ),
    .O(\N_PZ_1187_MC.D2 )
  );
  X_BUF \U1/U6/CurrState_Sreg0_FFD3_1120  (
    .I(\U1/U6/CurrState_Sreg0_FFD3_MC.Q ),
    .O(\U1/U6/CurrState_Sreg0_FFD3 )
  );
  X_FF \U1/U6/CurrState_Sreg0_FFD3_MC.REG  (
    .I(\U1/U6/CurrState_Sreg0_FFD3_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U6/CurrState_Sreg0_FFD3_MC.Q )
  );
  X_XOR2 \U1/U6/CurrState_Sreg0_FFD3_MC.D_1121  (
    .I0(\U1/U6/CurrState_Sreg0_FFD3_MC.D1 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD3_MC.D2 ),
    .O(\U1/U6/CurrState_Sreg0_FFD3_MC.D )
  );
  X_ZERO \U1/U6/CurrState_Sreg0_FFD3_MC.D1_1122  (
    .O(\U1/U6/CurrState_Sreg0_FFD3_MC.D1 )
  );
  X_AND5 \U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0_1123  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN0 ),
    .I1(\PhaseA_Encoder1_II/UIM ),
    .I2(\U1/U6/CurrState_Sreg0_FFD2 ),
    .I3(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN3 ),
    .I4(N_PZ_1290),
    .O(\U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0 )
  );
  X_AND5 \U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1_1124  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN1 ),
    .I2(\U1/U6/CurrState_Sreg0_FFD3 ),
    .I3(\U1/U6/CurrState_Sreg0_FFD2 ),
    .I4(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN4 ),
    .O(\U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1 )
  );
  X_AND5 \U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2_1125  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN0 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD3 ),
    .I2(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN3 ),
    .I4(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN4 ),
    .O(\U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2 )
  );
  X_OR3 \U1/U6/CurrState_Sreg0_FFD3_MC.D2_1126  (
    .I0(\U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1 ),
    .I2(\U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2 ),
    .O(\U1/U6/CurrState_Sreg0_FFD3_MC.D2 )
  );
  X_BUF \U1/U6/CurrState_Sreg0_FFD2_1127  (
    .I(\U1/U6/CurrState_Sreg0_FFD2_MC.Q ),
    .O(\U1/U6/CurrState_Sreg0_FFD2 )
  );
  X_FF \U1/U6/CurrState_Sreg0_FFD2_MC.REG  (
    .I(\U1/U6/CurrState_Sreg0_FFD2_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U6/CurrState_Sreg0_FFD2_MC.Q )
  );
  X_XOR2 \U1/U6/CurrState_Sreg0_FFD2_MC.D_1128  (
    .I0(\U1/U6/CurrState_Sreg0_FFD2_MC.D1 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD2_MC.D2 ),
    .O(\U1/U6/CurrState_Sreg0_FFD2_MC.D )
  );
  X_ZERO \U1/U6/CurrState_Sreg0_FFD2_MC.D1_1129  (
    .O(\U1/U6/CurrState_Sreg0_FFD2_MC.D1 )
  );
  X_AND5 \U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0_1130  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN0 ),
    .I1(\PhaseA_Encoder1_II/UIM ),
    .I2(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN2 ),
    .I3(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN3 ),
    .I4(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN4 ),
    .O(\U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0 )
  );
  X_AND5 \U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1_1131  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN0 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD3 ),
    .I2(\U1/U6/CurrState_Sreg0_FFD2 ),
    .I3(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN4 ),
    .O(\U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1 )
  );
  X_AND5 \U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2_1132  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN1 ),
    .I2(\U1/U6/CurrState_Sreg0_FFD2 ),
    .I3(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN3 ),
    .I4(N_PZ_1290),
    .O(\U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2 )
  );
  X_AND6 \U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3_1133  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN0 ),
    .I1(\PhaseA_Encoder1_II/UIM ),
    .I2(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN2 ),
    .I3(\U1/U6/CurrState_Sreg0_FFD3 ),
    .I4(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN4 ),
    .I5(N_PZ_1290),
    .O(\U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3 )
  );
  X_OR4 \U1/U6/CurrState_Sreg0_FFD2_MC.D2_1134  (
    .I0(\U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1 ),
    .I2(\U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2 ),
    .I3(\U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3 ),
    .O(\U1/U6/CurrState_Sreg0_FFD2_MC.D2 )
  );
  X_BUF \U1/U6/CurrState_Sreg0_FFD4_1135  (
    .I(\U1/U6/CurrState_Sreg0_FFD4_MC.Q ),
    .O(\U1/U6/CurrState_Sreg0_FFD4 )
  );
  X_FF \U1/U6/CurrState_Sreg0_FFD4_MC.REG  (
    .I(\U1/U6/CurrState_Sreg0_FFD4_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U6/CurrState_Sreg0_FFD4_MC.Q )
  );
  X_XOR2 \U1/U6/CurrState_Sreg0_FFD4_MC.D_1136  (
    .I0(\U1/U6/CurrState_Sreg0_FFD4_MC.D1 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD4_MC.D2 ),
    .O(\U1/U6/CurrState_Sreg0_FFD4_MC.D )
  );
  X_AND7 \U1/U6/CurrState_Sreg0_FFD4_MC.D1_1137  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN0 ),
    .I1(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN2 ),
    .I3(\U1/U6/CurrState_Sreg0_FFD3 ),
    .I4(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN6 ),
    .O(\U1/U6/CurrState_Sreg0_FFD4_MC.D1 )
  );
  X_ZERO \U1/U6/CurrState_Sreg0_FFD4_MC.D2_1138  (
    .O(\U1/U6/CurrState_Sreg0_FFD4_MC.D2 )
  );
  X_BUF \U1/U6/CurrState_Sreg0_FFD1_1139  (
    .I(\U1/U6/CurrState_Sreg0_FFD1_MC.Q ),
    .O(\U1/U6/CurrState_Sreg0_FFD1 )
  );
  X_FF \U1/U6/CurrState_Sreg0_FFD1_MC.REG  (
    .I(\U1/U6/CurrState_Sreg0_FFD1_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U6/CurrState_Sreg0_FFD1_MC.Q )
  );
  X_XOR2 \U1/U6/CurrState_Sreg0_FFD1_MC.D_1140  (
    .I0(\U1/U6/CurrState_Sreg0_FFD1_MC.D1 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD1_MC.D2 ),
    .O(\U1/U6/CurrState_Sreg0_FFD1_MC.D )
  );
  X_ZERO \U1/U6/CurrState_Sreg0_FFD1_MC.D1_1141  (
    .O(\U1/U6/CurrState_Sreg0_FFD1_MC.D1 )
  );
  X_AND4 \U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0_1142  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN0 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD2 ),
    .I2(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN2 ),
    .I3(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0 )
  );
  X_AND5 \U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1_1143  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN0 ),
    .I1(\PhaseA_Encoder1_II/UIM ),
    .I2(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN2 ),
    .I3(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN3 ),
    .I4(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1 )
  );
  X_AND6 \U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2_1144  (
    .I0(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN1 ),
    .I2(\PhaseB_Encoder1_II/UIM ),
    .I3(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN3 ),
    .I4(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN4 ),
    .I5(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN5 ),
    .O(\U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2 )
  );
  X_OR3 \U1/U6/CurrState_Sreg0_FFD1_MC.D2_1145  (
    .I0(\U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1 ),
    .I2(\U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2 ),
    .O(\U1/U6/CurrState_Sreg0_FFD1_MC.D2 )
  );
  X_BUF N_PZ_1290_1146 (
    .I(\N_PZ_1290_MC.Q ),
    .O(N_PZ_1290)
  );
  X_BUF \N_PZ_1290_MC.Q_1147  (
    .I(\N_PZ_1290_MC.D ),
    .O(\N_PZ_1290_MC.Q )
  );
  X_XOR2 \N_PZ_1290_MC.D_1148  (
    .I0(\N_PZ_1290_MC.D1 ),
    .I1(\N_PZ_1290_MC.D2 ),
    .O(\N_PZ_1290_MC.D )
  );
  X_ZERO \N_PZ_1290_MC.D1_1149  (
    .O(\N_PZ_1290_MC.D1 )
  );
  X_AND2 \N_PZ_1290_MC.D2_PT_0_1150  (
    .I0(\PhaseB_Encoder1_II/UIM ),
    .I1(\NlwInverterSignal_N_PZ_1290_MC.D2_PT_0/IN1 ),
    .O(\N_PZ_1290_MC.D2_PT_0 )
  );
  X_AND2 \N_PZ_1290_MC.D2_PT_1_1151  (
    .I0(\NlwInverterSignal_N_PZ_1290_MC.D2_PT_1/IN0 ),
    .I1(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\N_PZ_1290_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1290_MC.D2_1152  (
    .I0(\N_PZ_1290_MC.D2_PT_0 ),
    .I1(\N_PZ_1290_MC.D2_PT_1 ),
    .O(\N_PZ_1290_MC.D2 )
  );
  X_BUF DCOR1THRESLOWr_1153 (
    .I(\DCOR1THRESLOWr_MC.Q ),
    .O(DCOR1THRESLOWr)
  );
  X_BUF \DCOR1THRESLOWr_MC.Q_1154  (
    .I(\DCOR1THRESLOWr_MC.D ),
    .O(\DCOR1THRESLOWr_MC.Q )
  );
  X_XOR2 \DCOR1THRESLOWr_MC.D_1155  (
    .I0(\DCOR1THRESLOWr_MC.D1 ),
    .I1(\DCOR1THRESLOWr_MC.D2 ),
    .O(\DCOR1THRESLOWr_MC.D )
  );
  X_AND16 \DCOR1THRESLOWr_MC.D1_1156  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN2 ),
    .I3(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR1THRESLOWr_MC.D1 )
  );
  X_ZERO \DCOR1THRESLOWr_MC.D2_1157  (
    .O(\DCOR1THRESLOWr_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<8>  (
    .I(\U1/U4/Latch1r<8>_MC.Q ),
    .O(\U1/U4/Latch1r [8])
  );
  X_FF \U1/U4/Latch1r<8>_MC.REG  (
    .I(\U1/U4/Latch1r<8>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<8>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1158  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<8>_MC.D_1159  (
    .I0(\U1/U4/Latch1r<8>_MC.D1 ),
    .I1(\U1/U4/Latch1r<8>_MC.D2 ),
    .O(\U1/U4/Latch1r<8>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<8>_MC.D1_1160  (
    .O(\U1/U4/Latch1r<8>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<8>_MC.D2_PT_0_1161  (
    .I0(\U1/U4/Latch1r [8]),
    .I1(N_PZ_1116),
    .O(\U1/U4/Latch1r<8>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<8>_MC.D2_PT_1_1162  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<8>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<8>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<8>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [8]),
    .O(\U1/U4/Latch1r<8>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<8>_MC.D2_1163  (
    .I0(\U1/U4/Latch1r<8>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<8>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<8>_MC.D2 )
  );
  X_BUF \U1/Channel1<8>  (
    .I(\U1/Channel1<8>_MC.Q ),
    .O(\U1/Channel1 [8])
  );
  X_XOR2 \U1/Channel1<8>_MC_tsimcreated_xor__1164  (
    .I0(\U1/Channel1<8>_MC.D ),
    .I1(\U1/Channel1<8>_MC.Q ),
    .O(\U1/Channel1<8>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<8>_MC.REG  (
    .I(\U1/Channel1<8>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<8>_MC.Q )
  );
  X_XOR2 \U1/Channel1<8>_MC.D_1165  (
    .I0(\U1/Channel1<8>_MC.D1 ),
    .I1(\U1/Channel1<8>_MC.D2 ),
    .O(\U1/Channel1<8>_MC.D )
  );
  X_ZERO \U1/Channel1<8>_MC.D1_1166  (
    .O(\U1/Channel1<8>_MC.D1 )
  );
  X_AND2 \U1/Channel1<8>_MC.D2_PT_0_1167  (
    .I0(\NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [8]),
    .O(\U1/Channel1<8>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel1<8>_MC.D2_PT_1_1168  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\U1/Channel1 [7]),
    .I3(\NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_1/IN4 ),
    .O(\U1/Channel1<8>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel1<8>_MC.D2_PT_2_1169  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_2/IN2 ),
    .I3(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .I4(N_PZ_1104),
    .O(\U1/Channel1<8>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<8>_MC.D2_1170  (
    .I0(\U1/Channel1<8>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<8>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<8>_MC.D2_PT_2 ),
    .O(\U1/Channel1<8>_MC.D2 )
  );
  X_BUF \U1/Channel1<7>  (
    .I(\U1/Channel1<7>_MC.Q ),
    .O(\U1/Channel1 [7])
  );
  X_XOR2 \U1/Channel1<7>_MC_tsimcreated_xor__1171  (
    .I0(\U1/Channel1<7>_MC.D ),
    .I1(\U1/Channel1<7>_MC.Q ),
    .O(\U1/Channel1<7>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<7>_MC.REG  (
    .I(\U1/Channel1<7>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<7>_MC.Q )
  );
  X_XOR2 \U1/Channel1<7>_MC.D_1172  (
    .I0(\U1/Channel1<7>_MC.D1 ),
    .I1(\U1/Channel1<7>_MC.D2 ),
    .O(\U1/Channel1<7>_MC.D )
  );
  X_ZERO \U1/Channel1<7>_MC.D1_1173  (
    .O(\U1/Channel1<7>_MC.D1 )
  );
  X_AND2 \U1/Channel1<7>_MC.D2_PT_0_1174  (
    .I0(\NlwInverterSignal_U1/Channel1<7>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [7]),
    .O(\U1/Channel1<7>_MC.D2_PT_0 )
  );
  X_AND4 \U1/Channel1<7>_MC.D2_PT_1_1175  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .I3(N_PZ_1104),
    .O(\U1/Channel1<7>_MC.D2_PT_1 )
  );
  X_AND4 \U1/Channel1<7>_MC.D2_PT_2_1176  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<7>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel1<7>_MC.D2_PT_2/IN3 ),
    .O(\U1/Channel1<7>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<7>_MC.D2_1177  (
    .I0(\U1/Channel1<7>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<7>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<7>_MC.D2_PT_2 ),
    .O(\U1/Channel1<7>_MC.D2 )
  );
  X_BUF \U1/U5/location_Maddsub__n0000__n0103<0>  (
    .I(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.Q ),
    .O(\U1/U5/location_Maddsub__n0000__n0103 [0])
  );
  X_BUF \U1/U5/location_Maddsub__n0000__n0103<0>_MC.Q_1178  (
    .I(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D ),
    .O(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.Q )
  );
  X_XOR2 \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D_1179  (
    .I0(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D1 ),
    .I1(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2 ),
    .O(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D )
  );
  X_AND2 \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D1_1180  (
    .I0(N_PZ_1087),
    .I1(N_PZ_1087),
    .O(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D1 )
  );
  X_AND4 \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_0_1181  (
    .I0(N_PZ_1087),
    .I1(N_PZ_1327),
    .I2(\U1/Channel1 [5]),
    .I3(\U1/Channel1 [6]),
    .O(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_0 )
  );
  X_AND8 \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1_1182  (
    .I0(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN2 ),
    .I3(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN4 ),
    .I5(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN5 ),
    .I6(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN7 ),
    .O(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_1183  (
    .I0(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_0 ),
    .I1(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1 ),
    .O(\U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2 )
  );
  X_BUF N_PZ_1087_1184 (
    .I(\N_PZ_1087_MC.Q ),
    .O(N_PZ_1087)
  );
  X_BUF \N_PZ_1087_MC.Q_1185  (
    .I(\N_PZ_1087_MC.D ),
    .O(\N_PZ_1087_MC.Q )
  );
  X_XOR2 \N_PZ_1087_MC.D_1186  (
    .I0(\N_PZ_1087_MC.D1 ),
    .I1(\N_PZ_1087_MC.D2 ),
    .O(\N_PZ_1087_MC.D )
  );
  X_ZERO \N_PZ_1087_MC.D1_1187  (
    .O(\N_PZ_1087_MC.D1 )
  );
  X_AND2 \N_PZ_1087_MC.D2_PT_0_1188  (
    .I0(\U1/U6/CurrState_Sreg0_FFD1 ),
    .I1(\U1/NET3720 ),
    .O(\N_PZ_1087_MC.D2_PT_0 )
  );
  X_AND3 \N_PZ_1087_MC.D2_PT_1_1189  (
    .I0(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_1/IN1 ),
    .I2(\U1/NET3720 ),
    .O(\N_PZ_1087_MC.D2_PT_1 )
  );
  X_AND3 \N_PZ_1087_MC.D2_PT_2_1190  (
    .I0(\U1/U6/CurrState_Sreg0_FFD2 ),
    .I1(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_2/IN1 ),
    .I2(N_PZ_1104),
    .O(\N_PZ_1087_MC.D2_PT_2 )
  );
  X_AND4 \N_PZ_1087_MC.D2_PT_3_1191  (
    .I0(\U1/U6/CurrState_Sreg0_FFD3 ),
    .I1(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_3/IN3 ),
    .O(\N_PZ_1087_MC.D2_PT_3 )
  );
  X_OR4 \N_PZ_1087_MC.D2_1192  (
    .I0(\N_PZ_1087_MC.D2_PT_0 ),
    .I1(\N_PZ_1087_MC.D2_PT_1 ),
    .I2(\N_PZ_1087_MC.D2_PT_2 ),
    .I3(\N_PZ_1087_MC.D2_PT_3 ),
    .O(\N_PZ_1087_MC.D2 )
  );
  X_BUF \U1/NET3720_1193  (
    .I(\U1/NET3720_MC.Q ),
    .O(\U1/NET3720 )
  );
  X_FF \U1/NET3720_MC.REG  (
    .I(\U1/NET3720_MC.D ),
    .CE(Vcc),
    .CLK(\U1/NET3720_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/NET3720_MC.Q )
  );
  X_INV \U1/NET3720_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1194  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/NET3720_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/NET3720_MC.D_1195  (
    .I0(\U1/NET3720_MC.D1 ),
    .I1(\U1/NET3720_MC.D2 ),
    .O(\U1/NET3720_MC.D )
  );
  X_ZERO \U1/NET3720_MC.D1_1196  (
    .O(\U1/NET3720_MC.D1 )
  );
  X_AND3 \U1/NET3720_MC.D2_PT_0_1197  (
    .I0(\NlwInverterSignal_U1/NET3720_MC.D2_PT_0/IN0 ),
    .I1(\AD<7>_II/UIM ),
    .I2(DCORENCCTLw),
    .O(\U1/NET3720_MC.D2_PT_0 )
  );
  X_AND3 \U1/NET3720_MC.D2_PT_1_1198  (
    .I0(\NlwInverterSignal_U1/NET3720_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/NET3720_MC.D2_PT_1/IN1 ),
    .I2(\U1/NET3720 ),
    .O(\U1/NET3720_MC.D2_PT_1 )
  );
  X_OR2 \U1/NET3720_MC.D2_1199  (
    .I0(\U1/NET3720_MC.D2_PT_0 ),
    .I1(\U1/NET3720_MC.D2_PT_1 ),
    .O(\U1/NET3720_MC.D2 )
  );
  X_BUF N_PZ_1104_1200 (
    .I(\N_PZ_1104_MC.Q ),
    .O(N_PZ_1104)
  );
  X_BUF \N_PZ_1104_MC.Q_1201  (
    .I(\N_PZ_1104_MC.D ),
    .O(\N_PZ_1104_MC.Q )
  );
  X_XOR2 \N_PZ_1104_MC.D_1202  (
    .I0(\N_PZ_1104_MC.D1 ),
    .I1(\N_PZ_1104_MC.D2 ),
    .O(\N_PZ_1104_MC.D )
  );
  X_ZERO \N_PZ_1104_MC.D1_1203  (
    .O(\N_PZ_1104_MC.D1 )
  );
  X_AND2 \N_PZ_1104_MC.D2_PT_0_1204  (
    .I0(\U1/U6/CurrState_Sreg0_FFD4 ),
    .I1(\U1/NET3720 ),
    .O(\N_PZ_1104_MC.D2_PT_0 )
  );
  X_AND2 \N_PZ_1104_MC.D2_PT_1_1205  (
    .I0(\NlwInverterSignal_N_PZ_1104_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1104_MC.D2_PT_1/IN1 ),
    .O(\N_PZ_1104_MC.D2_PT_1 )
  );
  X_OR2 \N_PZ_1104_MC.D2_1206  (
    .I0(\N_PZ_1104_MC.D2_PT_0 ),
    .I1(\N_PZ_1104_MC.D2_PT_1 ),
    .O(\N_PZ_1104_MC.D2 )
  );
  X_BUF \U1/Channel1<1>  (
    .I(\U1/Channel1<1>_MC.Q ),
    .O(\U1/Channel1 [1])
  );
  X_XOR2 \U1/Channel1<1>_MC_tsimcreated_xor__1207  (
    .I0(\U1/Channel1<1>_MC.D ),
    .I1(\U1/Channel1<1>_MC.Q ),
    .O(\U1/Channel1<1>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<1>_MC.REG  (
    .I(\U1/Channel1<1>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<1>_MC.Q )
  );
  X_XOR2 \U1/Channel1<1>_MC.D_1208  (
    .I0(\U1/Channel1<1>_MC.D1 ),
    .I1(\U1/Channel1<1>_MC.D2 ),
    .O(\U1/Channel1<1>_MC.D )
  );
  X_ZERO \U1/Channel1<1>_MC.D1_1209  (
    .O(\U1/Channel1<1>_MC.D1 )
  );
  X_AND2 \U1/Channel1<1>_MC.D2_PT_0_1210  (
    .I0(\NlwInverterSignal_U1/Channel1<1>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [1]),
    .O(\U1/Channel1<1>_MC.D2_PT_0 )
  );
  X_AND4 \U1/Channel1<1>_MC.D2_PT_1_1211  (
    .I0(\U1/Channel1 [0]),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .I3(\NlwInverterSignal_U1/Channel1<1>_MC.D2_PT_1/IN3 ),
    .O(\U1/Channel1<1>_MC.D2_PT_1 )
  );
  X_AND4 \U1/Channel1<1>_MC.D2_PT_2_1212  (
    .I0(\NlwInverterSignal_U1/Channel1<1>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .I3(N_PZ_1104),
    .O(\U1/Channel1<1>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<1>_MC.D2_1213  (
    .I0(\U1/Channel1<1>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<1>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<1>_MC.D2_PT_2 ),
    .O(\U1/Channel1<1>_MC.D2 )
  );
  X_BUF \U1/Channel1<2>  (
    .I(\U1/Channel1<2>_MC.Q ),
    .O(\U1/Channel1 [2])
  );
  X_XOR2 \U1/Channel1<2>_MC_tsimcreated_xor__1214  (
    .I0(\U1/Channel1<2>_MC.D ),
    .I1(\U1/Channel1<2>_MC.Q ),
    .O(\U1/Channel1<2>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<2>_MC.REG  (
    .I(\U1/Channel1<2>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<2>_MC.Q )
  );
  X_XOR2 \U1/Channel1<2>_MC.D_1215  (
    .I0(\U1/Channel1<2>_MC.D1 ),
    .I1(\U1/Channel1<2>_MC.D2 ),
    .O(\U1/Channel1<2>_MC.D )
  );
  X_ZERO \U1/Channel1<2>_MC.D1_1216  (
    .O(\U1/Channel1<2>_MC.D1 )
  );
  X_AND2 \U1/Channel1<2>_MC.D2_PT_0_1217  (
    .I0(\NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [2]),
    .O(\U1/Channel1<2>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel1<2>_MC.D2_PT_1_1218  (
    .I0(\U1/Channel1 [0]),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .I3(\NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_1/IN3 ),
    .I4(\U1/Channel1 [1]),
    .O(\U1/Channel1<2>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel1<2>_MC.D2_PT_2_1219  (
    .I0(\NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .I3(N_PZ_1104),
    .I4(\NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_2/IN4 ),
    .O(\U1/Channel1<2>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<2>_MC.D2_1220  (
    .I0(\U1/Channel1<2>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<2>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<2>_MC.D2_PT_2 ),
    .O(\U1/Channel1<2>_MC.D2 )
  );
  X_BUF \U1/Channel1<3>  (
    .I(\U1/Channel1<3>_MC.Q ),
    .O(\U1/Channel1 [3])
  );
  X_XOR2 \U1/Channel1<3>_MC_tsimcreated_xor__1221  (
    .I0(\U1/Channel1<3>_MC.D ),
    .I1(\U1/Channel1<3>_MC.Q ),
    .O(\U1/Channel1<3>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<3>_MC.REG  (
    .I(\U1/Channel1<3>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<3>_MC.Q )
  );
  X_XOR2 \U1/Channel1<3>_MC.D_1222  (
    .I0(\U1/Channel1<3>_MC.D1 ),
    .I1(\U1/Channel1<3>_MC.D2 ),
    .O(\U1/Channel1<3>_MC.D )
  );
  X_ZERO \U1/Channel1<3>_MC.D1_1223  (
    .O(\U1/Channel1<3>_MC.D1 )
  );
  X_AND2 \U1/Channel1<3>_MC.D2_PT_0_1224  (
    .I0(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [3]),
    .O(\U1/Channel1<3>_MC.D2_PT_0 )
  );
  X_AND6 \U1/Channel1<3>_MC.D2_PT_1_1225  (
    .I0(\U1/Channel1 [0]),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .I3(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_1/IN3 ),
    .I4(\U1/Channel1 [1]),
    .I5(\U1/Channel1 [2]),
    .O(\U1/Channel1<3>_MC.D2_PT_1 )
  );
  X_AND6 \U1/Channel1<3>_MC.D2_PT_2_1226  (
    .I0(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .I3(N_PZ_1104),
    .I4(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_2/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_2/IN5 ),
    .O(\U1/Channel1<3>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<3>_MC.D2_1227  (
    .I0(\U1/Channel1<3>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<3>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<3>_MC.D2_PT_2 ),
    .O(\U1/Channel1<3>_MC.D2 )
  );
  X_BUF \U1/Channel1<4>  (
    .I(\U1/Channel1<4>_MC.Q ),
    .O(\U1/Channel1 [4])
  );
  X_FF \U1/Channel1<4>_MC.REG  (
    .I(\U1/Channel1<4>_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<4>_MC.Q )
  );
  X_XOR2 \U1/Channel1<4>_MC.D_1228  (
    .I0(\U1/Channel1<4>_MC.D1 ),
    .I1(\U1/Channel1<4>_MC.D2 ),
    .O(\U1/Channel1<4>_MC.D )
  );
  X_AND2 \U1/Channel1<4>_MC.D1_1229  (
    .I0(\U1/Channel1 [4]),
    .I1(\U1/Channel1 [4]),
    .O(\U1/Channel1<4>_MC.D1 )
  );
  X_AND2 \U1/Channel1<4>_MC.D2_PT_0_1230  (
    .I0(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [4]),
    .O(\U1/Channel1<4>_MC.D2_PT_0 )
  );
  X_AND4 \U1/Channel1<4>_MC.D2_PT_1_1231  (
    .I0(N_PZ_1187),
    .I1(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_1/IN1 ),
    .I2(N_PZ_1327),
    .I3(\U1/Channel1 [4]),
    .O(\U1/Channel1<4>_MC.D2_PT_1 )
  );
  X_AND7 \U1/Channel1<4>_MC.D2_PT_2_1232  (
    .I0(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .I3(N_PZ_1104),
    .I4(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN6 ),
    .O(\U1/Channel1<4>_MC.D2_PT_2 )
  );
  X_AND16 \U1/Channel1<4>_MC.D2_PT_3_1233  (
    .I0(\U1/Channel1 [0]),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .I3(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_3/IN4 ),
    .I5(\U1/Channel1 [1]),
    .I6(\U1/Channel1 [2]),
    .I7(\U1/Channel1 [3]),
    .I8(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_3/IN8 ),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<4>_MC.D2_PT_3 )
  );
  X_OR4 \U1/Channel1<4>_MC.D2_1234  (
    .I0(\U1/Channel1<4>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<4>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<4>_MC.D2_PT_2 ),
    .I3(\U1/Channel1<4>_MC.D2_PT_3 ),
    .O(\U1/Channel1<4>_MC.D2 )
  );
  X_BUF N_PZ_1327_1235 (
    .I(\N_PZ_1327_MC.Q ),
    .O(N_PZ_1327)
  );
  X_BUF \N_PZ_1327_MC.Q_1236  (
    .I(\N_PZ_1327_MC.D ),
    .O(\N_PZ_1327_MC.Q )
  );
  X_XOR2 \N_PZ_1327_MC.D_1237  (
    .I0(\N_PZ_1327_MC.D1 ),
    .I1(\N_PZ_1327_MC.D2 ),
    .O(\N_PZ_1327_MC.D )
  );
  X_AND5 \N_PZ_1327_MC.D1_1238  (
    .I0(\U1/Channel1 [0]),
    .I1(\U1/Channel1 [1]),
    .I2(\U1/Channel1 [2]),
    .I3(\U1/Channel1 [3]),
    .I4(\U1/Channel1 [4]),
    .O(\N_PZ_1327_MC.D1 )
  );
  X_ZERO \N_PZ_1327_MC.D2_1239  (
    .O(\N_PZ_1327_MC.D2 )
  );
  X_BUF \U1/Channel1<5>  (
    .I(\U1/Channel1<5>_MC.Q ),
    .O(\U1/Channel1 [5])
  );
  X_XOR2 \U1/Channel1<5>_MC_tsimcreated_xor__1240  (
    .I0(\U1/Channel1<5>_MC.D ),
    .I1(\U1/Channel1<5>_MC.Q ),
    .O(\U1/Channel1<5>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<5>_MC.REG  (
    .I(\U1/Channel1<5>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<5>_MC.Q )
  );
  X_XOR2 \U1/Channel1<5>_MC.D_1241  (
    .I0(\U1/Channel1<5>_MC.D1 ),
    .I1(\U1/Channel1<5>_MC.D2 ),
    .O(\U1/Channel1<5>_MC.D )
  );
  X_ZERO \U1/Channel1<5>_MC.D1_1242  (
    .O(\U1/Channel1<5>_MC.D1 )
  );
  X_AND2 \U1/Channel1<5>_MC.D2_PT_0_1243  (
    .I0(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [5]),
    .O(\U1/Channel1<5>_MC.D2_PT_0 )
  );
  X_AND4 \U1/Channel1<5>_MC.D2_PT_1_1244  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_1/IN2 ),
    .I3(N_PZ_1327),
    .O(\U1/Channel1<5>_MC.D2_PT_1 )
  );
  X_AND8 \U1/Channel1<5>_MC.D2_PT_2_1245  (
    .I0(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN0 ),
    .I1(N_PZ_1073),
    .I2(N_PZ_1187),
    .I3(N_PZ_1104),
    .I4(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN7 ),
    .O(\U1/Channel1<5>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<5>_MC.D2_1246  (
    .I0(\U1/Channel1<5>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<5>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<5>_MC.D2_PT_2 ),
    .O(\U1/Channel1<5>_MC.D2 )
  );
  X_BUF \U1/Channel1<6>  (
    .I(\U1/Channel1<6>_MC.Q ),
    .O(\U1/Channel1 [6])
  );
  X_XOR2 \U1/Channel1<6>_MC_tsimcreated_xor__1247  (
    .I0(\U1/Channel1<6>_MC.D ),
    .I1(\U1/Channel1<6>_MC.Q ),
    .O(\U1/Channel1<6>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<6>_MC.REG  (
    .I(\U1/Channel1<6>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<6>_MC.Q )
  );
  X_XOR2 \U1/Channel1<6>_MC.D_1248  (
    .I0(\U1/Channel1<6>_MC.D1 ),
    .I1(\U1/Channel1<6>_MC.D2 ),
    .O(\U1/Channel1<6>_MC.D )
  );
  X_ZERO \U1/Channel1<6>_MC.D1_1249  (
    .O(\U1/Channel1<6>_MC.D1 )
  );
  X_AND2 \U1/Channel1<6>_MC.D2_PT_0_1250  (
    .I0(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [6]),
    .O(\U1/Channel1<6>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel1<6>_MC.D2_PT_1_1251  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .I3(N_PZ_1104),
    .I4(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_1/IN4 ),
    .O(\U1/Channel1<6>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel1<6>_MC.D2_PT_2_1252  (
    .I0(N_PZ_1187),
    .I1(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_2/IN3 ),
    .I4(\U1/Channel1 [6]),
    .O(\U1/Channel1<6>_MC.D2_PT_2 )
  );
  X_AND5 \U1/Channel1<6>_MC.D2_PT_3_1253  (
    .I0(N_PZ_1187),
    .I1(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_3/IN2 ),
    .I3(\U1/Channel1 [5]),
    .I4(\U1/Channel1 [6]),
    .O(\U1/Channel1<6>_MC.D2_PT_3 )
  );
  X_AND6 \U1/Channel1<6>_MC.D2_PT_4_1254  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .I3(N_PZ_1327),
    .I4(\U1/Channel1 [5]),
    .I5(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_4/IN5 ),
    .O(\U1/Channel1<6>_MC.D2_PT_4 )
  );
  X_AND16 \U1/Channel1<6>_MC.D2_PT_5_1255  (
    .I0(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN0 ),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN3 ),
    .I4(\U1/Channel1 [6]),
    .I5(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN8 ),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<6>_MC.D2_PT_5 )
  );
  X_OR6 \U1/Channel1<6>_MC.D2_1256  (
    .I0(\U1/Channel1<6>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<6>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<6>_MC.D2_PT_2 ),
    .I3(\U1/Channel1<6>_MC.D2_PT_3 ),
    .I4(\U1/Channel1<6>_MC.D2_PT_4 ),
    .I5(\U1/Channel1<6>_MC.D2_PT_5 ),
    .O(\U1/Channel1<6>_MC.D2 )
  );
  X_BUF N_PZ_1110_1257 (
    .I(\N_PZ_1110_MC.Q ),
    .O(N_PZ_1110)
  );
  X_BUF \N_PZ_1110_MC.Q_1258  (
    .I(\N_PZ_1110_MC.D ),
    .O(\N_PZ_1110_MC.Q )
  );
  X_XOR2 \N_PZ_1110_MC.D_1259  (
    .I0(\N_PZ_1110_MC.D1 ),
    .I1(\N_PZ_1110_MC.D2 ),
    .O(\N_PZ_1110_MC.D )
  );
  X_AND4 \N_PZ_1110_MC.D1_1260  (
    .I0(\NlwInverterSignal_N_PZ_1110_MC.D1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1110_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_N_PZ_1110_MC.D1/IN2 ),
    .I3(\NlwInverterSignal_N_PZ_1110_MC.D1/IN3 ),
    .O(\N_PZ_1110_MC.D1 )
  );
  X_ZERO \N_PZ_1110_MC.D2_1261  (
    .O(\N_PZ_1110_MC.D2 )
  );
  X_BUF DCOR1THRESMIDr_1262 (
    .I(\DCOR1THRESMIDr_MC.Q ),
    .O(DCOR1THRESMIDr)
  );
  X_BUF \DCOR1THRESMIDr_MC.Q_1263  (
    .I(\DCOR1THRESMIDr_MC.D ),
    .O(\DCOR1THRESMIDr_MC.Q )
  );
  X_XOR2 \DCOR1THRESMIDr_MC.D_1264  (
    .I0(\DCOR1THRESMIDr_MC.D1 ),
    .I1(\DCOR1THRESMIDr_MC.D2 ),
    .O(\DCOR1THRESMIDr_MC.D )
  );
  X_AND16 \DCOR1THRESMIDr_MC.D1_1265  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN2 ),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR1THRESMIDr_MC.D1 )
  );
  X_ZERO \DCOR1THRESMIDr_MC.D2_1266  (
    .O(\DCOR1THRESMIDr_MC.D2 )
  );
  X_BUF \outDATA<0>\$WA5.UIM_1267  (
    .I(\outDATA<0>\$WA5.UIM_MC.Q ),
    .O(\outDATA<0>\$WA5.UIM )
  );
  X_BUF \outDATA<0>\$WA5.UIM_MC.Q_1268  (
    .I(\outDATA<0>\$WA5.UIM_MC.D ),
    .O(\outDATA<0>\$WA5.UIM_MC.Q )
  );
  X_XOR2 \outDATA<0>\$WA5.UIM_MC.D_1269  (
    .I0(\outDATA<0>\$WA5.UIM_MC.D1 ),
    .I1(\outDATA<0>\$WA5.UIM_MC.D2 ),
    .O(\outDATA<0>\$WA5.UIM_MC.D )
  );
  X_ZERO \outDATA<0>\$WA5.UIM_MC.D1_1270  (
    .O(\outDATA<0>\$WA5.UIM_MC.D1 )
  );
  X_AND2 \outDATA<0>\$WA5.UIM_MC.D2_PT_0_1271  (
    .I0(\U1/U3/holdingreg0 [0]),
    .I1(DCOR0CNTLOWr),
    .O(\outDATA<0>\$WA5.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<0>\$WA5.UIM_MC.D2_PT_1_1272  (
    .I0(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_1/IN0 ),
    .I1(\U1/U3/holdingreg1 [0]),
    .I2(DCOR1CNTLOWr),
    .O(\outDATA<0>\$WA5.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<0>\$WA5.UIM_MC.D2_PT_2_1273  (
    .I0(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_2/IN1 ),
    .I2(\U1/U3/holdingreg0 [8]),
    .I3(DCOR0CNTMIDr),
    .O(\outDATA<0>\$WA5.UIM_MC.D2_PT_2 )
  );
  X_AND5 \outDATA<0>\$WA5.UIM_MC.D2_PT_3_1274  (
    .I0(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN2 ),
    .I3(\U1/U3/holdingreg1 [8]),
    .I4(DCOR1CNTMIDr),
    .O(\outDATA<0>\$WA5.UIM_MC.D2_PT_3 )
  );
  X_AND6 \outDATA<0>\$WA5.UIM_MC.D2_PT_4_1275  (
    .I0(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN2 ),
    .I3(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN3 ),
    .I4(\U1/U3/holdingreg0 [16]),
    .I5(DCOR0CNTHIGHr),
    .O(\outDATA<0>\$WA5.UIM_MC.D2_PT_4 )
  );
  X_AND6 \outDATA<0>\$WA5.UIM_MC.D2_PT_5_1276  (
    .I0(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN3 ),
    .I4(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN4 ),
    .I5(\U1/U3/holdingreg1 [16]),
    .O(\outDATA<0>\$WA5.UIM_MC.D2_PT_5 )
  );
  X_OR6 \outDATA<0>\$WA5.UIM_MC.D2_1277  (
    .I0(\outDATA<0>\$WA5.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<0>\$WA5.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<0>\$WA5.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<0>\$WA5.UIM_MC.D2_PT_3 ),
    .I4(\outDATA<0>\$WA5.UIM_MC.D2_PT_4 ),
    .I5(\outDATA<0>\$WA5.UIM_MC.D2_PT_5 ),
    .O(\outDATA<0>\$WA5.UIM_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<0>  (
    .I(\U1/U3/holdingreg0<0>_MC.Q ),
    .O(\U1/U3/holdingreg0 [0])
  );
  X_FF \U1/U3/holdingreg0<0>_MC.REG  (
    .I(\U1/U3/holdingreg0<0>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<0>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1278  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<0>_MC.D_1279  (
    .I0(\U1/U3/holdingreg0<0>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<0>_MC.D2 ),
    .O(\U1/U3/holdingreg0<0>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<0>_MC.D1_1280  (
    .O(\U1/U3/holdingreg0<0>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<0>_MC.D2_PT_0_1281  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [0]),
    .O(\U1/U3/holdingreg0<0>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<0>_MC.D2_PT_1_1282  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<0>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<0>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [0]),
    .O(\U1/U3/holdingreg0<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<0>_MC.D2_1283  (
    .I0(\U1/U3/holdingreg0<0>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<0>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<0>_MC.D2 )
  );
  X_BUF DCOR0CNTLOWr_1284 (
    .I(\DCOR0CNTLOWr_MC.Q ),
    .O(DCOR0CNTLOWr)
  );
  X_BUF \DCOR0CNTLOWr_MC.Q_1285  (
    .I(\DCOR0CNTLOWr_MC.D ),
    .O(\DCOR0CNTLOWr_MC.Q )
  );
  X_XOR2 \DCOR0CNTLOWr_MC.D_1286  (
    .I0(\DCOR0CNTLOWr_MC.D1 ),
    .I1(\DCOR0CNTLOWr_MC.D2 ),
    .O(\DCOR0CNTLOWr_MC.D )
  );
  X_AND16 \DCOR0CNTLOWr_MC.D1_1287  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN2 ),
    .I3(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR0CNTLOWr_MC.D1 )
  );
  X_ZERO \DCOR0CNTLOWr_MC.D2_1288  (
    .O(\DCOR0CNTLOWr_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<0>  (
    .I(\U1/U3/holdingreg1<0>_MC.Q ),
    .O(\U1/U3/holdingreg1 [0])
  );
  X_FF \U1/U3/holdingreg1<0>_MC.REG  (
    .I(\U1/U3/holdingreg1<0>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<0>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1289  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<0>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<0>_MC.D_1290  (
    .I0(\U1/U3/holdingreg1<0>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<0>_MC.D2 ),
    .O(\U1/U3/holdingreg1<0>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<0>_MC.D1_1291  (
    .O(\U1/U3/holdingreg1<0>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<0>_MC.D2_PT_0_1292  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [0]),
    .O(\U1/U3/holdingreg1<0>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<0>_MC.D2_PT_1_1293  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<0>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<0>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [0]),
    .O(\U1/U3/holdingreg1<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<0>_MC.D2_1294  (
    .I0(\U1/U3/holdingreg1<0>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<0>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<0>_MC.D2 )
  );
  X_BUF DCOR1CNTLOWr_1295 (
    .I(\DCOR1CNTLOWr_MC.Q ),
    .O(DCOR1CNTLOWr)
  );
  X_BUF \DCOR1CNTLOWr_MC.Q_1296  (
    .I(\DCOR1CNTLOWr_MC.D ),
    .O(\DCOR1CNTLOWr_MC.Q )
  );
  X_XOR2 \DCOR1CNTLOWr_MC.D_1297  (
    .I0(\DCOR1CNTLOWr_MC.D1 ),
    .I1(\DCOR1CNTLOWr_MC.D2 ),
    .O(\DCOR1CNTLOWr_MC.D )
  );
  X_AND16 \DCOR1CNTLOWr_MC.D1_1298  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN1 ),
    .I2(U2_ADDR_reg[1]),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR1CNTLOWr_MC.D1 )
  );
  X_ZERO \DCOR1CNTLOWr_MC.D2_1299  (
    .O(\DCOR1CNTLOWr_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<8>  (
    .I(\U1/U3/holdingreg0<8>_MC.Q ),
    .O(\U1/U3/holdingreg0 [8])
  );
  X_FF \U1/U3/holdingreg0<8>_MC.REG  (
    .I(\U1/U3/holdingreg0<8>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<8>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1300  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<8>_MC.D_1301  (
    .I0(\U1/U3/holdingreg0<8>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<8>_MC.D2 ),
    .O(\U1/U3/holdingreg0<8>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<8>_MC.D1_1302  (
    .O(\U1/U3/holdingreg0<8>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<8>_MC.D2_PT_0_1303  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [8]),
    .O(\U1/U3/holdingreg0<8>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<8>_MC.D2_PT_1_1304  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<8>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<8>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [8]),
    .O(\U1/U3/holdingreg0<8>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<8>_MC.D2_1305  (
    .I0(\U1/U3/holdingreg0<8>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<8>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<8>_MC.D2 )
  );
  X_BUF DCOR0CNTMIDr_1306 (
    .I(\DCOR0CNTMIDr_MC.Q ),
    .O(DCOR0CNTMIDr)
  );
  X_BUF \DCOR0CNTMIDr_MC.Q_1307  (
    .I(\DCOR0CNTMIDr_MC.D ),
    .O(\DCOR0CNTMIDr_MC.Q )
  );
  X_XOR2 \DCOR0CNTMIDr_MC.D_1308  (
    .I0(\DCOR0CNTMIDr_MC.D1 ),
    .I1(\DCOR0CNTMIDr_MC.D2 ),
    .O(\DCOR0CNTMIDr_MC.D )
  );
  X_AND16 \DCOR0CNTMIDr_MC.D1_1309  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN2 ),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR0CNTMIDr_MC.D1 )
  );
  X_ZERO \DCOR0CNTMIDr_MC.D2_1310  (
    .O(\DCOR0CNTMIDr_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<8>  (
    .I(\U1/U3/holdingreg1<8>_MC.Q ),
    .O(\U1/U3/holdingreg1 [8])
  );
  X_FF \U1/U3/holdingreg1<8>_MC.REG  (
    .I(\U1/U3/holdingreg1<8>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<8>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1311  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<8>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<8>_MC.D_1312  (
    .I0(\U1/U3/holdingreg1<8>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<8>_MC.D2 ),
    .O(\U1/U3/holdingreg1<8>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<8>_MC.D1_1313  (
    .O(\U1/U3/holdingreg1<8>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<8>_MC.D2_PT_0_1314  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [8]),
    .O(\U1/U3/holdingreg1<8>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<8>_MC.D2_PT_1_1315  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<8>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<8>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [8]),
    .O(\U1/U3/holdingreg1<8>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<8>_MC.D2_1316  (
    .I0(\U1/U3/holdingreg1<8>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<8>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<8>_MC.D2 )
  );
  X_BUF DCOR1CNTMIDr_1317 (
    .I(\DCOR1CNTMIDr_MC.Q ),
    .O(DCOR1CNTMIDr)
  );
  X_BUF \DCOR1CNTMIDr_MC.Q_1318  (
    .I(\DCOR1CNTMIDr_MC.D ),
    .O(\DCOR1CNTMIDr_MC.Q )
  );
  X_XOR2 \DCOR1CNTMIDr_MC.D_1319  (
    .I0(\DCOR1CNTMIDr_MC.D1 ),
    .I1(\DCOR1CNTMIDr_MC.D2 ),
    .O(\DCOR1CNTMIDr_MC.D )
  );
  X_AND16 \DCOR1CNTMIDr_MC.D1_1320  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN2 ),
    .I3(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN8 ),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR1CNTMIDr_MC.D1 )
  );
  X_ZERO \DCOR1CNTMIDr_MC.D2_1321  (
    .O(\DCOR1CNTMIDr_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<16>  (
    .I(\U1/U3/holdingreg0<16>_MC.Q ),
    .O(\U1/U3/holdingreg0 [16])
  );
  X_FF \U1/U3/holdingreg0<16>_MC.REG  (
    .I(\U1/U3/holdingreg0<16>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<16>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<16>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<16>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1322  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<16>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<16>_MC.D_1323  (
    .I0(\U1/U3/holdingreg0<16>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<16>_MC.D2 ),
    .O(\U1/U3/holdingreg0<16>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<16>_MC.D1_1324  (
    .O(\U1/U3/holdingreg0<16>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<16>_MC.D2_PT_0_1325  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [16]),
    .O(\U1/U3/holdingreg0<16>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<16>_MC.D2_PT_1_1326  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<16>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<16>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [16]),
    .O(\U1/U3/holdingreg0<16>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<16>_MC.D2_1327  (
    .I0(\U1/U3/holdingreg0<16>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<16>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<16>_MC.D2 )
  );
  X_BUF \U1/Channel0<16>  (
    .I(\U1/Channel0<16>_MC.Q ),
    .O(\U1/Channel0 [16])
  );
  X_XOR2 \U1/Channel0<16>_MC_tsimcreated_xor__1328  (
    .I0(\U1/Channel0<16>_MC.D ),
    .I1(\U1/Channel0<16>_MC.Q ),
    .O(\U1/Channel0<16>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<16>_MC.REG  (
    .I(\U1/Channel0<16>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<16>_MC.Q )
  );
  X_XOR2 \U1/Channel0<16>_MC.D_1329  (
    .I0(\U1/Channel0<16>_MC.D1 ),
    .I1(\U1/Channel0<16>_MC.D2 ),
    .O(\U1/Channel0<16>_MC.D )
  );
  X_ZERO \U1/Channel0<16>_MC.D1_1330  (
    .O(\U1/Channel0<16>_MC.D1 )
  );
  X_AND2 \U1/Channel0<16>_MC.D2_PT_0_1331  (
    .I0(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [16]),
    .O(\U1/Channel0<16>_MC.D2_PT_0 )
  );
  X_AND7 \U1/Channel0<16>_MC.D2_PT_1_1332  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_1/IN3 ),
    .I4(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I5(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_1/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_1/IN6 ),
    .O(\U1/Channel0<16>_MC.D2_PT_1 )
  );
  X_AND7 \U1/Channel0<16>_MC.D2_PT_2_1333  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel0 [13]),
    .I4(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_2/IN4 ),
    .I5(\U1/Channel0 [14]),
    .I6(\U1/Channel0 [15]),
    .O(\U1/Channel0<16>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<16>_MC.D2_1334  (
    .I0(\U1/Channel0<16>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<16>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<16>_MC.D2_PT_2 ),
    .O(\U1/Channel0<16>_MC.D2 )
  );
  X_BUF \U1/Channel0<13>  (
    .I(\U1/Channel0<13>_MC.Q ),
    .O(\U1/Channel0 [13])
  );
  X_XOR2 \U1/Channel0<13>_MC_tsimcreated_xor__1335  (
    .I0(\U1/Channel0<13>_MC.D ),
    .I1(\U1/Channel0<13>_MC.Q ),
    .O(\U1/Channel0<13>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<13>_MC.REG  (
    .I(\U1/Channel0<13>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<13>_MC.Q )
  );
  X_XOR2 \U1/Channel0<13>_MC.D_1336  (
    .I0(\U1/Channel0<13>_MC.D1 ),
    .I1(\U1/Channel0<13>_MC.D2 ),
    .O(\U1/Channel0<13>_MC.D )
  );
  X_ZERO \U1/Channel0<13>_MC.D1_1337  (
    .O(\U1/Channel0<13>_MC.D1 )
  );
  X_AND2 \U1/Channel0<13>_MC.D2_PT_0_1338  (
    .I0(\NlwInverterSignal_U1/Channel0<13>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [13]),
    .O(\U1/Channel0<13>_MC.D2_PT_0 )
  );
  X_AND4 \U1/Channel0<13>_MC.D2_PT_1_1339  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\U1/Channel0<13>_MC.D2_PT_1 )
  );
  X_AND4 \U1/Channel0<13>_MC.D2_PT_2_1340  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<13>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<13>_MC.D2_PT_2/IN3 ),
    .O(\U1/Channel0<13>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<13>_MC.D2_1341  (
    .I0(\U1/Channel0<13>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<13>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<13>_MC.D2_PT_2 ),
    .O(\U1/Channel0<13>_MC.D2 )
  );
  X_BUF \U1/U2/location_Maddsub__n0000__n0115<0>  (
    .I(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.Q ),
    .O(\U1/U2/location_Maddsub__n0000__n0115 [0])
  );
  X_BUF \U1/U2/location_Maddsub__n0000__n0115<0>_MC.Q_1342  (
    .I(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D ),
    .O(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.Q )
  );
  X_XOR2 \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D_1343  (
    .I0(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D1 ),
    .I1(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2 ),
    .O(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D )
  );
  X_AND2 \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D1_1344  (
    .I0(N_PZ_1086),
    .I1(N_PZ_1086),
    .O(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D1 )
  );
  X_AND8 \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0_1345  (
    .I0(\U1/Channel0 [8]),
    .I1(\U1/Channel0 [7]),
    .I2(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0/IN2 ),
    .I3(N_PZ_1086),
    .I4(\U1/Channel0 [10]),
    .I5(\U1/Channel0 [9]),
    .I6(\U1/Channel0 [11]),
    .I7(\U1/Channel0 [12]),
    .O(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0 )
  );
  X_AND8 \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1_1346  (
    .I0(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .I3(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN4 ),
    .I5(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN5 ),
    .I6(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN7 ),
    .O(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_1347  (
    .I0(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0 ),
    .I1(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1 ),
    .O(\U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2 )
  );
  X_BUF \U1/Channel0<10>  (
    .I(\U1/Channel0<10>_MC.Q ),
    .O(\U1/Channel0 [10])
  );
  X_XOR2 \U1/Channel0<10>_MC_tsimcreated_xor__1348  (
    .I0(\U1/Channel0<10>_MC.D ),
    .I1(\U1/Channel0<10>_MC.Q ),
    .O(\U1/Channel0<10>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<10>_MC.REG  (
    .I(\U1/Channel0<10>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<10>_MC.Q )
  );
  X_XOR2 \U1/Channel0<10>_MC.D_1349  (
    .I0(\U1/Channel0<10>_MC.D1 ),
    .I1(\U1/Channel0<10>_MC.D2 ),
    .O(\U1/Channel0<10>_MC.D )
  );
  X_ZERO \U1/Channel0<10>_MC.D1_1350  (
    .O(\U1/Channel0<10>_MC.D1 )
  );
  X_AND2 \U1/Channel0<10>_MC.D2_PT_0_1351  (
    .I0(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [10]),
    .O(\U1/Channel0<10>_MC.D2_PT_0 )
  );
  X_AND7 \U1/Channel0<10>_MC.D2_PT_1_1352  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\U1/Channel0 [8]),
    .I3(\U1/Channel0 [7]),
    .I4(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_1/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_1/IN5 ),
    .I6(\U1/Channel0 [9]),
    .O(\U1/Channel0<10>_MC.D2_PT_1 )
  );
  X_AND7 \U1/Channel0<10>_MC.D2_PT_2_1353  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_2/IN3 ),
    .I4(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .I5(N_PZ_1090),
    .I6(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_2/IN6 ),
    .O(\U1/Channel0<10>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<10>_MC.D2_1354  (
    .I0(\U1/Channel0<10>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<10>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<10>_MC.D2_PT_2 ),
    .O(\U1/Channel0<10>_MC.D2 )
  );
  X_BUF \U1/Channel0<9>  (
    .I(\U1/Channel0<9>_MC.Q ),
    .O(\U1/Channel0 [9])
  );
  X_XOR2 \U1/Channel0<9>_MC_tsimcreated_xor__1355  (
    .I0(\U1/Channel0<9>_MC.D ),
    .I1(\U1/Channel0<9>_MC.Q ),
    .O(\U1/Channel0<9>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<9>_MC.REG  (
    .I(\U1/Channel0<9>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<9>_MC.Q )
  );
  X_XOR2 \U1/Channel0<9>_MC.D_1356  (
    .I0(\U1/Channel0<9>_MC.D1 ),
    .I1(\U1/Channel0<9>_MC.D2 ),
    .O(\U1/Channel0<9>_MC.D )
  );
  X_ZERO \U1/Channel0<9>_MC.D1_1357  (
    .O(\U1/Channel0<9>_MC.D1 )
  );
  X_AND2 \U1/Channel0<9>_MC.D2_PT_0_1358  (
    .I0(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [9]),
    .O(\U1/Channel0<9>_MC.D2_PT_0 )
  );
  X_AND6 \U1/Channel0<9>_MC.D2_PT_1_1359  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\U1/Channel0 [8]),
    .I3(\U1/Channel0 [7]),
    .I4(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_1/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_1/IN5 ),
    .O(\U1/Channel0<9>_MC.D2_PT_1 )
  );
  X_AND6 \U1/Channel0<9>_MC.D2_PT_2_1360  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_2/IN3 ),
    .I4(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .I5(N_PZ_1090),
    .O(\U1/Channel0<9>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<9>_MC.D2_1361  (
    .I0(\U1/Channel0<9>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<9>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<9>_MC.D2_PT_2 ),
    .O(\U1/Channel0<9>_MC.D2 )
  );
  X_BUF \U1/Channel0<11>  (
    .I(\U1/Channel0<11>_MC.Q ),
    .O(\U1/Channel0 [11])
  );
  X_XOR2 \U1/Channel0<11>_MC_tsimcreated_xor__1362  (
    .I0(\U1/Channel0<11>_MC.D ),
    .I1(\U1/Channel0<11>_MC.Q ),
    .O(\U1/Channel0<11>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<11>_MC.REG  (
    .I(\U1/Channel0<11>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<11>_MC.Q )
  );
  X_XOR2 \U1/Channel0<11>_MC.D_1363  (
    .I0(\U1/Channel0<11>_MC.D1 ),
    .I1(\U1/Channel0<11>_MC.D2 ),
    .O(\U1/Channel0<11>_MC.D )
  );
  X_ZERO \U1/Channel0<11>_MC.D1_1364  (
    .O(\U1/Channel0<11>_MC.D1 )
  );
  X_AND2 \U1/Channel0<11>_MC.D2_PT_0_1365  (
    .I0(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [11]),
    .O(\U1/Channel0<11>_MC.D2_PT_0 )
  );
  X_AND8 \U1/Channel0<11>_MC.D2_PT_1_1366  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\U1/Channel0 [8]),
    .I3(\U1/Channel0 [7]),
    .I4(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_1/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_1/IN5 ),
    .I6(\U1/Channel0 [10]),
    .I7(\U1/Channel0 [9]),
    .O(\U1/Channel0<11>_MC.D2_PT_1 )
  );
  X_AND8 \U1/Channel0<11>_MC.D2_PT_2_1367  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN3 ),
    .I4(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .I5(N_PZ_1090),
    .I6(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN7 ),
    .O(\U1/Channel0<11>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<11>_MC.D2_1368  (
    .I0(\U1/Channel0<11>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<11>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<11>_MC.D2_PT_2 ),
    .O(\U1/Channel0<11>_MC.D2 )
  );
  X_BUF \U1/Channel0<12>  (
    .I(\U1/Channel0<12>_MC.Q ),
    .O(\U1/Channel0 [12])
  );
  X_XOR2 \U1/Channel0<12>_MC_tsimcreated_xor__1369  (
    .I0(\U1/Channel0<12>_MC.D ),
    .I1(\U1/Channel0<12>_MC.Q ),
    .O(\U1/Channel0<12>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<12>_MC.REG  (
    .I(\U1/Channel0<12>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<12>_MC.Q )
  );
  X_XOR2 \U1/Channel0<12>_MC.D_1370  (
    .I0(\U1/Channel0<12>_MC.D1 ),
    .I1(\U1/Channel0<12>_MC.D2 ),
    .O(\U1/Channel0<12>_MC.D )
  );
  X_ZERO \U1/Channel0<12>_MC.D1_1371  (
    .O(\U1/Channel0<12>_MC.D1 )
  );
  X_AND2 \U1/Channel0<12>_MC.D2_PT_0_1372  (
    .I0(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [12]),
    .O(\U1/Channel0<12>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel0<12>_MC.D2_PT_1_1373  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I4(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_1/IN4 ),
    .O(\U1/Channel0<12>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel0<12>_MC.D2_PT_2_1374  (
    .I0(N_PZ_1132),
    .I1(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_2/IN3 ),
    .I4(\U1/Channel0 [12]),
    .O(\U1/Channel0<12>_MC.D2_PT_2 )
  );
  X_AND16 \U1/Channel0<12>_MC.D2_PT_3_1375  (
    .I0(N_PZ_1132),
    .I1(\U1/Channel0 [8]),
    .I2(\U1/Channel0 [7]),
    .I3(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_3/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_3/IN5 ),
    .I6(\U1/Channel0 [10]),
    .I7(\U1/Channel0 [9]),
    .I8(\U1/Channel0 [12]),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<12>_MC.D2_PT_3 )
  );
  X_AND16 \U1/Channel0<12>_MC.D2_PT_4_1376  (
    .I0(N_PZ_1132),
    .I1(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN2 ),
    .I3(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .I4(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN7 ),
    .I8(\U1/Channel0 [12]),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<12>_MC.D2_PT_4 )
  );
  X_AND16 \U1/Channel0<12>_MC.D2_PT_5_1377  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\U1/Channel0 [8]),
    .I3(\U1/Channel0 [7]),
    .I4(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_5/IN4 ),
    .I5(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I6(\U1/Channel0 [10]),
    .I7(\U1/Channel0 [9]),
    .I8(\U1/Channel0 [11]),
    .I9(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_5/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<12>_MC.D2_PT_5 )
  );
  X_OR6 \U1/Channel0<12>_MC.D2_1378  (
    .I0(\U1/Channel0<12>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<12>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<12>_MC.D2_PT_2 ),
    .I3(\U1/Channel0<12>_MC.D2_PT_3 ),
    .I4(\U1/Channel0<12>_MC.D2_PT_4 ),
    .I5(\U1/Channel0<12>_MC.D2_PT_5 ),
    .O(\U1/Channel0<12>_MC.D2 )
  );
  X_BUF \U1/Channel0<14>  (
    .I(\U1/Channel0<14>_MC.Q ),
    .O(\U1/Channel0 [14])
  );
  X_XOR2 \U1/Channel0<14>_MC_tsimcreated_xor__1379  (
    .I0(\U1/Channel0<14>_MC.D ),
    .I1(\U1/Channel0<14>_MC.Q ),
    .O(\U1/Channel0<14>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<14>_MC.REG  (
    .I(\U1/Channel0<14>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<14>_MC.Q )
  );
  X_XOR2 \U1/Channel0<14>_MC.D_1380  (
    .I0(\U1/Channel0<14>_MC.D1 ),
    .I1(\U1/Channel0<14>_MC.D2 ),
    .O(\U1/Channel0<14>_MC.D )
  );
  X_ZERO \U1/Channel0<14>_MC.D1_1381  (
    .O(\U1/Channel0<14>_MC.D1 )
  );
  X_AND2 \U1/Channel0<14>_MC.D2_PT_0_1382  (
    .I0(\NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [14]),
    .O(\U1/Channel0<14>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel0<14>_MC.D2_PT_1_1383  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_1/IN3 ),
    .I4(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\U1/Channel0<14>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel0<14>_MC.D2_PT_2_1384  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel0 [13]),
    .I4(\NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_2/IN4 ),
    .O(\U1/Channel0<14>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<14>_MC.D2_1385  (
    .I0(\U1/Channel0<14>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<14>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<14>_MC.D2_PT_2 ),
    .O(\U1/Channel0<14>_MC.D2 )
  );
  X_BUF \U1/Channel0<15>  (
    .I(\U1/Channel0<15>_MC.Q ),
    .O(\U1/Channel0 [15])
  );
  X_XOR2 \U1/Channel0<15>_MC_tsimcreated_xor__1386  (
    .I0(\U1/Channel0<15>_MC.D ),
    .I1(\U1/Channel0<15>_MC.Q ),
    .O(\U1/Channel0<15>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<15>_MC.REG  (
    .I(\U1/Channel0<15>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<15>_MC.Q )
  );
  X_XOR2 \U1/Channel0<15>_MC.D_1387  (
    .I0(\U1/Channel0<15>_MC.D1 ),
    .I1(\U1/Channel0<15>_MC.D2 ),
    .O(\U1/Channel0<15>_MC.D )
  );
  X_ZERO \U1/Channel0<15>_MC.D1_1388  (
    .O(\U1/Channel0<15>_MC.D1 )
  );
  X_AND2 \U1/Channel0<15>_MC.D2_PT_0_1389  (
    .I0(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [15]),
    .O(\U1/Channel0<15>_MC.D2_PT_0 )
  );
  X_AND6 \U1/Channel0<15>_MC.D2_PT_1_1390  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_1/IN3 ),
    .I4(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I5(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_1/IN5 ),
    .O(\U1/Channel0<15>_MC.D2_PT_1 )
  );
  X_AND6 \U1/Channel0<15>_MC.D2_PT_2_1391  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel0 [13]),
    .I4(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_2/IN4 ),
    .I5(\U1/Channel0 [14]),
    .O(\U1/Channel0<15>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<15>_MC.D2_1392  (
    .I0(\U1/Channel0<15>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<15>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<15>_MC.D2_PT_2 ),
    .O(\U1/Channel0<15>_MC.D2 )
  );
  X_BUF DCOR0CNTHIGHr_1393 (
    .I(\DCOR0CNTHIGHr_MC.Q ),
    .O(DCOR0CNTHIGHr)
  );
  X_BUF \DCOR0CNTHIGHr_MC.Q_1394  (
    .I(\DCOR0CNTHIGHr_MC.D ),
    .O(\DCOR0CNTHIGHr_MC.Q )
  );
  X_XOR2 \DCOR0CNTHIGHr_MC.D_1395  (
    .I0(\DCOR0CNTHIGHr_MC.D1 ),
    .I1(\DCOR0CNTHIGHr_MC.D2 ),
    .O(\DCOR0CNTHIGHr_MC.D )
  );
  X_AND16 \DCOR0CNTHIGHr_MC.D1_1396  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN1 ),
    .I2(U2_ADDR_reg[1]),
    .I3(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN7 ),
    .I8(U2_ADDR_reg[2]),
    .I9(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR0CNTHIGHr_MC.D1 )
  );
  X_ZERO \DCOR0CNTHIGHr_MC.D2_1397  (
    .O(\DCOR0CNTHIGHr_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<16>  (
    .I(\U1/U3/holdingreg1<16>_MC.Q ),
    .O(\U1/U3/holdingreg1 [16])
  );
  X_FF \U1/U3/holdingreg1<16>_MC.REG  (
    .I(\U1/U3/holdingreg1<16>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<16>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<16>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<16>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1398  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<16>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<16>_MC.D_1399  (
    .I0(\U1/U3/holdingreg1<16>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<16>_MC.D2 ),
    .O(\U1/U3/holdingreg1<16>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<16>_MC.D1_1400  (
    .O(\U1/U3/holdingreg1<16>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<16>_MC.D2_PT_0_1401  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [16]),
    .O(\U1/U3/holdingreg1<16>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<16>_MC.D2_PT_1_1402  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<16>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<16>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [16]),
    .O(\U1/U3/holdingreg1<16>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<16>_MC.D2_1403  (
    .I0(\U1/U3/holdingreg1<16>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<16>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<16>_MC.D2 )
  );
  X_BUF \U1/Channel1<16>  (
    .I(\U1/Channel1<16>_MC.Q ),
    .O(\U1/Channel1 [16])
  );
  X_XOR2 \U1/Channel1<16>_MC_tsimcreated_xor__1404  (
    .I0(\U1/Channel1<16>_MC.D ),
    .I1(\U1/Channel1<16>_MC.Q ),
    .O(\U1/Channel1<16>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<16>_MC.REG  (
    .I(\U1/Channel1<16>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<16>_MC.Q )
  );
  X_XOR2 \U1/Channel1<16>_MC.D_1405  (
    .I0(\U1/Channel1<16>_MC.D1 ),
    .I1(\U1/Channel1<16>_MC.D2 ),
    .O(\U1/Channel1<16>_MC.D )
  );
  X_ZERO \U1/Channel1<16>_MC.D1_1406  (
    .O(\U1/Channel1<16>_MC.D1 )
  );
  X_AND2 \U1/Channel1<16>_MC.D2_PT_0_1407  (
    .I0(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [16]),
    .O(\U1/Channel1<16>_MC.D2_PT_0 )
  );
  X_AND7 \U1/Channel1<16>_MC.D2_PT_1_1408  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_1/IN3 ),
    .I4(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I5(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_1/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_1/IN6 ),
    .O(\U1/Channel1<16>_MC.D2_PT_1 )
  );
  X_AND7 \U1/Channel1<16>_MC.D2_PT_2_1409  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [13]),
    .I4(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_2/IN4 ),
    .I5(\U1/Channel1 [14]),
    .I6(\U1/Channel1 [15]),
    .O(\U1/Channel1<16>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<16>_MC.D2_1410  (
    .I0(\U1/Channel1<16>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<16>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<16>_MC.D2_PT_2 ),
    .O(\U1/Channel1<16>_MC.D2 )
  );
  X_BUF \U1/Channel1<13>  (
    .I(\U1/Channel1<13>_MC.Q ),
    .O(\U1/Channel1 [13])
  );
  X_XOR2 \U1/Channel1<13>_MC_tsimcreated_xor__1411  (
    .I0(\U1/Channel1<13>_MC.D ),
    .I1(\U1/Channel1<13>_MC.Q ),
    .O(\U1/Channel1<13>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<13>_MC.REG  (
    .I(\U1/Channel1<13>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<13>_MC.Q )
  );
  X_XOR2 \U1/Channel1<13>_MC.D_1412  (
    .I0(\U1/Channel1<13>_MC.D1 ),
    .I1(\U1/Channel1<13>_MC.D2 ),
    .O(\U1/Channel1<13>_MC.D )
  );
  X_ZERO \U1/Channel1<13>_MC.D1_1413  (
    .O(\U1/Channel1<13>_MC.D1 )
  );
  X_AND2 \U1/Channel1<13>_MC.D2_PT_0_1414  (
    .I0(\NlwInverterSignal_U1/Channel1<13>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [13]),
    .O(\U1/Channel1<13>_MC.D2_PT_0 )
  );
  X_AND4 \U1/Channel1<13>_MC.D2_PT_1_1415  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\U1/Channel1<13>_MC.D2_PT_1 )
  );
  X_AND4 \U1/Channel1<13>_MC.D2_PT_2_1416  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<13>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel1<13>_MC.D2_PT_2/IN3 ),
    .O(\U1/Channel1<13>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<13>_MC.D2_1417  (
    .I0(\U1/Channel1<13>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<13>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<13>_MC.D2_PT_2 ),
    .O(\U1/Channel1<13>_MC.D2 )
  );
  X_BUF \U1/U5/location_Maddsub__n0000__n0115<0>  (
    .I(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.Q ),
    .O(\U1/U5/location_Maddsub__n0000__n0115 [0])
  );
  X_BUF \U1/U5/location_Maddsub__n0000__n0115<0>_MC.Q_1418  (
    .I(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D ),
    .O(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.Q )
  );
  X_XOR2 \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D_1419  (
    .I0(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D1 ),
    .I1(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2 ),
    .O(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D )
  );
  X_AND2 \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D1_1420  (
    .I0(N_PZ_1087),
    .I1(N_PZ_1087),
    .O(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D1 )
  );
  X_AND4 \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0_1421  (
    .I0(N_PZ_1087),
    .I1(\U1/Channel1 [11]),
    .I2(N_PZ_1154),
    .I3(\U1/Channel1 [12]),
    .O(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0 )
  );
  X_AND8 \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1_1422  (
    .I0(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .I3(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN4 ),
    .I5(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN5 ),
    .I6(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN7 ),
    .O(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_1423  (
    .I0(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0 ),
    .I1(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1 ),
    .O(\U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2 )
  );
  X_BUF \U1/Channel1<10>  (
    .I(\U1/Channel1<10>_MC.Q ),
    .O(\U1/Channel1 [10])
  );
  X_XOR2 \U1/Channel1<10>_MC_tsimcreated_xor__1424  (
    .I0(\U1/Channel1<10>_MC.D ),
    .I1(\U1/Channel1<10>_MC.Q ),
    .O(\U1/Channel1<10>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<10>_MC.REG  (
    .I(\U1/Channel1<10>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<10>_MC.Q )
  );
  X_XOR2 \U1/Channel1<10>_MC.D_1425  (
    .I0(\U1/Channel1<10>_MC.D1 ),
    .I1(\U1/Channel1<10>_MC.D2 ),
    .O(\U1/Channel1<10>_MC.D )
  );
  X_ZERO \U1/Channel1<10>_MC.D1_1426  (
    .O(\U1/Channel1<10>_MC.D1 )
  );
  X_AND2 \U1/Channel1<10>_MC.D2_PT_0_1427  (
    .I0(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [10]),
    .O(\U1/Channel1<10>_MC.D2_PT_0 )
  );
  X_AND7 \U1/Channel1<10>_MC.D2_PT_1_1428  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\U1/Channel1 [8]),
    .I3(\U1/Channel1 [7]),
    .I4(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_1/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_1/IN5 ),
    .I6(\U1/Channel1 [9]),
    .O(\U1/Channel1<10>_MC.D2_PT_1 )
  );
  X_AND7 \U1/Channel1<10>_MC.D2_PT_2_1429  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_2/IN3 ),
    .I4(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .I5(N_PZ_1104),
    .I6(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_2/IN6 ),
    .O(\U1/Channel1<10>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<10>_MC.D2_1430  (
    .I0(\U1/Channel1<10>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<10>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<10>_MC.D2_PT_2 ),
    .O(\U1/Channel1<10>_MC.D2 )
  );
  X_BUF \U1/Channel1<9>  (
    .I(\U1/Channel1<9>_MC.Q ),
    .O(\U1/Channel1 [9])
  );
  X_XOR2 \U1/Channel1<9>_MC_tsimcreated_xor__1431  (
    .I0(\U1/Channel1<9>_MC.D ),
    .I1(\U1/Channel1<9>_MC.Q ),
    .O(\U1/Channel1<9>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<9>_MC.REG  (
    .I(\U1/Channel1<9>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<9>_MC.Q )
  );
  X_XOR2 \U1/Channel1<9>_MC.D_1432  (
    .I0(\U1/Channel1<9>_MC.D1 ),
    .I1(\U1/Channel1<9>_MC.D2 ),
    .O(\U1/Channel1<9>_MC.D )
  );
  X_ZERO \U1/Channel1<9>_MC.D1_1433  (
    .O(\U1/Channel1<9>_MC.D1 )
  );
  X_AND2 \U1/Channel1<9>_MC.D2_PT_0_1434  (
    .I0(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [9]),
    .O(\U1/Channel1<9>_MC.D2_PT_0 )
  );
  X_AND6 \U1/Channel1<9>_MC.D2_PT_1_1435  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\U1/Channel1 [8]),
    .I3(\U1/Channel1 [7]),
    .I4(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_1/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_1/IN5 ),
    .O(\U1/Channel1<9>_MC.D2_PT_1 )
  );
  X_AND6 \U1/Channel1<9>_MC.D2_PT_2_1436  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_2/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_2/IN3 ),
    .I4(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .I5(N_PZ_1104),
    .O(\U1/Channel1<9>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<9>_MC.D2_1437  (
    .I0(\U1/Channel1<9>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<9>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<9>_MC.D2_PT_2 ),
    .O(\U1/Channel1<9>_MC.D2 )
  );
  X_BUF \U1/Channel1<11>  (
    .I(\U1/Channel1<11>_MC.Q ),
    .O(\U1/Channel1 [11])
  );
  X_FF \U1/Channel1<11>_MC.REG  (
    .I(\U1/Channel1<11>_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<11>_MC.Q )
  );
  X_XOR2 \U1/Channel1<11>_MC.D_1438  (
    .I0(\U1/Channel1<11>_MC.D1 ),
    .I1(\U1/Channel1<11>_MC.D2 ),
    .O(\U1/Channel1<11>_MC.D )
  );
  X_AND2 \U1/Channel1<11>_MC.D1_1439  (
    .I0(\U1/Channel1 [11]),
    .I1(\U1/Channel1 [11]),
    .O(\U1/Channel1<11>_MC.D1 )
  );
  X_AND2 \U1/Channel1<11>_MC.D2_PT_0_1440  (
    .I0(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [11]),
    .O(\U1/Channel1<11>_MC.D2_PT_0 )
  );
  X_AND4 \U1/Channel1<11>_MC.D2_PT_1_1441  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_1/IN2 ),
    .I3(N_PZ_1154),
    .O(\U1/Channel1<11>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel1<11>_MC.D2_PT_2_1442  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_2/IN2 ),
    .I3(N_PZ_1154),
    .I4(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_2/IN4 ),
    .O(\U1/Channel1<11>_MC.D2_PT_2 )
  );
  X_AND8 \U1/Channel1<11>_MC.D2_PT_3_1443  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN3 ),
    .I4(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .I5(N_PZ_1104),
    .I6(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN7 ),
    .O(\U1/Channel1<11>_MC.D2_PT_3 )
  );
  X_OR4 \U1/Channel1<11>_MC.D2_1444  (
    .I0(\U1/Channel1<11>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<11>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<11>_MC.D2_PT_2 ),
    .I3(\U1/Channel1<11>_MC.D2_PT_3 ),
    .O(\U1/Channel1<11>_MC.D2 )
  );
  X_BUF N_PZ_1154_1445 (
    .I(\N_PZ_1154_MC.Q ),
    .O(N_PZ_1154)
  );
  X_BUF \N_PZ_1154_MC.Q_1446  (
    .I(\N_PZ_1154_MC.D ),
    .O(\N_PZ_1154_MC.Q )
  );
  X_XOR2 \N_PZ_1154_MC.D_1447  (
    .I0(\N_PZ_1154_MC.D1 ),
    .I1(\N_PZ_1154_MC.D2 ),
    .O(\N_PZ_1154_MC.D )
  );
  X_AND5 \N_PZ_1154_MC.D1_1448  (
    .I0(\U1/Channel1 [8]),
    .I1(\U1/Channel1 [7]),
    .I2(\NlwInverterSignal_N_PZ_1154_MC.D1/IN2 ),
    .I3(\U1/Channel1 [10]),
    .I4(\U1/Channel1 [9]),
    .O(\N_PZ_1154_MC.D1 )
  );
  X_ZERO \N_PZ_1154_MC.D2_1449  (
    .O(\N_PZ_1154_MC.D2 )
  );
  X_BUF \U1/Channel1<12>  (
    .I(\U1/Channel1<12>_MC.Q ),
    .O(\U1/Channel1 [12])
  );
  X_XOR2 \U1/Channel1<12>_MC_tsimcreated_xor__1450  (
    .I0(\U1/Channel1<12>_MC.D ),
    .I1(\U1/Channel1<12>_MC.Q ),
    .O(\U1/Channel1<12>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<12>_MC.REG  (
    .I(\U1/Channel1<12>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<12>_MC.Q )
  );
  X_XOR2 \U1/Channel1<12>_MC.D_1451  (
    .I0(\U1/Channel1<12>_MC.D1 ),
    .I1(\U1/Channel1<12>_MC.D2 ),
    .O(\U1/Channel1<12>_MC.D )
  );
  X_ZERO \U1/Channel1<12>_MC.D1_1452  (
    .O(\U1/Channel1<12>_MC.D1 )
  );
  X_AND2 \U1/Channel1<12>_MC.D2_PT_0_1453  (
    .I0(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [12]),
    .O(\U1/Channel1<12>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel1<12>_MC.D2_PT_1_1454  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I4(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_1/IN4 ),
    .O(\U1/Channel1<12>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel1<12>_MC.D2_PT_2_1455  (
    .I0(N_PZ_1187),
    .I1(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_2/IN1 ),
    .I2(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [11]),
    .I4(\U1/Channel1 [12]),
    .O(\U1/Channel1<12>_MC.D2_PT_2 )
  );
  X_AND5 \U1/Channel1<12>_MC.D2_PT_3_1456  (
    .I0(N_PZ_1187),
    .I1(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_3/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_3/IN3 ),
    .I4(\U1/Channel1 [12]),
    .O(\U1/Channel1<12>_MC.D2_PT_3 )
  );
  X_AND6 \U1/Channel1<12>_MC.D2_PT_4_1457  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I3(\U1/Channel1 [11]),
    .I4(N_PZ_1154),
    .I5(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_4/IN5 ),
    .O(\U1/Channel1<12>_MC.D2_PT_4 )
  );
  X_AND16 \U1/Channel1<12>_MC.D2_PT_5_1458  (
    .I0(N_PZ_1187),
    .I1(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN2 ),
    .I3(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .I4(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN4 ),
    .I5(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN5 ),
    .I6(\U1/Channel1 [12]),
    .I7(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN8 ),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<12>_MC.D2_PT_5 )
  );
  X_OR6 \U1/Channel1<12>_MC.D2_1459  (
    .I0(\U1/Channel1<12>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<12>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<12>_MC.D2_PT_2 ),
    .I3(\U1/Channel1<12>_MC.D2_PT_3 ),
    .I4(\U1/Channel1<12>_MC.D2_PT_4 ),
    .I5(\U1/Channel1<12>_MC.D2_PT_5 ),
    .O(\U1/Channel1<12>_MC.D2 )
  );
  X_BUF \U1/Channel1<14>  (
    .I(\U1/Channel1<14>_MC.Q ),
    .O(\U1/Channel1 [14])
  );
  X_XOR2 \U1/Channel1<14>_MC_tsimcreated_xor__1460  (
    .I0(\U1/Channel1<14>_MC.D ),
    .I1(\U1/Channel1<14>_MC.Q ),
    .O(\U1/Channel1<14>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<14>_MC.REG  (
    .I(\U1/Channel1<14>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<14>_MC.Q )
  );
  X_XOR2 \U1/Channel1<14>_MC.D_1461  (
    .I0(\U1/Channel1<14>_MC.D1 ),
    .I1(\U1/Channel1<14>_MC.D2 ),
    .O(\U1/Channel1<14>_MC.D )
  );
  X_ZERO \U1/Channel1<14>_MC.D1_1462  (
    .O(\U1/Channel1<14>_MC.D1 )
  );
  X_AND2 \U1/Channel1<14>_MC.D2_PT_0_1463  (
    .I0(\NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [14]),
    .O(\U1/Channel1<14>_MC.D2_PT_0 )
  );
  X_AND5 \U1/Channel1<14>_MC.D2_PT_1_1464  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_1/IN3 ),
    .I4(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\U1/Channel1<14>_MC.D2_PT_1 )
  );
  X_AND5 \U1/Channel1<14>_MC.D2_PT_2_1465  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [13]),
    .I4(\NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_2/IN4 ),
    .O(\U1/Channel1<14>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<14>_MC.D2_1466  (
    .I0(\U1/Channel1<14>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<14>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<14>_MC.D2_PT_2 ),
    .O(\U1/Channel1<14>_MC.D2 )
  );
  X_BUF \U1/Channel1<15>  (
    .I(\U1/Channel1<15>_MC.Q ),
    .O(\U1/Channel1 [15])
  );
  X_XOR2 \U1/Channel1<15>_MC_tsimcreated_xor__1467  (
    .I0(\U1/Channel1<15>_MC.D ),
    .I1(\U1/Channel1<15>_MC.Q ),
    .O(\U1/Channel1<15>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<15>_MC.REG  (
    .I(\U1/Channel1<15>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<15>_MC.Q )
  );
  X_XOR2 \U1/Channel1<15>_MC.D_1468  (
    .I0(\U1/Channel1<15>_MC.D1 ),
    .I1(\U1/Channel1<15>_MC.D2 ),
    .O(\U1/Channel1<15>_MC.D )
  );
  X_ZERO \U1/Channel1<15>_MC.D1_1469  (
    .O(\U1/Channel1<15>_MC.D1 )
  );
  X_AND2 \U1/Channel1<15>_MC.D2_PT_0_1470  (
    .I0(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [15]),
    .O(\U1/Channel1<15>_MC.D2_PT_0 )
  );
  X_AND6 \U1/Channel1<15>_MC.D2_PT_1_1471  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_1/IN3 ),
    .I4(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I5(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_1/IN5 ),
    .O(\U1/Channel1<15>_MC.D2_PT_1 )
  );
  X_AND6 \U1/Channel1<15>_MC.D2_PT_2_1472  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [13]),
    .I4(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_2/IN4 ),
    .I5(\U1/Channel1 [14]),
    .O(\U1/Channel1<15>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<15>_MC.D2_1473  (
    .I0(\U1/Channel1<15>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<15>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<15>_MC.D2_PT_2 ),
    .O(\U1/Channel1<15>_MC.D2 )
  );
  X_BUF N_PZ_1111_1474 (
    .I(\N_PZ_1111_MC.Q ),
    .O(N_PZ_1111)
  );
  X_BUF \N_PZ_1111_MC.Q_1475  (
    .I(\N_PZ_1111_MC.D ),
    .O(\N_PZ_1111_MC.Q )
  );
  X_XOR2 \N_PZ_1111_MC.D_1476  (
    .I0(\N_PZ_1111_MC.D1 ),
    .I1(\N_PZ_1111_MC.D2 ),
    .O(\N_PZ_1111_MC.D )
  );
  X_AND6 \N_PZ_1111_MC.D1_1477  (
    .I0(\NlwInverterSignal_N_PZ_1111_MC.D1/IN0 ),
    .I1(\NlwInverterSignal_N_PZ_1111_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_N_PZ_1111_MC.D1/IN2 ),
    .I3(\NlwInverterSignal_N_PZ_1111_MC.D1/IN3 ),
    .I4(\NlwInverterSignal_N_PZ_1111_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_N_PZ_1111_MC.D1/IN5 ),
    .O(\N_PZ_1111_MC.D1 )
  );
  X_ZERO \N_PZ_1111_MC.D2_1478  (
    .O(\N_PZ_1111_MC.D2 )
  );
  X_BUF DCOR1CNTHIGHr_1479 (
    .I(\DCOR1CNTHIGHr_MC.Q ),
    .O(DCOR1CNTHIGHr)
  );
  X_BUF \DCOR1CNTHIGHr_MC.Q_1480  (
    .I(\DCOR1CNTHIGHr_MC.D ),
    .O(\DCOR1CNTHIGHr_MC.Q )
  );
  X_XOR2 \DCOR1CNTHIGHr_MC.D_1481  (
    .I0(\DCOR1CNTHIGHr_MC.D1 ),
    .I1(\DCOR1CNTHIGHr_MC.D2 ),
    .O(\DCOR1CNTHIGHr_MC.D )
  );
  X_AND16 \DCOR1CNTHIGHr_MC.D1_1482  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN2 ),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN8 ),
    .I9(U2_ADDR_reg[3]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCOR1CNTHIGHr_MC.D1 )
  );
  X_ZERO \DCOR1CNTHIGHr_MC.D2_1483  (
    .O(\DCOR1CNTHIGHr_MC.D2 )
  );
  X_BUF \outDATA<1>\$WA0.UIM_1484  (
    .I(\outDATA<1>\$WA0.UIM_MC.Q ),
    .O(\outDATA<1>\$WA0.UIM )
  );
  X_BUF \outDATA<1>\$WA0.UIM_MC.Q_1485  (
    .I(\outDATA<1>\$WA0.UIM_MC.D ),
    .O(\outDATA<1>\$WA0.UIM_MC.Q )
  );
  X_XOR2 \outDATA<1>\$WA0.UIM_MC.D_1486  (
    .I0(\outDATA<1>\$WA0.UIM_MC.D1 ),
    .I1(\outDATA<1>\$WA0.UIM_MC.D2 ),
    .O(\outDATA<1>\$WA0.UIM_MC.D )
  );
  X_AND2 \outDATA<1>\$WA0.UIM_MC.D1_1487  (
    .I0(U11_U3_counterr[1]),
    .I1(U11_U3_counterr[1]),
    .O(\outDATA<1>\$WA0.UIM_MC.D1 )
  );
  X_ZERO \outDATA<1>\$WA0.UIM_MC.D2_1488  (
    .O(\outDATA<1>\$WA0.UIM_MC.D2 )
  );
  X_BUF \outDATA<1>\$WA1.UIM_1489  (
    .I(\outDATA<1>\$WA1.UIM_MC.Q ),
    .O(\outDATA<1>\$WA1.UIM )
  );
  X_BUF \outDATA<1>\$WA1.UIM_MC.Q_1490  (
    .I(\outDATA<1>\$WA1.UIM_MC.D ),
    .O(\outDATA<1>\$WA1.UIM_MC.Q )
  );
  X_XOR2 \outDATA<1>\$WA1.UIM_MC.D_1491  (
    .I0(\outDATA<1>\$WA1.UIM_MC.D1 ),
    .I1(\outDATA<1>\$WA1.UIM_MC.D2 ),
    .O(\outDATA<1>\$WA1.UIM_MC.D )
  );
  X_AND2 \outDATA<1>\$WA1.UIM_MC.D1_1492  (
    .I0(\I2CS<1>_II/UIM ),
    .I1(\I2CS<1>_II/UIM ),
    .O(\outDATA<1>\$WA1.UIM_MC.D1 )
  );
  X_ZERO \outDATA<1>\$WA1.UIM_MC.D2_1493  (
    .O(\outDATA<1>\$WA1.UIM_MC.D2 )
  );
  X_BUF \outDATA<1>\$WA2.UIM_1494  (
    .I(\outDATA<1>\$WA2.UIM_MC.Q ),
    .O(\outDATA<1>\$WA2.UIM )
  );
  X_BUF \outDATA<1>\$WA2.UIM_MC.Q_1495  (
    .I(\outDATA<1>\$WA2.UIM_MC.D ),
    .O(\outDATA<1>\$WA2.UIM_MC.Q )
  );
  X_XOR2 \outDATA<1>\$WA2.UIM_MC.D_1496  (
    .I0(\outDATA<1>\$WA2.UIM_MC.D1 ),
    .I1(\outDATA<1>\$WA2.UIM_MC.D2 ),
    .O(\outDATA<1>\$WA2.UIM_MC.D )
  );
  X_AND2 \outDATA<1>\$WA2.UIM_MC.D1_1497  (
    .I0(\FLS0_II/UIM ),
    .I1(\FLS0_II/UIM ),
    .O(\outDATA<1>\$WA2.UIM_MC.D1 )
  );
  X_ZERO \outDATA<1>\$WA2.UIM_MC.D2_1498  (
    .O(\outDATA<1>\$WA2.UIM_MC.D2 )
  );
  X_BUF \outDATA<1>\$WA3.UIM_1499  (
    .I(\outDATA<1>\$WA3.UIM_MC.Q ),
    .O(\outDATA<1>\$WA3.UIM )
  );
  X_BUF \outDATA<1>\$WA3.UIM_MC.Q_1500  (
    .I(\outDATA<1>\$WA3.UIM_MC.D ),
    .O(\outDATA<1>\$WA3.UIM_MC.Q )
  );
  X_XOR2 \outDATA<1>\$WA3.UIM_MC.D_1501  (
    .I0(\outDATA<1>\$WA3.UIM_MC.D1 ),
    .I1(\outDATA<1>\$WA3.UIM_MC.D2 ),
    .O(\outDATA<1>\$WA3.UIM_MC.D )
  );
  X_ZERO \outDATA<1>\$WA3.UIM_MC.D1_1502  (
    .O(\outDATA<1>\$WA3.UIM_MC.D1 )
  );
  X_AND2 \outDATA<1>\$WA3.UIM_MC.D2_PT_0_1503  (
    .I0(\NlwInverterSignal_outDATA<1>\$WA3.UIM_MC.D2_PT_0/IN0 ),
    .I1(NET2528),
    .O(\outDATA<1>\$WA3.UIM_MC.D2_PT_0 )
  );
  X_AND2 \outDATA<1>\$WA3.UIM_MC.D2_PT_1_1504  (
    .I0(NET2528),
    .I1(\U4/Flgreg [1]),
    .O(\outDATA<1>\$WA3.UIM_MC.D2_PT_1 )
  );
  X_AND3 \outDATA<1>\$WA3.UIM_MC.D2_PT_2_1505  (
    .I0(DCORENCPWRr),
    .I1(\NlwInverterSignal_outDATA<1>\$WA3.UIM_MC.D2_PT_2/IN1 ),
    .I2(\Home05FLG_II/UIM ),
    .O(\outDATA<1>\$WA3.UIM_MC.D2_PT_2 )
  );
  X_OR3 \outDATA<1>\$WA3.UIM_MC.D2_1506  (
    .I0(\outDATA<1>\$WA3.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<1>\$WA3.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<1>\$WA3.UIM_MC.D2_PT_2 ),
    .O(\outDATA<1>\$WA3.UIM_MC.D2 )
  );
  X_BUF DCORIFGr_1507 (
    .I(\DCORIFGr_MC.Q ),
    .O(DCORIFGr)
  );
  X_BUF \DCORIFGr_MC.Q_1508  (
    .I(\DCORIFGr_MC.D ),
    .O(\DCORIFGr_MC.Q )
  );
  X_XOR2 \DCORIFGr_MC.D_1509  (
    .I0(\DCORIFGr_MC.D1 ),
    .I1(\DCORIFGr_MC.D2 ),
    .O(\DCORIFGr_MC.D )
  );
  X_AND16 \DCORIFGr_MC.D1_1510  (
    .I0(\WR_II/UIM ),
    .I1(\NlwInverterSignal_DCORIFGr_MC.D1/IN1 ),
    .I2(\NlwInverterSignal_DCORIFGr_MC.D1/IN2 ),
    .I3(U2_ADDR_reg[0]),
    .I4(\NlwInverterSignal_DCORIFGr_MC.D1/IN4 ),
    .I5(\NlwInverterSignal_DCORIFGr_MC.D1/IN5 ),
    .I6(\NlwInverterSignal_DCORIFGr_MC.D1/IN6 ),
    .I7(\NlwInverterSignal_DCORIFGr_MC.D1/IN7 ),
    .I8(\NlwInverterSignal_DCORIFGr_MC.D1/IN8 ),
    .I9(\NlwInverterSignal_DCORIFGr_MC.D1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\DCORIFGr_MC.D1 )
  );
  X_ZERO \DCORIFGr_MC.D2_1511  (
    .O(\DCORIFGr_MC.D2 )
  );
  X_BUF \outDATA<1>\$WA4.UIM_1512  (
    .I(\outDATA<1>\$WA4.UIM_MC.Q ),
    .O(\outDATA<1>\$WA4.UIM )
  );
  X_BUF \outDATA<1>\$WA4.UIM_MC.Q_1513  (
    .I(\outDATA<1>\$WA4.UIM_MC.D ),
    .O(\outDATA<1>\$WA4.UIM_MC.Q )
  );
  X_XOR2 \outDATA<1>\$WA4.UIM_MC.D_1514  (
    .I0(\outDATA<1>\$WA4.UIM_MC.D1 ),
    .I1(\outDATA<1>\$WA4.UIM_MC.D2 ),
    .O(\outDATA<1>\$WA4.UIM_MC.D )
  );
  X_ZERO \outDATA<1>\$WA4.UIM_MC.D1_1515  (
    .O(\outDATA<1>\$WA4.UIM_MC.D1 )
  );
  X_AND2 \outDATA<1>\$WA4.UIM_MC.D2_PT_0_1516  (
    .I0(DCOR0THRESLOWr),
    .I1(\U1/U4/Latch0r [1]),
    .O(\outDATA<1>\$WA4.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<1>\$WA4.UIM_MC.D2_PT_1_1517  (
    .I0(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR0THRESMIDr),
    .I2(\U1/U4/Latch0r [9]),
    .O(\outDATA<1>\$WA4.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<1>\$WA4.UIM_MC.D2_PT_2_1518  (
    .I0(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR1THRESLOWr),
    .I3(\U1/U4/Latch1r [1]),
    .O(\outDATA<1>\$WA4.UIM_MC.D2_PT_2 )
  );
  X_AND4 \outDATA<1>\$WA4.UIM_MC.D2_PT_3_1519  (
    .I0(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN2 ),
    .I3(\U1/U4/Latch1r [9]),
    .O(\outDATA<1>\$WA4.UIM_MC.D2_PT_3 )
  );
  X_OR4 \outDATA<1>\$WA4.UIM_MC.D2_1520  (
    .I0(\outDATA<1>\$WA4.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<1>\$WA4.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<1>\$WA4.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<1>\$WA4.UIM_MC.D2_PT_3 ),
    .O(\outDATA<1>\$WA4.UIM_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<1>  (
    .I(\U1/U4/Latch0r<1>_MC.Q ),
    .O(\U1/U4/Latch0r [1])
  );
  X_FF \U1/U4/Latch0r<1>_MC.REG  (
    .I(\U1/U4/Latch0r<1>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<1>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1521  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<1>_MC.D_1522  (
    .I0(\U1/U4/Latch0r<1>_MC.D1 ),
    .I1(\U1/U4/Latch0r<1>_MC.D2 ),
    .O(\U1/U4/Latch0r<1>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<1>_MC.D1_1523  (
    .O(\U1/U4/Latch0r<1>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<1>_MC.D2_PT_0_1524  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<1>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [1]),
    .O(\U1/U4/Latch0r<1>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<1>_MC.D2_PT_1_1525  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<1>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<1>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [1]),
    .O(\U1/U4/Latch0r<1>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<1>_MC.D2_1526  (
    .I0(\U1/U4/Latch0r<1>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<1>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<1>_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<9>  (
    .I(\U1/U4/Latch0r<9>_MC.Q ),
    .O(\U1/U4/Latch0r [9])
  );
  X_FF \U1/U4/Latch0r<9>_MC.REG  (
    .I(\U1/U4/Latch0r<9>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<9>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1527  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<9>_MC.D_1528  (
    .I0(\U1/U4/Latch0r<9>_MC.D1 ),
    .I1(\U1/U4/Latch0r<9>_MC.D2 ),
    .O(\U1/U4/Latch0r<9>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<9>_MC.D1_1529  (
    .O(\U1/U4/Latch0r<9>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<9>_MC.D2_PT_0_1530  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<9>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [9]),
    .O(\U1/U4/Latch0r<9>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<9>_MC.D2_PT_1_1531  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<9>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<9>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [9]),
    .O(\U1/U4/Latch0r<9>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<9>_MC.D2_1532  (
    .I0(\U1/U4/Latch0r<9>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<9>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<9>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<1>  (
    .I(\U1/U4/Latch1r<1>_MC.Q ),
    .O(\U1/U4/Latch1r [1])
  );
  X_FF \U1/U4/Latch1r<1>_MC.REG  (
    .I(\U1/U4/Latch1r<1>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<1>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1533  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<1>_MC.D_1534  (
    .I0(\U1/U4/Latch1r<1>_MC.D1 ),
    .I1(\U1/U4/Latch1r<1>_MC.D2 ),
    .O(\U1/U4/Latch1r<1>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<1>_MC.D1_1535  (
    .O(\U1/U4/Latch1r<1>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<1>_MC.D2_PT_0_1536  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [1]),
    .O(\U1/U4/Latch1r<1>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<1>_MC.D2_PT_1_1537  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<1>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<1>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<1>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [1]),
    .O(\U1/U4/Latch1r<1>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<1>_MC.D2_1538  (
    .I0(\U1/U4/Latch1r<1>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<1>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<1>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<9>  (
    .I(\U1/U4/Latch1r<9>_MC.Q ),
    .O(\U1/U4/Latch1r [9])
  );
  X_FF \U1/U4/Latch1r<9>_MC.REG  (
    .I(\U1/U4/Latch1r<9>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<9>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1539  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<9>_MC.D_1540  (
    .I0(\U1/U4/Latch1r<9>_MC.D1 ),
    .I1(\U1/U4/Latch1r<9>_MC.D2 ),
    .O(\U1/U4/Latch1r<9>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<9>_MC.D1_1541  (
    .O(\U1/U4/Latch1r<9>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<9>_MC.D2_PT_0_1542  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [9]),
    .O(\U1/U4/Latch1r<9>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<9>_MC.D2_PT_1_1543  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<9>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<9>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<9>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [9]),
    .O(\U1/U4/Latch1r<9>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<9>_MC.D2_1544  (
    .I0(\U1/U4/Latch1r<9>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<9>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<9>_MC.D2 )
  );
  X_BUF \outDATA<1>\$WA5.UIM_1545  (
    .I(\outDATA<1>\$WA5.UIM_MC.Q ),
    .O(\outDATA<1>\$WA5.UIM )
  );
  X_BUF \outDATA<1>\$WA5.UIM_MC.Q_1546  (
    .I(\outDATA<1>\$WA5.UIM_MC.D ),
    .O(\outDATA<1>\$WA5.UIM_MC.Q )
  );
  X_XOR2 \outDATA<1>\$WA5.UIM_MC.D_1547  (
    .I0(\outDATA<1>\$WA5.UIM_MC.D1 ),
    .I1(\outDATA<1>\$WA5.UIM_MC.D2 ),
    .O(\outDATA<1>\$WA5.UIM_MC.D )
  );
  X_ZERO \outDATA<1>\$WA5.UIM_MC.D1_1548  (
    .O(\outDATA<1>\$WA5.UIM_MC.D1 )
  );
  X_AND2 \outDATA<1>\$WA5.UIM_MC.D2_PT_0_1549  (
    .I0(DCOR0CNTLOWr),
    .I1(\U1/U3/holdingreg0 [1]),
    .O(\outDATA<1>\$WA5.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<1>\$WA5.UIM_MC.D2_PT_1_1550  (
    .I0(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR1CNTLOWr),
    .I2(\U1/U3/holdingreg1 [1]),
    .O(\outDATA<1>\$WA5.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<1>\$WA5.UIM_MC.D2_PT_2_1551  (
    .I0(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR0CNTMIDr),
    .I3(\U1/U3/holdingreg0 [9]),
    .O(\outDATA<1>\$WA5.UIM_MC.D2_PT_2 )
  );
  X_AND5 \outDATA<1>\$WA5.UIM_MC.D2_PT_3_1552  (
    .I0(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN2 ),
    .I3(DCOR1CNTMIDr),
    .I4(\U1/U3/holdingreg1 [9]),
    .O(\outDATA<1>\$WA5.UIM_MC.D2_PT_3 )
  );
  X_AND6 \outDATA<1>\$WA5.UIM_MC.D2_PT_4_1553  (
    .I0(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN2 ),
    .I3(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN3 ),
    .I4(DCOR0CNTHIGHr),
    .I5(\U1/U3/holdingreg0 [17]),
    .O(\outDATA<1>\$WA5.UIM_MC.D2_PT_4 )
  );
  X_AND6 \outDATA<1>\$WA5.UIM_MC.D2_PT_5_1554  (
    .I0(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN3 ),
    .I4(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN4 ),
    .I5(\U1/U3/holdingreg1 [17]),
    .O(\outDATA<1>\$WA5.UIM_MC.D2_PT_5 )
  );
  X_OR6 \outDATA<1>\$WA5.UIM_MC.D2_1555  (
    .I0(\outDATA<1>\$WA5.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<1>\$WA5.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<1>\$WA5.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<1>\$WA5.UIM_MC.D2_PT_3 ),
    .I4(\outDATA<1>\$WA5.UIM_MC.D2_PT_4 ),
    .I5(\outDATA<1>\$WA5.UIM_MC.D2_PT_5 ),
    .O(\outDATA<1>\$WA5.UIM_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<1>  (
    .I(\U1/U3/holdingreg0<1>_MC.Q ),
    .O(\U1/U3/holdingreg0 [1])
  );
  X_FF \U1/U3/holdingreg0<1>_MC.REG  (
    .I(\U1/U3/holdingreg0<1>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<1>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1556  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<1>_MC.D_1557  (
    .I0(\U1/U3/holdingreg0<1>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<1>_MC.D2 ),
    .O(\U1/U3/holdingreg0<1>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<1>_MC.D1_1558  (
    .O(\U1/U3/holdingreg0<1>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<1>_MC.D2_PT_0_1559  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [1]),
    .O(\U1/U3/holdingreg0<1>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<1>_MC.D2_PT_1_1560  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<1>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<1>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [1]),
    .O(\U1/U3/holdingreg0<1>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<1>_MC.D2_1561  (
    .I0(\U1/U3/holdingreg0<1>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<1>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<1>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<1>  (
    .I(\U1/U3/holdingreg1<1>_MC.Q ),
    .O(\U1/U3/holdingreg1 [1])
  );
  X_FF \U1/U3/holdingreg1<1>_MC.REG  (
    .I(\U1/U3/holdingreg1<1>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<1>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1562  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<1>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<1>_MC.D_1563  (
    .I0(\U1/U3/holdingreg1<1>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<1>_MC.D2 ),
    .O(\U1/U3/holdingreg1<1>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<1>_MC.D1_1564  (
    .O(\U1/U3/holdingreg1<1>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<1>_MC.D2_PT_0_1565  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [1]),
    .O(\U1/U3/holdingreg1<1>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<1>_MC.D2_PT_1_1566  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<1>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<1>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [1]),
    .O(\U1/U3/holdingreg1<1>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<1>_MC.D2_1567  (
    .I0(\U1/U3/holdingreg1<1>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<1>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<1>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<9>  (
    .I(\U1/U3/holdingreg0<9>_MC.Q ),
    .O(\U1/U3/holdingreg0 [9])
  );
  X_FF \U1/U3/holdingreg0<9>_MC.REG  (
    .I(\U1/U3/holdingreg0<9>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<9>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1568  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<9>_MC.D_1569  (
    .I0(\U1/U3/holdingreg0<9>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<9>_MC.D2 ),
    .O(\U1/U3/holdingreg0<9>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<9>_MC.D1_1570  (
    .O(\U1/U3/holdingreg0<9>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<9>_MC.D2_PT_0_1571  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [9]),
    .O(\U1/U3/holdingreg0<9>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<9>_MC.D2_PT_1_1572  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<9>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<9>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [9]),
    .O(\U1/U3/holdingreg0<9>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<9>_MC.D2_1573  (
    .I0(\U1/U3/holdingreg0<9>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<9>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<9>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<9>  (
    .I(\U1/U3/holdingreg1<9>_MC.Q ),
    .O(\U1/U3/holdingreg1 [9])
  );
  X_FF \U1/U3/holdingreg1<9>_MC.REG  (
    .I(\U1/U3/holdingreg1<9>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<9>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1574  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<9>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<9>_MC.D_1575  (
    .I0(\U1/U3/holdingreg1<9>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<9>_MC.D2 ),
    .O(\U1/U3/holdingreg1<9>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<9>_MC.D1_1576  (
    .O(\U1/U3/holdingreg1<9>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<9>_MC.D2_PT_0_1577  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [9]),
    .O(\U1/U3/holdingreg1<9>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<9>_MC.D2_PT_1_1578  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<9>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<9>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [9]),
    .O(\U1/U3/holdingreg1<9>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<9>_MC.D2_1579  (
    .I0(\U1/U3/holdingreg1<9>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<9>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<9>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<17>  (
    .I(\U1/U3/holdingreg0<17>_MC.Q ),
    .O(\U1/U3/holdingreg0 [17])
  );
  X_FF \U1/U3/holdingreg0<17>_MC.REG  (
    .I(\U1/U3/holdingreg0<17>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<17>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<17>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<17>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1580  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<17>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<17>_MC.D_1581  (
    .I0(\U1/U3/holdingreg0<17>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<17>_MC.D2 ),
    .O(\U1/U3/holdingreg0<17>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<17>_MC.D1_1582  (
    .O(\U1/U3/holdingreg0<17>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<17>_MC.D2_PT_0_1583  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [17]),
    .O(\U1/U3/holdingreg0<17>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<17>_MC.D2_PT_1_1584  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<17>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<17>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [17]),
    .O(\U1/U3/holdingreg0<17>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<17>_MC.D2_1585  (
    .I0(\U1/U3/holdingreg0<17>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<17>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<17>_MC.D2 )
  );
  X_BUF \U1/Channel0<17>  (
    .I(\U1/Channel0<17>_MC.Q ),
    .O(\U1/Channel0 [17])
  );
  X_FF \U1/Channel0<17>_MC.REG  (
    .I(\U1/Channel0<17>_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<17>_MC.Q )
  );
  X_XOR2 \U1/Channel0<17>_MC.D_1586  (
    .I0(\U1/Channel0<17>_MC.D1 ),
    .I1(\U1/Channel0<17>_MC.D2 ),
    .O(\U1/Channel0<17>_MC.D )
  );
  X_AND2 \U1/Channel0<17>_MC.D1_1587  (
    .I0(\U1/Channel0 [17]),
    .I1(\U1/Channel0 [17]),
    .O(\U1/Channel0<17>_MC.D1 )
  );
  X_AND2 \U1/Channel0<17>_MC.D2_PT_0_1588  (
    .I0(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [17]),
    .O(\U1/Channel0<17>_MC.D2_PT_0 )
  );
  X_AND8 \U1/Channel0<17>_MC.D2_PT_1_1589  (
    .I0(N_PZ_1132),
    .I1(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_1/IN1 ),
    .I2(\U1/Channel0 [16]),
    .I3(\U1/Channel0 [13]),
    .I4(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_1/IN4 ),
    .I5(\U1/Channel0 [14]),
    .I6(\U1/Channel0 [15]),
    .I7(\U1/Channel0 [17]),
    .O(\U1/Channel0<17>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel0<17>_MC.D2_PT_2_1590  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN4 ),
    .I5(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN7 ),
    .I8(\U1/Channel0 [17]),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<17>_MC.D2_PT_2 )
  );
  X_AND16 \U1/Channel0<17>_MC.D2_PT_3_1591  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN4 ),
    .I5(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN8 ),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<17>_MC.D2_PT_3 )
  );
  X_AND16 \U1/Channel0<17>_MC.D2_PT_4_1592  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_4/IN2 ),
    .I3(\U1/Channel0 [16]),
    .I4(\U1/Channel0 [13]),
    .I5(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_4/IN5 ),
    .I6(\U1/Channel0 [14]),
    .I7(\U1/Channel0 [15]),
    .I8(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_4/IN8 ),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<17>_MC.D2_PT_4 )
  );
  X_OR5 \U1/Channel0<17>_MC.D2_1593  (
    .I0(\U1/Channel0<17>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<17>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<17>_MC.D2_PT_2 ),
    .I3(\U1/Channel0<17>_MC.D2_PT_3 ),
    .I4(\U1/Channel0<17>_MC.D2_PT_4 ),
    .O(\U1/Channel0<17>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<17>  (
    .I(\U1/U3/holdingreg1<17>_MC.Q ),
    .O(\U1/U3/holdingreg1 [17])
  );
  X_FF \U1/U3/holdingreg1<17>_MC.REG  (
    .I(\U1/U3/holdingreg1<17>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<17>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<17>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<17>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1594  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<17>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<17>_MC.D_1595  (
    .I0(\U1/U3/holdingreg1<17>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<17>_MC.D2 ),
    .O(\U1/U3/holdingreg1<17>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<17>_MC.D1_1596  (
    .O(\U1/U3/holdingreg1<17>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<17>_MC.D2_PT_0_1597  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [17]),
    .O(\U1/U3/holdingreg1<17>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<17>_MC.D2_PT_1_1598  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<17>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<17>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [17]),
    .O(\U1/U3/holdingreg1<17>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<17>_MC.D2_1599  (
    .I0(\U1/U3/holdingreg1<17>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<17>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<17>_MC.D2 )
  );
  X_BUF \U1/Channel1<17>  (
    .I(\U1/Channel1<17>_MC.Q ),
    .O(\U1/Channel1 [17])
  );
  X_XOR2 \U1/Channel1<17>_MC_tsimcreated_xor__1600  (
    .I0(\U1/Channel1<17>_MC.D ),
    .I1(\U1/Channel1<17>_MC.Q ),
    .O(\U1/Channel1<17>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<17>_MC.REG  (
    .I(\U1/Channel1<17>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<17>_MC.Q )
  );
  X_XOR2 \U1/Channel1<17>_MC.D_1601  (
    .I0(\U1/Channel1<17>_MC.D1 ),
    .I1(\U1/Channel1<17>_MC.D2 ),
    .O(\U1/Channel1<17>_MC.D )
  );
  X_ZERO \U1/Channel1<17>_MC.D1_1602  (
    .O(\U1/Channel1<17>_MC.D1 )
  );
  X_AND2 \U1/Channel1<17>_MC.D2_PT_0_1603  (
    .I0(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [17]),
    .O(\U1/Channel1<17>_MC.D2_PT_0 )
  );
  X_AND8 \U1/Channel1<17>_MC.D2_PT_1_1604  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN7 ),
    .O(\U1/Channel1<17>_MC.D2_PT_1 )
  );
  X_AND8 \U1/Channel1<17>_MC.D2_PT_2_1605  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [16]),
    .I4(\U1/Channel1 [13]),
    .I5(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel1 [14]),
    .I7(\U1/Channel1 [15]),
    .O(\U1/Channel1<17>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<17>_MC.D2_1606  (
    .I0(\U1/Channel1<17>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<17>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<17>_MC.D2_PT_2 ),
    .O(\U1/Channel1<17>_MC.D2 )
  );
  X_BUF \outDATA<2>\$WA0.UIM_1607  (
    .I(\outDATA<2>\$WA0.UIM_MC.Q ),
    .O(\outDATA<2>\$WA0.UIM )
  );
  X_BUF \outDATA<2>\$WA0.UIM_MC.Q_1608  (
    .I(\outDATA<2>\$WA0.UIM_MC.D ),
    .O(\outDATA<2>\$WA0.UIM_MC.Q )
  );
  X_XOR2 \outDATA<2>\$WA0.UIM_MC.D_1609  (
    .I0(\outDATA<2>\$WA0.UIM_MC.D1 ),
    .I1(\outDATA<2>\$WA0.UIM_MC.D2 ),
    .O(\outDATA<2>\$WA0.UIM_MC.D )
  );
  X_AND2 \outDATA<2>\$WA0.UIM_MC.D1_1610  (
    .I0(U11_U3_counterr[2]),
    .I1(U11_U3_counterr[2]),
    .O(\outDATA<2>\$WA0.UIM_MC.D1 )
  );
  X_ZERO \outDATA<2>\$WA0.UIM_MC.D2_1611  (
    .O(\outDATA<2>\$WA0.UIM_MC.D2 )
  );
  X_BUF \outDATA<2>\$WA1.UIM_1612  (
    .I(\outDATA<2>\$WA1.UIM_MC.Q ),
    .O(\outDATA<2>\$WA1.UIM )
  );
  X_BUF \outDATA<2>\$WA1.UIM_MC.Q_1613  (
    .I(\outDATA<2>\$WA1.UIM_MC.D ),
    .O(\outDATA<2>\$WA1.UIM_MC.Q )
  );
  X_XOR2 \outDATA<2>\$WA1.UIM_MC.D_1614  (
    .I0(\outDATA<2>\$WA1.UIM_MC.D1 ),
    .I1(\outDATA<2>\$WA1.UIM_MC.D2 ),
    .O(\outDATA<2>\$WA1.UIM_MC.D )
  );
  X_AND2 \outDATA<2>\$WA1.UIM_MC.D1_1615  (
    .I0(\I2CS<2>_II/UIM ),
    .I1(\I2CS<2>_II/UIM ),
    .O(\outDATA<2>\$WA1.UIM_MC.D1 )
  );
  X_ZERO \outDATA<2>\$WA1.UIM_MC.D2_1616  (
    .O(\outDATA<2>\$WA1.UIM_MC.D2 )
  );
  X_BUF \outDATA<2>\$WA2.UIM_1617  (
    .I(\outDATA<2>\$WA2.UIM_MC.Q ),
    .O(\outDATA<2>\$WA2.UIM )
  );
  X_BUF \outDATA<2>\$WA2.UIM_MC.Q_1618  (
    .I(\outDATA<2>\$WA2.UIM_MC.D ),
    .O(\outDATA<2>\$WA2.UIM_MC.Q )
  );
  X_XOR2 \outDATA<2>\$WA2.UIM_MC.D_1619  (
    .I0(\outDATA<2>\$WA2.UIM_MC.D1 ),
    .I1(\outDATA<2>\$WA2.UIM_MC.D2 ),
    .O(\outDATA<2>\$WA2.UIM_MC.D )
  );
  X_AND2 \outDATA<2>\$WA2.UIM_MC.D1_1620  (
    .I0(\Home0_II/UIM ),
    .I1(\Home0_II/UIM ),
    .O(\outDATA<2>\$WA2.UIM_MC.D1 )
  );
  X_ZERO \outDATA<2>\$WA2.UIM_MC.D2_1621  (
    .O(\outDATA<2>\$WA2.UIM_MC.D2 )
  );
  X_BUF \outDATA<2>\$WA3.UIM_1622  (
    .I(\outDATA<2>\$WA3.UIM_MC.Q ),
    .O(\outDATA<2>\$WA3.UIM )
  );
  X_BUF \outDATA<2>\$WA3.UIM_MC.Q_1623  (
    .I(\outDATA<2>\$WA3.UIM_MC.D ),
    .O(\outDATA<2>\$WA3.UIM_MC.Q )
  );
  X_XOR2 \outDATA<2>\$WA3.UIM_MC.D_1624  (
    .I0(\outDATA<2>\$WA3.UIM_MC.D1 ),
    .I1(\outDATA<2>\$WA3.UIM_MC.D2 ),
    .O(\outDATA<2>\$WA3.UIM_MC.D )
  );
  X_ZERO \outDATA<2>\$WA3.UIM_MC.D1_1625  (
    .O(\outDATA<2>\$WA3.UIM_MC.D1 )
  );
  X_AND2 \outDATA<2>\$WA3.UIM_MC.D2_PT_0_1626  (
    .I0(NET2528),
    .I1(\U4/Flgreg [2]),
    .O(\outDATA<2>\$WA3.UIM_MC.D2_PT_0 )
  );
  X_AND2 \outDATA<2>\$WA3.UIM_MC.D2_PT_1_1627  (
    .I0(\NlwInverterSignal_outDATA<2>\$WA3.UIM_MC.D2_PT_1/IN0 ),
    .I1(\Enc033FLG_II/UIM ),
    .O(\outDATA<2>\$WA3.UIM_MC.D2_PT_1 )
  );
  X_OR2 \outDATA<2>\$WA3.UIM_MC.D2_1628  (
    .I0(\outDATA<2>\$WA3.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<2>\$WA3.UIM_MC.D2_PT_1 ),
    .O(\outDATA<2>\$WA3.UIM_MC.D2 )
  );
  X_BUF \outDATA<2>\$WA4.UIM_1629  (
    .I(\outDATA<2>\$WA4.UIM_MC.Q ),
    .O(\outDATA<2>\$WA4.UIM )
  );
  X_BUF \outDATA<2>\$WA4.UIM_MC.Q_1630  (
    .I(\outDATA<2>\$WA4.UIM_MC.D ),
    .O(\outDATA<2>\$WA4.UIM_MC.Q )
  );
  X_XOR2 \outDATA<2>\$WA4.UIM_MC.D_1631  (
    .I0(\outDATA<2>\$WA4.UIM_MC.D1 ),
    .I1(\outDATA<2>\$WA4.UIM_MC.D2 ),
    .O(\outDATA<2>\$WA4.UIM_MC.D )
  );
  X_ZERO \outDATA<2>\$WA4.UIM_MC.D1_1632  (
    .O(\outDATA<2>\$WA4.UIM_MC.D1 )
  );
  X_AND2 \outDATA<2>\$WA4.UIM_MC.D2_PT_0_1633  (
    .I0(DCOR0THRESLOWr),
    .I1(\U1/U4/Latch0r [2]),
    .O(\outDATA<2>\$WA4.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<2>\$WA4.UIM_MC.D2_PT_1_1634  (
    .I0(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR0THRESMIDr),
    .I2(\U1/U4/Latch0r [10]),
    .O(\outDATA<2>\$WA4.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<2>\$WA4.UIM_MC.D2_PT_2_1635  (
    .I0(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR1THRESLOWr),
    .I3(\U1/U4/Latch1r [2]),
    .O(\outDATA<2>\$WA4.UIM_MC.D2_PT_2 )
  );
  X_AND4 \outDATA<2>\$WA4.UIM_MC.D2_PT_3_1636  (
    .I0(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN2 ),
    .I3(\U1/U4/Latch1r [10]),
    .O(\outDATA<2>\$WA4.UIM_MC.D2_PT_3 )
  );
  X_OR4 \outDATA<2>\$WA4.UIM_MC.D2_1637  (
    .I0(\outDATA<2>\$WA4.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<2>\$WA4.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<2>\$WA4.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<2>\$WA4.UIM_MC.D2_PT_3 ),
    .O(\outDATA<2>\$WA4.UIM_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<2>  (
    .I(\U1/U4/Latch0r<2>_MC.Q ),
    .O(\U1/U4/Latch0r [2])
  );
  X_FF \U1/U4/Latch0r<2>_MC.REG  (
    .I(\U1/U4/Latch0r<2>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<2>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1638  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<2>_MC.D_1639  (
    .I0(\U1/U4/Latch0r<2>_MC.D1 ),
    .I1(\U1/U4/Latch0r<2>_MC.D2 ),
    .O(\U1/U4/Latch0r<2>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<2>_MC.D1_1640  (
    .O(\U1/U4/Latch0r<2>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<2>_MC.D2_PT_0_1641  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<2>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [2]),
    .O(\U1/U4/Latch0r<2>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<2>_MC.D2_PT_1_1642  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<2>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<2>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [2]),
    .O(\U1/U4/Latch0r<2>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<2>_MC.D2_1643  (
    .I0(\U1/U4/Latch0r<2>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<2>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<2>_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<10>  (
    .I(\U1/U4/Latch0r<10>_MC.Q ),
    .O(\U1/U4/Latch0r [10])
  );
  X_FF \U1/U4/Latch0r<10>_MC.REG  (
    .I(\U1/U4/Latch0r<10>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<10>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1644  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<10>_MC.D_1645  (
    .I0(\U1/U4/Latch0r<10>_MC.D1 ),
    .I1(\U1/U4/Latch0r<10>_MC.D2 ),
    .O(\U1/U4/Latch0r<10>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<10>_MC.D1_1646  (
    .O(\U1/U4/Latch0r<10>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<10>_MC.D2_PT_0_1647  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<10>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [10]),
    .O(\U1/U4/Latch0r<10>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<10>_MC.D2_PT_1_1648  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<10>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<10>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [10]),
    .O(\U1/U4/Latch0r<10>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<10>_MC.D2_1649  (
    .I0(\U1/U4/Latch0r<10>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<10>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<10>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<2>  (
    .I(\U1/U4/Latch1r<2>_MC.Q ),
    .O(\U1/U4/Latch1r [2])
  );
  X_FF \U1/U4/Latch1r<2>_MC.REG  (
    .I(\U1/U4/Latch1r<2>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<2>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1650  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<2>_MC.D_1651  (
    .I0(\U1/U4/Latch1r<2>_MC.D1 ),
    .I1(\U1/U4/Latch1r<2>_MC.D2 ),
    .O(\U1/U4/Latch1r<2>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<2>_MC.D1_1652  (
    .O(\U1/U4/Latch1r<2>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<2>_MC.D2_PT_0_1653  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [2]),
    .O(\U1/U4/Latch1r<2>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<2>_MC.D2_PT_1_1654  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<2>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<2>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<2>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [2]),
    .O(\U1/U4/Latch1r<2>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<2>_MC.D2_1655  (
    .I0(\U1/U4/Latch1r<2>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<2>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<2>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<10>  (
    .I(\U1/U4/Latch1r<10>_MC.Q ),
    .O(\U1/U4/Latch1r [10])
  );
  X_FF \U1/U4/Latch1r<10>_MC.REG  (
    .I(\U1/U4/Latch1r<10>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<10>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1656  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<10>_MC.D_1657  (
    .I0(\U1/U4/Latch1r<10>_MC.D1 ),
    .I1(\U1/U4/Latch1r<10>_MC.D2 ),
    .O(\U1/U4/Latch1r<10>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<10>_MC.D1_1658  (
    .O(\U1/U4/Latch1r<10>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<10>_MC.D2_PT_0_1659  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [10]),
    .O(\U1/U4/Latch1r<10>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<10>_MC.D2_PT_1_1660  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<10>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<10>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<10>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [10]),
    .O(\U1/U4/Latch1r<10>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<10>_MC.D2_1661  (
    .I0(\U1/U4/Latch1r<10>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<10>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<10>_MC.D2 )
  );
  X_BUF \outDATA<2>\$WA5.UIM_1662  (
    .I(\outDATA<2>\$WA5.UIM_MC.Q ),
    .O(\outDATA<2>\$WA5.UIM )
  );
  X_BUF \outDATA<2>\$WA5.UIM_MC.Q_1663  (
    .I(\outDATA<2>\$WA5.UIM_MC.D ),
    .O(\outDATA<2>\$WA5.UIM_MC.Q )
  );
  X_XOR2 \outDATA<2>\$WA5.UIM_MC.D_1664  (
    .I0(\outDATA<2>\$WA5.UIM_MC.D1 ),
    .I1(\outDATA<2>\$WA5.UIM_MC.D2 ),
    .O(\outDATA<2>\$WA5.UIM_MC.D )
  );
  X_ZERO \outDATA<2>\$WA5.UIM_MC.D1_1665  (
    .O(\outDATA<2>\$WA5.UIM_MC.D1 )
  );
  X_AND2 \outDATA<2>\$WA5.UIM_MC.D2_PT_0_1666  (
    .I0(DCOR0CNTLOWr),
    .I1(\U1/U3/holdingreg0 [2]),
    .O(\outDATA<2>\$WA5.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<2>\$WA5.UIM_MC.D2_PT_1_1667  (
    .I0(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR1CNTLOWr),
    .I2(\U1/U3/holdingreg1 [2]),
    .O(\outDATA<2>\$WA5.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<2>\$WA5.UIM_MC.D2_PT_2_1668  (
    .I0(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR0CNTMIDr),
    .I3(\U1/U3/holdingreg0 [10]),
    .O(\outDATA<2>\$WA5.UIM_MC.D2_PT_2 )
  );
  X_AND5 \outDATA<2>\$WA5.UIM_MC.D2_PT_3_1669  (
    .I0(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN2 ),
    .I3(DCOR1CNTMIDr),
    .I4(\U1/U3/holdingreg1 [10]),
    .O(\outDATA<2>\$WA5.UIM_MC.D2_PT_3 )
  );
  X_AND6 \outDATA<2>\$WA5.UIM_MC.D2_PT_4_1670  (
    .I0(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN2 ),
    .I3(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN3 ),
    .I4(DCOR0CNTHIGHr),
    .I5(\U1/U3/holdingreg0 [18]),
    .O(\outDATA<2>\$WA5.UIM_MC.D2_PT_4 )
  );
  X_AND6 \outDATA<2>\$WA5.UIM_MC.D2_PT_5_1671  (
    .I0(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN3 ),
    .I4(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN4 ),
    .I5(\U1/U3/holdingreg1 [18]),
    .O(\outDATA<2>\$WA5.UIM_MC.D2_PT_5 )
  );
  X_OR6 \outDATA<2>\$WA5.UIM_MC.D2_1672  (
    .I0(\outDATA<2>\$WA5.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<2>\$WA5.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<2>\$WA5.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<2>\$WA5.UIM_MC.D2_PT_3 ),
    .I4(\outDATA<2>\$WA5.UIM_MC.D2_PT_4 ),
    .I5(\outDATA<2>\$WA5.UIM_MC.D2_PT_5 ),
    .O(\outDATA<2>\$WA5.UIM_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<2>  (
    .I(\U1/U3/holdingreg0<2>_MC.Q ),
    .O(\U1/U3/holdingreg0 [2])
  );
  X_FF \U1/U3/holdingreg0<2>_MC.REG  (
    .I(\U1/U3/holdingreg0<2>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<2>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1673  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<2>_MC.D_1674  (
    .I0(\U1/U3/holdingreg0<2>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<2>_MC.D2 ),
    .O(\U1/U3/holdingreg0<2>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<2>_MC.D1_1675  (
    .O(\U1/U3/holdingreg0<2>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<2>_MC.D2_PT_0_1676  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [2]),
    .O(\U1/U3/holdingreg0<2>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<2>_MC.D2_PT_1_1677  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<2>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<2>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [2]),
    .O(\U1/U3/holdingreg0<2>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<2>_MC.D2_1678  (
    .I0(\U1/U3/holdingreg0<2>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<2>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<2>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<2>  (
    .I(\U1/U3/holdingreg1<2>_MC.Q ),
    .O(\U1/U3/holdingreg1 [2])
  );
  X_FF \U1/U3/holdingreg1<2>_MC.REG  (
    .I(\U1/U3/holdingreg1<2>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<2>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1679  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<2>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<2>_MC.D_1680  (
    .I0(\U1/U3/holdingreg1<2>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<2>_MC.D2 ),
    .O(\U1/U3/holdingreg1<2>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<2>_MC.D1_1681  (
    .O(\U1/U3/holdingreg1<2>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<2>_MC.D2_PT_0_1682  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [2]),
    .O(\U1/U3/holdingreg1<2>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<2>_MC.D2_PT_1_1683  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<2>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<2>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [2]),
    .O(\U1/U3/holdingreg1<2>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<2>_MC.D2_1684  (
    .I0(\U1/U3/holdingreg1<2>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<2>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<2>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<10>  (
    .I(\U1/U3/holdingreg0<10>_MC.Q ),
    .O(\U1/U3/holdingreg0 [10])
  );
  X_FF \U1/U3/holdingreg0<10>_MC.REG  (
    .I(\U1/U3/holdingreg0<10>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<10>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1685  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<10>_MC.D_1686  (
    .I0(\U1/U3/holdingreg0<10>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<10>_MC.D2 ),
    .O(\U1/U3/holdingreg0<10>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<10>_MC.D1_1687  (
    .O(\U1/U3/holdingreg0<10>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<10>_MC.D2_PT_0_1688  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [10]),
    .O(\U1/U3/holdingreg0<10>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<10>_MC.D2_PT_1_1689  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<10>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<10>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [10]),
    .O(\U1/U3/holdingreg0<10>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<10>_MC.D2_1690  (
    .I0(\U1/U3/holdingreg0<10>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<10>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<10>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<10>  (
    .I(\U1/U3/holdingreg1<10>_MC.Q ),
    .O(\U1/U3/holdingreg1 [10])
  );
  X_FF \U1/U3/holdingreg1<10>_MC.REG  (
    .I(\U1/U3/holdingreg1<10>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<10>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1691  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<10>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<10>_MC.D_1692  (
    .I0(\U1/U3/holdingreg1<10>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<10>_MC.D2 ),
    .O(\U1/U3/holdingreg1<10>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<10>_MC.D1_1693  (
    .O(\U1/U3/holdingreg1<10>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<10>_MC.D2_PT_0_1694  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [10]),
    .O(\U1/U3/holdingreg1<10>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<10>_MC.D2_PT_1_1695  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<10>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<10>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [10]),
    .O(\U1/U3/holdingreg1<10>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<10>_MC.D2_1696  (
    .I0(\U1/U3/holdingreg1<10>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<10>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<10>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<18>  (
    .I(\U1/U3/holdingreg0<18>_MC.Q ),
    .O(\U1/U3/holdingreg0 [18])
  );
  X_FF \U1/U3/holdingreg0<18>_MC.REG  (
    .I(\U1/U3/holdingreg0<18>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<18>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<18>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<18>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1697  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<18>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<18>_MC.D_1698  (
    .I0(\U1/U3/holdingreg0<18>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<18>_MC.D2 ),
    .O(\U1/U3/holdingreg0<18>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<18>_MC.D1_1699  (
    .O(\U1/U3/holdingreg0<18>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<18>_MC.D2_PT_0_1700  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [18]),
    .O(\U1/U3/holdingreg0<18>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<18>_MC.D2_PT_1_1701  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<18>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<18>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [18]),
    .O(\U1/U3/holdingreg0<18>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<18>_MC.D2_1702  (
    .I0(\U1/U3/holdingreg0<18>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<18>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<18>_MC.D2 )
  );
  X_BUF \U1/Channel0<18>  (
    .I(\U1/Channel0<18>_MC.Q ),
    .O(\U1/Channel0 [18])
  );
  X_FF \U1/Channel0<18>_MC.REG  (
    .I(\U1/Channel0<18>_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<18>_MC.Q )
  );
  X_XOR2 \U1/Channel0<18>_MC.D_1703  (
    .I0(\U1/Channel0<18>_MC.D1 ),
    .I1(\U1/Channel0<18>_MC.D2 ),
    .O(\U1/Channel0<18>_MC.D )
  );
  X_AND2 \U1/Channel0<18>_MC.D1_1704  (
    .I0(\U1/Channel0 [18]),
    .I1(\U1/Channel0 [18]),
    .O(\U1/Channel0<18>_MC.D1 )
  );
  X_AND2 \U1/Channel0<18>_MC.D2_PT_0_1705  (
    .I0(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [18]),
    .O(\U1/Channel0<18>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel0<18>_MC.D2_PT_1_1706  (
    .I0(N_PZ_1132),
    .I1(N_PZ_1090),
    .I2(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN3 ),
    .I4(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I5(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN7 ),
    .I8(\U1/Channel0 [18]),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<18>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel0<18>_MC.D2_PT_2_1707  (
    .I0(N_PZ_1132),
    .I1(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_2/IN1 ),
    .I2(\U1/Channel0 [16]),
    .I3(\U1/Channel0 [13]),
    .I4(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_2/IN4 ),
    .I5(\U1/Channel0 [14]),
    .I6(\U1/Channel0 [15]),
    .I7(\U1/Channel0 [17]),
    .I8(\U1/Channel0 [18]),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<18>_MC.D2_PT_2 )
  );
  X_AND16 \U1/Channel0<18>_MC.D2_PT_3_1708  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN4 ),
    .I5(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<18>_MC.D2_PT_3 )
  );
  X_AND16 \U1/Channel0<18>_MC.D2_PT_4_1709  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_4/IN2 ),
    .I3(\U1/Channel0 [16]),
    .I4(\U1/Channel0 [13]),
    .I5(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_4/IN5 ),
    .I6(\U1/Channel0 [14]),
    .I7(\U1/Channel0 [15]),
    .I8(\U1/Channel0 [17]),
    .I9(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_4/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<18>_MC.D2_PT_4 )
  );
  X_OR5 \U1/Channel0<18>_MC.D2_1710  (
    .I0(\U1/Channel0<18>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<18>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<18>_MC.D2_PT_2 ),
    .I3(\U1/Channel0<18>_MC.D2_PT_3 ),
    .I4(\U1/Channel0<18>_MC.D2_PT_4 ),
    .O(\U1/Channel0<18>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<18>  (
    .I(\U1/U3/holdingreg1<18>_MC.Q ),
    .O(\U1/U3/holdingreg1 [18])
  );
  X_FF \U1/U3/holdingreg1<18>_MC.REG  (
    .I(\U1/U3/holdingreg1<18>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<18>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<18>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<18>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1711  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<18>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<18>_MC.D_1712  (
    .I0(\U1/U3/holdingreg1<18>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<18>_MC.D2 ),
    .O(\U1/U3/holdingreg1<18>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<18>_MC.D1_1713  (
    .O(\U1/U3/holdingreg1<18>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<18>_MC.D2_PT_0_1714  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [18]),
    .O(\U1/U3/holdingreg1<18>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<18>_MC.D2_PT_1_1715  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<18>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<18>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [18]),
    .O(\U1/U3/holdingreg1<18>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<18>_MC.D2_1716  (
    .I0(\U1/U3/holdingreg1<18>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<18>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<18>_MC.D2 )
  );
  X_BUF \U1/Channel1<18>  (
    .I(\U1/Channel1<18>_MC.Q ),
    .O(\U1/Channel1 [18])
  );
  X_XOR2 \U1/Channel1<18>_MC_tsimcreated_xor__1717  (
    .I0(\U1/Channel1<18>_MC.D ),
    .I1(\U1/Channel1<18>_MC.Q ),
    .O(\U1/Channel1<18>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<18>_MC.REG  (
    .I(\U1/Channel1<18>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<18>_MC.Q )
  );
  X_XOR2 \U1/Channel1<18>_MC.D_1718  (
    .I0(\U1/Channel1<18>_MC.D1 ),
    .I1(\U1/Channel1<18>_MC.D2 ),
    .O(\U1/Channel1<18>_MC.D )
  );
  X_ZERO \U1/Channel1<18>_MC.D1_1719  (
    .O(\U1/Channel1<18>_MC.D1 )
  );
  X_AND2 \U1/Channel1<18>_MC.D2_PT_0_1720  (
    .I0(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [18]),
    .O(\U1/Channel1<18>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel1<18>_MC.D2_PT_1_1721  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN8 ),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<18>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel1<18>_MC.D2_PT_2_1722  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [16]),
    .I4(\U1/Channel1 [13]),
    .I5(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel1 [14]),
    .I7(\U1/Channel1 [15]),
    .I8(\U1/Channel1 [17]),
    .I9(Vcc),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<18>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<18>_MC.D2_1723  (
    .I0(\U1/Channel1<18>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<18>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<18>_MC.D2_PT_2 ),
    .O(\U1/Channel1<18>_MC.D2 )
  );
  X_BUF \outDATA<3>\$WA0.UIM_1724  (
    .I(\outDATA<3>\$WA0.UIM_MC.Q ),
    .O(\outDATA<3>\$WA0.UIM )
  );
  X_BUF \outDATA<3>\$WA0.UIM_MC.Q_1725  (
    .I(\outDATA<3>\$WA0.UIM_MC.D ),
    .O(\outDATA<3>\$WA0.UIM_MC.Q )
  );
  X_XOR2 \outDATA<3>\$WA0.UIM_MC.D_1726  (
    .I0(\outDATA<3>\$WA0.UIM_MC.D1 ),
    .I1(\outDATA<3>\$WA0.UIM_MC.D2 ),
    .O(\outDATA<3>\$WA0.UIM_MC.D )
  );
  X_AND2 \outDATA<3>\$WA0.UIM_MC.D1_1727  (
    .I0(U11_U3_counterr[3]),
    .I1(U11_U3_counterr[3]),
    .O(\outDATA<3>\$WA0.UIM_MC.D1 )
  );
  X_ZERO \outDATA<3>\$WA0.UIM_MC.D2_1728  (
    .O(\outDATA<3>\$WA0.UIM_MC.D2 )
  );
  X_BUF \outDATA<3>\$WA1.UIM_1729  (
    .I(\outDATA<3>\$WA1.UIM_MC.Q ),
    .O(\outDATA<3>\$WA1.UIM )
  );
  X_BUF \outDATA<3>\$WA1.UIM_MC.Q_1730  (
    .I(\outDATA<3>\$WA1.UIM_MC.D ),
    .O(\outDATA<3>\$WA1.UIM_MC.Q )
  );
  X_XOR2 \outDATA<3>\$WA1.UIM_MC.D_1731  (
    .I0(\outDATA<3>\$WA1.UIM_MC.D1 ),
    .I1(\outDATA<3>\$WA1.UIM_MC.D2 ),
    .O(\outDATA<3>\$WA1.UIM_MC.D )
  );
  X_AND2 \outDATA<3>\$WA1.UIM_MC.D1_1732  (
    .I0(\I2CS<3>_II/UIM ),
    .I1(\I2CS<3>_II/UIM ),
    .O(\outDATA<3>\$WA1.UIM_MC.D1 )
  );
  X_ZERO \outDATA<3>\$WA1.UIM_MC.D2_1733  (
    .O(\outDATA<3>\$WA1.UIM_MC.D2 )
  );
  X_BUF \outDATA<3>\$WA2.UIM_1734  (
    .I(\outDATA<3>\$WA2.UIM_MC.Q ),
    .O(\outDATA<3>\$WA2.UIM )
  );
  X_BUF \outDATA<3>\$WA2.UIM_MC.Q_1735  (
    .I(\outDATA<3>\$WA2.UIM_MC.D ),
    .O(\outDATA<3>\$WA2.UIM_MC.Q )
  );
  X_XOR2 \outDATA<3>\$WA2.UIM_MC.D_1736  (
    .I0(\outDATA<3>\$WA2.UIM_MC.D1 ),
    .I1(\outDATA<3>\$WA2.UIM_MC.D2 ),
    .O(\outDATA<3>\$WA2.UIM_MC.D )
  );
  X_AND2 \outDATA<3>\$WA2.UIM_MC.D1_1737  (
    .I0(NET3248),
    .I1(NET3248),
    .O(\outDATA<3>\$WA2.UIM_MC.D1 )
  );
  X_ZERO \outDATA<3>\$WA2.UIM_MC.D2_1738  (
    .O(\outDATA<3>\$WA2.UIM_MC.D2 )
  );
  X_BUF \outDATA<3>\$WA3.UIM_1739  (
    .I(\outDATA<3>\$WA3.UIM_MC.Q ),
    .O(\outDATA<3>\$WA3.UIM )
  );
  X_BUF \outDATA<3>\$WA3.UIM_MC.Q_1740  (
    .I(\outDATA<3>\$WA3.UIM_MC.D ),
    .O(\outDATA<3>\$WA3.UIM_MC.Q )
  );
  X_XOR2 \outDATA<3>\$WA3.UIM_MC.D_1741  (
    .I0(\outDATA<3>\$WA3.UIM_MC.D1 ),
    .I1(\outDATA<3>\$WA3.UIM_MC.D2 ),
    .O(\outDATA<3>\$WA3.UIM_MC.D )
  );
  X_ZERO \outDATA<3>\$WA3.UIM_MC.D1_1742  (
    .O(\outDATA<3>\$WA3.UIM_MC.D1 )
  );
  X_AND2 \outDATA<3>\$WA3.UIM_MC.D2_PT_0_1743  (
    .I0(NET2528),
    .I1(\U4/Flgreg [3]),
    .O(\outDATA<3>\$WA3.UIM_MC.D2_PT_0 )
  );
  X_AND2 \outDATA<3>\$WA3.UIM_MC.D2_PT_1_1744  (
    .I0(\NlwInverterSignal_outDATA<3>\$WA3.UIM_MC.D2_PT_1/IN0 ),
    .I1(\Enc05FLG_II/UIM ),
    .O(\outDATA<3>\$WA3.UIM_MC.D2_PT_1 )
  );
  X_OR2 \outDATA<3>\$WA3.UIM_MC.D2_1745  (
    .I0(\outDATA<3>\$WA3.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<3>\$WA3.UIM_MC.D2_PT_1 ),
    .O(\outDATA<3>\$WA3.UIM_MC.D2 )
  );
  X_BUF \outDATA<3>\$WA4.UIM_1746  (
    .I(\outDATA<3>\$WA4.UIM_MC.Q ),
    .O(\outDATA<3>\$WA4.UIM )
  );
  X_BUF \outDATA<3>\$WA4.UIM_MC.Q_1747  (
    .I(\outDATA<3>\$WA4.UIM_MC.D ),
    .O(\outDATA<3>\$WA4.UIM_MC.Q )
  );
  X_XOR2 \outDATA<3>\$WA4.UIM_MC.D_1748  (
    .I0(\outDATA<3>\$WA4.UIM_MC.D1 ),
    .I1(\outDATA<3>\$WA4.UIM_MC.D2 ),
    .O(\outDATA<3>\$WA4.UIM_MC.D )
  );
  X_ZERO \outDATA<3>\$WA4.UIM_MC.D1_1749  (
    .O(\outDATA<3>\$WA4.UIM_MC.D1 )
  );
  X_AND2 \outDATA<3>\$WA4.UIM_MC.D2_PT_0_1750  (
    .I0(DCOR0THRESLOWr),
    .I1(\U1/U4/Latch0r [3]),
    .O(\outDATA<3>\$WA4.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<3>\$WA4.UIM_MC.D2_PT_1_1751  (
    .I0(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR0THRESMIDr),
    .I2(\U1/U4/Latch0r [11]),
    .O(\outDATA<3>\$WA4.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<3>\$WA4.UIM_MC.D2_PT_2_1752  (
    .I0(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR1THRESLOWr),
    .I3(\U1/U4/Latch1r [3]),
    .O(\outDATA<3>\$WA4.UIM_MC.D2_PT_2 )
  );
  X_AND4 \outDATA<3>\$WA4.UIM_MC.D2_PT_3_1753  (
    .I0(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN2 ),
    .I3(\U1/U4/Latch1r [11]),
    .O(\outDATA<3>\$WA4.UIM_MC.D2_PT_3 )
  );
  X_OR4 \outDATA<3>\$WA4.UIM_MC.D2_1754  (
    .I0(\outDATA<3>\$WA4.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<3>\$WA4.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<3>\$WA4.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<3>\$WA4.UIM_MC.D2_PT_3 ),
    .O(\outDATA<3>\$WA4.UIM_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<3>  (
    .I(\U1/U4/Latch0r<3>_MC.Q ),
    .O(\U1/U4/Latch0r [3])
  );
  X_FF \U1/U4/Latch0r<3>_MC.REG  (
    .I(\U1/U4/Latch0r<3>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<3>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1755  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<3>_MC.D_1756  (
    .I0(\U1/U4/Latch0r<3>_MC.D1 ),
    .I1(\U1/U4/Latch0r<3>_MC.D2 ),
    .O(\U1/U4/Latch0r<3>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<3>_MC.D1_1757  (
    .O(\U1/U4/Latch0r<3>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<3>_MC.D2_PT_0_1758  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<3>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [3]),
    .O(\U1/U4/Latch0r<3>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<3>_MC.D2_PT_1_1759  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<3>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<3>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [3]),
    .O(\U1/U4/Latch0r<3>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<3>_MC.D2_1760  (
    .I0(\U1/U4/Latch0r<3>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<3>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<3>_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<11>  (
    .I(\U1/U4/Latch0r<11>_MC.Q ),
    .O(\U1/U4/Latch0r [11])
  );
  X_FF \U1/U4/Latch0r<11>_MC.REG  (
    .I(\U1/U4/Latch0r<11>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<11>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1761  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<11>_MC.D_1762  (
    .I0(\U1/U4/Latch0r<11>_MC.D1 ),
    .I1(\U1/U4/Latch0r<11>_MC.D2 ),
    .O(\U1/U4/Latch0r<11>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<11>_MC.D1_1763  (
    .O(\U1/U4/Latch0r<11>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<11>_MC.D2_PT_0_1764  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<11>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [11]),
    .O(\U1/U4/Latch0r<11>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<11>_MC.D2_PT_1_1765  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<11>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<11>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [11]),
    .O(\U1/U4/Latch0r<11>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<11>_MC.D2_1766  (
    .I0(\U1/U4/Latch0r<11>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<11>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<11>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<3>  (
    .I(\U1/U4/Latch1r<3>_MC.Q ),
    .O(\U1/U4/Latch1r [3])
  );
  X_FF \U1/U4/Latch1r<3>_MC.REG  (
    .I(\U1/U4/Latch1r<3>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<3>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1767  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<3>_MC.D_1768  (
    .I0(\U1/U4/Latch1r<3>_MC.D1 ),
    .I1(\U1/U4/Latch1r<3>_MC.D2 ),
    .O(\U1/U4/Latch1r<3>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<3>_MC.D1_1769  (
    .O(\U1/U4/Latch1r<3>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<3>_MC.D2_PT_0_1770  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [3]),
    .O(\U1/U4/Latch1r<3>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<3>_MC.D2_PT_1_1771  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<3>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<3>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<3>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [3]),
    .O(\U1/U4/Latch1r<3>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<3>_MC.D2_1772  (
    .I0(\U1/U4/Latch1r<3>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<3>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<3>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<11>  (
    .I(\U1/U4/Latch1r<11>_MC.Q ),
    .O(\U1/U4/Latch1r [11])
  );
  X_FF \U1/U4/Latch1r<11>_MC.REG  (
    .I(\U1/U4/Latch1r<11>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<11>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1773  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<11>_MC.D_1774  (
    .I0(\U1/U4/Latch1r<11>_MC.D1 ),
    .I1(\U1/U4/Latch1r<11>_MC.D2 ),
    .O(\U1/U4/Latch1r<11>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<11>_MC.D1_1775  (
    .O(\U1/U4/Latch1r<11>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<11>_MC.D2_PT_0_1776  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [11]),
    .O(\U1/U4/Latch1r<11>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<11>_MC.D2_PT_1_1777  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<11>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<11>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<11>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [11]),
    .O(\U1/U4/Latch1r<11>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<11>_MC.D2_1778  (
    .I0(\U1/U4/Latch1r<11>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<11>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<11>_MC.D2 )
  );
  X_BUF \outDATA<3>\$WA5.UIM_1779  (
    .I(\outDATA<3>\$WA5.UIM_MC.Q ),
    .O(\outDATA<3>\$WA5.UIM )
  );
  X_BUF \outDATA<3>\$WA5.UIM_MC.Q_1780  (
    .I(\outDATA<3>\$WA5.UIM_MC.D ),
    .O(\outDATA<3>\$WA5.UIM_MC.Q )
  );
  X_XOR2 \outDATA<3>\$WA5.UIM_MC.D_1781  (
    .I0(\outDATA<3>\$WA5.UIM_MC.D1 ),
    .I1(\outDATA<3>\$WA5.UIM_MC.D2 ),
    .O(\outDATA<3>\$WA5.UIM_MC.D )
  );
  X_ZERO \outDATA<3>\$WA5.UIM_MC.D1_1782  (
    .O(\outDATA<3>\$WA5.UIM_MC.D1 )
  );
  X_AND2 \outDATA<3>\$WA5.UIM_MC.D2_PT_0_1783  (
    .I0(DCOR0CNTLOWr),
    .I1(\U1/U3/holdingreg0 [3]),
    .O(\outDATA<3>\$WA5.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<3>\$WA5.UIM_MC.D2_PT_1_1784  (
    .I0(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR1CNTLOWr),
    .I2(\U1/U3/holdingreg1 [3]),
    .O(\outDATA<3>\$WA5.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<3>\$WA5.UIM_MC.D2_PT_2_1785  (
    .I0(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR0CNTMIDr),
    .I3(\U1/U3/holdingreg0 [11]),
    .O(\outDATA<3>\$WA5.UIM_MC.D2_PT_2 )
  );
  X_AND5 \outDATA<3>\$WA5.UIM_MC.D2_PT_3_1786  (
    .I0(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN2 ),
    .I3(DCOR1CNTMIDr),
    .I4(\U1/U3/holdingreg1 [11]),
    .O(\outDATA<3>\$WA5.UIM_MC.D2_PT_3 )
  );
  X_AND6 \outDATA<3>\$WA5.UIM_MC.D2_PT_4_1787  (
    .I0(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN2 ),
    .I3(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN3 ),
    .I4(DCOR0CNTHIGHr),
    .I5(\U1/U3/holdingreg0 [19]),
    .O(\outDATA<3>\$WA5.UIM_MC.D2_PT_4 )
  );
  X_AND6 \outDATA<3>\$WA5.UIM_MC.D2_PT_5_1788  (
    .I0(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN3 ),
    .I4(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN4 ),
    .I5(\U1/U3/holdingreg1 [19]),
    .O(\outDATA<3>\$WA5.UIM_MC.D2_PT_5 )
  );
  X_OR6 \outDATA<3>\$WA5.UIM_MC.D2_1789  (
    .I0(\outDATA<3>\$WA5.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<3>\$WA5.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<3>\$WA5.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<3>\$WA5.UIM_MC.D2_PT_3 ),
    .I4(\outDATA<3>\$WA5.UIM_MC.D2_PT_4 ),
    .I5(\outDATA<3>\$WA5.UIM_MC.D2_PT_5 ),
    .O(\outDATA<3>\$WA5.UIM_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<3>  (
    .I(\U1/U3/holdingreg0<3>_MC.Q ),
    .O(\U1/U3/holdingreg0 [3])
  );
  X_FF \U1/U3/holdingreg0<3>_MC.REG  (
    .I(\U1/U3/holdingreg0<3>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<3>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1790  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<3>_MC.D_1791  (
    .I0(\U1/U3/holdingreg0<3>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<3>_MC.D2 ),
    .O(\U1/U3/holdingreg0<3>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<3>_MC.D1_1792  (
    .O(\U1/U3/holdingreg0<3>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<3>_MC.D2_PT_0_1793  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [3]),
    .O(\U1/U3/holdingreg0<3>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<3>_MC.D2_PT_1_1794  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<3>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<3>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [3]),
    .O(\U1/U3/holdingreg0<3>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<3>_MC.D2_1795  (
    .I0(\U1/U3/holdingreg0<3>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<3>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<3>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<3>  (
    .I(\U1/U3/holdingreg1<3>_MC.Q ),
    .O(\U1/U3/holdingreg1 [3])
  );
  X_FF \U1/U3/holdingreg1<3>_MC.REG  (
    .I(\U1/U3/holdingreg1<3>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<3>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1796  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<3>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<3>_MC.D_1797  (
    .I0(\U1/U3/holdingreg1<3>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<3>_MC.D2 ),
    .O(\U1/U3/holdingreg1<3>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<3>_MC.D1_1798  (
    .O(\U1/U3/holdingreg1<3>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<3>_MC.D2_PT_0_1799  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [3]),
    .O(\U1/U3/holdingreg1<3>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<3>_MC.D2_PT_1_1800  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<3>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<3>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [3]),
    .O(\U1/U3/holdingreg1<3>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<3>_MC.D2_1801  (
    .I0(\U1/U3/holdingreg1<3>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<3>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<3>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<11>  (
    .I(\U1/U3/holdingreg0<11>_MC.Q ),
    .O(\U1/U3/holdingreg0 [11])
  );
  X_FF \U1/U3/holdingreg0<11>_MC.REG  (
    .I(\U1/U3/holdingreg0<11>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<11>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1802  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<11>_MC.D_1803  (
    .I0(\U1/U3/holdingreg0<11>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<11>_MC.D2 ),
    .O(\U1/U3/holdingreg0<11>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<11>_MC.D1_1804  (
    .O(\U1/U3/holdingreg0<11>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<11>_MC.D2_PT_0_1805  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [11]),
    .O(\U1/U3/holdingreg0<11>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<11>_MC.D2_PT_1_1806  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<11>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<11>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [11]),
    .O(\U1/U3/holdingreg0<11>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<11>_MC.D2_1807  (
    .I0(\U1/U3/holdingreg0<11>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<11>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<11>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<11>  (
    .I(\U1/U3/holdingreg1<11>_MC.Q ),
    .O(\U1/U3/holdingreg1 [11])
  );
  X_FF \U1/U3/holdingreg1<11>_MC.REG  (
    .I(\U1/U3/holdingreg1<11>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<11>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1808  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<11>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<11>_MC.D_1809  (
    .I0(\U1/U3/holdingreg1<11>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<11>_MC.D2 ),
    .O(\U1/U3/holdingreg1<11>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<11>_MC.D1_1810  (
    .O(\U1/U3/holdingreg1<11>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<11>_MC.D2_PT_0_1811  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [11]),
    .O(\U1/U3/holdingreg1<11>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<11>_MC.D2_PT_1_1812  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<11>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<11>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [11]),
    .O(\U1/U3/holdingreg1<11>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<11>_MC.D2_1813  (
    .I0(\U1/U3/holdingreg1<11>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<11>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<11>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<19>  (
    .I(\U1/U3/holdingreg0<19>_MC.Q ),
    .O(\U1/U3/holdingreg0 [19])
  );
  X_FF \U1/U3/holdingreg0<19>_MC.REG  (
    .I(\U1/U3/holdingreg0<19>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<19>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<19>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<19>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1814  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<19>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<19>_MC.D_1815  (
    .I0(\U1/U3/holdingreg0<19>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<19>_MC.D2 ),
    .O(\U1/U3/holdingreg0<19>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<19>_MC.D1_1816  (
    .O(\U1/U3/holdingreg0<19>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<19>_MC.D2_PT_0_1817  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [19]),
    .O(\U1/U3/holdingreg0<19>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<19>_MC.D2_PT_1_1818  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<19>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<19>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [19]),
    .O(\U1/U3/holdingreg0<19>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<19>_MC.D2_1819  (
    .I0(\U1/U3/holdingreg0<19>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<19>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<19>_MC.D2 )
  );
  X_BUF \U1/Channel0<19>  (
    .I(\U1/Channel0<19>_MC.Q ),
    .O(\U1/Channel0 [19])
  );
  X_FF \U1/Channel0<19>_MC.REG  (
    .I(\U1/Channel0<19>_MC.D ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<19>_MC.Q )
  );
  X_XOR2 \U1/Channel0<19>_MC.D_1820  (
    .I0(\U1/Channel0<19>_MC.D1 ),
    .I1(\U1/Channel0<19>_MC.D2 ),
    .O(\U1/Channel0<19>_MC.D )
  );
  X_AND2 \U1/Channel0<19>_MC.D1_1821  (
    .I0(\U1/Channel0 [19]),
    .I1(\U1/Channel0 [19]),
    .O(\U1/Channel0<19>_MC.D1 )
  );
  X_AND2 \U1/Channel0<19>_MC.D2_PT_0_1822  (
    .I0(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [19]),
    .O(\U1/Channel0<19>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel0<19>_MC.D2_PT_1_1823  (
    .I0(N_PZ_1132),
    .I1(N_PZ_1090),
    .I2(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN2 ),
    .I3(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN3 ),
    .I4(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I5(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN5 ),
    .I6(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN8 ),
    .I9(\U1/Channel0 [19]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<19>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel0<19>_MC.D2_PT_2_1824  (
    .I0(N_PZ_1132),
    .I1(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_2/IN1 ),
    .I2(\U1/Channel0 [16]),
    .I3(\U1/Channel0 [13]),
    .I4(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_2/IN4 ),
    .I5(\U1/Channel0 [14]),
    .I6(\U1/Channel0 [15]),
    .I7(\U1/Channel0 [17]),
    .I8(\U1/Channel0 [18]),
    .I9(\U1/Channel0 [19]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<19>_MC.D2_PT_2 )
  );
  X_AND16 \U1/Channel0<19>_MC.D2_PT_3_1825  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN4 ),
    .I5(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN9 ),
    .I10(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN10 ),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<19>_MC.D2_PT_3 )
  );
  X_AND16 \U1/Channel0<19>_MC.D2_PT_4_1826  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_4/IN2 ),
    .I3(\U1/Channel0 [16]),
    .I4(\U1/Channel0 [13]),
    .I5(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_4/IN5 ),
    .I6(\U1/Channel0 [14]),
    .I7(\U1/Channel0 [15]),
    .I8(\U1/Channel0 [17]),
    .I9(\U1/Channel0 [18]),
    .I10(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_4/IN10 ),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<19>_MC.D2_PT_4 )
  );
  X_OR5 \U1/Channel0<19>_MC.D2_1827  (
    .I0(\U1/Channel0<19>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<19>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<19>_MC.D2_PT_2 ),
    .I3(\U1/Channel0<19>_MC.D2_PT_3 ),
    .I4(\U1/Channel0<19>_MC.D2_PT_4 ),
    .O(\U1/Channel0<19>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<19>  (
    .I(\U1/U3/holdingreg1<19>_MC.Q ),
    .O(\U1/U3/holdingreg1 [19])
  );
  X_FF \U1/U3/holdingreg1<19>_MC.REG  (
    .I(\U1/U3/holdingreg1<19>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<19>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<19>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<19>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1828  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<19>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<19>_MC.D_1829  (
    .I0(\U1/U3/holdingreg1<19>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<19>_MC.D2 ),
    .O(\U1/U3/holdingreg1<19>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<19>_MC.D1_1830  (
    .O(\U1/U3/holdingreg1<19>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<19>_MC.D2_PT_0_1831  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [19]),
    .O(\U1/U3/holdingreg1<19>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<19>_MC.D2_PT_1_1832  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<19>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<19>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [19]),
    .O(\U1/U3/holdingreg1<19>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<19>_MC.D2_1833  (
    .I0(\U1/U3/holdingreg1<19>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<19>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<19>_MC.D2 )
  );
  X_BUF \U1/Channel1<19>  (
    .I(\U1/Channel1<19>_MC.Q ),
    .O(\U1/Channel1 [19])
  );
  X_XOR2 \U1/Channel1<19>_MC_tsimcreated_xor__1834  (
    .I0(\U1/Channel1<19>_MC.D ),
    .I1(\U1/Channel1<19>_MC.Q ),
    .O(\U1/Channel1<19>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<19>_MC.REG  (
    .I(\U1/Channel1<19>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<19>_MC.Q )
  );
  X_XOR2 \U1/Channel1<19>_MC.D_1835  (
    .I0(\U1/Channel1<19>_MC.D1 ),
    .I1(\U1/Channel1<19>_MC.D2 ),
    .O(\U1/Channel1<19>_MC.D )
  );
  X_ZERO \U1/Channel1<19>_MC.D1_1836  (
    .O(\U1/Channel1<19>_MC.D1 )
  );
  X_AND2 \U1/Channel1<19>_MC.D2_PT_0_1837  (
    .I0(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [19]),
    .O(\U1/Channel1<19>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel1<19>_MC.D2_PT_1_1838  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN9 ),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<19>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel1<19>_MC.D2_PT_2_1839  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [16]),
    .I4(\U1/Channel1 [13]),
    .I5(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel1 [14]),
    .I7(\U1/Channel1 [15]),
    .I8(\U1/Channel1 [17]),
    .I9(\U1/Channel1 [18]),
    .I10(Vcc),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<19>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<19>_MC.D2_1840  (
    .I0(\U1/Channel1<19>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<19>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<19>_MC.D2_PT_2 ),
    .O(\U1/Channel1<19>_MC.D2 )
  );
  X_BUF \outDATA<4>\$WA0.UIM_1841  (
    .I(\outDATA<4>\$WA0.UIM_MC.Q ),
    .O(\outDATA<4>\$WA0.UIM )
  );
  X_BUF \outDATA<4>\$WA0.UIM_MC.Q_1842  (
    .I(\outDATA<4>\$WA0.UIM_MC.D ),
    .O(\outDATA<4>\$WA0.UIM_MC.Q )
  );
  X_XOR2 \outDATA<4>\$WA0.UIM_MC.D_1843  (
    .I0(\outDATA<4>\$WA0.UIM_MC.D1 ),
    .I1(\outDATA<4>\$WA0.UIM_MC.D2 ),
    .O(\outDATA<4>\$WA0.UIM_MC.D )
  );
  X_AND2 \outDATA<4>\$WA0.UIM_MC.D1_1844  (
    .I0(U11_U3_counterr[4]),
    .I1(U11_U3_counterr[4]),
    .O(\outDATA<4>\$WA0.UIM_MC.D1 )
  );
  X_ZERO \outDATA<4>\$WA0.UIM_MC.D2_1845  (
    .O(\outDATA<4>\$WA0.UIM_MC.D2 )
  );
  X_BUF \outDATA<4>\$WA1.UIM_1846  (
    .I(\outDATA<4>\$WA1.UIM_MC.Q ),
    .O(\outDATA<4>\$WA1.UIM )
  );
  X_BUF \outDATA<4>\$WA1.UIM_MC.Q_1847  (
    .I(\outDATA<4>\$WA1.UIM_MC.D ),
    .O(\outDATA<4>\$WA1.UIM_MC.Q )
  );
  X_XOR2 \outDATA<4>\$WA1.UIM_MC.D_1848  (
    .I0(\outDATA<4>\$WA1.UIM_MC.D1 ),
    .I1(\outDATA<4>\$WA1.UIM_MC.D2 ),
    .O(\outDATA<4>\$WA1.UIM_MC.D )
  );
  X_AND2 \outDATA<4>\$WA1.UIM_MC.D1_1849  (
    .I0(\I2CS<4>_II/UIM ),
    .I1(\I2CS<4>_II/UIM ),
    .O(\outDATA<4>\$WA1.UIM_MC.D1 )
  );
  X_ZERO \outDATA<4>\$WA1.UIM_MC.D2_1850  (
    .O(\outDATA<4>\$WA1.UIM_MC.D2 )
  );
  X_BUF \outDATA<4>\$WA2.UIM_1851  (
    .I(\outDATA<4>\$WA2.UIM_MC.Q ),
    .O(\outDATA<4>\$WA2.UIM )
  );
  X_BUF \outDATA<4>\$WA2.UIM_MC.Q_1852  (
    .I(\outDATA<4>\$WA2.UIM_MC.D ),
    .O(\outDATA<4>\$WA2.UIM_MC.Q )
  );
  X_XOR2 \outDATA<4>\$WA2.UIM_MC.D_1853  (
    .I0(\outDATA<4>\$WA2.UIM_MC.D1 ),
    .I1(\outDATA<4>\$WA2.UIM_MC.D2 ),
    .O(\outDATA<4>\$WA2.UIM_MC.D )
  );
  X_AND2 \outDATA<4>\$WA2.UIM_MC.D1_1854  (
    .I0(\RLS1_II/UIM ),
    .I1(\RLS1_II/UIM ),
    .O(\outDATA<4>\$WA2.UIM_MC.D1 )
  );
  X_ZERO \outDATA<4>\$WA2.UIM_MC.D2_1855  (
    .O(\outDATA<4>\$WA2.UIM_MC.D2 )
  );
  X_BUF \outDATA<4>\$WA3.UIM_1856  (
    .I(\outDATA<4>\$WA3.UIM_MC.Q ),
    .O(\outDATA<4>\$WA3.UIM )
  );
  X_BUF \outDATA<4>\$WA3.UIM_MC.Q_1857  (
    .I(\outDATA<4>\$WA3.UIM_MC.D ),
    .O(\outDATA<4>\$WA3.UIM_MC.Q )
  );
  X_XOR2 \outDATA<4>\$WA3.UIM_MC.D_1858  (
    .I0(\outDATA<4>\$WA3.UIM_MC.D1 ),
    .I1(\outDATA<4>\$WA3.UIM_MC.D2 ),
    .O(\outDATA<4>\$WA3.UIM_MC.D )
  );
  X_ZERO \outDATA<4>\$WA3.UIM_MC.D1_1859  (
    .O(\outDATA<4>\$WA3.UIM_MC.D1 )
  );
  X_AND2 \outDATA<4>\$WA3.UIM_MC.D2_PT_0_1860  (
    .I0(NET2528),
    .I1(\U4/Flgreg [4]),
    .O(\outDATA<4>\$WA3.UIM_MC.D2_PT_0 )
  );
  X_AND2 \outDATA<4>\$WA3.UIM_MC.D2_PT_1_1861  (
    .I0(\NlwInverterSignal_outDATA<4>\$WA3.UIM_MC.D2_PT_1/IN0 ),
    .I1(\Home133FLG_II/UIM ),
    .O(\outDATA<4>\$WA3.UIM_MC.D2_PT_1 )
  );
  X_OR2 \outDATA<4>\$WA3.UIM_MC.D2_1862  (
    .I0(\outDATA<4>\$WA3.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<4>\$WA3.UIM_MC.D2_PT_1 ),
    .O(\outDATA<4>\$WA3.UIM_MC.D2 )
  );
  X_BUF \outDATA<4>\$WA4.UIM_1863  (
    .I(\outDATA<4>\$WA4.UIM_MC.Q ),
    .O(\outDATA<4>\$WA4.UIM )
  );
  X_BUF \outDATA<4>\$WA4.UIM_MC.Q_1864  (
    .I(\outDATA<4>\$WA4.UIM_MC.D ),
    .O(\outDATA<4>\$WA4.UIM_MC.Q )
  );
  X_XOR2 \outDATA<4>\$WA4.UIM_MC.D_1865  (
    .I0(\outDATA<4>\$WA4.UIM_MC.D1 ),
    .I1(\outDATA<4>\$WA4.UIM_MC.D2 ),
    .O(\outDATA<4>\$WA4.UIM_MC.D )
  );
  X_ZERO \outDATA<4>\$WA4.UIM_MC.D1_1866  (
    .O(\outDATA<4>\$WA4.UIM_MC.D1 )
  );
  X_AND2 \outDATA<4>\$WA4.UIM_MC.D2_PT_0_1867  (
    .I0(DCOR0THRESLOWr),
    .I1(\U1/U4/Latch0r [4]),
    .O(\outDATA<4>\$WA4.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<4>\$WA4.UIM_MC.D2_PT_1_1868  (
    .I0(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR0THRESMIDr),
    .I2(\U1/U4/Latch0r [12]),
    .O(\outDATA<4>\$WA4.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<4>\$WA4.UIM_MC.D2_PT_2_1869  (
    .I0(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR1THRESLOWr),
    .I3(\U1/U4/Latch1r [4]),
    .O(\outDATA<4>\$WA4.UIM_MC.D2_PT_2 )
  );
  X_AND4 \outDATA<4>\$WA4.UIM_MC.D2_PT_3_1870  (
    .I0(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN2 ),
    .I3(\U1/U4/Latch1r [12]),
    .O(\outDATA<4>\$WA4.UIM_MC.D2_PT_3 )
  );
  X_OR4 \outDATA<4>\$WA4.UIM_MC.D2_1871  (
    .I0(\outDATA<4>\$WA4.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<4>\$WA4.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<4>\$WA4.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<4>\$WA4.UIM_MC.D2_PT_3 ),
    .O(\outDATA<4>\$WA4.UIM_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<4>  (
    .I(\U1/U4/Latch0r<4>_MC.Q ),
    .O(\U1/U4/Latch0r [4])
  );
  X_FF \U1/U4/Latch0r<4>_MC.REG  (
    .I(\U1/U4/Latch0r<4>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<4>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1872  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<4>_MC.D_1873  (
    .I0(\U1/U4/Latch0r<4>_MC.D1 ),
    .I1(\U1/U4/Latch0r<4>_MC.D2 ),
    .O(\U1/U4/Latch0r<4>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<4>_MC.D1_1874  (
    .O(\U1/U4/Latch0r<4>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<4>_MC.D2_PT_0_1875  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<4>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [4]),
    .O(\U1/U4/Latch0r<4>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<4>_MC.D2_PT_1_1876  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<4>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<4>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [4]),
    .O(\U1/U4/Latch0r<4>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<4>_MC.D2_1877  (
    .I0(\U1/U4/Latch0r<4>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<4>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<4>_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<12>  (
    .I(\U1/U4/Latch0r<12>_MC.Q ),
    .O(\U1/U4/Latch0r [12])
  );
  X_FF \U1/U4/Latch0r<12>_MC.REG  (
    .I(\U1/U4/Latch0r<12>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<12>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1878  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<12>_MC.D_1879  (
    .I0(\U1/U4/Latch0r<12>_MC.D1 ),
    .I1(\U1/U4/Latch0r<12>_MC.D2 ),
    .O(\U1/U4/Latch0r<12>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<12>_MC.D1_1880  (
    .O(\U1/U4/Latch0r<12>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<12>_MC.D2_PT_0_1881  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<12>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [12]),
    .O(\U1/U4/Latch0r<12>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<12>_MC.D2_PT_1_1882  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<12>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<12>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [12]),
    .O(\U1/U4/Latch0r<12>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<12>_MC.D2_1883  (
    .I0(\U1/U4/Latch0r<12>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<12>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<12>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<4>  (
    .I(\U1/U4/Latch1r<4>_MC.Q ),
    .O(\U1/U4/Latch1r [4])
  );
  X_FF \U1/U4/Latch1r<4>_MC.REG  (
    .I(\U1/U4/Latch1r<4>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<4>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1884  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<4>_MC.D_1885  (
    .I0(\U1/U4/Latch1r<4>_MC.D1 ),
    .I1(\U1/U4/Latch1r<4>_MC.D2 ),
    .O(\U1/U4/Latch1r<4>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<4>_MC.D1_1886  (
    .O(\U1/U4/Latch1r<4>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<4>_MC.D2_PT_0_1887  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [4]),
    .O(\U1/U4/Latch1r<4>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<4>_MC.D2_PT_1_1888  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<4>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<4>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<4>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [4]),
    .O(\U1/U4/Latch1r<4>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<4>_MC.D2_1889  (
    .I0(\U1/U4/Latch1r<4>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<4>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<4>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<12>  (
    .I(\U1/U4/Latch1r<12>_MC.Q ),
    .O(\U1/U4/Latch1r [12])
  );
  X_FF \U1/U4/Latch1r<12>_MC.REG  (
    .I(\U1/U4/Latch1r<12>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<12>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1890  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<12>_MC.D_1891  (
    .I0(\U1/U4/Latch1r<12>_MC.D1 ),
    .I1(\U1/U4/Latch1r<12>_MC.D2 ),
    .O(\U1/U4/Latch1r<12>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<12>_MC.D1_1892  (
    .O(\U1/U4/Latch1r<12>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<12>_MC.D2_PT_0_1893  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [12]),
    .O(\U1/U4/Latch1r<12>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<12>_MC.D2_PT_1_1894  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<12>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<12>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<12>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [12]),
    .O(\U1/U4/Latch1r<12>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<12>_MC.D2_1895  (
    .I0(\U1/U4/Latch1r<12>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<12>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<12>_MC.D2 )
  );
  X_BUF \outDATA<4>\$WA5.UIM_1896  (
    .I(\outDATA<4>\$WA5.UIM_MC.Q ),
    .O(\outDATA<4>\$WA5.UIM )
  );
  X_BUF \outDATA<4>\$WA5.UIM_MC.Q_1897  (
    .I(\outDATA<4>\$WA5.UIM_MC.D ),
    .O(\outDATA<4>\$WA5.UIM_MC.Q )
  );
  X_XOR2 \outDATA<4>\$WA5.UIM_MC.D_1898  (
    .I0(\outDATA<4>\$WA5.UIM_MC.D1 ),
    .I1(\outDATA<4>\$WA5.UIM_MC.D2 ),
    .O(\outDATA<4>\$WA5.UIM_MC.D )
  );
  X_ZERO \outDATA<4>\$WA5.UIM_MC.D1_1899  (
    .O(\outDATA<4>\$WA5.UIM_MC.D1 )
  );
  X_AND2 \outDATA<4>\$WA5.UIM_MC.D2_PT_0_1900  (
    .I0(DCOR0CNTLOWr),
    .I1(\U1/U3/holdingreg0 [4]),
    .O(\outDATA<4>\$WA5.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<4>\$WA5.UIM_MC.D2_PT_1_1901  (
    .I0(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR1CNTLOWr),
    .I2(\U1/U3/holdingreg1 [4]),
    .O(\outDATA<4>\$WA5.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<4>\$WA5.UIM_MC.D2_PT_2_1902  (
    .I0(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR0CNTMIDr),
    .I3(\U1/U3/holdingreg0 [12]),
    .O(\outDATA<4>\$WA5.UIM_MC.D2_PT_2 )
  );
  X_AND5 \outDATA<4>\$WA5.UIM_MC.D2_PT_3_1903  (
    .I0(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN2 ),
    .I3(DCOR1CNTMIDr),
    .I4(\U1/U3/holdingreg1 [12]),
    .O(\outDATA<4>\$WA5.UIM_MC.D2_PT_3 )
  );
  X_AND6 \outDATA<4>\$WA5.UIM_MC.D2_PT_4_1904  (
    .I0(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN2 ),
    .I3(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN3 ),
    .I4(DCOR0CNTHIGHr),
    .I5(\U1/U3/holdingreg0 [20]),
    .O(\outDATA<4>\$WA5.UIM_MC.D2_PT_4 )
  );
  X_AND6 \outDATA<4>\$WA5.UIM_MC.D2_PT_5_1905  (
    .I0(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN3 ),
    .I4(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN4 ),
    .I5(\U1/U3/holdingreg1 [20]),
    .O(\outDATA<4>\$WA5.UIM_MC.D2_PT_5 )
  );
  X_OR6 \outDATA<4>\$WA5.UIM_MC.D2_1906  (
    .I0(\outDATA<4>\$WA5.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<4>\$WA5.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<4>\$WA5.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<4>\$WA5.UIM_MC.D2_PT_3 ),
    .I4(\outDATA<4>\$WA5.UIM_MC.D2_PT_4 ),
    .I5(\outDATA<4>\$WA5.UIM_MC.D2_PT_5 ),
    .O(\outDATA<4>\$WA5.UIM_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<4>  (
    .I(\U1/U3/holdingreg0<4>_MC.Q ),
    .O(\U1/U3/holdingreg0 [4])
  );
  X_FF \U1/U3/holdingreg0<4>_MC.REG  (
    .I(\U1/U3/holdingreg0<4>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<4>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1907  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<4>_MC.D_1908  (
    .I0(\U1/U3/holdingreg0<4>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<4>_MC.D2 ),
    .O(\U1/U3/holdingreg0<4>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<4>_MC.D1_1909  (
    .O(\U1/U3/holdingreg0<4>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<4>_MC.D2_PT_0_1910  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [4]),
    .O(\U1/U3/holdingreg0<4>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<4>_MC.D2_PT_1_1911  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<4>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<4>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [4]),
    .O(\U1/U3/holdingreg0<4>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<4>_MC.D2_1912  (
    .I0(\U1/U3/holdingreg0<4>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<4>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<4>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<4>  (
    .I(\U1/U3/holdingreg1<4>_MC.Q ),
    .O(\U1/U3/holdingreg1 [4])
  );
  X_FF \U1/U3/holdingreg1<4>_MC.REG  (
    .I(\U1/U3/holdingreg1<4>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<4>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1913  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<4>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<4>_MC.D_1914  (
    .I0(\U1/U3/holdingreg1<4>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<4>_MC.D2 ),
    .O(\U1/U3/holdingreg1<4>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<4>_MC.D1_1915  (
    .O(\U1/U3/holdingreg1<4>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<4>_MC.D2_PT_0_1916  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [4]),
    .O(\U1/U3/holdingreg1<4>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<4>_MC.D2_PT_1_1917  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<4>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<4>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [4]),
    .O(\U1/U3/holdingreg1<4>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<4>_MC.D2_1918  (
    .I0(\U1/U3/holdingreg1<4>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<4>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<4>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<12>  (
    .I(\U1/U3/holdingreg0<12>_MC.Q ),
    .O(\U1/U3/holdingreg0 [12])
  );
  X_FF \U1/U3/holdingreg0<12>_MC.REG  (
    .I(\U1/U3/holdingreg0<12>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<12>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1919  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<12>_MC.D_1920  (
    .I0(\U1/U3/holdingreg0<12>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<12>_MC.D2 ),
    .O(\U1/U3/holdingreg0<12>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<12>_MC.D1_1921  (
    .O(\U1/U3/holdingreg0<12>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<12>_MC.D2_PT_0_1922  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [12]),
    .O(\U1/U3/holdingreg0<12>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<12>_MC.D2_PT_1_1923  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<12>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<12>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [12]),
    .O(\U1/U3/holdingreg0<12>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<12>_MC.D2_1924  (
    .I0(\U1/U3/holdingreg0<12>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<12>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<12>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<12>  (
    .I(\U1/U3/holdingreg1<12>_MC.Q ),
    .O(\U1/U3/holdingreg1 [12])
  );
  X_FF \U1/U3/holdingreg1<12>_MC.REG  (
    .I(\U1/U3/holdingreg1<12>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<12>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1925  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<12>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<12>_MC.D_1926  (
    .I0(\U1/U3/holdingreg1<12>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<12>_MC.D2 ),
    .O(\U1/U3/holdingreg1<12>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<12>_MC.D1_1927  (
    .O(\U1/U3/holdingreg1<12>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<12>_MC.D2_PT_0_1928  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [12]),
    .O(\U1/U3/holdingreg1<12>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<12>_MC.D2_PT_1_1929  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<12>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<12>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [12]),
    .O(\U1/U3/holdingreg1<12>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<12>_MC.D2_1930  (
    .I0(\U1/U3/holdingreg1<12>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<12>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<12>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<20>  (
    .I(\U1/U3/holdingreg0<20>_MC.Q ),
    .O(\U1/U3/holdingreg0 [20])
  );
  X_FF \U1/U3/holdingreg0<20>_MC.REG  (
    .I(\U1/U3/holdingreg0<20>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<20>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<20>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<20>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1931  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<20>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<20>_MC.D_1932  (
    .I0(\U1/U3/holdingreg0<20>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<20>_MC.D2 ),
    .O(\U1/U3/holdingreg0<20>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<20>_MC.D1_1933  (
    .O(\U1/U3/holdingreg0<20>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<20>_MC.D2_PT_0_1934  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [20]),
    .O(\U1/U3/holdingreg0<20>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<20>_MC.D2_PT_1_1935  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<20>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<20>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [20]),
    .O(\U1/U3/holdingreg0<20>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<20>_MC.D2_1936  (
    .I0(\U1/U3/holdingreg0<20>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<20>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<20>_MC.D2 )
  );
  X_BUF \U1/Channel0<20>  (
    .I(\U1/Channel0<20>_MC.Q ),
    .O(\U1/Channel0 [20])
  );
  X_XOR2 \U1/Channel0<20>_MC_tsimcreated_xor__1937  (
    .I0(\U1/Channel0<20>_MC.D ),
    .I1(\U1/Channel0<20>_MC.Q ),
    .O(\U1/Channel0<20>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<20>_MC.REG  (
    .I(\U1/Channel0<20>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<20>_MC.Q )
  );
  X_XOR2 \U1/Channel0<20>_MC.D_1938  (
    .I0(\U1/Channel0<20>_MC.D1 ),
    .I1(\U1/Channel0<20>_MC.D2 ),
    .O(\U1/Channel0<20>_MC.D )
  );
  X_ZERO \U1/Channel0<20>_MC.D1_1939  (
    .O(\U1/Channel0<20>_MC.D1 )
  );
  X_AND2 \U1/Channel0<20>_MC.D2_PT_0_1940  (
    .I0(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [20]),
    .O(\U1/Channel0<20>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel0<20>_MC.D2_PT_1_1941  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN9 ),
    .I10(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN10 ),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<20>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel0<20>_MC.D2_PT_2_1942  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel0 [16]),
    .I4(\U1/Channel0 [13]),
    .I5(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel0 [14]),
    .I7(\U1/Channel0 [15]),
    .I8(\U1/Channel0 [17]),
    .I9(\U1/Channel0 [18]),
    .I10(\U1/Channel0 [19]),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<20>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<20>_MC.D2_1943  (
    .I0(\U1/Channel0<20>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<20>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<20>_MC.D2_PT_2 ),
    .O(\U1/Channel0<20>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<20>  (
    .I(\U1/U3/holdingreg1<20>_MC.Q ),
    .O(\U1/U3/holdingreg1 [20])
  );
  X_FF \U1/U3/holdingreg1<20>_MC.REG  (
    .I(\U1/U3/holdingreg1<20>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<20>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<20>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<20>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1944  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<20>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<20>_MC.D_1945  (
    .I0(\U1/U3/holdingreg1<20>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<20>_MC.D2 ),
    .O(\U1/U3/holdingreg1<20>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<20>_MC.D1_1946  (
    .O(\U1/U3/holdingreg1<20>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<20>_MC.D2_PT_0_1947  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [20]),
    .O(\U1/U3/holdingreg1<20>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<20>_MC.D2_PT_1_1948  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<20>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<20>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [20]),
    .O(\U1/U3/holdingreg1<20>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<20>_MC.D2_1949  (
    .I0(\U1/U3/holdingreg1<20>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<20>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<20>_MC.D2 )
  );
  X_BUF \U1/Channel1<20>  (
    .I(\U1/Channel1<20>_MC.Q ),
    .O(\U1/Channel1 [20])
  );
  X_XOR2 \U1/Channel1<20>_MC_tsimcreated_xor__1950  (
    .I0(\U1/Channel1<20>_MC.D ),
    .I1(\U1/Channel1<20>_MC.Q ),
    .O(\U1/Channel1<20>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<20>_MC.REG  (
    .I(\U1/Channel1<20>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<20>_MC.Q )
  );
  X_XOR2 \U1/Channel1<20>_MC.D_1951  (
    .I0(\U1/Channel1<20>_MC.D1 ),
    .I1(\U1/Channel1<20>_MC.D2 ),
    .O(\U1/Channel1<20>_MC.D )
  );
  X_ZERO \U1/Channel1<20>_MC.D1_1952  (
    .O(\U1/Channel1<20>_MC.D1 )
  );
  X_AND2 \U1/Channel1<20>_MC.D2_PT_0_1953  (
    .I0(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [20]),
    .O(\U1/Channel1<20>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel1<20>_MC.D2_PT_1_1954  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN9 ),
    .I10(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN10 ),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<20>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel1<20>_MC.D2_PT_2_1955  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [16]),
    .I4(\U1/Channel1 [13]),
    .I5(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel1 [14]),
    .I7(\U1/Channel1 [15]),
    .I8(\U1/Channel1 [17]),
    .I9(\U1/Channel1 [18]),
    .I10(\U1/Channel1 [19]),
    .I11(Vcc),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<20>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<20>_MC.D2_1956  (
    .I0(\U1/Channel1<20>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<20>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<20>_MC.D2_PT_2 ),
    .O(\U1/Channel1<20>_MC.D2 )
  );
  X_BUF \outDATA<5>\$WA0.UIM_1957  (
    .I(\outDATA<5>\$WA0.UIM_MC.Q ),
    .O(\outDATA<5>\$WA0.UIM )
  );
  X_BUF \outDATA<5>\$WA0.UIM_MC.Q_1958  (
    .I(\outDATA<5>\$WA0.UIM_MC.D ),
    .O(\outDATA<5>\$WA0.UIM_MC.Q )
  );
  X_XOR2 \outDATA<5>\$WA0.UIM_MC.D_1959  (
    .I0(\outDATA<5>\$WA0.UIM_MC.D1 ),
    .I1(\outDATA<5>\$WA0.UIM_MC.D2 ),
    .O(\outDATA<5>\$WA0.UIM_MC.D )
  );
  X_ZERO \outDATA<5>\$WA0.UIM_MC.D1_1960  (
    .O(\outDATA<5>\$WA0.UIM_MC.D1 )
  );
  X_AND2 \outDATA<5>\$WA0.UIM_MC.D2_1961  (
    .I0(U11_U3_counterr[5]),
    .I1(U11_U3_counterr[5]),
    .O(\outDATA<5>\$WA0.UIM_MC.D2 )
  );
  X_BUF \outDATA<5>\$WA1.UIM_1962  (
    .I(\outDATA<5>\$WA1.UIM_MC.Q ),
    .O(\outDATA<5>\$WA1.UIM )
  );
  X_BUF \outDATA<5>\$WA1.UIM_MC.Q_1963  (
    .I(\outDATA<5>\$WA1.UIM_MC.D ),
    .O(\outDATA<5>\$WA1.UIM_MC.Q )
  );
  X_XOR2 \outDATA<5>\$WA1.UIM_MC.D_1964  (
    .I0(\outDATA<5>\$WA1.UIM_MC.D1 ),
    .I1(\outDATA<5>\$WA1.UIM_MC.D2 ),
    .O(\outDATA<5>\$WA1.UIM_MC.D )
  );
  X_AND2 \outDATA<5>\$WA1.UIM_MC.D1_1965  (
    .I0(\I2CS<5>_II/UIM ),
    .I1(\I2CS<5>_II/UIM ),
    .O(\outDATA<5>\$WA1.UIM_MC.D1 )
  );
  X_ZERO \outDATA<5>\$WA1.UIM_MC.D2_1966  (
    .O(\outDATA<5>\$WA1.UIM_MC.D2 )
  );
  X_BUF \outDATA<5>\$WA2.UIM_1967  (
    .I(\outDATA<5>\$WA2.UIM_MC.Q ),
    .O(\outDATA<5>\$WA2.UIM )
  );
  X_BUF \outDATA<5>\$WA2.UIM_MC.Q_1968  (
    .I(\outDATA<5>\$WA2.UIM_MC.D ),
    .O(\outDATA<5>\$WA2.UIM_MC.Q )
  );
  X_XOR2 \outDATA<5>\$WA2.UIM_MC.D_1969  (
    .I0(\outDATA<5>\$WA2.UIM_MC.D1 ),
    .I1(\outDATA<5>\$WA2.UIM_MC.D2 ),
    .O(\outDATA<5>\$WA2.UIM_MC.D )
  );
  X_AND2 \outDATA<5>\$WA2.UIM_MC.D1_1970  (
    .I0(\FLS1_II/UIM ),
    .I1(\FLS1_II/UIM ),
    .O(\outDATA<5>\$WA2.UIM_MC.D1 )
  );
  X_ZERO \outDATA<5>\$WA2.UIM_MC.D2_1971  (
    .O(\outDATA<5>\$WA2.UIM_MC.D2 )
  );
  X_BUF \outDATA<5>\$WA3.UIM_1972  (
    .I(\outDATA<5>\$WA3.UIM_MC.Q ),
    .O(\outDATA<5>\$WA3.UIM )
  );
  X_BUF \outDATA<5>\$WA3.UIM_MC.Q_1973  (
    .I(\outDATA<5>\$WA3.UIM_MC.D ),
    .O(\outDATA<5>\$WA3.UIM_MC.Q )
  );
  X_XOR2 \outDATA<5>\$WA3.UIM_MC.D_1974  (
    .I0(\outDATA<5>\$WA3.UIM_MC.D1 ),
    .I1(\outDATA<5>\$WA3.UIM_MC.D2 ),
    .O(\outDATA<5>\$WA3.UIM_MC.D )
  );
  X_ZERO \outDATA<5>\$WA3.UIM_MC.D1_1975  (
    .O(\outDATA<5>\$WA3.UIM_MC.D1 )
  );
  X_AND2 \outDATA<5>\$WA3.UIM_MC.D2_PT_0_1976  (
    .I0(NET2528),
    .I1(\U4/Flgreg [5]),
    .O(\outDATA<5>\$WA3.UIM_MC.D2_PT_0 )
  );
  X_AND2 \outDATA<5>\$WA3.UIM_MC.D2_PT_1_1977  (
    .I0(\NlwInverterSignal_outDATA<5>\$WA3.UIM_MC.D2_PT_1/IN0 ),
    .I1(\Home15FLG_II/UIM ),
    .O(\outDATA<5>\$WA3.UIM_MC.D2_PT_1 )
  );
  X_OR2 \outDATA<5>\$WA3.UIM_MC.D2_1978  (
    .I0(\outDATA<5>\$WA3.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<5>\$WA3.UIM_MC.D2_PT_1 ),
    .O(\outDATA<5>\$WA3.UIM_MC.D2 )
  );
  X_BUF \outDATA<5>\$WA4.UIM_1979  (
    .I(\outDATA<5>\$WA4.UIM_MC.Q ),
    .O(\outDATA<5>\$WA4.UIM )
  );
  X_BUF \outDATA<5>\$WA4.UIM_MC.Q_1980  (
    .I(\outDATA<5>\$WA4.UIM_MC.D ),
    .O(\outDATA<5>\$WA4.UIM_MC.Q )
  );
  X_XOR2 \outDATA<5>\$WA4.UIM_MC.D_1981  (
    .I0(\outDATA<5>\$WA4.UIM_MC.D1 ),
    .I1(\outDATA<5>\$WA4.UIM_MC.D2 ),
    .O(\outDATA<5>\$WA4.UIM_MC.D )
  );
  X_ZERO \outDATA<5>\$WA4.UIM_MC.D1_1982  (
    .O(\outDATA<5>\$WA4.UIM_MC.D1 )
  );
  X_AND2 \outDATA<5>\$WA4.UIM_MC.D2_PT_0_1983  (
    .I0(DCOR0THRESLOWr),
    .I1(\U1/U4/Latch0r [5]),
    .O(\outDATA<5>\$WA4.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<5>\$WA4.UIM_MC.D2_PT_1_1984  (
    .I0(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR0THRESMIDr),
    .I2(\U1/U4/Latch0r [13]),
    .O(\outDATA<5>\$WA4.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<5>\$WA4.UIM_MC.D2_PT_2_1985  (
    .I0(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR1THRESLOWr),
    .I3(\U1/U4/Latch1r [5]),
    .O(\outDATA<5>\$WA4.UIM_MC.D2_PT_2 )
  );
  X_AND4 \outDATA<5>\$WA4.UIM_MC.D2_PT_3_1986  (
    .I0(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN2 ),
    .I3(\U1/U4/Latch1r [13]),
    .O(\outDATA<5>\$WA4.UIM_MC.D2_PT_3 )
  );
  X_OR4 \outDATA<5>\$WA4.UIM_MC.D2_1987  (
    .I0(\outDATA<5>\$WA4.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<5>\$WA4.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<5>\$WA4.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<5>\$WA4.UIM_MC.D2_PT_3 ),
    .O(\outDATA<5>\$WA4.UIM_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<5>  (
    .I(\U1/U4/Latch0r<5>_MC.Q ),
    .O(\U1/U4/Latch0r [5])
  );
  X_FF \U1/U4/Latch0r<5>_MC.REG  (
    .I(\U1/U4/Latch0r<5>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<5>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1988  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<5>_MC.D_1989  (
    .I0(\U1/U4/Latch0r<5>_MC.D1 ),
    .I1(\U1/U4/Latch0r<5>_MC.D2 ),
    .O(\U1/U4/Latch0r<5>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<5>_MC.D1_1990  (
    .O(\U1/U4/Latch0r<5>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<5>_MC.D2_PT_0_1991  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<5>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [5]),
    .O(\U1/U4/Latch0r<5>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<5>_MC.D2_PT_1_1992  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<5>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<5>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [5]),
    .O(\U1/U4/Latch0r<5>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<5>_MC.D2_1993  (
    .I0(\U1/U4/Latch0r<5>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<5>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<5>_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<13>  (
    .I(\U1/U4/Latch0r<13>_MC.Q ),
    .O(\U1/U4/Latch0r [13])
  );
  X_FF \U1/U4/Latch0r<13>_MC.REG  (
    .I(\U1/U4/Latch0r<13>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<13>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_1994  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<13>_MC.D_1995  (
    .I0(\U1/U4/Latch0r<13>_MC.D1 ),
    .I1(\U1/U4/Latch0r<13>_MC.D2 ),
    .O(\U1/U4/Latch0r<13>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<13>_MC.D1_1996  (
    .O(\U1/U4/Latch0r<13>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<13>_MC.D2_PT_0_1997  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<13>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [13]),
    .O(\U1/U4/Latch0r<13>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<13>_MC.D2_PT_1_1998  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<13>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<13>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [13]),
    .O(\U1/U4/Latch0r<13>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<13>_MC.D2_1999  (
    .I0(\U1/U4/Latch0r<13>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<13>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<13>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<5>  (
    .I(\U1/U4/Latch1r<5>_MC.Q ),
    .O(\U1/U4/Latch1r [5])
  );
  X_FF \U1/U4/Latch1r<5>_MC.REG  (
    .I(\U1/U4/Latch1r<5>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<5>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2000  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<5>_MC.D_2001  (
    .I0(\U1/U4/Latch1r<5>_MC.D1 ),
    .I1(\U1/U4/Latch1r<5>_MC.D2 ),
    .O(\U1/U4/Latch1r<5>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<5>_MC.D1_2002  (
    .O(\U1/U4/Latch1r<5>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<5>_MC.D2_PT_0_2003  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [5]),
    .O(\U1/U4/Latch1r<5>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<5>_MC.D2_PT_1_2004  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<5>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<5>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<5>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [5]),
    .O(\U1/U4/Latch1r<5>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<5>_MC.D2_2005  (
    .I0(\U1/U4/Latch1r<5>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<5>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<5>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<13>  (
    .I(\U1/U4/Latch1r<13>_MC.Q ),
    .O(\U1/U4/Latch1r [13])
  );
  X_FF \U1/U4/Latch1r<13>_MC.REG  (
    .I(\U1/U4/Latch1r<13>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<13>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2006  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<13>_MC.D_2007  (
    .I0(\U1/U4/Latch1r<13>_MC.D1 ),
    .I1(\U1/U4/Latch1r<13>_MC.D2 ),
    .O(\U1/U4/Latch1r<13>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<13>_MC.D1_2008  (
    .O(\U1/U4/Latch1r<13>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<13>_MC.D2_PT_0_2009  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [13]),
    .O(\U1/U4/Latch1r<13>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<13>_MC.D2_PT_1_2010  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<13>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<13>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<13>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [13]),
    .O(\U1/U4/Latch1r<13>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<13>_MC.D2_2011  (
    .I0(\U1/U4/Latch1r<13>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<13>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<13>_MC.D2 )
  );
  X_BUF \outDATA<5>\$WA5.UIM_2012  (
    .I(\outDATA<5>\$WA5.UIM_MC.Q ),
    .O(\outDATA<5>\$WA5.UIM )
  );
  X_BUF \outDATA<5>\$WA5.UIM_MC.Q_2013  (
    .I(\outDATA<5>\$WA5.UIM_MC.D ),
    .O(\outDATA<5>\$WA5.UIM_MC.Q )
  );
  X_XOR2 \outDATA<5>\$WA5.UIM_MC.D_2014  (
    .I0(\outDATA<5>\$WA5.UIM_MC.D1 ),
    .I1(\outDATA<5>\$WA5.UIM_MC.D2 ),
    .O(\outDATA<5>\$WA5.UIM_MC.D )
  );
  X_ZERO \outDATA<5>\$WA5.UIM_MC.D1_2015  (
    .O(\outDATA<5>\$WA5.UIM_MC.D1 )
  );
  X_AND2 \outDATA<5>\$WA5.UIM_MC.D2_PT_0_2016  (
    .I0(DCOR0CNTLOWr),
    .I1(\U1/U3/holdingreg0 [5]),
    .O(\outDATA<5>\$WA5.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<5>\$WA5.UIM_MC.D2_PT_1_2017  (
    .I0(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR1CNTLOWr),
    .I2(\U1/U3/holdingreg1 [5]),
    .O(\outDATA<5>\$WA5.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<5>\$WA5.UIM_MC.D2_PT_2_2018  (
    .I0(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR0CNTMIDr),
    .I3(\U1/U3/holdingreg0 [13]),
    .O(\outDATA<5>\$WA5.UIM_MC.D2_PT_2 )
  );
  X_AND5 \outDATA<5>\$WA5.UIM_MC.D2_PT_3_2019  (
    .I0(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN2 ),
    .I3(DCOR1CNTMIDr),
    .I4(\U1/U3/holdingreg1 [13]),
    .O(\outDATA<5>\$WA5.UIM_MC.D2_PT_3 )
  );
  X_AND6 \outDATA<5>\$WA5.UIM_MC.D2_PT_4_2020  (
    .I0(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN2 ),
    .I3(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN3 ),
    .I4(DCOR0CNTHIGHr),
    .I5(\U1/U3/holdingreg0 [21]),
    .O(\outDATA<5>\$WA5.UIM_MC.D2_PT_4 )
  );
  X_AND6 \outDATA<5>\$WA5.UIM_MC.D2_PT_5_2021  (
    .I0(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN3 ),
    .I4(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN4 ),
    .I5(\U1/U3/holdingreg1 [21]),
    .O(\outDATA<5>\$WA5.UIM_MC.D2_PT_5 )
  );
  X_OR6 \outDATA<5>\$WA5.UIM_MC.D2_2022  (
    .I0(\outDATA<5>\$WA5.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<5>\$WA5.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<5>\$WA5.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<5>\$WA5.UIM_MC.D2_PT_3 ),
    .I4(\outDATA<5>\$WA5.UIM_MC.D2_PT_4 ),
    .I5(\outDATA<5>\$WA5.UIM_MC.D2_PT_5 ),
    .O(\outDATA<5>\$WA5.UIM_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<5>  (
    .I(\U1/U3/holdingreg0<5>_MC.Q ),
    .O(\U1/U3/holdingreg0 [5])
  );
  X_FF \U1/U3/holdingreg0<5>_MC.REG  (
    .I(\U1/U3/holdingreg0<5>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<5>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2023  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<5>_MC.D_2024  (
    .I0(\U1/U3/holdingreg0<5>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<5>_MC.D2 ),
    .O(\U1/U3/holdingreg0<5>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<5>_MC.D1_2025  (
    .O(\U1/U3/holdingreg0<5>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<5>_MC.D2_PT_0_2026  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [5]),
    .O(\U1/U3/holdingreg0<5>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<5>_MC.D2_PT_1_2027  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<5>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<5>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [5]),
    .O(\U1/U3/holdingreg0<5>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<5>_MC.D2_2028  (
    .I0(\U1/U3/holdingreg0<5>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<5>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<5>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<5>  (
    .I(\U1/U3/holdingreg1<5>_MC.Q ),
    .O(\U1/U3/holdingreg1 [5])
  );
  X_FF \U1/U3/holdingreg1<5>_MC.REG  (
    .I(\U1/U3/holdingreg1<5>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<5>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2029  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<5>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<5>_MC.D_2030  (
    .I0(\U1/U3/holdingreg1<5>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<5>_MC.D2 ),
    .O(\U1/U3/holdingreg1<5>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<5>_MC.D1_2031  (
    .O(\U1/U3/holdingreg1<5>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<5>_MC.D2_PT_0_2032  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [5]),
    .O(\U1/U3/holdingreg1<5>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<5>_MC.D2_PT_1_2033  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<5>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<5>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [5]),
    .O(\U1/U3/holdingreg1<5>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<5>_MC.D2_2034  (
    .I0(\U1/U3/holdingreg1<5>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<5>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<5>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<13>  (
    .I(\U1/U3/holdingreg0<13>_MC.Q ),
    .O(\U1/U3/holdingreg0 [13])
  );
  X_FF \U1/U3/holdingreg0<13>_MC.REG  (
    .I(\U1/U3/holdingreg0<13>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<13>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2035  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<13>_MC.D_2036  (
    .I0(\U1/U3/holdingreg0<13>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<13>_MC.D2 ),
    .O(\U1/U3/holdingreg0<13>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<13>_MC.D1_2037  (
    .O(\U1/U3/holdingreg0<13>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<13>_MC.D2_PT_0_2038  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [13]),
    .O(\U1/U3/holdingreg0<13>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<13>_MC.D2_PT_1_2039  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<13>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<13>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [13]),
    .O(\U1/U3/holdingreg0<13>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<13>_MC.D2_2040  (
    .I0(\U1/U3/holdingreg0<13>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<13>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<13>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<13>  (
    .I(\U1/U3/holdingreg1<13>_MC.Q ),
    .O(\U1/U3/holdingreg1 [13])
  );
  X_FF \U1/U3/holdingreg1<13>_MC.REG  (
    .I(\U1/U3/holdingreg1<13>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<13>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2041  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<13>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<13>_MC.D_2042  (
    .I0(\U1/U3/holdingreg1<13>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<13>_MC.D2 ),
    .O(\U1/U3/holdingreg1<13>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<13>_MC.D1_2043  (
    .O(\U1/U3/holdingreg1<13>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<13>_MC.D2_PT_0_2044  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [13]),
    .O(\U1/U3/holdingreg1<13>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<13>_MC.D2_PT_1_2045  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<13>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<13>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [13]),
    .O(\U1/U3/holdingreg1<13>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<13>_MC.D2_2046  (
    .I0(\U1/U3/holdingreg1<13>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<13>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<13>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<21>  (
    .I(\U1/U3/holdingreg0<21>_MC.Q ),
    .O(\U1/U3/holdingreg0 [21])
  );
  X_FF \U1/U3/holdingreg0<21>_MC.REG  (
    .I(\U1/U3/holdingreg0<21>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<21>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<21>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<21>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2047  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<21>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<21>_MC.D_2048  (
    .I0(\U1/U3/holdingreg0<21>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<21>_MC.D2 ),
    .O(\U1/U3/holdingreg0<21>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<21>_MC.D1_2049  (
    .O(\U1/U3/holdingreg0<21>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<21>_MC.D2_PT_0_2050  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [21]),
    .O(\U1/U3/holdingreg0<21>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<21>_MC.D2_PT_1_2051  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<21>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<21>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [21]),
    .O(\U1/U3/holdingreg0<21>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<21>_MC.D2_2052  (
    .I0(\U1/U3/holdingreg0<21>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<21>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<21>_MC.D2 )
  );
  X_BUF \U1/Channel0<21>  (
    .I(\U1/Channel0<21>_MC.Q ),
    .O(\U1/Channel0 [21])
  );
  X_XOR2 \U1/Channel0<21>_MC_tsimcreated_xor__2053  (
    .I0(\U1/Channel0<21>_MC.D ),
    .I1(\U1/Channel0<21>_MC.Q ),
    .O(\U1/Channel0<21>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<21>_MC.REG  (
    .I(\U1/Channel0<21>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<21>_MC.Q )
  );
  X_XOR2 \U1/Channel0<21>_MC.D_2054  (
    .I0(\U1/Channel0<21>_MC.D1 ),
    .I1(\U1/Channel0<21>_MC.D2 ),
    .O(\U1/Channel0<21>_MC.D )
  );
  X_ZERO \U1/Channel0<21>_MC.D1_2055  (
    .O(\U1/Channel0<21>_MC.D1 )
  );
  X_AND2 \U1/Channel0<21>_MC.D2_PT_0_2056  (
    .I0(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [21]),
    .O(\U1/Channel0<21>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel0<21>_MC.D2_PT_1_2057  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN9 ),
    .I10(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN10 ),
    .I11(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN11 ),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<21>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel0<21>_MC.D2_PT_2_2058  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel0 [16]),
    .I4(\U1/Channel0 [13]),
    .I5(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel0 [14]),
    .I7(\U1/Channel0 [15]),
    .I8(\U1/Channel0 [17]),
    .I9(\U1/Channel0 [18]),
    .I10(\U1/Channel0 [19]),
    .I11(\U1/Channel0 [20]),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<21>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<21>_MC.D2_2059  (
    .I0(\U1/Channel0<21>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<21>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<21>_MC.D2_PT_2 ),
    .O(\U1/Channel0<21>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<21>  (
    .I(\U1/U3/holdingreg1<21>_MC.Q ),
    .O(\U1/U3/holdingreg1 [21])
  );
  X_FF \U1/U3/holdingreg1<21>_MC.REG  (
    .I(\U1/U3/holdingreg1<21>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<21>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<21>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<21>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2060  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<21>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<21>_MC.D_2061  (
    .I0(\U1/U3/holdingreg1<21>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<21>_MC.D2 ),
    .O(\U1/U3/holdingreg1<21>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<21>_MC.D1_2062  (
    .O(\U1/U3/holdingreg1<21>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<21>_MC.D2_PT_0_2063  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [21]),
    .O(\U1/U3/holdingreg1<21>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<21>_MC.D2_PT_1_2064  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<21>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<21>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [21]),
    .O(\U1/U3/holdingreg1<21>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<21>_MC.D2_2065  (
    .I0(\U1/U3/holdingreg1<21>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<21>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<21>_MC.D2 )
  );
  X_BUF \U1/Channel1<21>  (
    .I(\U1/Channel1<21>_MC.Q ),
    .O(\U1/Channel1 [21])
  );
  X_XOR2 \U1/Channel1<21>_MC_tsimcreated_xor__2066  (
    .I0(\U1/Channel1<21>_MC.D ),
    .I1(\U1/Channel1<21>_MC.Q ),
    .O(\U1/Channel1<21>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<21>_MC.REG  (
    .I(\U1/Channel1<21>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<21>_MC.Q )
  );
  X_XOR2 \U1/Channel1<21>_MC.D_2067  (
    .I0(\U1/Channel1<21>_MC.D1 ),
    .I1(\U1/Channel1<21>_MC.D2 ),
    .O(\U1/Channel1<21>_MC.D )
  );
  X_ZERO \U1/Channel1<21>_MC.D1_2068  (
    .O(\U1/Channel1<21>_MC.D1 )
  );
  X_AND2 \U1/Channel1<21>_MC.D2_PT_0_2069  (
    .I0(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [21]),
    .O(\U1/Channel1<21>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel1<21>_MC.D2_PT_1_2070  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN9 ),
    .I10(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN10 ),
    .I11(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN11 ),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<21>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel1<21>_MC.D2_PT_2_2071  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [16]),
    .I4(\U1/Channel1 [13]),
    .I5(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel1 [14]),
    .I7(\U1/Channel1 [15]),
    .I8(\U1/Channel1 [17]),
    .I9(\U1/Channel1 [18]),
    .I10(\U1/Channel1 [19]),
    .I11(\U1/Channel1 [20]),
    .I12(Vcc),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<21>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<21>_MC.D2_2072  (
    .I0(\U1/Channel1<21>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<21>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<21>_MC.D2_PT_2 ),
    .O(\U1/Channel1<21>_MC.D2 )
  );
  X_BUF \outDATA<6>\$WA0.UIM_2073  (
    .I(\outDATA<6>\$WA0.UIM_MC.Q ),
    .O(\outDATA<6>\$WA0.UIM )
  );
  X_BUF \outDATA<6>\$WA0.UIM_MC.Q_2074  (
    .I(\outDATA<6>\$WA0.UIM_MC.D ),
    .O(\outDATA<6>\$WA0.UIM_MC.Q )
  );
  X_XOR2 \outDATA<6>\$WA0.UIM_MC.D_2075  (
    .I0(\outDATA<6>\$WA0.UIM_MC.D1 ),
    .I1(\outDATA<6>\$WA0.UIM_MC.D2 ),
    .O(\outDATA<6>\$WA0.UIM_MC.D )
  );
  X_ZERO \outDATA<6>\$WA0.UIM_MC.D1_2076  (
    .O(\outDATA<6>\$WA0.UIM_MC.D1 )
  );
  X_ZERO \outDATA<6>\$WA0.UIM_MC.D2_2077  (
    .O(\outDATA<6>\$WA0.UIM_MC.D2 )
  );
  X_BUF \outDATA<6>\$WA2.UIM_2078  (
    .I(\outDATA<6>\$WA2.UIM_MC.Q ),
    .O(\outDATA<6>\$WA2.UIM )
  );
  X_BUF \outDATA<6>\$WA2.UIM_MC.Q_2079  (
    .I(\outDATA<6>\$WA2.UIM_MC.D ),
    .O(\outDATA<6>\$WA2.UIM_MC.Q )
  );
  X_XOR2 \outDATA<6>\$WA2.UIM_MC.D_2080  (
    .I0(\outDATA<6>\$WA2.UIM_MC.D1 ),
    .I1(\outDATA<6>\$WA2.UIM_MC.D2 ),
    .O(\outDATA<6>\$WA2.UIM_MC.D )
  );
  X_AND2 \outDATA<6>\$WA2.UIM_MC.D1_2081  (
    .I0(\Home1_II/UIM ),
    .I1(\Home1_II/UIM ),
    .O(\outDATA<6>\$WA2.UIM_MC.D1 )
  );
  X_ZERO \outDATA<6>\$WA2.UIM_MC.D2_2082  (
    .O(\outDATA<6>\$WA2.UIM_MC.D2 )
  );
  X_BUF \outDATA<6>\$WA3.UIM_2083  (
    .I(\outDATA<6>\$WA3.UIM_MC.Q ),
    .O(\outDATA<6>\$WA3.UIM )
  );
  X_BUF \outDATA<6>\$WA3.UIM_MC.Q_2084  (
    .I(\outDATA<6>\$WA3.UIM_MC.D ),
    .O(\outDATA<6>\$WA3.UIM_MC.Q )
  );
  X_XOR2 \outDATA<6>\$WA3.UIM_MC.D_2085  (
    .I0(\outDATA<6>\$WA3.UIM_MC.D1 ),
    .I1(\outDATA<6>\$WA3.UIM_MC.D2 ),
    .O(\outDATA<6>\$WA3.UIM_MC.D )
  );
  X_ZERO \outDATA<6>\$WA3.UIM_MC.D1_2086  (
    .O(\outDATA<6>\$WA3.UIM_MC.D1 )
  );
  X_AND2 \outDATA<6>\$WA3.UIM_MC.D2_PT_0_2087  (
    .I0(NET2528),
    .I1(\U4/Flgreg [6]),
    .O(\outDATA<6>\$WA3.UIM_MC.D2_PT_0 )
  );
  X_AND2 \outDATA<6>\$WA3.UIM_MC.D2_PT_1_2088  (
    .I0(\NlwInverterSignal_outDATA<6>\$WA3.UIM_MC.D2_PT_1/IN0 ),
    .I1(\Enc133FLG_II/UIM ),
    .O(\outDATA<6>\$WA3.UIM_MC.D2_PT_1 )
  );
  X_OR2 \outDATA<6>\$WA3.UIM_MC.D2_2089  (
    .I0(\outDATA<6>\$WA3.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<6>\$WA3.UIM_MC.D2_PT_1 ),
    .O(\outDATA<6>\$WA3.UIM_MC.D2 )
  );
  X_BUF \outDATA<6>\$WA4.UIM_2090  (
    .I(\outDATA<6>\$WA4.UIM_MC.Q ),
    .O(\outDATA<6>\$WA4.UIM )
  );
  X_BUF \outDATA<6>\$WA4.UIM_MC.Q_2091  (
    .I(\outDATA<6>\$WA4.UIM_MC.D ),
    .O(\outDATA<6>\$WA4.UIM_MC.Q )
  );
  X_XOR2 \outDATA<6>\$WA4.UIM_MC.D_2092  (
    .I0(\outDATA<6>\$WA4.UIM_MC.D1 ),
    .I1(\outDATA<6>\$WA4.UIM_MC.D2 ),
    .O(\outDATA<6>\$WA4.UIM_MC.D )
  );
  X_ZERO \outDATA<6>\$WA4.UIM_MC.D1_2093  (
    .O(\outDATA<6>\$WA4.UIM_MC.D1 )
  );
  X_AND2 \outDATA<6>\$WA4.UIM_MC.D2_PT_0_2094  (
    .I0(DCOR0THRESLOWr),
    .I1(\U1/U4/Latch0r [6]),
    .O(\outDATA<6>\$WA4.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<6>\$WA4.UIM_MC.D2_PT_1_2095  (
    .I0(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR0THRESMIDr),
    .I2(\U1/U4/Latch0r [14]),
    .O(\outDATA<6>\$WA4.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<6>\$WA4.UIM_MC.D2_PT_2_2096  (
    .I0(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR1THRESLOWr),
    .I3(\U1/U4/Latch1r [6]),
    .O(\outDATA<6>\$WA4.UIM_MC.D2_PT_2 )
  );
  X_AND4 \outDATA<6>\$WA4.UIM_MC.D2_PT_3_2097  (
    .I0(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN2 ),
    .I3(\U1/U4/Latch1r [14]),
    .O(\outDATA<6>\$WA4.UIM_MC.D2_PT_3 )
  );
  X_OR4 \outDATA<6>\$WA4.UIM_MC.D2_2098  (
    .I0(\outDATA<6>\$WA4.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<6>\$WA4.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<6>\$WA4.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<6>\$WA4.UIM_MC.D2_PT_3 ),
    .O(\outDATA<6>\$WA4.UIM_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<6>  (
    .I(\U1/U4/Latch0r<6>_MC.Q ),
    .O(\U1/U4/Latch0r [6])
  );
  X_FF \U1/U4/Latch0r<6>_MC.REG  (
    .I(\U1/U4/Latch0r<6>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<6>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2099  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<6>_MC.D_2100  (
    .I0(\U1/U4/Latch0r<6>_MC.D1 ),
    .I1(\U1/U4/Latch0r<6>_MC.D2 ),
    .O(\U1/U4/Latch0r<6>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<6>_MC.D1_2101  (
    .O(\U1/U4/Latch0r<6>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<6>_MC.D2_PT_0_2102  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<6>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [6]),
    .O(\U1/U4/Latch0r<6>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<6>_MC.D2_PT_1_2103  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<6>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<6>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [6]),
    .O(\U1/U4/Latch0r<6>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<6>_MC.D2_2104  (
    .I0(\U1/U4/Latch0r<6>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<6>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<6>_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<14>  (
    .I(\U1/U4/Latch0r<14>_MC.Q ),
    .O(\U1/U4/Latch0r [14])
  );
  X_FF \U1/U4/Latch0r<14>_MC.REG  (
    .I(\U1/U4/Latch0r<14>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<14>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2105  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<14>_MC.D_2106  (
    .I0(\U1/U4/Latch0r<14>_MC.D1 ),
    .I1(\U1/U4/Latch0r<14>_MC.D2 ),
    .O(\U1/U4/Latch0r<14>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<14>_MC.D1_2107  (
    .O(\U1/U4/Latch0r<14>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<14>_MC.D2_PT_0_2108  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<14>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [14]),
    .O(\U1/U4/Latch0r<14>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<14>_MC.D2_PT_1_2109  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<14>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<14>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [14]),
    .O(\U1/U4/Latch0r<14>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<14>_MC.D2_2110  (
    .I0(\U1/U4/Latch0r<14>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<14>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<14>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<6>  (
    .I(\U1/U4/Latch1r<6>_MC.Q ),
    .O(\U1/U4/Latch1r [6])
  );
  X_FF \U1/U4/Latch1r<6>_MC.REG  (
    .I(\U1/U4/Latch1r<6>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<6>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2111  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<6>_MC.D_2112  (
    .I0(\U1/U4/Latch1r<6>_MC.D1 ),
    .I1(\U1/U4/Latch1r<6>_MC.D2 ),
    .O(\U1/U4/Latch1r<6>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<6>_MC.D1_2113  (
    .O(\U1/U4/Latch1r<6>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<6>_MC.D2_PT_0_2114  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [6]),
    .O(\U1/U4/Latch1r<6>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<6>_MC.D2_PT_1_2115  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<6>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<6>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<6>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [6]),
    .O(\U1/U4/Latch1r<6>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<6>_MC.D2_2116  (
    .I0(\U1/U4/Latch1r<6>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<6>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<6>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<14>  (
    .I(\U1/U4/Latch1r<14>_MC.Q ),
    .O(\U1/U4/Latch1r [14])
  );
  X_FF \U1/U4/Latch1r<14>_MC.REG  (
    .I(\U1/U4/Latch1r<14>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<14>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2117  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<14>_MC.D_2118  (
    .I0(\U1/U4/Latch1r<14>_MC.D1 ),
    .I1(\U1/U4/Latch1r<14>_MC.D2 ),
    .O(\U1/U4/Latch1r<14>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<14>_MC.D1_2119  (
    .O(\U1/U4/Latch1r<14>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<14>_MC.D2_PT_0_2120  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [14]),
    .O(\U1/U4/Latch1r<14>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<14>_MC.D2_PT_1_2121  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<14>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<14>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<14>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [14]),
    .O(\U1/U4/Latch1r<14>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<14>_MC.D2_2122  (
    .I0(\U1/U4/Latch1r<14>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<14>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<14>_MC.D2 )
  );
  X_BUF \outDATA<6>\$WA5.UIM_2123  (
    .I(\outDATA<6>\$WA5.UIM_MC.Q ),
    .O(\outDATA<6>\$WA5.UIM )
  );
  X_BUF \outDATA<6>\$WA5.UIM_MC.Q_2124  (
    .I(\outDATA<6>\$WA5.UIM_MC.D ),
    .O(\outDATA<6>\$WA5.UIM_MC.Q )
  );
  X_XOR2 \outDATA<6>\$WA5.UIM_MC.D_2125  (
    .I0(\outDATA<6>\$WA5.UIM_MC.D1 ),
    .I1(\outDATA<6>\$WA5.UIM_MC.D2 ),
    .O(\outDATA<6>\$WA5.UIM_MC.D )
  );
  X_ZERO \outDATA<6>\$WA5.UIM_MC.D1_2126  (
    .O(\outDATA<6>\$WA5.UIM_MC.D1 )
  );
  X_AND2 \outDATA<6>\$WA5.UIM_MC.D2_PT_0_2127  (
    .I0(DCOR0CNTLOWr),
    .I1(\U1/U3/holdingreg0 [6]),
    .O(\outDATA<6>\$WA5.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<6>\$WA5.UIM_MC.D2_PT_1_2128  (
    .I0(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR1CNTLOWr),
    .I2(\U1/U3/holdingreg1 [6]),
    .O(\outDATA<6>\$WA5.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<6>\$WA5.UIM_MC.D2_PT_2_2129  (
    .I0(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR0CNTMIDr),
    .I3(\U1/U3/holdingreg0 [14]),
    .O(\outDATA<6>\$WA5.UIM_MC.D2_PT_2 )
  );
  X_AND5 \outDATA<6>\$WA5.UIM_MC.D2_PT_3_2130  (
    .I0(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN2 ),
    .I3(DCOR1CNTMIDr),
    .I4(\U1/U3/holdingreg1 [14]),
    .O(\outDATA<6>\$WA5.UIM_MC.D2_PT_3 )
  );
  X_AND6 \outDATA<6>\$WA5.UIM_MC.D2_PT_4_2131  (
    .I0(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN2 ),
    .I3(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN3 ),
    .I4(DCOR0CNTHIGHr),
    .I5(\U1/U3/holdingreg0 [22]),
    .O(\outDATA<6>\$WA5.UIM_MC.D2_PT_4 )
  );
  X_AND6 \outDATA<6>\$WA5.UIM_MC.D2_PT_5_2132  (
    .I0(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN3 ),
    .I4(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN4 ),
    .I5(\U1/U3/holdingreg1 [22]),
    .O(\outDATA<6>\$WA5.UIM_MC.D2_PT_5 )
  );
  X_OR6 \outDATA<6>\$WA5.UIM_MC.D2_2133  (
    .I0(\outDATA<6>\$WA5.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<6>\$WA5.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<6>\$WA5.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<6>\$WA5.UIM_MC.D2_PT_3 ),
    .I4(\outDATA<6>\$WA5.UIM_MC.D2_PT_4 ),
    .I5(\outDATA<6>\$WA5.UIM_MC.D2_PT_5 ),
    .O(\outDATA<6>\$WA5.UIM_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<6>  (
    .I(\U1/U3/holdingreg0<6>_MC.Q ),
    .O(\U1/U3/holdingreg0 [6])
  );
  X_FF \U1/U3/holdingreg0<6>_MC.REG  (
    .I(\U1/U3/holdingreg0<6>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<6>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2134  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<6>_MC.D_2135  (
    .I0(\U1/U3/holdingreg0<6>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<6>_MC.D2 ),
    .O(\U1/U3/holdingreg0<6>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<6>_MC.D1_2136  (
    .O(\U1/U3/holdingreg0<6>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<6>_MC.D2_PT_0_2137  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [6]),
    .O(\U1/U3/holdingreg0<6>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<6>_MC.D2_PT_1_2138  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<6>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<6>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [6]),
    .O(\U1/U3/holdingreg0<6>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<6>_MC.D2_2139  (
    .I0(\U1/U3/holdingreg0<6>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<6>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<6>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<6>  (
    .I(\U1/U3/holdingreg1<6>_MC.Q ),
    .O(\U1/U3/holdingreg1 [6])
  );
  X_FF \U1/U3/holdingreg1<6>_MC.REG  (
    .I(\U1/U3/holdingreg1<6>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<6>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2140  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<6>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<6>_MC.D_2141  (
    .I0(\U1/U3/holdingreg1<6>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<6>_MC.D2 ),
    .O(\U1/U3/holdingreg1<6>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<6>_MC.D1_2142  (
    .O(\U1/U3/holdingreg1<6>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<6>_MC.D2_PT_0_2143  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [6]),
    .O(\U1/U3/holdingreg1<6>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<6>_MC.D2_PT_1_2144  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<6>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<6>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [6]),
    .O(\U1/U3/holdingreg1<6>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<6>_MC.D2_2145  (
    .I0(\U1/U3/holdingreg1<6>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<6>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<6>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<14>  (
    .I(\U1/U3/holdingreg0<14>_MC.Q ),
    .O(\U1/U3/holdingreg0 [14])
  );
  X_FF \U1/U3/holdingreg0<14>_MC.REG  (
    .I(\U1/U3/holdingreg0<14>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<14>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2146  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<14>_MC.D_2147  (
    .I0(\U1/U3/holdingreg0<14>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<14>_MC.D2 ),
    .O(\U1/U3/holdingreg0<14>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<14>_MC.D1_2148  (
    .O(\U1/U3/holdingreg0<14>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<14>_MC.D2_PT_0_2149  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [14]),
    .O(\U1/U3/holdingreg0<14>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<14>_MC.D2_PT_1_2150  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<14>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<14>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [14]),
    .O(\U1/U3/holdingreg0<14>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<14>_MC.D2_2151  (
    .I0(\U1/U3/holdingreg0<14>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<14>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<14>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<14>  (
    .I(\U1/U3/holdingreg1<14>_MC.Q ),
    .O(\U1/U3/holdingreg1 [14])
  );
  X_FF \U1/U3/holdingreg1<14>_MC.REG  (
    .I(\U1/U3/holdingreg1<14>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<14>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2152  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<14>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<14>_MC.D_2153  (
    .I0(\U1/U3/holdingreg1<14>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<14>_MC.D2 ),
    .O(\U1/U3/holdingreg1<14>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<14>_MC.D1_2154  (
    .O(\U1/U3/holdingreg1<14>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<14>_MC.D2_PT_0_2155  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [14]),
    .O(\U1/U3/holdingreg1<14>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<14>_MC.D2_PT_1_2156  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<14>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<14>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [14]),
    .O(\U1/U3/holdingreg1<14>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<14>_MC.D2_2157  (
    .I0(\U1/U3/holdingreg1<14>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<14>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<14>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<22>  (
    .I(\U1/U3/holdingreg0<22>_MC.Q ),
    .O(\U1/U3/holdingreg0 [22])
  );
  X_FF \U1/U3/holdingreg0<22>_MC.REG  (
    .I(\U1/U3/holdingreg0<22>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<22>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<22>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<22>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2158  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<22>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<22>_MC.D_2159  (
    .I0(\U1/U3/holdingreg0<22>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<22>_MC.D2 ),
    .O(\U1/U3/holdingreg0<22>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<22>_MC.D1_2160  (
    .O(\U1/U3/holdingreg0<22>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<22>_MC.D2_PT_0_2161  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [22]),
    .O(\U1/U3/holdingreg0<22>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<22>_MC.D2_PT_1_2162  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<22>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<22>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [22]),
    .O(\U1/U3/holdingreg0<22>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<22>_MC.D2_2163  (
    .I0(\U1/U3/holdingreg0<22>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<22>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<22>_MC.D2 )
  );
  X_BUF \U1/Channel0<22>  (
    .I(\U1/Channel0<22>_MC.Q ),
    .O(\U1/Channel0 [22])
  );
  X_XOR2 \U1/Channel0<22>_MC_tsimcreated_xor__2164  (
    .I0(\U1/Channel0<22>_MC.D ),
    .I1(\U1/Channel0<22>_MC.Q ),
    .O(\U1/Channel0<22>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<22>_MC.REG  (
    .I(\U1/Channel0<22>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<22>_MC.Q )
  );
  X_XOR2 \U1/Channel0<22>_MC.D_2165  (
    .I0(\U1/Channel0<22>_MC.D1 ),
    .I1(\U1/Channel0<22>_MC.D2 ),
    .O(\U1/Channel0<22>_MC.D )
  );
  X_ZERO \U1/Channel0<22>_MC.D1_2166  (
    .O(\U1/Channel0<22>_MC.D1 )
  );
  X_AND2 \U1/Channel0<22>_MC.D2_PT_0_2167  (
    .I0(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [22]),
    .O(\U1/Channel0<22>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel0<22>_MC.D2_PT_1_2168  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN9 ),
    .I10(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN10 ),
    .I11(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN11 ),
    .I12(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN12 ),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<22>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel0<22>_MC.D2_PT_2_2169  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel0 [16]),
    .I4(\U1/Channel0 [13]),
    .I5(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel0 [14]),
    .I7(\U1/Channel0 [15]),
    .I8(\U1/Channel0 [17]),
    .I9(\U1/Channel0 [18]),
    .I10(\U1/Channel0 [19]),
    .I11(\U1/Channel0 [20]),
    .I12(\U1/Channel0 [21]),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<22>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<22>_MC.D2_2170  (
    .I0(\U1/Channel0<22>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<22>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<22>_MC.D2_PT_2 ),
    .O(\U1/Channel0<22>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<22>  (
    .I(\U1/U3/holdingreg1<22>_MC.Q ),
    .O(\U1/U3/holdingreg1 [22])
  );
  X_FF \U1/U3/holdingreg1<22>_MC.REG  (
    .I(\U1/U3/holdingreg1<22>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<22>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<22>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<22>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2171  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<22>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<22>_MC.D_2172  (
    .I0(\U1/U3/holdingreg1<22>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<22>_MC.D2 ),
    .O(\U1/U3/holdingreg1<22>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<22>_MC.D1_2173  (
    .O(\U1/U3/holdingreg1<22>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<22>_MC.D2_PT_0_2174  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [22]),
    .O(\U1/U3/holdingreg1<22>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<22>_MC.D2_PT_1_2175  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<22>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<22>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [22]),
    .O(\U1/U3/holdingreg1<22>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<22>_MC.D2_2176  (
    .I0(\U1/U3/holdingreg1<22>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<22>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<22>_MC.D2 )
  );
  X_BUF \U1/Channel1<22>  (
    .I(\U1/Channel1<22>_MC.Q ),
    .O(\U1/Channel1 [22])
  );
  X_XOR2 \U1/Channel1<22>_MC_tsimcreated_xor__2177  (
    .I0(\U1/Channel1<22>_MC.D ),
    .I1(\U1/Channel1<22>_MC.Q ),
    .O(\U1/Channel1<22>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<22>_MC.REG  (
    .I(\U1/Channel1<22>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<22>_MC.Q )
  );
  X_XOR2 \U1/Channel1<22>_MC.D_2178  (
    .I0(\U1/Channel1<22>_MC.D1 ),
    .I1(\U1/Channel1<22>_MC.D2 ),
    .O(\U1/Channel1<22>_MC.D )
  );
  X_ZERO \U1/Channel1<22>_MC.D1_2179  (
    .O(\U1/Channel1<22>_MC.D1 )
  );
  X_AND2 \U1/Channel1<22>_MC.D2_PT_0_2180  (
    .I0(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [22]),
    .O(\U1/Channel1<22>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel1<22>_MC.D2_PT_1_2181  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN9 ),
    .I10(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN10 ),
    .I11(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN11 ),
    .I12(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN12 ),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<22>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel1<22>_MC.D2_PT_2_2182  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [16]),
    .I4(\U1/Channel1 [13]),
    .I5(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel1 [14]),
    .I7(\U1/Channel1 [15]),
    .I8(\U1/Channel1 [17]),
    .I9(\U1/Channel1 [18]),
    .I10(\U1/Channel1 [19]),
    .I11(\U1/Channel1 [20]),
    .I12(\U1/Channel1 [21]),
    .I13(Vcc),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<22>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<22>_MC.D2_2183  (
    .I0(\U1/Channel1<22>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<22>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<22>_MC.D2_PT_2 ),
    .O(\U1/Channel1<22>_MC.D2 )
  );
  X_BUF \outDATA<7>\$WA0.UIM_2184  (
    .I(\outDATA<7>\$WA0.UIM_MC.Q ),
    .O(\outDATA<7>\$WA0.UIM )
  );
  X_BUF \outDATA<7>\$WA0.UIM_MC.Q_2185  (
    .I(\outDATA<7>\$WA0.UIM_MC.D ),
    .O(\outDATA<7>\$WA0.UIM_MC.Q )
  );
  X_XOR2 \outDATA<7>\$WA0.UIM_MC.D_2186  (
    .I0(\outDATA<7>\$WA0.UIM_MC.D1 ),
    .I1(\outDATA<7>\$WA0.UIM_MC.D2 ),
    .O(\outDATA<7>\$WA0.UIM_MC.D )
  );
  X_ZERO \outDATA<7>\$WA0.UIM_MC.D1_2187  (
    .O(\outDATA<7>\$WA0.UIM_MC.D1 )
  );
  X_ZERO \outDATA<7>\$WA0.UIM_MC.D2_2188  (
    .O(\outDATA<7>\$WA0.UIM_MC.D2 )
  );
  X_BUF \outDATA<7>\$WA1.UIM_2189  (
    .I(\outDATA<7>\$WA1.UIM_MC.Q ),
    .O(\outDATA<7>\$WA1.UIM )
  );
  X_BUF \outDATA<7>\$WA1.UIM_MC.Q_2190  (
    .I(\outDATA<7>\$WA1.UIM_MC.D ),
    .O(\outDATA<7>\$WA1.UIM_MC.Q )
  );
  X_XOR2 \outDATA<7>\$WA1.UIM_MC.D_2191  (
    .I0(\outDATA<7>\$WA1.UIM_MC.D1 ),
    .I1(\outDATA<7>\$WA1.UIM_MC.D2 ),
    .O(\outDATA<7>\$WA1.UIM_MC.D )
  );
  X_AND2 \outDATA<7>\$WA1.UIM_MC.D1_2192  (
    .I0(\GP_Motor1_0_II/UIM ),
    .I1(\GP_Motor1_0_II/UIM ),
    .O(\outDATA<7>\$WA1.UIM_MC.D1 )
  );
  X_ZERO \outDATA<7>\$WA1.UIM_MC.D2_2193  (
    .O(\outDATA<7>\$WA1.UIM_MC.D2 )
  );
  X_BUF \outDATA<7>\$WA2.UIM_2194  (
    .I(\outDATA<7>\$WA2.UIM_MC.Q ),
    .O(\outDATA<7>\$WA2.UIM )
  );
  X_BUF \outDATA<7>\$WA2.UIM_MC.Q_2195  (
    .I(\outDATA<7>\$WA2.UIM_MC.D ),
    .O(\outDATA<7>\$WA2.UIM_MC.Q )
  );
  X_XOR2 \outDATA<7>\$WA2.UIM_MC.D_2196  (
    .I0(\outDATA<7>\$WA2.UIM_MC.D1 ),
    .I1(\outDATA<7>\$WA2.UIM_MC.D2 ),
    .O(\outDATA<7>\$WA2.UIM_MC.D )
  );
  X_AND2 \outDATA<7>\$WA2.UIM_MC.D1_2197  (
    .I0(NET3253),
    .I1(NET3253),
    .O(\outDATA<7>\$WA2.UIM_MC.D1 )
  );
  X_ZERO \outDATA<7>\$WA2.UIM_MC.D2_2198  (
    .O(\outDATA<7>\$WA2.UIM_MC.D2 )
  );
  X_BUF \outDATA<7>\$WA3.UIM_2199  (
    .I(\outDATA<7>\$WA3.UIM_MC.Q ),
    .O(\outDATA<7>\$WA3.UIM )
  );
  X_BUF \outDATA<7>\$WA3.UIM_MC.Q_2200  (
    .I(\outDATA<7>\$WA3.UIM_MC.D ),
    .O(\outDATA<7>\$WA3.UIM_MC.Q )
  );
  X_XOR2 \outDATA<7>\$WA3.UIM_MC.D_2201  (
    .I0(\outDATA<7>\$WA3.UIM_MC.D1 ),
    .I1(\outDATA<7>\$WA3.UIM_MC.D2 ),
    .O(\outDATA<7>\$WA3.UIM_MC.D )
  );
  X_ZERO \outDATA<7>\$WA3.UIM_MC.D1_2202  (
    .O(\outDATA<7>\$WA3.UIM_MC.D1 )
  );
  X_AND2 \outDATA<7>\$WA3.UIM_MC.D2_PT_0_2203  (
    .I0(NET2528),
    .I1(\U4/Flgreg [7]),
    .O(\outDATA<7>\$WA3.UIM_MC.D2_PT_0 )
  );
  X_AND2 \outDATA<7>\$WA3.UIM_MC.D2_PT_1_2204  (
    .I0(\NlwInverterSignal_outDATA<7>\$WA3.UIM_MC.D2_PT_1/IN0 ),
    .I1(\Enc15FLG_II/UIM ),
    .O(\outDATA<7>\$WA3.UIM_MC.D2_PT_1 )
  );
  X_OR2 \outDATA<7>\$WA3.UIM_MC.D2_2205  (
    .I0(\outDATA<7>\$WA3.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<7>\$WA3.UIM_MC.D2_PT_1 ),
    .O(\outDATA<7>\$WA3.UIM_MC.D2 )
  );
  X_BUF \outDATA<7>\$WA4.UIM_2206  (
    .I(\outDATA<7>\$WA4.UIM_MC.Q ),
    .O(\outDATA<7>\$WA4.UIM )
  );
  X_BUF \outDATA<7>\$WA4.UIM_MC.Q_2207  (
    .I(\outDATA<7>\$WA4.UIM_MC.D ),
    .O(\outDATA<7>\$WA4.UIM_MC.Q )
  );
  X_XOR2 \outDATA<7>\$WA4.UIM_MC.D_2208  (
    .I0(\outDATA<7>\$WA4.UIM_MC.D1 ),
    .I1(\outDATA<7>\$WA4.UIM_MC.D2 ),
    .O(\outDATA<7>\$WA4.UIM_MC.D )
  );
  X_ZERO \outDATA<7>\$WA4.UIM_MC.D1_2209  (
    .O(\outDATA<7>\$WA4.UIM_MC.D1 )
  );
  X_AND2 \outDATA<7>\$WA4.UIM_MC.D2_PT_0_2210  (
    .I0(DCOR0THRESLOWr),
    .I1(\U1/U4/Latch0r [7]),
    .O(\outDATA<7>\$WA4.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<7>\$WA4.UIM_MC.D2_PT_1_2211  (
    .I0(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR0THRESMIDr),
    .I2(\U1/U4/Latch0r [15]),
    .O(\outDATA<7>\$WA4.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<7>\$WA4.UIM_MC.D2_PT_2_2212  (
    .I0(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR1THRESLOWr),
    .I3(\U1/U4/Latch1r [7]),
    .O(\outDATA<7>\$WA4.UIM_MC.D2_PT_2 )
  );
  X_AND4 \outDATA<7>\$WA4.UIM_MC.D2_PT_3_2213  (
    .I0(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN2 ),
    .I3(\U1/U4/Latch1r [15]),
    .O(\outDATA<7>\$WA4.UIM_MC.D2_PT_3 )
  );
  X_OR4 \outDATA<7>\$WA4.UIM_MC.D2_2214  (
    .I0(\outDATA<7>\$WA4.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<7>\$WA4.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<7>\$WA4.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<7>\$WA4.UIM_MC.D2_PT_3 ),
    .O(\outDATA<7>\$WA4.UIM_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<7>  (
    .I(\U1/U4/Latch0r<7>_MC.Q ),
    .O(\U1/U4/Latch0r [7])
  );
  X_FF \U1/U4/Latch0r<7>_MC.REG  (
    .I(\U1/U4/Latch0r<7>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<7>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2215  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<7>_MC.D_2216  (
    .I0(\U1/U4/Latch0r<7>_MC.D1 ),
    .I1(\U1/U4/Latch0r<7>_MC.D2 ),
    .O(\U1/U4/Latch0r<7>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<7>_MC.D1_2217  (
    .O(\U1/U4/Latch0r<7>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<7>_MC.D2_PT_0_2218  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<7>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [7]),
    .O(\U1/U4/Latch0r<7>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<7>_MC.D2_PT_1_2219  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<7>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<7>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [7]),
    .O(\U1/U4/Latch0r<7>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<7>_MC.D2_2220  (
    .I0(\U1/U4/Latch0r<7>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<7>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<7>_MC.D2 )
  );
  X_BUF \U1/U4/Latch0r<15>  (
    .I(\U1/U4/Latch0r<15>_MC.Q ),
    .O(\U1/U4/Latch0r [15])
  );
  X_FF \U1/U4/Latch0r<15>_MC.REG  (
    .I(\U1/U4/Latch0r<15>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch0r<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch0r<15>_MC.Q )
  );
  X_INV \U1/U4/Latch0r<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2221  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch0r<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch0r<15>_MC.D_2222  (
    .I0(\U1/U4/Latch0r<15>_MC.D1 ),
    .I1(\U1/U4/Latch0r<15>_MC.D2 ),
    .O(\U1/U4/Latch0r<15>_MC.D )
  );
  X_ZERO \U1/U4/Latch0r<15>_MC.D1_2223  (
    .O(\U1/U4/Latch0r<15>_MC.D1 )
  );
  X_AND3 \U1/U4/Latch0r<15>_MC.D2_PT_0_2224  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<15>_MC.D2_PT_0/IN0 ),
    .I1(N_PZ_1113),
    .I2(\U1/Channel0 [15]),
    .O(\U1/U4/Latch0r<15>_MC.D2_PT_0 )
  );
  X_AND3 \U1/U4/Latch0r<15>_MC.D2_PT_1_2225  (
    .I0(\NlwInverterSignal_U1/U4/Latch0r<15>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch0r<15>_MC.D2_PT_1/IN1 ),
    .I2(\U1/U4/Latch0r [15]),
    .O(\U1/U4/Latch0r<15>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch0r<15>_MC.D2_2226  (
    .I0(\U1/U4/Latch0r<15>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch0r<15>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch0r<15>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<7>  (
    .I(\U1/U4/Latch1r<7>_MC.Q ),
    .O(\U1/U4/Latch1r [7])
  );
  X_FF \U1/U4/Latch1r<7>_MC.REG  (
    .I(\U1/U4/Latch1r<7>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<7>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2227  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<7>_MC.D_2228  (
    .I0(\U1/U4/Latch1r<7>_MC.D1 ),
    .I1(\U1/U4/Latch1r<7>_MC.D2 ),
    .O(\U1/U4/Latch1r<7>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<7>_MC.D1_2229  (
    .O(\U1/U4/Latch1r<7>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<7>_MC.D2_PT_0_2230  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [7]),
    .O(\U1/U4/Latch1r<7>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<7>_MC.D2_PT_1_2231  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<7>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<7>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<7>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [7]),
    .O(\U1/U4/Latch1r<7>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<7>_MC.D2_2232  (
    .I0(\U1/U4/Latch1r<7>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<7>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<7>_MC.D2 )
  );
  X_BUF \U1/U4/Latch1r<15>  (
    .I(\U1/U4/Latch1r<15>_MC.Q ),
    .O(\U1/U4/Latch1r [15])
  );
  X_FF \U1/U4/Latch1r<15>_MC.REG  (
    .I(\U1/U4/Latch1r<15>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U4/Latch1r<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U4/Latch1r<15>_MC.Q )
  );
  X_INV \U1/U4/Latch1r<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2233  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U4/Latch1r<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U4/Latch1r<15>_MC.D_2234  (
    .I0(\U1/U4/Latch1r<15>_MC.D1 ),
    .I1(\U1/U4/Latch1r<15>_MC.D2 ),
    .O(\U1/U4/Latch1r<15>_MC.D )
  );
  X_ZERO \U1/U4/Latch1r<15>_MC.D1_2235  (
    .O(\U1/U4/Latch1r<15>_MC.D1 )
  );
  X_AND2 \U1/U4/Latch1r<15>_MC.D2_PT_0_2236  (
    .I0(N_PZ_1116),
    .I1(\U1/U4/Latch1r [15]),
    .O(\U1/U4/Latch1r<15>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U4/Latch1r<15>_MC.D2_PT_1_2237  (
    .I0(\NlwInverterSignal_U1/U4/Latch1r<15>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U4/Latch1r<15>_MC.D2_PT_1/IN1 ),
    .I2(\NlwInverterSignal_U1/U4/Latch1r<15>_MC.D2_PT_1/IN2 ),
    .I3(\U1/Channel1 [15]),
    .O(\U1/U4/Latch1r<15>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U4/Latch1r<15>_MC.D2_2238  (
    .I0(\U1/U4/Latch1r<15>_MC.D2_PT_0 ),
    .I1(\U1/U4/Latch1r<15>_MC.D2_PT_1 ),
    .O(\U1/U4/Latch1r<15>_MC.D2 )
  );
  X_BUF \outDATA<7>\$WA5.UIM_2239  (
    .I(\outDATA<7>\$WA5.UIM_MC.Q ),
    .O(\outDATA<7>\$WA5.UIM )
  );
  X_BUF \outDATA<7>\$WA5.UIM_MC.Q_2240  (
    .I(\outDATA<7>\$WA5.UIM_MC.D ),
    .O(\outDATA<7>\$WA5.UIM_MC.Q )
  );
  X_XOR2 \outDATA<7>\$WA5.UIM_MC.D_2241  (
    .I0(\outDATA<7>\$WA5.UIM_MC.D1 ),
    .I1(\outDATA<7>\$WA5.UIM_MC.D2 ),
    .O(\outDATA<7>\$WA5.UIM_MC.D )
  );
  X_ZERO \outDATA<7>\$WA5.UIM_MC.D1_2242  (
    .O(\outDATA<7>\$WA5.UIM_MC.D1 )
  );
  X_AND2 \outDATA<7>\$WA5.UIM_MC.D2_PT_0_2243  (
    .I0(DCOR0CNTLOWr),
    .I1(\U1/U3/holdingreg0 [7]),
    .O(\outDATA<7>\$WA5.UIM_MC.D2_PT_0 )
  );
  X_AND3 \outDATA<7>\$WA5.UIM_MC.D2_PT_1_2244  (
    .I0(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_1/IN0 ),
    .I1(DCOR1CNTLOWr),
    .I2(\U1/U3/holdingreg1 [7]),
    .O(\outDATA<7>\$WA5.UIM_MC.D2_PT_1 )
  );
  X_AND4 \outDATA<7>\$WA5.UIM_MC.D2_PT_2_2245  (
    .I0(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_2/IN0 ),
    .I1(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_2/IN1 ),
    .I2(DCOR0CNTMIDr),
    .I3(\U1/U3/holdingreg0 [15]),
    .O(\outDATA<7>\$WA5.UIM_MC.D2_PT_2 )
  );
  X_AND5 \outDATA<7>\$WA5.UIM_MC.D2_PT_3_2246  (
    .I0(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN0 ),
    .I1(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN1 ),
    .I2(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN2 ),
    .I3(DCOR1CNTMIDr),
    .I4(\U1/U3/holdingreg1 [15]),
    .O(\outDATA<7>\$WA5.UIM_MC.D2_PT_3 )
  );
  X_AND6 \outDATA<7>\$WA5.UIM_MC.D2_PT_4_2247  (
    .I0(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN0 ),
    .I1(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN1 ),
    .I2(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN2 ),
    .I3(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN3 ),
    .I4(DCOR0CNTHIGHr),
    .I5(\U1/U3/holdingreg0 [23]),
    .O(\outDATA<7>\$WA5.UIM_MC.D2_PT_4 )
  );
  X_AND6 \outDATA<7>\$WA5.UIM_MC.D2_PT_5_2248  (
    .I0(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN0 ),
    .I1(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN1 ),
    .I2(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN2 ),
    .I3(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN3 ),
    .I4(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN4 ),
    .I5(\U1/U3/holdingreg1 [23]),
    .O(\outDATA<7>\$WA5.UIM_MC.D2_PT_5 )
  );
  X_OR6 \outDATA<7>\$WA5.UIM_MC.D2_2249  (
    .I0(\outDATA<7>\$WA5.UIM_MC.D2_PT_0 ),
    .I1(\outDATA<7>\$WA5.UIM_MC.D2_PT_1 ),
    .I2(\outDATA<7>\$WA5.UIM_MC.D2_PT_2 ),
    .I3(\outDATA<7>\$WA5.UIM_MC.D2_PT_3 ),
    .I4(\outDATA<7>\$WA5.UIM_MC.D2_PT_4 ),
    .I5(\outDATA<7>\$WA5.UIM_MC.D2_PT_5 ),
    .O(\outDATA<7>\$WA5.UIM_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<7>  (
    .I(\U1/U3/holdingreg0<7>_MC.Q ),
    .O(\U1/U3/holdingreg0 [7])
  );
  X_FF \U1/U3/holdingreg0<7>_MC.REG  (
    .I(\U1/U3/holdingreg0<7>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<7>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2250  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<7>_MC.D_2251  (
    .I0(\U1/U3/holdingreg0<7>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<7>_MC.D2 ),
    .O(\U1/U3/holdingreg0<7>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<7>_MC.D1_2252  (
    .O(\U1/U3/holdingreg0<7>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<7>_MC.D2_PT_0_2253  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [7]),
    .O(\U1/U3/holdingreg0<7>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<7>_MC.D2_PT_1_2254  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<7>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<7>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [7]),
    .O(\U1/U3/holdingreg0<7>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<7>_MC.D2_2255  (
    .I0(\U1/U3/holdingreg0<7>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<7>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<7>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<7>  (
    .I(\U1/U3/holdingreg1<7>_MC.Q ),
    .O(\U1/U3/holdingreg1 [7])
  );
  X_FF \U1/U3/holdingreg1<7>_MC.REG  (
    .I(\U1/U3/holdingreg1<7>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<7>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2256  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<7>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<7>_MC.D_2257  (
    .I0(\U1/U3/holdingreg1<7>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<7>_MC.D2 ),
    .O(\U1/U3/holdingreg1<7>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<7>_MC.D1_2258  (
    .O(\U1/U3/holdingreg1<7>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<7>_MC.D2_PT_0_2259  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [7]),
    .O(\U1/U3/holdingreg1<7>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<7>_MC.D2_PT_1_2260  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<7>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<7>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [7]),
    .O(\U1/U3/holdingreg1<7>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<7>_MC.D2_2261  (
    .I0(\U1/U3/holdingreg1<7>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<7>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<7>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<15>  (
    .I(\U1/U3/holdingreg0<15>_MC.Q ),
    .O(\U1/U3/holdingreg0 [15])
  );
  X_FF \U1/U3/holdingreg0<15>_MC.REG  (
    .I(\U1/U3/holdingreg0<15>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<15>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2262  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<15>_MC.D_2263  (
    .I0(\U1/U3/holdingreg0<15>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<15>_MC.D2 ),
    .O(\U1/U3/holdingreg0<15>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<15>_MC.D1_2264  (
    .O(\U1/U3/holdingreg0<15>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<15>_MC.D2_PT_0_2265  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [15]),
    .O(\U1/U3/holdingreg0<15>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<15>_MC.D2_PT_1_2266  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<15>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<15>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [15]),
    .O(\U1/U3/holdingreg0<15>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<15>_MC.D2_2267  (
    .I0(\U1/U3/holdingreg0<15>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<15>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<15>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<15>  (
    .I(\U1/U3/holdingreg1<15>_MC.Q ),
    .O(\U1/U3/holdingreg1 [15])
  );
  X_FF \U1/U3/holdingreg1<15>_MC.REG  (
    .I(\U1/U3/holdingreg1<15>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<15>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2268  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<15>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<15>_MC.D_2269  (
    .I0(\U1/U3/holdingreg1<15>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<15>_MC.D2 ),
    .O(\U1/U3/holdingreg1<15>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<15>_MC.D1_2270  (
    .O(\U1/U3/holdingreg1<15>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<15>_MC.D2_PT_0_2271  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [15]),
    .O(\U1/U3/holdingreg1<15>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<15>_MC.D2_PT_1_2272  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<15>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<15>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [15]),
    .O(\U1/U3/holdingreg1<15>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<15>_MC.D2_2273  (
    .I0(\U1/U3/holdingreg1<15>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<15>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<15>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg0<23>  (
    .I(\U1/U3/holdingreg0<23>_MC.Q ),
    .O(\U1/U3/holdingreg0 [23])
  );
  X_FF \U1/U3/holdingreg0<23>_MC.REG  (
    .I(\U1/U3/holdingreg0<23>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg0<23>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg0<23>_MC.Q )
  );
  X_INV \U1/U3/holdingreg0<23>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2274  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg0<23>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg0<23>_MC.D_2275  (
    .I0(\U1/U3/holdingreg0<23>_MC.D1 ),
    .I1(\U1/U3/holdingreg0<23>_MC.D2 ),
    .O(\U1/U3/holdingreg0<23>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg0<23>_MC.D1_2276  (
    .O(\U1/U3/holdingreg0<23>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg0<23>_MC.D2_PT_0_2277  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg0 [23]),
    .O(\U1/U3/holdingreg0<23>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg0<23>_MC.D2_PT_1_2278  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg0<23>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg0<23>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel0 [23]),
    .O(\U1/U3/holdingreg0<23>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg0<23>_MC.D2_2279  (
    .I0(\U1/U3/holdingreg0<23>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg0<23>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg0<23>_MC.D2 )
  );
  X_BUF \U1/Channel0<23>  (
    .I(\U1/Channel0<23>_MC.Q ),
    .O(\U1/Channel0 [23])
  );
  X_XOR2 \U1/Channel0<23>_MC_tsimcreated_xor__2280  (
    .I0(\U1/Channel0<23>_MC.D ),
    .I1(\U1/Channel0<23>_MC.Q ),
    .O(\U1/Channel0<23>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel0<23>_MC.REG  (
    .I(\U1/Channel0<23>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel0<23>_MC.Q )
  );
  X_XOR2 \U1/Channel0<23>_MC.D_2281  (
    .I0(\U1/Channel0<23>_MC.D1 ),
    .I1(\U1/Channel0<23>_MC.D2 ),
    .O(\U1/Channel0<23>_MC.D )
  );
  X_ZERO \U1/Channel0<23>_MC.D1_2282  (
    .O(\U1/Channel0<23>_MC.D1 )
  );
  X_AND2 \U1/Channel0<23>_MC.D2_PT_0_2283  (
    .I0(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel0 [23]),
    .O(\U1/Channel0<23>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel0<23>_MC.D2_PT_1_2284  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(N_PZ_1090),
    .I3(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN9 ),
    .I10(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN10 ),
    .I11(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN11 ),
    .I12(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN12 ),
    .I13(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN13 ),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<23>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel0<23>_MC.D2_PT_2_2285  (
    .I0(N_PZ_1074),
    .I1(N_PZ_1132),
    .I2(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel0 [16]),
    .I4(\U1/Channel0 [13]),
    .I5(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel0 [14]),
    .I7(\U1/Channel0 [15]),
    .I8(\U1/Channel0 [17]),
    .I9(\U1/Channel0 [18]),
    .I10(\U1/Channel0 [19]),
    .I11(\U1/Channel0 [20]),
    .I12(\U1/Channel0 [21]),
    .I13(\U1/Channel0 [22]),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel0<23>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel0<23>_MC.D2_2286  (
    .I0(\U1/Channel0<23>_MC.D2_PT_0 ),
    .I1(\U1/Channel0<23>_MC.D2_PT_1 ),
    .I2(\U1/Channel0<23>_MC.D2_PT_2 ),
    .O(\U1/Channel0<23>_MC.D2 )
  );
  X_BUF \U1/U3/holdingreg1<23>  (
    .I(\U1/U3/holdingreg1<23>_MC.Q ),
    .O(\U1/U3/holdingreg1 [23])
  );
  X_FF \U1/U3/holdingreg1<23>_MC.REG  (
    .I(\U1/U3/holdingreg1<23>_MC.D ),
    .CE(Vcc),
    .CLK(\U1/U3/holdingreg1<23>_MC.REG_tsimcreated_inv_Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/U3/holdingreg1<23>_MC.Q )
  );
  X_INV \U1/U3/holdingreg1<23>_MC.REG_tsimcreated_inv_Mclk_II/FCLK_2287  (
    .I(\Mclk_II/FCLK ),
    .O(\U1/U3/holdingreg1<23>_MC.REG_tsimcreated_inv_Mclk_II/FCLK )
  );
  X_XOR2 \U1/U3/holdingreg1<23>_MC.D_2288  (
    .I0(\U1/U3/holdingreg1<23>_MC.D1 ),
    .I1(\U1/U3/holdingreg1<23>_MC.D2 ),
    .O(\U1/U3/holdingreg1<23>_MC.D )
  );
  X_ZERO \U1/U3/holdingreg1<23>_MC.D1_2289  (
    .O(\U1/U3/holdingreg1<23>_MC.D1 )
  );
  X_AND2 \U1/U3/holdingreg1<23>_MC.D2_PT_0_2290  (
    .I0(N_PZ_1082),
    .I1(\U1/U3/holdingreg1 [23]),
    .O(\U1/U3/holdingreg1<23>_MC.D2_PT_0 )
  );
  X_AND4 \U1/U3/holdingreg1<23>_MC.D2_PT_1_2291  (
    .I0(\NlwInverterSignal_U1/U3/holdingreg1<23>_MC.D2_PT_1/IN0 ),
    .I1(\NlwInverterSignal_U1/U3/holdingreg1<23>_MC.D2_PT_1/IN1 ),
    .I2(U2_ASedge),
    .I3(\U1/Channel1 [23]),
    .O(\U1/U3/holdingreg1<23>_MC.D2_PT_1 )
  );
  X_OR2 \U1/U3/holdingreg1<23>_MC.D2_2292  (
    .I0(\U1/U3/holdingreg1<23>_MC.D2_PT_0 ),
    .I1(\U1/U3/holdingreg1<23>_MC.D2_PT_1 ),
    .O(\U1/U3/holdingreg1<23>_MC.D2 )
  );
  X_BUF \U1/Channel1<23>  (
    .I(\U1/Channel1<23>_MC.Q ),
    .O(\U1/Channel1 [23])
  );
  X_XOR2 \U1/Channel1<23>_MC_tsimcreated_xor__2293  (
    .I0(\U1/Channel1<23>_MC.D ),
    .I1(\U1/Channel1<23>_MC.Q ),
    .O(\U1/Channel1<23>_MC_tsimcreated_xor_ )
  );
  X_FF \U1/Channel1<23>_MC.REG  (
    .I(\U1/Channel1<23>_MC_tsimcreated_xor_ ),
    .CE(Vcc),
    .CLK(\Mclk_II/FCLK ),
    .SET(Gnd),
    .RST(PRLD),
    .O(\U1/Channel1<23>_MC.Q )
  );
  X_XOR2 \U1/Channel1<23>_MC.D_2294  (
    .I0(\U1/Channel1<23>_MC.D1 ),
    .I1(\U1/Channel1<23>_MC.D2 ),
    .O(\U1/Channel1<23>_MC.D )
  );
  X_ZERO \U1/Channel1<23>_MC.D1_2295  (
    .O(\U1/Channel1<23>_MC.D1 )
  );
  X_AND2 \U1/Channel1<23>_MC.D2_PT_0_2296  (
    .I0(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_0/IN0 ),
    .I1(\U1/Channel1 [23]),
    .O(\U1/Channel1<23>_MC.D2_PT_0 )
  );
  X_AND16 \U1/Channel1<23>_MC.D2_PT_1_2297  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(N_PZ_1104),
    .I3(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN3 ),
    .I4(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN4 ),
    .I5(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .I6(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN6 ),
    .I7(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN7 ),
    .I8(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN8 ),
    .I9(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN9 ),
    .I10(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN10 ),
    .I11(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN11 ),
    .I12(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN12 ),
    .I13(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN13 ),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<23>_MC.D2_PT_1 )
  );
  X_AND16 \U1/Channel1<23>_MC.D2_PT_2_2298  (
    .I0(N_PZ_1073),
    .I1(N_PZ_1187),
    .I2(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_2/IN2 ),
    .I3(\U1/Channel1 [16]),
    .I4(\U1/Channel1 [13]),
    .I5(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_2/IN5 ),
    .I6(\U1/Channel1 [14]),
    .I7(\U1/Channel1 [15]),
    .I8(\U1/Channel1 [17]),
    .I9(\U1/Channel1 [18]),
    .I10(\U1/Channel1 [19]),
    .I11(\U1/Channel1 [20]),
    .I12(\U1/Channel1 [21]),
    .I13(\U1/Channel1 [22]),
    .I14(Vcc),
    .I15(Vcc),
    .O(\U1/Channel1<23>_MC.D2_PT_2 )
  );
  X_OR3 \U1/Channel1<23>_MC.D2_2299  (
    .I0(\U1/Channel1<23>_MC.D2_PT_0 ),
    .I1(\U1/Channel1<23>_MC.D2_PT_1 ),
    .I2(\U1/Channel1<23>_MC.D2_PT_2 ),
    .O(\U1/Channel1<23>_MC.D2 )
  );
  X_AND2 \FOOBAR1__ctinst/4_2300  (
    .I0(DCOROUTw),
    .I1(DCOROUTw),
    .O(\FOOBAR1__ctinst/4 )
  );
  X_AND2 \FOOBAR1__ctinst/7_2301  (
    .I0(U2_Enable_AD),
    .I1(U2_Enable_AD),
    .O(\FOOBAR1__ctinst/7 )
  );
  X_AND2 \FOOBAR2__ctinst/7_2302  (
    .I0(\Reset_II/UIM ),
    .I1(\Reset_II/UIM ),
    .O(\FOOBAR2__ctinst/7 )
  );
  X_AND6 \FOOBAR4__ctinst/0_2303  (
    .I0(\NlwInverterSignal_FOOBAR4__ctinst/0/IN0 ),
    .I1(\NlwInverterSignal_FOOBAR4__ctinst/0/IN1 ),
    .I2(\NlwInverterSignal_FOOBAR4__ctinst/0/IN2 ),
    .I3(\NlwInverterSignal_FOOBAR4__ctinst/0/IN3 ),
    .I4(\NlwInverterSignal_FOOBAR4__ctinst/0/IN4 ),
    .I5(\NlwInverterSignal_FOOBAR4__ctinst/0/IN5 ),
    .O(\FOOBAR4__ctinst/0 )
  );
  X_AND2 \FOOBAR7__ctinst/0_2304  (
    .I0(\Reset_II/UIM ),
    .I1(\Reset_II/UIM ),
    .O(\FOOBAR7__ctinst/0 )
  );
  X_AND2 \FOOBAR7__ctinst/4_2305  (
    .I0(DCOROUTw),
    .I1(DCOROUTw),
    .O(\FOOBAR7__ctinst/4 )
  );
  X_AND2 \FOOBAR8__ctinst/4_2306  (
    .I0(DCOROUTw),
    .I1(DCOROUTw),
    .O(\FOOBAR8__ctinst/4 )
  );
  X_AND2 \FOOBAR9__ctinst/4_2307  (
    .I0(DCORENCPWRw),
    .I1(DCORENCPWRw),
    .O(\FOOBAR9__ctinst/4 )
  );
  X_AND2 \FOOBAR10__ctinst/4_2308  (
    .I0(DCORENCPWRw),
    .I1(DCORENCPWRw),
    .O(\FOOBAR10__ctinst/4 )
  );
  X_AND2 \FOOBAR11__ctinst/4_2309  (
    .I0(\NlwInverterSignal_FOOBAR11__ctinst/4/IN0 ),
    .I1(U2_WRRDedge),
    .O(\FOOBAR11__ctinst/4 )
  );
  X_AND2 \FOOBAR12__ctinst/4_2310  (
    .I0(DCORENCPWRw),
    .I1(DCORENCPWRw),
    .O(\FOOBAR12__ctinst/4 )
  );
  X_AND2 \FOOBAR15__ctinst/4_2311  (
    .I0(DCOROUTw),
    .I1(DCOROUTw),
    .O(\FOOBAR15__ctinst/4 )
  );
  X_AND2 \FOOBAR18__ctinst/4_2312  (
    .I0(DCOROUTw),
    .I1(DCOROUTw),
    .O(\FOOBAR18__ctinst/4 )
  );
  X_AND2 \FOOBAR21__ctinst/4_2313  (
    .I0(\NlwInverterSignal_FOOBAR21__ctinst/4/IN0 ),
    .I1(\NlwInverterSignal_FOOBAR21__ctinst/4/IN1 ),
    .O(\FOOBAR21__ctinst/4 )
  );
  X_AND2 \FOOBAR24__ctinst/4_2314  (
    .I0(\NlwInverterSignal_FOOBAR24__ctinst/4/IN0 ),
    .I1(\NlwInverterSignal_FOOBAR24__ctinst/4/IN1 ),
    .O(\FOOBAR24__ctinst/4 )
  );
  X_INV \NlwInverterBlock_Enc033ctrl_MC.D/IN0  (
    .I(\Enc033ctrl_MC.D1 ),
    .O(\NlwInverterSignal_Enc033ctrl_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_Enc033ctrl_MC.D1/IN1  (
    .I(\U4/ctrlr [3]),
    .O(\NlwInverterSignal_Enc033ctrl_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<2>_MC.D/IN0  (
    .I(\U4/ctrlr<2>_MC.D1 ),
    .O(\NlwInverterSignal_U4/ctrlr<2>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<2>_MC.D2_PT_0/IN1  (
    .I(\outDATA<2>\$WA0.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<2>_MC.D2_PT_1/IN1  (
    .I(\outDATA<2>\$WA1.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<2>_MC.D2_PT_2/IN1  (
    .I(\outDATA<2>\$WA2.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<2>_MC.D2_PT_3/IN1  (
    .I(\outDATA<2>\$WA3.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<2>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1110),
    .O(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<2>_MC.D2_PT_4/IN1  (
    .I(\outDATA<2>\$WA4.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<2>_MC.D2_PT_5/IN0  (
    .I(N_PZ_1111),
    .O(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<2>_MC.D2_PT_5/IN1  (
    .I(\outDATA<2>\$WA5.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<2>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRw_MC.D1/IN0  (
    .I(\WR_II/UIM ),
    .O(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRw_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRw_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRw_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRw_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRw_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCORENCPWRw_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_1/IN1  (
    .I(\AD<1>_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_1/IN2  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_2/IN0  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_2/IN3  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_3/IN1  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_3/IN2  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_3/IN3  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_3/IN4  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<1>_MC.D2_PT_3/IN7  (
    .I(U2_WRRDedge),
    .O(\NlwInverterSignal_U2_ADDR_reg<1>_MC.D2_PT_3/IN7 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_1/IN4  (
    .I(\AD<0>_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_2/IN0  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_2/IN2  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_3/IN0  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_3/IN1  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_3/IN2  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_3/IN3  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<0>_MC.D2_PT_3/IN6  (
    .I(U2_WRRDedge),
    .O(\NlwInverterSignal_U2_ADDR_reg<0>_MC.D2_PT_3/IN6 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<4>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<4>_MC.D2_PT_1/IN4  (
    .I(\AD<4>_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<4>_MC.D2_PT_2/IN0  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<4>_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<4>_MC.D2_PT_2/IN2  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<4>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<5>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<5>_MC.D2_PT_1/IN4  (
    .I(\AD<5>_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<5>_MC.D2_PT_2/IN0  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<5>_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<5>_MC.D2_PT_2/IN2  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<5>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<6>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<6>_MC.D2_PT_1/IN4  (
    .I(\AD<6>_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<6>_MC.D2_PT_2/IN0  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<6>_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<6>_MC.D2_PT_2/IN2  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<6>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<7>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<7>_MC.D2_PT_1/IN4  (
    .I(\AD<7>_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<7>_MC.D2_PT_2/IN0  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<7>_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<7>_MC.D2_PT_2/IN2  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<7>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U2_AutoInc_MC.D/IN0  (
    .I(\U2_AutoInc_MC.D1 ),
    .O(\NlwInverterSignal_U2_AutoInc_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1082_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_N_PZ_1082_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1082_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_N_PZ_1082_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1082_MC.D2_PT_1/IN1  (
    .I(U2_ASedge),
    .O(\NlwInverterSignal_N_PZ_1082_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_1/IN4  (
    .I(\AD<2>_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_2/IN0  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_2/IN2  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_3/IN2  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_3/IN3  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_3/IN4  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_3/IN5  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN5 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<2>_MC.D2_PT_3/IN8  (
    .I(U2_WRRDedge),
    .O(\NlwInverterSignal_U2_ADDR_reg<2>_MC.D2_PT_3/IN8 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_1/IN4  (
    .I(\AD<3>_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_2/IN0  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_2/IN2  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_3/IN2  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_3/IN3  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_3/IN4  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_3/IN5  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN5 )
  );
  X_INV \NlwInverterBlock_U2_ADDR_reg<3>_MC.D2_PT_3/IN9  (
    .I(U2_WRRDedge),
    .O(\NlwInverterSignal_U2_ADDR_reg<3>_MC.D2_PT_3/IN9 )
  );
  X_INV \NlwInverterBlock_U2_Enable_AD_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_U2_Enable_AD_MC.D1/IN2  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_U2_Enable_AD_MC.D1/IN3  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_U2_Enable_AD_MC.D1/IN4  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_U2_Enable_AD_MC.D1/IN5  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_U2_Enable_AD_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<3>_MC.D/IN0  (
    .I(\U4/ctrlr<3>_MC.D1 ),
    .O(\NlwInverterSignal_U4/ctrlr<3>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<3>_MC.D2_PT_0/IN1  (
    .I(\outDATA<3>\$WA0.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<3>_MC.D2_PT_1/IN1  (
    .I(\outDATA<3>\$WA1.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<3>_MC.D2_PT_2/IN1  (
    .I(\outDATA<3>\$WA2.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<3>_MC.D2_PT_3/IN1  (
    .I(\outDATA<3>\$WA3.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<3>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1110),
    .O(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<3>_MC.D2_PT_4/IN1  (
    .I(\outDATA<3>\$WA4.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<3>_MC.D2_PT_5/IN0  (
    .I(N_PZ_1111),
    .O(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<3>_MC.D2_PT_5/IN1  (
    .I(\outDATA<3>\$WA5.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<3>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_Enc05ctrl_MC.D/IN0  (
    .I(\Enc05ctrl_MC.D1 ),
    .O(\NlwInverterSignal_Enc05ctrl_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_Enc05ctrl_MC.D1/IN0  (
    .I(\U4/ctrlr [2]),
    .O(\NlwInverterSignal_Enc05ctrl_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_Enc133ctrl_MC.D/IN0  (
    .I(\Enc133ctrl_MC.D1 ),
    .O(\NlwInverterSignal_Enc133ctrl_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<6>_MC.D/IN0  (
    .I(\U4/ctrlr<6>_MC.D1 ),
    .O(\NlwInverterSignal_U4/ctrlr<6>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<6>_MC.D2_PT_0/IN1  (
    .I(\outDATA<6>\$WA0.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<6>_MC.D2_PT_1/IN1  (
    .I(\outDATA<6>\$WA1.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<6>_MC.D2_PT_2/IN1  (
    .I(\outDATA<6>\$WA2.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<6>_MC.D2_PT_3/IN1  (
    .I(\outDATA<6>\$WA3.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<6>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1110),
    .O(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<6>_MC.D2_PT_4/IN1  (
    .I(\outDATA<6>\$WA4.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<6>_MC.D2_PT_5/IN0  (
    .I(N_PZ_1111),
    .O(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<6>_MC.D2_PT_5/IN1  (
    .I(\outDATA<6>\$WA5.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<6>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<7>_MC.D/IN0  (
    .I(\U4/ctrlr<7>_MC.D1 ),
    .O(\NlwInverterSignal_U4/ctrlr<7>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<7>_MC.D2_PT_0/IN1  (
    .I(\outDATA<7>\$WA0.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<7>_MC.D2_PT_1/IN1  (
    .I(\outDATA<7>\$WA1.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<7>_MC.D2_PT_2/IN1  (
    .I(\outDATA<7>\$WA2.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<7>_MC.D2_PT_3/IN1  (
    .I(\outDATA<7>\$WA3.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<7>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1110),
    .O(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<7>_MC.D2_PT_4/IN1  (
    .I(\outDATA<7>\$WA4.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<7>_MC.D2_PT_5/IN0  (
    .I(N_PZ_1111),
    .O(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<7>_MC.D2_PT_5/IN1  (
    .I(\outDATA<7>\$WA5.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<7>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_Enc15ctrl_MC.D/IN0  (
    .I(\Enc15ctrl_MC.D1 ),
    .O(\NlwInverterSignal_Enc15ctrl_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_Enc15ctrl_MC.D1/IN0  (
    .I(\U4/ctrlr [6]),
    .O(\NlwInverterSignal_Enc15ctrl_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_DCOROUTw_MC.D1/IN0  (
    .I(\WR_II/UIM ),
    .O(\NlwInverterSignal_DCOROUTw_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_DCOROUTw_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOROUTw_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOROUTw_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOROUTw_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOROUTw_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOROUTw_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOROUTw_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOROUTw_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_Home033ctrl_MC.D/IN0  (
    .I(\Home033ctrl_MC.D1 ),
    .O(\NlwInverterSignal_Home033ctrl_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_Home033ctrl_MC.D1/IN1  (
    .I(\U4/ctrlr [1]),
    .O(\NlwInverterSignal_Home033ctrl_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<0>_MC.D/IN0  (
    .I(\U4/ctrlr<0>_MC.D1 ),
    .O(\NlwInverterSignal_U4/ctrlr<0>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<0>_MC.D2_PT_0/IN1  (
    .I(\outDATA<0>\$WA0.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<0>_MC.D2_PT_1/IN1  (
    .I(\outDATA<0>\$WA1.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<0>_MC.D2_PT_2/IN1  (
    .I(\outDATA<0>\$WA2.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<0>_MC.D2_PT_3/IN1  (
    .I(\outDATA<0>\$WA3.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<0>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1110),
    .O(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<0>_MC.D2_PT_4/IN1  (
    .I(\outDATA<0>\$WA4.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<0>_MC.D2_PT_5/IN0  (
    .I(N_PZ_1111),
    .O(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<0>_MC.D2_PT_5/IN1  (
    .I(\outDATA<0>\$WA5.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<0>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D/IN0  (
    .I(\U4/ctrlr<1>_MC.D1 ),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D2_PT_0/IN1  (
    .I(\outDATA<1>\$WA0.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D2_PT_1/IN1  (
    .I(\outDATA<1>\$WA1.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D2_PT_2/IN1  (
    .I(\outDATA<1>\$WA2.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D2_PT_3/IN1  (
    .I(\outDATA<1>\$WA3.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1110),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D2_PT_4/IN1  (
    .I(\outDATA<1>\$WA4.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D2_PT_5/IN0  (
    .I(N_PZ_1111),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D2_PT_5/IN1  (
    .I(\outDATA<1>\$WA5.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<1>_MC.D2_PT_6/IN0  (
    .I(\outDATA<1>\$WA3.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<1>_MC.D2_PT_6/IN0 )
  );
  X_INV \NlwInverterBlock_Home05ctrl_MC.D/IN0  (
    .I(\Home05ctrl_MC.D1 ),
    .O(\NlwInverterSignal_Home05ctrl_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_Home05ctrl_MC.D1/IN0  (
    .I(\U4/ctrlr [0]),
    .O(\NlwInverterSignal_Home05ctrl_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_Home133ctrl_MC.D/IN0  (
    .I(\Home133ctrl_MC.D1 ),
    .O(\NlwInverterSignal_Home133ctrl_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_Home133ctrl_MC.D1/IN1  (
    .I(\U4/ctrlr [5]),
    .O(\NlwInverterSignal_Home133ctrl_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<4>_MC.D/IN0  (
    .I(\U4/ctrlr<4>_MC.D1 ),
    .O(\NlwInverterSignal_U4/ctrlr<4>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<4>_MC.D2_PT_0/IN1  (
    .I(\outDATA<4>\$WA0.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<4>_MC.D2_PT_1/IN1  (
    .I(\outDATA<4>\$WA1.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<4>_MC.D2_PT_2/IN1  (
    .I(\outDATA<4>\$WA2.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<4>_MC.D2_PT_3/IN1  (
    .I(\outDATA<4>\$WA3.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<4>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1110),
    .O(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<4>_MC.D2_PT_4/IN1  (
    .I(\outDATA<4>\$WA4.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<4>_MC.D2_PT_5/IN0  (
    .I(N_PZ_1111),
    .O(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<4>_MC.D2_PT_5/IN1  (
    .I(\outDATA<4>\$WA5.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<4>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<5>_MC.D/IN0  (
    .I(\U4/ctrlr<5>_MC.D1 ),
    .O(\NlwInverterSignal_U4/ctrlr<5>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<5>_MC.D2_PT_0/IN1  (
    .I(\outDATA<5>\$WA0.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<5>_MC.D2_PT_1/IN1  (
    .I(\outDATA<5>\$WA1.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<5>_MC.D2_PT_2/IN1  (
    .I(\outDATA<5>\$WA2.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<5>_MC.D2_PT_3/IN1  (
    .I(\outDATA<5>\$WA3.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<5>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1110),
    .O(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<5>_MC.D2_PT_4/IN1  (
    .I(\outDATA<5>\$WA4.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<5>_MC.D2_PT_5/IN0  (
    .I(N_PZ_1111),
    .O(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U4/ctrlr<5>_MC.D2_PT_5/IN1  (
    .I(\outDATA<5>\$WA5.UIM ),
    .O(\NlwInverterSignal_U4/ctrlr<5>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_Home15ctrl_MC.D/IN0  (
    .I(\Home15ctrl_MC.D1 ),
    .O(\NlwInverterSignal_Home15ctrl_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_Home15ctrl_MC.D1/IN0  (
    .I(\U4/ctrlr [4]),
    .O(\NlwInverterSignal_Home15ctrl_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_INT_MC.D2_PT_7/IN1  (
    .I(U11_U3_counterr[3]),
    .O(\NlwInverterSignal_INT_MC.D2_PT_7/IN1 )
  );
  X_INV \NlwInverterBlock_INT_MC.D2_PT_7/IN2  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_INT_MC.D2_PT_7/IN2 )
  );
  X_INV \NlwInverterBlock_INT_MC.D2_PT_7/IN3  (
    .I(U11_U3_counterr[4]),
    .O(\NlwInverterSignal_INT_MC.D2_PT_7/IN3 )
  );
  X_INV \NlwInverterBlock_INT_MC.D2_PT_7/IN4  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_INT_MC.D2_PT_7/IN4 )
  );
  X_INV \NlwInverterBlock_INT_MC.D2_PT_7/IN5  (
    .I(U11_U3_counterr[2]),
    .O(\NlwInverterSignal_INT_MC.D2_PT_7/IN5 )
  );
  X_INV \NlwInverterBlock_INT_MC.D2_PT_7/IN6  (
    .I(U11_U3_counterr[5]),
    .O(\NlwInverterSignal_INT_MC.D2_PT_7/IN6 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<0>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<0>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<0>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<0>_MC.D2_PT_1/IN2  (
    .I(DCORIEw),
    .O(\NlwInverterSignal_U3/DCORIE<0>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_DCORIEw_MC.D1/IN0  (
    .I(\WR_II/UIM ),
    .O(\NlwInverterSignal_DCORIEw_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_DCORIEw_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCORIEw_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCORIEw_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCORIEw_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCORIEw_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCORIEw_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCORIEw_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCORIEw_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCORIEw_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCORIEw_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCORIEw_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCORIEw_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCORIEw_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCORIEw_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_DCORIEw_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCORIEw_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_NET2528_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2528_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_NET2528_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2528_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_NET2528_MC.D2_PT_1/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_NET2528_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET2528_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2528_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_NET2528_MC.D2_PT_2/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_NET2528_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_NET2528_MC.D2_PT_2/IN2  (
    .I(\U4/orFLGs ),
    .O(\NlwInverterSignal_NET2528_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_DCORIFGw_MC.D1/IN0  (
    .I(\WR_II/UIM ),
    .O(\NlwInverterSignal_DCORIFGw_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_DCORIFGw_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCORIFGw_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCORIFGw_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCORIFGw_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCORIFGw_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCORIFGw_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCORIFGw_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCORIFGw_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCORIFGw_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCORIFGw_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCORIFGw_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCORIFGw_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_DCORIFGw_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCORIFGw_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<1>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<1>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<1>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<1>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<1>_MC.D2_PT_1/IN2  (
    .I(DCORIEw),
    .O(\NlwInverterSignal_U3/DCORIE<1>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_0/IN2  (
    .I(NET2482),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_0/IN4  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_0/IN4 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_1/IN1  (
    .I(\AD<2>_II/UIM ),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_1/IN4  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_2/IN1  (
    .I(NET2482),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_2/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_2/IN3  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_2/IN6  (
    .I(\U1/U4/HE0statelastr ),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_3/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_3/IN1  (
    .I(NET2482),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_3/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_3/IN3  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_3/IN4  (
    .I(\U1/U4/RF0r ),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_NET2482_MC.D2_PT_3/IN5  (
    .I(\U1/U4/HE0stater ),
    .O(\NlwInverterSignal_NET2482_MC.D2_PT_3/IN5 )
  );
  X_INV \NlwInverterBlock_DCORENCCTLw_MC.D1/IN0  (
    .I(\WR_II/UIM ),
    .O(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_DCORENCCTLw_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCORENCCTLw_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCORENCCTLw_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCORENCCTLw_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCORENCCTLw_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_DCORENCCTLw_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCORENCCTLw_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/U4/RF0r_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/RF0r_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/RF0r_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/RF0r_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/RF0r_MC.D2_PT_1/IN1  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/RF0r_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<2>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<2>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<2>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<2>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<2>_MC.D2_PT_1/IN2  (
    .I(DCORIEw),
    .O(\NlwInverterSignal_U3/DCORIE<2>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_0/IN2  (
    .I(NET2493),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_0/IN4  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_0/IN4 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_1/IN1  (
    .I(\AD<3>_II/UIM ),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_1/IN4  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_2/IN1  (
    .I(NET2493),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_2/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_2/IN3  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_2/IN7  (
    .I(\U1/U4/HE1statelastr ),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_2/IN7 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_3/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_3/IN1  (
    .I(NET2493),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_3/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_3/IN3  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_3/IN4  (
    .I(\U1/U4/RF1r ),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_NET2493_MC.D2_PT_3/IN6  (
    .I(\U1/U4/HE1stater ),
    .O(\NlwInverterSignal_NET2493_MC.D2_PT_3/IN6 )
  );
  X_INV \NlwInverterBlock_U1/U4/RF1r_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/RF1r_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/RF1r_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/RF1r_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/RF1r_MC.D2_PT_1/IN1  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/RF1r_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/E1r_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/E1r_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/E1r_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/E1r_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/E1r_MC.D2_PT_1/IN1  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/E1r_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<3>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<3>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<3>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<3>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<3>_MC.D2_PT_1/IN2  (
    .I(DCORIEw),
    .O(\NlwInverterSignal_U3/DCORIE<3>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_0/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_0/IN2  (
    .I(\FLS0_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_1/IN0  (
    .I(\DIR0_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_1/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_1/IN2  (
    .I(\RLS0_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_2/IN2  (
    .I(\FLS1_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_3/IN0  (
    .I(\DIR1_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_3/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_3/IN2  (
    .I(\RLS1_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_4/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_5/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_NET2575_MC.D2_PT_5/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_NET2575_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<4>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<4>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<4>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<4>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<4>_MC.D2_PT_1/IN2  (
    .I(DCORIEw),
    .O(\NlwInverterSignal_U3/DCORIE<4>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET2501_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2501_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_NET2501_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2501_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_NET2501_MC.D2_PT_1/IN2  (
    .I(NET2501),
    .O(\NlwInverterSignal_NET2501_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET2501_MC.D2_PT_1/IN4  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2501_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_NET2501_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2501_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_NET2501_MC.D2_PT_2/IN1  (
    .I(\AD<5>_II/UIM ),
    .O(\NlwInverterSignal_NET2501_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_NET2501_MC.D2_PT_2/IN4  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2501_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_N_PZ_1113_MC.D2_PT_0/IN1  (
    .I(NET2501),
    .O(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1113_MC.D2_PT_0/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_N_PZ_1113_MC.D2_PT_0/IN3  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_N_PZ_1113_MC.D2_PT_0/IN5  (
    .I(\U1/U4/InEdge0r ),
    .O(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_0/IN5 )
  );
  X_INV \NlwInverterBlock_N_PZ_1113_MC.D2_PT_1/IN0  (
    .I(\outDATA<6>\$WA1.UIM ),
    .O(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1113_MC.D2_PT_1/IN1  (
    .I(NET2501),
    .O(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1113_MC.D2_PT_1/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_N_PZ_1113_MC.D2_PT_1/IN3  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_N_PZ_1113_MC.D2_PT_1/IN4  (
    .I(\U1/U4/LatchEdge0r ),
    .O(\NlwInverterSignal_N_PZ_1113_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U4/LatchEdge0r_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/LatchEdge0r_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/LatchEdge0r_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/LatchEdge0r_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/LatchEdge0r_MC.D2_PT_1/IN1  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/LatchEdge0r_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<5>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<5>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<5>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<5>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<5>_MC.D2_PT_1/IN2  (
    .I(DCORIEw),
    .O(\NlwInverterSignal_U3/DCORIE<5>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_0/IN2  (
    .I(NET2512),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_0/IN4  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_0/IN4 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_1/IN1  (
    .I(\AD<6>_II/UIM ),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_1/IN4  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_2/IN1  (
    .I(NET2512),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_2/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_2/IN3  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_2/IN6  (
    .I(\U1/U4/InEdge1r ),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_3/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_3/IN1  (
    .I(NET2512),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_3/IN2  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_3/IN3  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_3/IN4  (
    .I(\GP_Motor1_0_II/UIM ),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_NET2512_MC.D2_PT_3/IN5  (
    .I(\U1/U4/LatchEdge1r ),
    .O(\NlwInverterSignal_NET2512_MC.D2_PT_3/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U4/LatchEdge1r_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/LatchEdge1r_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/LatchEdge1r_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/LatchEdge1r_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/LatchEdge1r_MC.D2_PT_1/IN1  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/LatchEdge1r_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<6>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<6>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<6>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<6>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<6>_MC.D2_PT_1/IN2  (
    .I(DCORIEw),
    .O(\NlwInverterSignal_U3/DCORIE<6>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<7>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<7>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<7>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U3/DCORIE<7>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U3/DCORIE<7>_MC.D2_PT_1/IN2  (
    .I(DCORIEw),
    .O(\NlwInverterSignal_U3/DCORIE<7>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D/IN0  (
    .I(\U11_U3_counterr<3>_MC.D1 ),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_1/IN0  (
    .I(U11_U3_counterr[3]),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_1/IN1  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_2/IN1  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_2/IN2  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_3/IN1  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_3/IN2  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_4/IN1  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_4/IN2  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_5/IN0  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_5/IN1  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_5/IN2  (
    .I(U11_SCLdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_6/IN3  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_6/IN3 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_6/IN4  (
    .I(U11_SCLdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_6/IN4 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_7/IN0  (
    .I(U11_U3_counterr[4]),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_7/IN1  (
    .I(U11_U3_counterr[5]),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_7/IN2  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_7/IN3  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN3 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<3>_MC.D2_PT_7/IN4  (
    .I(N_PZ_1332),
    .O(\NlwInverterSignal_U11_U3_counterr<3>_MC.D2_PT_7/IN4 )
  );
  X_INV \NlwInverterBlock_N_PZ_1389_MC.D2_PT_1/IN1  (
    .I(\SCLinc_II/UIM ),
    .O(\NlwInverterSignal_N_PZ_1389_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U11_Incdetect_MC.D1/IN0  (
    .I(\SCLinc_II/UIM ),
    .O(\NlwInverterSignal_U11_Incdetect_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_U11_ResetDetect_MC.D1/IN0  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_ResetDetect_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D/IN0  (
    .I(\U11_U3_counterr<0>_MC.D1 ),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_0/IN1  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_2/IN0  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_2/IN2  (
    .I(\SCLinc_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_3/IN0  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_4/IN1  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_4/IN2  (
    .I(U11_SCLdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_5/IN0  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_5/IN1  (
    .I(U11_U3_counterr[4]),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_5/IN2  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_5/IN3  (
    .I(U11_U3_counterr[2]),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_5/IN4  (
    .I(U11_U3_counterr[5]),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_5/IN5  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN5 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_5/IN6  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN6 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<0>_MC.D2_PT_5/IN7  (
    .I(N_PZ_1332),
    .O(\NlwInverterSignal_U11_U3_counterr<0>_MC.D2_PT_5/IN7 )
  );
  X_INV \NlwInverterBlock_U11_SCLdetect_MC.D1/IN0  (
    .I(\SCL_II/UIM ),
    .O(\NlwInverterSignal_U11_SCLdetect_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_1/IN0  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_2/IN0  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_2/IN2  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_2/IN3  (
    .I(U11_U3_counterr[2]),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_2/IN4  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_2/IN6  (
    .I(N_PZ_1332),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_3/IN0  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_3/IN1  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_3/IN2  (
    .I(U11_U3_counterr[2]),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_3/IN4  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_3/IN5  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN5 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<4>_MC.D2_PT_3/IN7  (
    .I(N_PZ_1332),
    .O(\NlwInverterSignal_U11_U3_counterr<4>_MC.D2_PT_3/IN7 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D/IN0  (
    .I(\U11_U3_counterr<1>_MC.D1 ),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_1/IN1  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_1/IN2  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_2/IN0  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_2/IN1  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_2/IN2  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_3/IN0  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_3/IN1  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_3/IN2  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_3/IN3  (
    .I(U11_SCLdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_4/IN0  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_4/IN2  (
    .I(\SCLinc_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_5/IN2  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_5/IN4  (
    .I(U11_SCLdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_6/IN0  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_6/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_6/IN2  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_6/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_6/IN3  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_6/IN3 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_7/IN0  (
    .I(U11_U3_counterr[3]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_7/IN1  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_7/IN2  (
    .I(U11_U3_counterr[4]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_7/IN3  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN3 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_7/IN4  (
    .I(U11_U3_counterr[2]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN4 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_7/IN5  (
    .I(U11_U3_counterr[5]),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN5 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<1>_MC.D2_PT_7/IN6  (
    .I(\SCLreset_II/UIM ),
    .O(\NlwInverterSignal_U11_U3_counterr<1>_MC.D2_PT_7/IN6 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D/IN0  (
    .I(\U11_U3_counterr<2>_MC.D1 ),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_0/IN0  (
    .I(U11_U3_counterr[2]),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_1/IN1  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_1/IN2  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_2/IN0  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_2/IN1  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_2/IN2  (
    .I(U11_SCLdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_3/IN1  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_3/IN2  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_4/IN0  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_5/IN0  (
    .I(U11_U3_counterr[3]),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_5/IN1  (
    .I(U11_U3_counterr[4]),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_5/IN2  (
    .I(U11_U3_counterr[2]),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<2>_MC.D2_PT_5/IN3  (
    .I(U11_U3_counterr[5]),
    .O(\NlwInverterSignal_U11_U3_counterr<2>_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<5>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1389),
    .O(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<5>_MC.D2_PT_2/IN0  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<5>_MC.D2_PT_2/IN1  (
    .I(U11_U3_counterr[4]),
    .O(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<5>_MC.D2_PT_2/IN2  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<5>_MC.D2_PT_2/IN3  (
    .I(U11_U3_counterr[2]),
    .O(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<5>_MC.D2_PT_2/IN5  (
    .I(U11_Incdetect),
    .O(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U11_U3_counterr<5>_MC.D2_PT_2/IN7  (
    .I(N_PZ_1332),
    .O(\NlwInverterSignal_U11_U3_counterr<5>_MC.D2_PT_2/IN7 )
  );
  X_INV \NlwInverterBlock_N_PZ_1332_MC.D2_PT_1/IN3  (
    .I(U11_SCLdetect),
    .O(\NlwInverterSignal_N_PZ_1332_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_LED1_MC.D/IN0  (
    .I(\LED1_MC.D1 ),
    .O(\NlwInverterSignal_LED1_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_LED1_MC.D1/IN1  (
    .I(\U9/MISCr [0]),
    .O(\NlwInverterSignal_LED1_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_LED2_MC.D/IN0  (
    .I(\LED2_MC.D1 ),
    .O(\NlwInverterSignal_LED2_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_LED2_MC.D1/IN1  (
    .I(\U9/MISCr [1]),
    .O(\NlwInverterSignal_LED2_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_LED3_MC.D/IN0  (
    .I(\LED3_MC.D1 ),
    .O(\NlwInverterSignal_LED3_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_LED3_MC.D1/IN1  (
    .I(\U9/MISCr [2]),
    .O(\NlwInverterSignal_LED3_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_LED4_MC.D/IN0  (
    .I(\LED4_MC.D1 ),
    .O(\NlwInverterSignal_LED4_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_LED4_MC.D1/IN1  (
    .I(\U9/MISCr [3]),
    .O(\NlwInverterSignal_LED4_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_LED5_MC.D/IN0  (
    .I(\LED5_MC.D1 ),
    .O(\NlwInverterSignal_LED5_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_LED5_MC.D1/IN1  (
    .I(\U9/MISCr [4]),
    .O(\NlwInverterSignal_LED5_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_MTRpwrn_MC.D/IN0  (
    .I(\MTRpwrn_MC.D1 ),
    .O(\NlwInverterSignal_MTRpwrn_MC.D/IN0 )
  );
  X_INV \NlwInverterBlock_PAH0_MC.D1/IN0  (
    .I(\Brake0_II/UIM ),
    .O(\NlwInverterSignal_PAH0_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_PAH0_MC.D1/IN1  (
    .I(\DIR0_II/UIM ),
    .O(\NlwInverterSignal_PAH0_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_PAH0_MC.D1/IN3  (
    .I(NET3248),
    .O(\NlwInverterSignal_PAH0_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_NET3248_MC.D2_PT_0/IN0  (
    .I(\Brake0_II/UIM ),
    .O(\NlwInverterSignal_NET3248_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_NET3248_MC.D2_PT_0/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET3248_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_NET3248_MC.D2_PT_1/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET3248_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_NET3248_MC.D2_PT_1/IN2  (
    .I(\FLS0_II/UIM ),
    .O(\NlwInverterSignal_NET3248_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET3248_MC.D2_PT_2/IN0  (
    .I(\DIR0_II/UIM ),
    .O(\NlwInverterSignal_NET3248_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_NET3248_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET3248_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_NET3248_MC.D2_PT_2/IN2  (
    .I(\RLS0_II/UIM ),
    .O(\NlwInverterSignal_NET3248_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_PAH1_MC.D2_PT_0/IN0  (
    .I(\Brake1_II/UIM ),
    .O(\NlwInverterSignal_PAH1_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_PAH1_MC.D2_PT_0/IN3  (
    .I(NET3253),
    .O(\NlwInverterSignal_PAH1_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_PAH1_MC.D2_PT_1/IN0  (
    .I(\Brake1_II/UIM ),
    .O(\NlwInverterSignal_PAH1_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_PAH1_MC.D2_PT_1/IN1  (
    .I(\DIR1_II/UIM ),
    .O(\NlwInverterSignal_PAH1_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_PAH1_MC.D2_PT_1/IN2  (
    .I(\PWM2_II/UIM ),
    .O(\NlwInverterSignal_PAH1_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_PAH1_MC.D2_PT_1/IN3  (
    .I(NET3253),
    .O(\NlwInverterSignal_PAH1_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_NET3253_MC.D2_PT_0/IN0  (
    .I(\Brake1_II/UIM ),
    .O(\NlwInverterSignal_NET3253_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_NET3253_MC.D2_PT_0/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET3253_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_NET3253_MC.D2_PT_1/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET3253_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_NET3253_MC.D2_PT_1/IN2  (
    .I(\FLS1_II/UIM ),
    .O(\NlwInverterSignal_NET3253_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_NET3253_MC.D2_PT_2/IN0  (
    .I(\DIR1_II/UIM ),
    .O(\NlwInverterSignal_NET3253_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_NET3253_MC.D2_PT_2/IN1  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_NET3253_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_NET3253_MC.D2_PT_2/IN2  (
    .I(\RLS1_II/UIM ),
    .O(\NlwInverterSignal_NET3253_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_PAL0_MC.D2_PT_0/IN0  (
    .I(\Brake0_II/UIM ),
    .O(\NlwInverterSignal_PAL0_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_PAL0_MC.D2_PT_0/IN2  (
    .I(\PWM1_II/UIM ),
    .O(\NlwInverterSignal_PAL0_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_PAL0_MC.D2_PT_0/IN3  (
    .I(NET3248),
    .O(\NlwInverterSignal_PAL0_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_PAL0_MC.D2_PT_1/IN0  (
    .I(\Brake0_II/UIM ),
    .O(\NlwInverterSignal_PAL0_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_PAL0_MC.D2_PT_1/IN1  (
    .I(\DIR0_II/UIM ),
    .O(\NlwInverterSignal_PAL0_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_PAL0_MC.D2_PT_1/IN3  (
    .I(NET3248),
    .O(\NlwInverterSignal_PAL0_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_PAL1_MC.D1/IN0  (
    .I(\Brake1_II/UIM ),
    .O(\NlwInverterSignal_PAL1_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_PAL1_MC.D1/IN3  (
    .I(NET3253),
    .O(\NlwInverterSignal_PAL1_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_PBH0_MC.D1/IN0  (
    .I(\Brake0_II/UIM ),
    .O(\NlwInverterSignal_PBH0_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_PBH0_MC.D1/IN3  (
    .I(NET3248),
    .O(\NlwInverterSignal_PBH0_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_PBH1_MC.D2_PT_0/IN0  (
    .I(\Brake1_II/UIM ),
    .O(\NlwInverterSignal_PBH1_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_PBH1_MC.D2_PT_0/IN2  (
    .I(\PWM2_II/UIM ),
    .O(\NlwInverterSignal_PBH1_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_PBH1_MC.D2_PT_0/IN3  (
    .I(NET3253),
    .O(\NlwInverterSignal_PBH1_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_PBH1_MC.D2_PT_1/IN0  (
    .I(\Brake1_II/UIM ),
    .O(\NlwInverterSignal_PBH1_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_PBH1_MC.D2_PT_1/IN1  (
    .I(\DIR1_II/UIM ),
    .O(\NlwInverterSignal_PBH1_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_PBH1_MC.D2_PT_1/IN3  (
    .I(NET3253),
    .O(\NlwInverterSignal_PBH1_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_PBL0_MC.D2_PT_0/IN0  (
    .I(\Brake0_II/UIM ),
    .O(\NlwInverterSignal_PBL0_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_PBL0_MC.D2_PT_0/IN3  (
    .I(NET3248),
    .O(\NlwInverterSignal_PBL0_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_PBL0_MC.D2_PT_1/IN0  (
    .I(\Brake0_II/UIM ),
    .O(\NlwInverterSignal_PBL0_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_PBL0_MC.D2_PT_1/IN1  (
    .I(\DIR0_II/UIM ),
    .O(\NlwInverterSignal_PBL0_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_PBL0_MC.D2_PT_1/IN2  (
    .I(\PWM1_II/UIM ),
    .O(\NlwInverterSignal_PBL0_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_PBL0_MC.D2_PT_1/IN3  (
    .I(NET3248),
    .O(\NlwInverterSignal_PBL0_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_PBL1_MC.D1/IN0  (
    .I(\Brake1_II/UIM ),
    .O(\NlwInverterSignal_PBL1_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_PBL1_MC.D1/IN1  (
    .I(\DIR1_II/UIM ),
    .O(\NlwInverterSignal_PBL1_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_PBL1_MC.D1/IN3  (
    .I(NET3253),
    .O(\NlwInverterSignal_PBL1_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCORI2CCNTr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCORI2CCNTr_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCORI2CCNTr_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCORI2CCNTr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCORI2CCNTr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCORI2CCNTr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCORI2CCNTr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCORI2CCNTr_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_DCORI2CCNTr_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCORI2CCNTr_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_DCORCONFIGr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCORCONFIGr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCORCONFIGr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCORCONFIGr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCORCONFIGr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCORCONFIGr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCORLIMITSr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCORLIMITSr_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCORLIMITSr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCORLIMITSr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCORLIMITSr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCORLIMITSr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCORLIMITSr_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_DCORLIMITSr_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCORLIMITSr_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRr_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCORENCPWRr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCORENCPWRr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA3.UIM_MC.D2_PT_1/IN0  (
    .I(NET2528),
    .O(\NlwInverterSignal_outDATA<0>\$WA3.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA4.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA4.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA4.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR1THRESLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA4.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<0>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<0>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<0>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<0>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<0>_MC.D2_PT_0/IN2  (
    .I(N_PZ_1132),
    .O(\NlwInverterSignal_U1/Channel0<0>_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<0>_MC.D2_PT_1/IN0  (
    .I(\U1/Channel0 [0]),
    .O(\NlwInverterSignal_U1/Channel0<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1074_MC.D1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_N_PZ_1074_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1074_MC.D1/IN1  (
    .I(\U1/Zero0 ),
    .O(\NlwInverterSignal_N_PZ_1074_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_1/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_2/IN1  (
    .I(NET2482),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_2/IN4  (
    .I(\U1/U4/HE0statelastr ),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_2/IN5  (
    .I(N_PZ_1116),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_3/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_3/IN1  (
    .I(NET2482),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_3/IN2  (
    .I(\U1/U4/RF0r ),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_3/IN3  (
    .I(\U1/U4/HE0stater ),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Zero0_MC.D2_PT_3/IN5  (
    .I(N_PZ_1116),
    .O(\NlwInverterSignal_U1/Zero0_MC.D2_PT_3/IN5 )
  );
  X_INV \NlwInverterBlock_N_PZ_1116_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_N_PZ_1116_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1116_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_N_PZ_1116_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/E0r_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/E0r_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/E0r_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/E0r_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/E0r_MC.D2_PT_1/IN1  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/E0r_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1132_MC.D2_PT_0/IN1  (
    .I(\U1/U1/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_N_PZ_1132_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1132_MC.D2_PT_0/IN3  (
    .I(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_N_PZ_1132_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_N_PZ_1132_MC.D2_PT_1/IN1  (
    .I(\U1/U1/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_N_PZ_1132_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1132_MC.D2_PT_1/IN2  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_N_PZ_1132_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN3  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN1  (
    .I(\PhaseA_Encoder0_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN4  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN2  (
    .I(\U1/U1/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN3  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN4  (
    .I(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN2  (
    .I(\U1/U1/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN3  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN4  (
    .I(N_PZ_1289),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN3  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN4  (
    .I(N_PZ_1289),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN1  (
    .I(\U1/U1/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN3  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN2  (
    .I(N_PZ_1132),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN4  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN1  (
    .I(\PhaseA_Encoder0_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN2  (
    .I(\PhaseB_Encoder0_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN4  (
    .I(\U1/U1/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN5  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN6  (
    .I(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD4_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN2  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN2  (
    .I(\U1/U1/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN3  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN1  (
    .I(\PhaseA_Encoder0_II/UIM ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN3  (
    .I(\U1/U1/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN4  (
    .I(\U1/U1/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN5  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U1/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_N_PZ_1289_MC.D2_PT_0/IN1  (
    .I(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_N_PZ_1289_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1289_MC.D2_PT_1/IN0  (
    .I(\PhaseB_Encoder0_II/UIM ),
    .O(\NlwInverterSignal_N_PZ_1289_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESLOWr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESLOWr_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESLOWr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESLOWr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESLOWr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESLOWr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESLOWr_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCOR0THRESLOWr_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<8>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<8>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<8>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<8>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<8>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<8>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<8>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<8>_MC.D2_PT_1/IN3  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<8>_MC.D2_PT_1/IN4  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<8>_MC.D2_PT_2/IN2  (
    .I(\U1/Channel0 [7]),
    .O(\NlwInverterSignal_U1/Channel0<8>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<7>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<7>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<7>_MC.D2_PT_2/IN2  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<7>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<7>_MC.D2_PT_2/IN3  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<7>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN0  (
    .I(\U1/Channel0 [0]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1086),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN2  (
    .I(\U1/Channel0 [1]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [2]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel0 [3]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel0 [4]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel0 [5]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel0 [6]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_N_PZ_1086_MC.D2_PT_1/IN0  (
    .I(\U1/U1/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1086_MC.D2_PT_1/IN1  (
    .I(\U1/U1/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1086_MC.D2_PT_2/IN1  (
    .I(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1086_MC.D2_PT_3/IN1  (
    .I(\U1/U1/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1086_MC.D2_PT_3/IN2  (
    .I(\U1/U1/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_N_PZ_1086_MC.D2_PT_3/IN3  (
    .I(\U1/NET3721 ),
    .O(\NlwInverterSignal_N_PZ_1086_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/NET3721_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/NET3721_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/NET3721_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/NET3721_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/NET3721_MC.D2_PT_1/IN1  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/NET3721_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1090_MC.D2_PT_1/IN0  (
    .I(\U1/U1/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_N_PZ_1090_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1090_MC.D2_PT_1/IN1  (
    .I(\U1/NET3721 ),
    .O(\NlwInverterSignal_N_PZ_1090_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<1>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<1>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<1>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<1>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<1>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel0 [0]),
    .O(\NlwInverterSignal_U1/Channel0<1>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<2>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<2>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<2>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel0 [0]),
    .O(\NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<2>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel0 [1]),
    .O(\NlwInverterSignal_U1/Channel0<2>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<3>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<3>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<3>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel0 [0]),
    .O(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<3>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel0 [1]),
    .O(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<3>_MC.D2_PT_2/IN5  (
    .I(\U1/Channel0 [2]),
    .O(\NlwInverterSignal_U1/Channel0<3>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<4>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<4>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<4>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel0 [0]),
    .O(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<4>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel0 [1]),
    .O(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<4>_MC.D2_PT_2/IN5  (
    .I(\U1/Channel0 [2]),
    .O(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<4>_MC.D2_PT_2/IN6  (
    .I(\U1/Channel0 [3]),
    .O(\NlwInverterSignal_U1/Channel0<4>_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<5>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<5>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<5>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel0 [0]),
    .O(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<5>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel0 [1]),
    .O(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<5>_MC.D2_PT_2/IN5  (
    .I(\U1/Channel0 [2]),
    .O(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<5>_MC.D2_PT_2/IN6  (
    .I(\U1/Channel0 [3]),
    .O(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<5>_MC.D2_PT_2/IN7  (
    .I(\U1/Channel0 [4]),
    .O(\NlwInverterSignal_U1/Channel0<5>_MC.D2_PT_2/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel0 [6]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_2/IN1  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_2/IN3  (
    .I(\U1/Channel0 [5]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_3/IN2  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_3/IN3  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_4/IN0  (
    .I(\U1/Channel0 [0]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_4/IN2  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_4/IN3  (
    .I(\U1/Channel0 [1]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_4/IN4  (
    .I(\U1/Channel0 [2]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_4/IN5  (
    .I(\U1/Channel0 [3]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_4/IN6  (
    .I(\U1/Channel0 [4]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_4/IN7  (
    .I(\U1/Channel0 [5]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_4/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<6>_MC.D2_PT_5/IN9  (
    .I(\U1/Channel0 [6]),
    .O(\NlwInverterSignal_U1/Channel0<6>_MC.D2_PT_5/IN9 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESMIDr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESMIDr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESMIDr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESMIDr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESMIDr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCOR0THRESMIDr_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCOR0THRESMIDr_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<0>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<0>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<0>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<0>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<0>_MC.D2_PT_0/IN2  (
    .I(N_PZ_1187),
    .O(\NlwInverterSignal_U1/Channel1<0>_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<0>_MC.D2_PT_1/IN0  (
    .I(\U1/Channel1 [0]),
    .O(\NlwInverterSignal_U1/Channel1<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1073_MC.D1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_N_PZ_1073_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1073_MC.D1/IN1  (
    .I(\U1/Zero1 ),
    .O(\NlwInverterSignal_N_PZ_1073_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_1/IN1  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_2/IN1  (
    .I(NET2493),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_2/IN5  (
    .I(\U1/U4/HE1statelastr ),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_2/IN6  (
    .I(N_PZ_1116),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_3/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_3/IN1  (
    .I(NET2493),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_3/IN2  (
    .I(\U1/U4/RF1r ),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_3/IN4  (
    .I(\U1/U4/HE1stater ),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Zero1_MC.D2_PT_3/IN6  (
    .I(N_PZ_1116),
    .O(\NlwInverterSignal_U1/Zero1_MC.D2_PT_3/IN6 )
  );
  X_INV \NlwInverterBlock_N_PZ_1187_MC.D2_PT_0/IN1  (
    .I(\U1/U6/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_N_PZ_1187_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1187_MC.D2_PT_0/IN3  (
    .I(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_N_PZ_1187_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_N_PZ_1187_MC.D2_PT_1/IN1  (
    .I(\U1/U6/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_N_PZ_1187_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1187_MC.D2_PT_1/IN2  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_N_PZ_1187_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN3  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN1  (
    .I(\PhaseA_Encoder1_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN4  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN2  (
    .I(\U1/U6/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN3  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN4  (
    .I(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD3_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN2  (
    .I(\U1/U6/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN3  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN4  (
    .I(N_PZ_1290),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_0/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN3  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN4  (
    .I(N_PZ_1290),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN1  (
    .I(\U1/U6/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN3  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN2  (
    .I(N_PZ_1187),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN4  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD2_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN1  (
    .I(\PhaseA_Encoder1_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN2  (
    .I(\PhaseB_Encoder1_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN4  (
    .I(\U1/U6/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN5  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN6  (
    .I(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD4_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN2  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN2  (
    .I(\U1/U6/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN3  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN1  (
    .I(\PhaseA_Encoder1_II/UIM ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN3  (
    .I(\U1/U6/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN4  (
    .I(\U1/U6/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN5  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_U1/U6/CurrState_Sreg0_FFD1_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_N_PZ_1290_MC.D2_PT_0/IN1  (
    .I(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_N_PZ_1290_MC.D2_PT_0/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1290_MC.D2_PT_1/IN0  (
    .I(\PhaseB_Encoder1_II/UIM ),
    .O(\NlwInverterSignal_N_PZ_1290_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESLOWr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESLOWr_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESLOWr_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESLOWr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESLOWr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESLOWr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESLOWr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR1THRESLOWr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<8>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<8>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<8>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<8>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<8>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<8>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<8>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<8>_MC.D2_PT_1/IN3  (
    .I(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<8>_MC.D2_PT_1/IN4  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<8>_MC.D2_PT_2/IN2  (
    .I(\U1/Channel1 [7]),
    .O(\NlwInverterSignal_U1/Channel1<8>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<7>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<7>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<7>_MC.D2_PT_2/IN2  (
    .I(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel1<7>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<7>_MC.D2_PT_2/IN3  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<7>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN0  (
    .I(\U1/Channel1 [0]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1087),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN2  (
    .I(\U1/Channel1 [5]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [6]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [1]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel1 [2]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [3]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel1 [4]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0103<0>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_N_PZ_1087_MC.D2_PT_1/IN0  (
    .I(\U1/U6/CurrState_Sreg0_FFD3 ),
    .O(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1087_MC.D2_PT_1/IN1  (
    .I(\U1/U6/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1087_MC.D2_PT_2/IN1  (
    .I(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1087_MC.D2_PT_3/IN1  (
    .I(\U1/U6/CurrState_Sreg0_FFD2 ),
    .O(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1087_MC.D2_PT_3/IN2  (
    .I(\U1/U6/CurrState_Sreg0_FFD1 ),
    .O(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_N_PZ_1087_MC.D2_PT_3/IN3  (
    .I(\U1/NET3720 ),
    .O(\NlwInverterSignal_N_PZ_1087_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/NET3720_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/NET3720_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/NET3720_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/NET3720_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/NET3720_MC.D2_PT_1/IN1  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/NET3720_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1104_MC.D2_PT_1/IN0  (
    .I(\U1/U6/CurrState_Sreg0_FFD4 ),
    .O(\NlwInverterSignal_N_PZ_1104_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1104_MC.D2_PT_1/IN1  (
    .I(\U1/NET3720 ),
    .O(\NlwInverterSignal_N_PZ_1104_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<1>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<1>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<1>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<1>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<1>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel1 [0]),
    .O(\NlwInverterSignal_U1/Channel1<1>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<2>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<2>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<2>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel1 [0]),
    .O(\NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<2>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel1 [1]),
    .O(\NlwInverterSignal_U1/Channel1<2>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<3>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<3>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<3>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel1 [0]),
    .O(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<3>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel1 [1]),
    .O(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<3>_MC.D2_PT_2/IN5  (
    .I(\U1/Channel1 [2]),
    .O(\NlwInverterSignal_U1/Channel1<3>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<4>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<4>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<4>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel1 [0]),
    .O(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<4>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel1 [1]),
    .O(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<4>_MC.D2_PT_2/IN5  (
    .I(\U1/Channel1 [2]),
    .O(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<4>_MC.D2_PT_2/IN6  (
    .I(\U1/Channel1 [3]),
    .O(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<4>_MC.D2_PT_3/IN3  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<4>_MC.D2_PT_3/IN4  (
    .I(N_PZ_1327),
    .O(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<4>_MC.D2_PT_3/IN8  (
    .I(\U1/Channel1 [4]),
    .O(\NlwInverterSignal_U1/Channel1<4>_MC.D2_PT_3/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<5>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<5>_MC.D2_PT_1/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<5>_MC.D2_PT_2/IN0  (
    .I(\U1/Channel1 [0]),
    .O(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<5>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel1 [1]),
    .O(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<5>_MC.D2_PT_2/IN5  (
    .I(\U1/Channel1 [2]),
    .O(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<5>_MC.D2_PT_2/IN6  (
    .I(\U1/Channel1 [3]),
    .O(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<5>_MC.D2_PT_2/IN7  (
    .I(\U1/Channel1 [4]),
    .O(\NlwInverterSignal_U1/Channel1<5>_MC.D2_PT_2/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [6]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_2/IN1  (
    .I(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_2/IN3  (
    .I(N_PZ_1327),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_3/IN1  (
    .I(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_3/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_4/IN5  (
    .I(\U1/Channel1 [6]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_4/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_5/IN0  (
    .I(\U1/Channel1 [0]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_5/IN2  (
    .I(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_5/IN3  (
    .I(\U1/Channel1 [5]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_5/IN5  (
    .I(\U1/Channel1 [1]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_5/IN6  (
    .I(\U1/Channel1 [2]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_5/IN7  (
    .I(\U1/Channel1 [3]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<6>_MC.D2_PT_5/IN8  (
    .I(\U1/Channel1 [4]),
    .O(\NlwInverterSignal_U1/Channel1<6>_MC.D2_PT_5/IN8 )
  );
  X_INV \NlwInverterBlock_N_PZ_1110_MC.D1/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_N_PZ_1110_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1110_MC.D1/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_N_PZ_1110_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1110_MC.D1/IN2  (
    .I(DCOR1THRESLOWr),
    .O(\NlwInverterSignal_N_PZ_1110_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_N_PZ_1110_MC.D1/IN3  (
    .I(DCOR1THRESMIDr),
    .O(\NlwInverterSignal_N_PZ_1110_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESMIDr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESMIDr_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESMIDr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESMIDr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESMIDr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR1THRESMIDr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR1THRESMIDr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_4/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN4  (
    .I(DCOR0CNTHIGHr),
    .O(\NlwInverterSignal_outDATA<0>\$WA5.UIM_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<0>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<0>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTLOWr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTLOWr_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTLOWr_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTLOWr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTLOWr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTLOWr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTLOWr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTLOWr_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCOR0CNTLOWr_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<0>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<0>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTLOWr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTLOWr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTLOWr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTLOWr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTLOWr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTLOWr_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCOR1CNTLOWr_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<8>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<8>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<8>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<8>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTMIDr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTMIDr_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTMIDr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTMIDr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTMIDr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTMIDr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTMIDr_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCOR0CNTMIDr_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<8>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<8>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<8>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<8>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTMIDr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTMIDr_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTMIDr_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTMIDr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTMIDr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTMIDr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTMIDr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTMIDr_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCOR1CNTMIDr_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<16>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<16>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<16>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<16>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<16>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<16>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<16>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<16>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<16>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<16>_MC.D2_PT_2/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<16>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<13>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<13>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<13>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<13>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<13>_MC.D2_PT_2/IN3  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<13>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0/IN2  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_0/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN0  (
    .I(\U1/Channel0 [8]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN1  (
    .I(\U1/Channel0 [7]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1086),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel0 [10]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel0 [9]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel0 [11]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel0 [12]),
    .O(\NlwInverterSignal_U1/U2/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<10>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<10>_MC.D2_PT_1/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<10>_MC.D2_PT_1/IN5  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<10>_MC.D2_PT_2/IN2  (
    .I(\U1/Channel0 [8]),
    .O(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<10>_MC.D2_PT_2/IN3  (
    .I(\U1/Channel0 [7]),
    .O(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<10>_MC.D2_PT_2/IN6  (
    .I(\U1/Channel0 [9]),
    .O(\NlwInverterSignal_U1/Channel0<10>_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<9>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<9>_MC.D2_PT_1/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<9>_MC.D2_PT_1/IN5  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<9>_MC.D2_PT_2/IN2  (
    .I(\U1/Channel0 [8]),
    .O(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<9>_MC.D2_PT_2/IN3  (
    .I(\U1/Channel0 [7]),
    .O(\NlwInverterSignal_U1/Channel0<9>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<11>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<11>_MC.D2_PT_1/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<11>_MC.D2_PT_1/IN5  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<11>_MC.D2_PT_2/IN2  (
    .I(\U1/Channel0 [8]),
    .O(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<11>_MC.D2_PT_2/IN3  (
    .I(\U1/Channel0 [7]),
    .O(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<11>_MC.D2_PT_2/IN6  (
    .I(\U1/Channel0 [10]),
    .O(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<11>_MC.D2_PT_2/IN7  (
    .I(\U1/Channel0 [9]),
    .O(\NlwInverterSignal_U1/Channel0<11>_MC.D2_PT_2/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel0 [12]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_2/IN1  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_2/IN2  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_2/IN3  (
    .I(\U1/Channel0 [11]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_3/IN3  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_3/IN4  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_3/IN5  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_3/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_4/IN1  (
    .I(\U1/Channel0 [8]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_4/IN2  (
    .I(\U1/Channel0 [7]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_4/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_4/IN5  (
    .I(\U1/Channel0 [10]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_4/IN6  (
    .I(\U1/Channel0 [9]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_4/IN7  (
    .I(\U1/Channel0 [11]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_4/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_5/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<12>_MC.D2_PT_5/IN9  (
    .I(\U1/Channel0 [12]),
    .O(\NlwInverterSignal_U1/Channel0<12>_MC.D2_PT_5/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<14>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<14>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<14>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<14>_MC.D2_PT_2/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<14>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<15>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<15>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<15>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<15>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<15>_MC.D2_PT_2/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<15>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTHIGHr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTHIGHr_MC.D1/IN3  (
    .I(U2_ADDR_reg[0]),
    .O(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTHIGHr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTHIGHr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTHIGHr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTHIGHr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCOR0CNTHIGHr_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCOR0CNTHIGHr_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<16>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<16>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<16>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<16>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<16>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<16>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<16>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel1 [14]),
    .O(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<16>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [15]),
    .O(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<16>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<16>_MC.D2_PT_2/IN4  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<16>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<13>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<13>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<13>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<13>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<13>_MC.D2_PT_2/IN3  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<13>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN0  (
    .I(\U1/Channel1 [8]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN1  (
    .I(\U1/Channel1 [7]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN3  (
    .I(N_PZ_1087),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [11]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel1 [12]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [10]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel1 [9]),
    .O(\NlwInverterSignal_U1/U5/location_Maddsub__n0000__n0115<0>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<10>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<10>_MC.D2_PT_1/IN4  (
    .I(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<10>_MC.D2_PT_1/IN5  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<10>_MC.D2_PT_2/IN2  (
    .I(\U1/Channel1 [8]),
    .O(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<10>_MC.D2_PT_2/IN3  (
    .I(\U1/Channel1 [7]),
    .O(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<10>_MC.D2_PT_2/IN6  (
    .I(\U1/Channel1 [9]),
    .O(\NlwInverterSignal_U1/Channel1<10>_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<9>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<9>_MC.D2_PT_1/IN4  (
    .I(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<9>_MC.D2_PT_1/IN5  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<9>_MC.D2_PT_2/IN2  (
    .I(\U1/Channel1 [8]),
    .O(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<9>_MC.D2_PT_2/IN3  (
    .I(\U1/Channel1 [7]),
    .O(\NlwInverterSignal_U1/Channel1<9>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<11>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<11>_MC.D2_PT_1/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<11>_MC.D2_PT_2/IN2  (
    .I(\U1/Channel1 [11]),
    .O(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<11>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel1 [9]),
    .O(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<11>_MC.D2_PT_3/IN2  (
    .I(\U1/Channel1 [8]),
    .O(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<11>_MC.D2_PT_3/IN3  (
    .I(\U1/Channel1 [7]),
    .O(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<11>_MC.D2_PT_3/IN6  (
    .I(\U1/Channel1 [10]),
    .O(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<11>_MC.D2_PT_3/IN7  (
    .I(\U1/Channel1 [9]),
    .O(\NlwInverterSignal_U1/Channel1<11>_MC.D2_PT_3/IN7 )
  );
  X_INV \NlwInverterBlock_N_PZ_1154_MC.D1/IN2  (
    .I(\U1/U5/location_Maddsub__n0000__n0103 [0]),
    .O(\NlwInverterSignal_N_PZ_1154_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [12]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_2/IN1  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_2/IN2  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_3/IN1  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_3/IN2  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_3/IN3  (
    .I(N_PZ_1154),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_4/IN5  (
    .I(\U1/Channel1 [12]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_4/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_5/IN1  (
    .I(\U1/Channel1 [8]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_5/IN2  (
    .I(\U1/Channel1 [7]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_5/IN4  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_5/IN5  (
    .I(\U1/Channel1 [11]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_5/IN7  (
    .I(\U1/Channel1 [10]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<12>_MC.D2_PT_5/IN8  (
    .I(\U1/Channel1 [9]),
    .O(\NlwInverterSignal_U1/Channel1<12>_MC.D2_PT_5/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<14>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<14>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<14>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<14>_MC.D2_PT_2/IN4  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<14>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<15>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<15>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<15>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel1 [14]),
    .O(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<15>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<15>_MC.D2_PT_2/IN4  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<15>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_N_PZ_1111_MC.D1/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_N_PZ_1111_MC.D1/IN0 )
  );
  X_INV \NlwInverterBlock_N_PZ_1111_MC.D1/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_N_PZ_1111_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_N_PZ_1111_MC.D1/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_N_PZ_1111_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_N_PZ_1111_MC.D1/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_N_PZ_1111_MC.D1/IN3 )
  );
  X_INV \NlwInverterBlock_N_PZ_1111_MC.D1/IN4  (
    .I(DCOR0CNTHIGHr),
    .O(\NlwInverterSignal_N_PZ_1111_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_N_PZ_1111_MC.D1/IN5  (
    .I(DCOR1CNTHIGHr),
    .O(\NlwInverterSignal_N_PZ_1111_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTHIGHr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTHIGHr_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTHIGHr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTHIGHr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTHIGHr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTHIGHr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCOR1CNTHIGHr_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCOR1CNTHIGHr_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA3.UIM_MC.D2_PT_0/IN0  (
    .I(DCORENCPWRr),
    .O(\NlwInverterSignal_outDATA<1>\$WA3.UIM_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA3.UIM_MC.D2_PT_2/IN1  (
    .I(NET2528),
    .O(\NlwInverterSignal_outDATA<1>\$WA3.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_DCORIFGr_MC.D1/IN1  (
    .I(\RD_II/UIM ),
    .O(\NlwInverterSignal_DCORIFGr_MC.D1/IN1 )
  );
  X_INV \NlwInverterBlock_DCORIFGr_MC.D1/IN2  (
    .I(U2_ADDR_reg[1]),
    .O(\NlwInverterSignal_DCORIFGr_MC.D1/IN2 )
  );
  X_INV \NlwInverterBlock_DCORIFGr_MC.D1/IN4  (
    .I(U2_ADDR_reg[4]),
    .O(\NlwInverterSignal_DCORIFGr_MC.D1/IN4 )
  );
  X_INV \NlwInverterBlock_DCORIFGr_MC.D1/IN5  (
    .I(U2_ADDR_reg[5]),
    .O(\NlwInverterSignal_DCORIFGr_MC.D1/IN5 )
  );
  X_INV \NlwInverterBlock_DCORIFGr_MC.D1/IN6  (
    .I(U2_ADDR_reg[6]),
    .O(\NlwInverterSignal_DCORIFGr_MC.D1/IN6 )
  );
  X_INV \NlwInverterBlock_DCORIFGr_MC.D1/IN7  (
    .I(U2_ADDR_reg[7]),
    .O(\NlwInverterSignal_DCORIFGr_MC.D1/IN7 )
  );
  X_INV \NlwInverterBlock_DCORIFGr_MC.D1/IN8  (
    .I(U2_ADDR_reg[2]),
    .O(\NlwInverterSignal_DCORIFGr_MC.D1/IN8 )
  );
  X_INV \NlwInverterBlock_DCORIFGr_MC.D1/IN9  (
    .I(U2_ADDR_reg[3]),
    .O(\NlwInverterSignal_DCORIFGr_MC.D1/IN9 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA4.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA4.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA4.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR1THRESLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA4.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<1>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<1>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<1>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<1>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<1>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<1>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<9>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<9>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<9>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<9>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<9>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<9>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<1>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<1>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<1>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<1>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<1>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<1>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<9>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<9>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<9>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<9>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<9>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<9>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_4/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN4  (
    .I(DCOR0CNTHIGHr),
    .O(\NlwInverterSignal_outDATA<1>\$WA5.UIM_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<1>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<1>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<1>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<1>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<1>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<1>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<1>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<1>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<9>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<9>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<9>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<9>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<9>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<9>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<9>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<9>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<17>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<17>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<17>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<17>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_1/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_2/IN3  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_2/IN4  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_2/IN6  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_2/IN7  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_2/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_3/IN3  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_3/IN4  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_3/IN6  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_3/IN7  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_3/IN8  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_3/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_4/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_4/IN5  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_4/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<17>_MC.D2_PT_4/IN8  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<17>_MC.D2_PT_4/IN8 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<17>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<17>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<17>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<17>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<17>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<17>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [16]),
    .O(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<17>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<17>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [14]),
    .O(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<17>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel1 [15]),
    .O(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<17>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<17>_MC.D2_PT_2/IN5  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<17>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA3.UIM_MC.D2_PT_1/IN0  (
    .I(NET2528),
    .O(\NlwInverterSignal_outDATA<2>\$WA3.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA4.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA4.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA4.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR1THRESLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA4.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<2>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<2>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<2>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<2>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<2>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<2>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<10>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<10>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<10>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<10>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<10>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<10>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<2>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<2>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<2>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<2>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<2>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<2>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<10>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<10>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<10>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<10>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<10>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<10>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_4/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN4  (
    .I(DCOR0CNTHIGHr),
    .O(\NlwInverterSignal_outDATA<2>\$WA5.UIM_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<2>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<2>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<2>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<2>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<2>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<2>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<2>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<2>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<10>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<10>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<10>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<10>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<10>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<10>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<10>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<10>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<18>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<18>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<18>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<18>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_1/IN2  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_2/IN1  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_2/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_3/IN3  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_3/IN4  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_3/IN6  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_3/IN7  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_3/IN8  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_3/IN9  (
    .I(\U1/Channel0 [18]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_3/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_4/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_4/IN5  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_4/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<18>_MC.D2_PT_4/IN9  (
    .I(\U1/Channel0 [18]),
    .O(\NlwInverterSignal_U1/Channel0<18>_MC.D2_PT_4/IN9 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<18>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<18>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<18>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<18>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<18>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<18>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [16]),
    .O(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<18>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<18>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [14]),
    .O(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<18>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel1 [15]),
    .O(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<18>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel1 [17]),
    .O(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<18>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<18>_MC.D2_PT_2/IN5  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<18>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA3.UIM_MC.D2_PT_1/IN0  (
    .I(NET2528),
    .O(\NlwInverterSignal_outDATA<3>\$WA3.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA4.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA4.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA4.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR1THRESLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA4.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<3>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<3>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<3>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<3>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<3>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<3>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<11>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<11>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<11>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<11>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<11>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<11>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<3>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<3>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<3>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<3>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<3>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<3>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<11>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<11>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<11>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<11>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<11>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<11>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_4/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN4  (
    .I(DCOR0CNTHIGHr),
    .O(\NlwInverterSignal_outDATA<3>\$WA5.UIM_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<3>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<3>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<3>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<3>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<3>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<3>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<3>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<3>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<11>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<11>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<11>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<11>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<11>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<11>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<11>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<11>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<19>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<19>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<19>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<19>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_1/IN2  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_1/IN5  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel0 [18]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_2/IN1  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_2/IN4  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_2/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_3/IN3  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_3/IN4  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_3/IN6  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_3/IN7  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_3/IN8  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_3/IN9  (
    .I(\U1/Channel0 [18]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_3/IN10  (
    .I(\U1/Channel0 [19]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_3/IN10 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_4/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_4/IN5  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_4/IN5 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<19>_MC.D2_PT_4/IN10  (
    .I(\U1/Channel0 [19]),
    .O(\NlwInverterSignal_U1/Channel0<19>_MC.D2_PT_4/IN10 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<19>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<19>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<19>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<19>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<19>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<19>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [16]),
    .O(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<19>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<19>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [14]),
    .O(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<19>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel1 [15]),
    .O(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<19>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel1 [17]),
    .O(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<19>_MC.D2_PT_1/IN9  (
    .I(\U1/Channel1 [18]),
    .O(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<19>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<19>_MC.D2_PT_2/IN5  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<19>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA3.UIM_MC.D2_PT_1/IN0  (
    .I(NET2528),
    .O(\NlwInverterSignal_outDATA<4>\$WA3.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA4.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA4.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA4.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR1THRESLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA4.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<4>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<4>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<4>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<4>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<4>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<4>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<12>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<12>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<12>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<12>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<12>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<12>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<4>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<4>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<4>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<4>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<4>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<4>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<12>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<12>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<12>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<12>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<12>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<12>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_4/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN4  (
    .I(DCOR0CNTHIGHr),
    .O(\NlwInverterSignal_outDATA<4>\$WA5.UIM_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<4>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<4>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<4>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<4>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<4>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<4>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<4>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<4>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<12>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<12>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<12>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<12>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<12>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<12>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<12>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<12>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<20>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<20>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<20>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<20>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_1/IN9  (
    .I(\U1/Channel0 [18]),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_1/IN10  (
    .I(\U1/Channel0 [19]),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_1/IN10 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<20>_MC.D2_PT_2/IN5  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<20>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<20>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<20>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<20>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<20>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [16]),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [14]),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel1 [15]),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel1 [17]),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_1/IN9  (
    .I(\U1/Channel1 [18]),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_1/IN10  (
    .I(\U1/Channel1 [19]),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_1/IN10 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<20>_MC.D2_PT_2/IN5  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<20>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA3.UIM_MC.D2_PT_1/IN0  (
    .I(NET2528),
    .O(\NlwInverterSignal_outDATA<5>\$WA3.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA4.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA4.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA4.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR1THRESLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA4.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<5>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<5>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<5>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<5>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<5>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<5>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<13>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<13>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<13>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<13>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<13>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<13>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<5>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<5>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<5>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<5>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<5>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<5>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<13>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<13>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<13>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<13>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<13>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<13>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_4/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN4  (
    .I(DCOR0CNTHIGHr),
    .O(\NlwInverterSignal_outDATA<5>\$WA5.UIM_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<5>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<5>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<5>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<5>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<5>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<5>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<5>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<5>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<13>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<13>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<13>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<13>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<13>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<13>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<13>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<13>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<21>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<21>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<21>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<21>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_1/IN9  (
    .I(\U1/Channel0 [18]),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_1/IN10  (
    .I(\U1/Channel0 [19]),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN10 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_1/IN11  (
    .I(\U1/Channel0 [20]),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_1/IN11 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<21>_MC.D2_PT_2/IN5  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<21>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<21>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<21>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<21>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<21>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [16]),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [14]),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel1 [15]),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel1 [17]),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_1/IN9  (
    .I(\U1/Channel1 [18]),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_1/IN10  (
    .I(\U1/Channel1 [19]),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN10 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_1/IN11  (
    .I(\U1/Channel1 [20]),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_1/IN11 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<21>_MC.D2_PT_2/IN5  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<21>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA3.UIM_MC.D2_PT_1/IN0  (
    .I(NET2528),
    .O(\NlwInverterSignal_outDATA<6>\$WA3.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA4.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA4.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA4.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR1THRESLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA4.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<6>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<6>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<6>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<6>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<6>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<6>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<14>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<14>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<14>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<14>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<14>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<14>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<6>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<6>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<6>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<6>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<6>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<6>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<14>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<14>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<14>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<14>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<14>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<14>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_4/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN4  (
    .I(DCOR0CNTHIGHr),
    .O(\NlwInverterSignal_outDATA<6>\$WA5.UIM_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<6>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<6>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<6>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<6>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<6>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<6>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<6>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<6>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<14>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<14>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<14>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<14>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<14>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<14>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<14>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<14>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<22>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<22>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<22>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<22>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_1/IN9  (
    .I(\U1/Channel0 [18]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_1/IN10  (
    .I(\U1/Channel0 [19]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN10 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_1/IN11  (
    .I(\U1/Channel0 [20]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN11 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_1/IN12  (
    .I(\U1/Channel0 [21]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_1/IN12 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<22>_MC.D2_PT_2/IN5  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<22>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<22>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<22>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<22>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<22>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [16]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [14]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel1 [15]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel1 [17]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_1/IN9  (
    .I(\U1/Channel1 [18]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_1/IN10  (
    .I(\U1/Channel1 [19]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN10 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_1/IN11  (
    .I(\U1/Channel1 [20]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN11 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_1/IN12  (
    .I(\U1/Channel1 [21]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_1/IN12 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<22>_MC.D2_PT_2/IN5  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<22>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA3.UIM_MC.D2_PT_1/IN0  (
    .I(NET2528),
    .O(\NlwInverterSignal_outDATA<7>\$WA3.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA4.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA4.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA4.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0THRESLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR0THRESMIDr),
    .O(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR1THRESLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA4.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<7>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<7>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<7>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<7>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<7>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<7>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<15>_MC.D2_PT_0/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<15>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<15>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch0r<15>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch0r<15>_MC.D2_PT_1/IN1  (
    .I(N_PZ_1113),
    .O(\NlwInverterSignal_U1/U4/Latch0r<15>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<7>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<7>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<7>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<7>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<7>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<7>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<15>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U4/Latch1r<15>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<15>_MC.D2_PT_1/IN1  (
    .I(DCORIFGw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<15>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U4/Latch1r<15>_MC.D2_PT_1/IN2  (
    .I(DCORENCCTLw),
    .O(\NlwInverterSignal_U1/U4/Latch1r<15>_MC.D2_PT_1/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_1/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_2/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_2/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_2/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_2/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_3/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_4/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN0  (
    .I(DCOR0CNTLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN0 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN1  (
    .I(DCOR1CNTLOWr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN1 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN2  (
    .I(DCOR0CNTMIDr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN2 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN3  (
    .I(DCOR1CNTMIDr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN3 )
  );
  X_INV \NlwInverterBlock_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN4  (
    .I(DCOR0CNTHIGHr),
    .O(\NlwInverterSignal_outDATA<7>\$WA5.UIM_MC.D2_PT_5/IN4 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<7>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<7>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<7>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<7>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<7>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<7>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<7>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<7>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<15>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<15>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<15>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<15>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<15>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<15>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<15>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<15>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<23>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<23>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg0<23>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg0<23>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1074),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel0 [16]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel0 [13]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel0 [14]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel0 [15]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel0 [17]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN9  (
    .I(\U1/Channel0 [18]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN10  (
    .I(\U1/Channel0 [19]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN10 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN11  (
    .I(\U1/Channel0 [20]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN11 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN12  (
    .I(\U1/Channel0 [21]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN12 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_1/IN13  (
    .I(\U1/Channel0 [22]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_1/IN13 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1090),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel0<23>_MC.D2_PT_2/IN5  (
    .I(\U1/U2/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel0<23>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<23>_MC.D2_PT_1/IN0  (
    .I(\Reset_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<23>_MC.D2_PT_1/IN0 )
  );
  X_INV \NlwInverterBlock_U1/U3/holdingreg1<23>_MC.D2_PT_1/IN1  (
    .I(\AS_II/UIM ),
    .O(\NlwInverterSignal_U1/U3/holdingreg1<23>_MC.D2_PT_1/IN1 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_0/IN0  (
    .I(N_PZ_1073),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_0/IN0 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN3  (
    .I(\U1/Channel1 [16]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN3 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN4  (
    .I(\U1/Channel1 [13]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN4 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN6  (
    .I(\U1/Channel1 [14]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN6 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN7  (
    .I(\U1/Channel1 [15]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN7 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN8  (
    .I(\U1/Channel1 [17]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN8 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN9  (
    .I(\U1/Channel1 [18]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN9 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN10  (
    .I(\U1/Channel1 [19]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN10 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN11  (
    .I(\U1/Channel1 [20]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN11 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN12  (
    .I(\U1/Channel1 [21]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN12 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_1/IN13  (
    .I(\U1/Channel1 [22]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_1/IN13 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_2/IN2  (
    .I(N_PZ_1104),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_2/IN2 )
  );
  X_INV \NlwInverterBlock_U1/Channel1<23>_MC.D2_PT_2/IN5  (
    .I(\U1/U5/location_Maddsub__n0000__n0115 [0]),
    .O(\NlwInverterSignal_U1/Channel1<23>_MC.D2_PT_2/IN5 )
  );
  X_INV \NlwInverterBlock_FOOBAR4__ctinst/0/IN0  (
    .I(U11_U3_counterr[3]),
    .O(\NlwInverterSignal_FOOBAR4__ctinst/0/IN0 )
  );
  X_INV \NlwInverterBlock_FOOBAR4__ctinst/0/IN1  (
    .I(U11_U3_counterr[0]),
    .O(\NlwInverterSignal_FOOBAR4__ctinst/0/IN1 )
  );
  X_INV \NlwInverterBlock_FOOBAR4__ctinst/0/IN2  (
    .I(U11_U3_counterr[4]),
    .O(\NlwInverterSignal_FOOBAR4__ctinst/0/IN2 )
  );
  X_INV \NlwInverterBlock_FOOBAR4__ctinst/0/IN3  (
    .I(U11_U3_counterr[1]),
    .O(\NlwInverterSignal_FOOBAR4__ctinst/0/IN3 )
  );
  X_INV \NlwInverterBlock_FOOBAR4__ctinst/0/IN4  (
    .I(U11_U3_counterr[2]),
    .O(\NlwInverterSignal_FOOBAR4__ctinst/0/IN4 )
  );
  X_INV \NlwInverterBlock_FOOBAR4__ctinst/0/IN5  (
    .I(U11_U3_counterr[5]),
    .O(\NlwInverterSignal_FOOBAR4__ctinst/0/IN5 )
  );
  X_INV \NlwInverterBlock_FOOBAR11__ctinst/4/IN0  (
    .I(N15302),
    .O(\NlwInverterSignal_FOOBAR11__ctinst/4/IN0 )
  );
  X_INV \NlwInverterBlock_FOOBAR21__ctinst/4/IN0  (
    .I(NET2528),
    .O(\NlwInverterSignal_FOOBAR21__ctinst/4/IN0 )
  );
  X_INV \NlwInverterBlock_FOOBAR21__ctinst/4/IN1  (
    .I(\U4/orFLGs ),
    .O(\NlwInverterSignal_FOOBAR21__ctinst/4/IN1 )
  );
  X_INV \NlwInverterBlock_FOOBAR24__ctinst/4/IN0  (
    .I(NET2528),
    .O(\NlwInverterSignal_FOOBAR24__ctinst/4/IN0 )
  );
  X_INV \NlwInverterBlock_FOOBAR24__ctinst/4/IN1  (
    .I(\U4/orFLGs ),
    .O(\NlwInverterSignal_FOOBAR24__ctinst/4/IN1 )
  );
endmodule

