This file was created to keep notes on this design
created: 17-Mar-04 SJensen

30-June-04 SJensen
    Made a number of wiring changes and added a couple of parts.
    
    Need to add bypass capacitors!

29-June-04 JRosal
	Entered footprints for all components.  Made fuseclips into a single component.        
18-June-04 SJensen
   Enetered all part numbers to begin layout
   
14-June-04 SJensen
  Removed from the system power supply seperate feedback of status.  Add a gat such that when the status line is pulled
  low both 3.3 and 5 are shutdown.  Because of this you will not get seperate status indication.
  
  Added three connectors for power ouput to system and I2C bus. 
11-June-04 SJensen
  I am going to remove the temperature sensors on the control switches to remove and save output pins on the processor.
  
    Moving to rev 002 to make this change
    
17-Mar-04 SJensen    

  Check out the modem interface and make sure it is right.
  
  Need pull down on PE
  
  Set up SCL and serial stuff to be pin compatibale with Rev1 Core as follows:
  
   P2.0 SCLreset
   P2.1 SCLinc
   P2.2 HandShake in
   P2.3 tied to Pin 3.7 RXin
   P2.5 Dosc resistor to +3.3
   P2.7 interrupt
   
   P3.6 TX out
   P3.7 RX in
   
   P5.7 Handshake out   
   
  Set up CPLD interface compatible with core
  
  	P1 		Address/Data 7-0
  	P3.0    AS
  	P3.2	WR
  	P3.4	RD
  	
   
  Set up part programming plug compatible with Core
  
  
  Setup Serial interface to be compatible with Core
  
  Pin 	1 = 3.3V
  		2 = TX out
  		3 = RX in
  		4 = Gnd
  		5 = Handshake in
  		6 = Handshake out