(ExpressProject "Limit Switch Adapter"
  (ProjectVersion "19981106")
  (ProjectType "PCB")
  (Folder "Design Resources"
    (Folder "Library"
      (File
         "x:\esp\2g\project.drawings\project.ee.dwgs\system\library\esp_parts.olb"
        (Type "Schematic Library"))
      (File "C:\Projects\Orcad\Library\KEYSTONE.OLB"
        (Type "Schematic Library")))
    (NoModify)
    (File ".\limit switch adapter.dsn"
      (Type "Schematic Design"))
    (BuildFileAddedOrDeleted "x")
    (CompileFileAddedOrDeleted "x")
    (Board_sim_option "VHDL_flow")
    (Netlist_TAB "0"))
  (Folder "Outputs"
    (File ".\allegro\pstxnet.dat"
      (Type "Report")
      (DisplayName "pstxnet.dat"))
    (File ".\allegro\pstxprt.dat"
      (Type "Report")
      (DisplayName "pstxprt.dat"))
    (File ".\allegro\pstchip.dat"
      (Type "Report")
      (DisplayName "pstchip.dat")))
  (Folder "Referenced Projects")
  (PartMRUSelector
    (R
      (FullPartName "R.Normal")
      (LibraryName
         "C:\ORCAD\ORCAD_16.0\TOOLS\CAPTURE\LIBRARY\OLDLIBS\DEVICE.OLB")
      (DeviceIndex "0"))
    (3547
      (FullPartName "3547.Normal")
      (LibraryName "C:\PROJECTS\ORCAD\LIBRARY\KEYSTONE.OLB")
      (DeviceIndex "0")))
  (GlobalState
    (FileView
      (Path "Design Resources")
      (Path "Design Resources" "Library")
      (Path "Outputs")
      (Select "Design Resources"))
    (HierarchyView)
    (Doc
      (Type "COrCapturePMDoc")
      (Frame
        (Placement "44 0 1 -1 -1 -4 -23 393 1033 72 772"))
      (Tab 0))
    (Doc
      (Type "COrSchematicDoc")
      (Frame
        (Placement "44 0 1 -1 -1 -4 -30 152 1608 233 824")
        (Scroll "0 428")
        (Zoom "144")
        (Occurrence "/"))
      (Path
         "X:\ESP\DWSM\4K DWSM\SCHEMATIC\LIMIT SWITCH ADAPTER\LIMIT SWITCH ADAPTER.DSN")
      (Schematic "SCHEMATIC1")
      (Page "PAGE1")))
  (ISPCBBASICLICENSE "false")
  (MPSSessionName "sjensen"))