.ALIASES R_R1 R1(1=VS 2=N14962 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS14923@ANALOG.R.Normal(chips) R_R2 R2(1=P 2=VS ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS14939@ANALOG.R.Normal(chips) V_V2 V2(+=N15110 -=0 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS15092@SOURCE.VDC.Normal(chips) C_C1 C1(1=0 2=O ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS17175@ANALOG.C.Normal(chips) R_R4 R4(1=N17520 2=O ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS17491@ANALOG.R.Normal(chips) R_R7 R7(1=G 2=N26219 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS18785@ANALOG.R.Normal(chips) X_S1 S1(1=N20647 2=0 3=O 4=0 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS20405@ANALOG.S.Normal(chips) R_R8 R8(1=0 2=N20647 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS20507@ANALOG.R.Normal(chips) V_V3 V3(+=N20647 -=0 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS20550@SOURCE.VPULSE.Normal(chips) X_U1 U1(1=P 2=N 99=VS 50=-10V 45=G ) CN +@33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS20821@CURRENTLIMITEDSLOWSTART.OP196_1.Normal(chips) R_R9 R9(1=N15110 2=VS ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS21060@ANALOG.R.Normal(chips) X_X1 X1(1=N17520 2=N26219 3=N14962 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS21392@IRF.irf4905.Normal(chips) V_V4 V4(+=N21761 -=0 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS21683@SOURCE.VDC.Normal(chips) R_R10 R10(1=0 2=AF ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS21838@ANALOG.R.Normal(chips) V_V5 V5(+=N22473 -=0 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS22033@SOURCE.VPULSE.Normal(chips) Q_Q1 Q1(c=P b=AO e=AF ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS22986@BIPOLAR.Q2N2222.Normal(chips) R_R11 R11(1=0 2=IS ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS23801@ANALOG.R.Normal(chips) X_U3 U3(1=VS 2=N14962 3=N21761 4=0 5=IS ) CN +@33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS24222@TI.INA138.Normal(chips) R_R16 R16(1=N28110 2=VS ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS27960@ANALOG.R.Normal(chips) R_R17 R17(1=N28114 2=N28110 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS27998@ANALOG.R.Normal(chips) R_R18 R18(1=-10V 2=N28114 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS28036@ANALOG.R.Normal(chips) X_U4 U4(1=N28110 2=G 3=C1 4=VS 5=-10V ) CN +@33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS28889@TI.LMC7211A.Normal(chips) X_U5 U5(1=N28114 2=G 3=C2 4=VS 5=-10V ) CN +@33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS28968@TI.LMC7211A.Normal(chips) R_R19 R19(1=VT 2=N31614 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS29065@ANALOG.R.Normal(chips) V_V6 V6(+=N38092 -=N ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS29904@SOURCE.VDC.Normal(chips) Q_Q2 Q2(c=N31614 b=N32437 e=C1 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS30215@BIPOLAR.Q2N3906.Normal(chips) R_R20 R20(1=N32445 2=C2 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS30277@ANALOG.R.Normal(chips) D_D1 D1(1=N32437 2=N32445 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS32419@DIODE.D1N4004.Normal(chips) X_U6 U6(1=N22473 2=AF 99=N21761 50=0 45=AO ) CN +@33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS33489@ANALOGDEVICES.AD8603.Normal(chips) R_R21 R21(1=R 2=N21761 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS34016@ANALOG.R.Normal(chips) R_R22 R22(1=0 2=R ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS34054@ANALOG.R.Normal(chips) R_R23 R23(1=T 2=OC ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS34092@ANALOG.R.Normal(chips) C_C2 C2(1=0 2=T ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS34124@ANALOG.C.Normal(chips) R_R25 R25(1=T 2=0 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS34493@ANALOG.R.Normal(chips) X_U7 U7(1=T 2=R 3=TRIP 4=N21761 5=0 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS34656@TI.LMC7211A.Normal(chips) R_R26 R26(1=0 2=TRIP ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS34803@ANALOG.R.Normal(chips) X_U8 U8(51=VR 52=N35612 99=N36740 50=N36634 32=N38768 ) CN +@33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS35361@ANALOGDEVICES.OP193.Normal(chips) R_R28 R28(1=-10V 2=N35612 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS35437@ANALOG.R.Normal(chips) I_I1 I1(+=VR -=N36634 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS35472@SOURCE.ISRC.Normal(chips) R_R29 R29(1=VR 2=N36740 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS35512@ANALOG.R.Normal(chips) R_R27 R27(1=0 2=N36634 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS37024@ANALOG.R.Normal(chips) R_R30 R30(1=N35612 2=N36740 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS37154@ANALOG.R.Normal(chips) R_R31 R31(1=N36740 2=VS ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS37283@ANALOG.R.Normal(chips) X_X2 X2(1=OC 2=VT 3=VT ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS37755@IRF.irf4905.Normal(chips) R_R32 R32(1=N38092 2=N14962 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS38066@ANALOG.R.Normal(chips) R_R33 R33(1=N14962 2=N38260 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS38238@ANALOG.R.Normal(chips) D_D2 D2(1=G 2=N38260 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS38414@DIODE.D1N753.Normal(chips) C_C3 C3(1=-10V 2=VS ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS38493@ANALOG.C.Normal(chips) R_R34 R34(1=N38768 2=-10V ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS38746@ANALOG.R.Normal(chips) C_C4 C4(1=N38768 2=N35612 ) CN @33CURRENTLIMITEDSLOWSTART.SCHEMATIC1(sch_1):INS39016@ANALOG.C.Normal(chips) _ _(-10V=-10V) _ _(v10=-10V) _ _(GND_0=0) _ _(af=AF) _ _(ao=AO) _ _(c1=C1) _ _(c2=C2) _ _(g=G) _ _(is=IS) _ _(n=N) _ _(o=O) _ _(oc=OC) _ _(p=P) _ _(r=R) _ _(t=T) _ _(trip=TRIP) _ _(vr=VR) _ _(Vs=VS) _ _(s=VS) _ _(vt=VT) .ENDALIASES