.ALIASES
X_U1            U1(51=I 52=F 99=N14599 50=0 32=O ) CN @VREF.SCHEMATIC1(sch_1):INS14309@ANALOGDEVICES.OP193.Normal(chips)
V_V1            V1(+=N14599 -=0 ) CN @VREF.SCHEMATIC1(sch_1):INS14381@SOURCE.VSRC.Normal(chips)
R_R1            R1(1=O 2=R ) CN @VREF.SCHEMATIC1(sch_1):INS14414@ANALOG.R.Normal(chips)
R_R2            R2(1=R 2=N14567 ) CN @VREF.SCHEMATIC1(sch_1):INS14430@ANALOG.R.Normal(chips)
R_R3            R3(1=N14567 2=N14599 ) CN @VREF.SCHEMATIC1(sch_1):INS14446@ANALOG.R.Normal(chips)
R_R4            R4(1=I 2=N14599 ) CN @VREF.SCHEMATIC1(sch_1):INS14462@ANALOG.R.Normal(chips)
C_C2            C2(1=0 2=R ) CN @VREF.SCHEMATIC1(sch_1):INS14503@ANALOG.C.Normal(chips)
C_C3            C3(1=O 2=F ) CN @VREF.SCHEMATIC1(sch_1):INS14519@ANALOG.C.Normal(chips)
V_V2            V2(+=N15398 -=0 ) CN @VREF.SCHEMATIC1(sch_1):INS15330@SOURCE.VSRC.Normal(chips)
R_R5            R5(1=N15398 2=F ) CN @VREF.SCHEMATIC1(sch_1):INS15382@ANALOG.R.Normal(chips)
I_I1            I1(+=I -=0 ) CN @VREF.SCHEMATIC1(sch_1):INS15842@SOURCE.IPULSE.Normal(chips)
_    _(GND_0=0)
_    _(f=F)
_    _(i=I)
_    _(o=O)
_    _(r=R)
.ENDALIASES
