//-----------------------------------------------------------------------------
//
// Title       : Dwarf Core CPLD U21
// Design      : Core
// Author      : mbari###
// Company     : MBARI
//
//-----------------------------------------------------------------------------
//
// File        : c:\dwarf_fpgas\core\compile\u21.v
// Generated   : Fri Apr 17 18:43:36 2009
// From        : c:\dwarf_fpgas\core\src\u21.bde
// By          : Bde2Verilog ver. 2.01
//
//-----------------------------------------------------------------------------
//
// Description : 
//
//-----------------------------------------------------------------------------

`ifdef _VCP
`else
`define library(a,b)
`endif


// ---------- Design Unit Header ---------- //
`timescale 1ns / 1ns
//synthesis attribute KEEP of DCORIEw is TRUE;
//synthesis attribute KEEP of DCORIFGw is TRUE;
//synthesis attribute KEEP of DCORIFGr is TRUE;
//synthesis attribute KEEP of DCORLIMITSr is TRUE;
//synthesis attribute KEEP of DCORENCCTLw is TRUE;
//synthesis attribute KEEP of DCOR1CNTLOWr is TRUE;
//s-ynthesis attribute KEEP of DCOR1CNTMIDr is TRUE;
//synthesis attribute KEEP of DCOR1THRESLOWr is TRUE;
//synthesis attribute KEEP of DCOR1THRESHIGHr is TRUE;
//synthesis attribute KEEP of DCOR0CNTLOWr is TRUE;
//s-ynthesis attribute KEEP of DCOR0CNTMIDr is TRUE;
//synthesis attribute KEEP of DCOR0CNTHIGHr is TRUE;
//synthesis attribute KEEP of DCOR1CNTHIGHr is TRUE;
//synthesis attribute KEEP of DCOR0THRESLOWr is TRUE;
//synthesis attribute KEEP of DCOR0THRESHIGHr is TRUE
//synthesis attribute KEEP of DCORENCPWRr is TRUE;
//synthesis attribute KEEP of DCORENCPWRw is TRUE;
//synthesis attribute KEEP of DCORCONFIGr is TRUE;
//synthesis attribute KEEP of DCOROUTw is TRUE;
//synthesis attribute KEEP of DCORI2CCNTr is TRUE;
//synthesis attribute KEEP of DCORSENSORw is TRUE;
//synthesis attribute KEEP of DCORLINTr is TRUE;

module U21 (AS,Brake0,Brake1,DIR0,DIR1,Enc05FLG,Enc15FLG,FLS0,FLS1,GP_Motor0_0,
GP_Motor1_0,Home0,Home05FLG,Home1,Home15FLG,INTbus,Latch033FLG,Latch133FLG,LightSense,MReset,
MSPReset,Mclk,PWM1,PWM2,PWM3,PWM4,PWM5,PhaseA_Encoder0,PhaseA_Encoder1,PhaseB_Encoder0,
PhaseB_Encoder1,RD,RLS0,RLS1,SCLinc,SCLreset,WR,I2CS,DIR0_out,DIR1_out,
Enc05ctrl,Enc15ctrl,GPIO10,GPIO8,GPIO9,GP_Motor0_1,GP_Motor1_1,Home05ctrl,Home15ctrl,INT,
LED1,LED2,LED3,LED4,LED5,Latch033ctrl,Latch133ctrl,MTRpwr,MTRpwrn,PAH0,
PAH1,PAL0,PAL1,PBH0,PBH1,PBL0,PBL1,PWM0_out,PWM1_out,PresEn,
PresSlct,TP12,TP21,TP26,TmpEn,TmpSlct,SCL,AD) ;

// ------------ Port declarations --------- //
input AS;
wire AS;
input Brake0;
wire Brake0;
input Brake1;
wire Brake1;
input DIR0;
wire DIR0;
input DIR1;
wire DIR1;
input Enc05FLG;
wire Enc05FLG;
input Enc15FLG;
wire Enc15FLG;
input FLS0;
wire FLS0;
input FLS1;
wire FLS1;
input GP_Motor0_0;
wire GP_Motor0_0;
input GP_Motor1_0;
wire GP_Motor1_0;
input Home0;
wire Home0;
input Home05FLG;
wire Home05FLG;
input Home1;
wire Home1;
input Home15FLG;
wire Home15FLG;
input INTbus;
wire INTbus;
input Latch033FLG;
wire Latch033FLG;
input Latch133FLG;
wire Latch133FLG;
input LightSense;
wire LightSense;
input MReset;
wire MReset;
input MSPReset;
wire MSPReset;
input Mclk;
wire Mclk;
input PWM1;
wire PWM1;
input PWM2;
wire PWM2;
input PWM3;
wire PWM3;
input PWM4;
wire PWM4;
input PWM5;
wire PWM5;
input PhaseA_Encoder0;
wire PhaseA_Encoder0;
input PhaseA_Encoder1;
wire PhaseA_Encoder1;
input PhaseB_Encoder0;
wire PhaseB_Encoder0;
input PhaseB_Encoder1;
wire PhaseB_Encoder1;
input RD;
wire RD;
input RLS0;
wire RLS0;
input RLS1;
wire RLS1;
input SCLinc;
wire SCLinc;
input SCLreset;
wire SCLreset;
input WR;
wire WR;
input [5:0] I2CS;
wire [5:0] I2CS;
output DIR0_out;
wire DIR0_out;
output DIR1_out;
wire DIR1_out;
output Enc05ctrl;
wire Enc05ctrl;
output Enc15ctrl;
wire Enc15ctrl;
output GPIO10;
wire GPIO10;
output GPIO8;
wire GPIO8;
output GPIO9;
wire GPIO9;
output GP_Motor0_1;
wire GP_Motor0_1;
output GP_Motor1_1;
wire GP_Motor1_1;
output Home05ctrl;
wire Home05ctrl;
output Home15ctrl;
wire Home15ctrl;
output INT;
wire INT;
output LED1;
wire LED1;
output LED2;
wire LED2;
output LED3;
wire LED3;
output LED4;
wire LED4;
output LED5;
wire LED5;
output Latch033ctrl;
wire Latch033ctrl;
output Latch133ctrl;
wire Latch133ctrl;
output MTRpwr;
wire MTRpwr;
output MTRpwrn;
wire MTRpwrn;
output PAH0;
wire PAH0;
output PAH1;
wire PAH1;
output PAL0;
wire PAL0;
output PAL1;
wire PAL1;
output PBH0;
wire PBH0;
output PBH1;
wire PBH1;
output PBL0;
wire PBL0;
output PBL1;
wire PBL1;
output PWM0_out;
wire PWM0_out;
output PWM1_out;
wire PWM1_out;
output PresEn;
wire PresEn;
output PresSlct;
wire PresSlct;
output TP12;
wire TP12;
output TP21;
wire TP21;
output TP26;
wire TP26;
output TmpEn;
wire TmpEn;
output TmpSlct;
wire TmpSlct;
inout SCL;
wire SCL;
inout [7:0] AD;
wire [7:0] AD;

// ----------------- Constants ------------ //
parameter DANGLING_INPUT_CONSTANT = 1'bZ;

// ----------- Signal declarations -------- //
wire DCOR0CNTHIGHr;
wire DCOR0CNTLOWr;
wire DCOR0THRESHIGHr;
wire DCOR0THRESLOWr;
wire DCOR1CNTHIGHr;
wire DCOR1CNTLOWr;
wire DCOR1THRESHIGHr;
wire DCOR1THRESLOWr;
wire DCORCONFIGr;
wire DCORENCCTLw;
wire DCORENCPWRr;
wire DCORENCPWRw;
wire DCORI2CCNTr;
wire DCORIEw;
wire DCORIFGr;
wire DCORIFGw;
wire DCORLIMITSr;
wire DCORLINTr;
wire DCOROUTw;
wire DCORSENSORw;
wire fBRK0;
wire fBRK1;
wire NET10037;
wire NET10533;
wire NET10542;
wire NET2482;
wire NET2493;
wire NET2512;
wire NET2528;
wire NET2575;
wire NET4826;
wire Reset;
wire Tfound0;
wire [7:0] BUS1564;
wire [7:0] inDATA;
wire [7:0] outDATA;

// ---- Declaration for Dangling inputs ----//
wire Dangling_Input_Signal = DANGLING_INPUT_CONSTANT;

// -------- Component instantiations -------//

// synopsys translate_off
`library("U1","Core")
// synopsys translate_on
Servos U1
(
	.ASleading(NET4826),
	.DCOR0CNTHIGHr(DCOR0CNTHIGHr),
	.DCOR0CNTLOWr(DCOR0CNTLOWr),
	.DCOR0THRESHIGHr(DCOR0THRESHIGHr),
	.DCOR0THRESLOWr(DCOR0THRESLOWr),
	.DCOR1CNTHIGHr(DCOR1CNTHIGHr),
	.DCOR1CNTLOWr(DCOR1CNTLOWr),
	.DCOR1THRESHIGHr(DCOR1THRESHIGHr),
	.DCOR1THRESLOWr(DCOR1THRESLOWr),
	.DCORENCCTLw(DCORENCCTLw),
	.DCORIFGr(DCORIFGr),
	.DCORIFGw(DCORIFGw),
	.Hfound0(NET2482),
	.Hfound1(NET2493),
	.Home_Encoder0(Home0),
	.Home_Encoder1(Home1),
	.Mclk(Mclk),
	.MotorIn0(GP_Motor0_0),
	.Motorin1(GP_Motor1_0),
	.PhaseA_Encoder0(PhaseA_Encoder0),
	.PhaseA_Encoder1(PhaseA_Encoder1),
	.PhaseB_Encoder0(PhaseB_Encoder0),
	.PhaseB_Encoder1(PhaseB_Encoder1),
	.Reset(Reset),
	.TP(),
	.Tfound0(Tfound0),
	.Tfound1(NET2512),
	.inDATA(inDATA),
	.outDATA(outDATA)
);



assign Reset = ~(MSPReset);


// synopsys translate_off
`library("U11","Core")
// synopsys translate_on
I2Cfix U11
(
	.DCORI2CCNTr(DCORI2CCNTr),
	.Inc(SCLinc),
	.Mclk(Mclk),
	.SCL(SCL),
	.SCLenable(),
	.SCLint(TP12),
	.SCLreset(SCLreset),
	.outDATA(outDATA)
);



// synopsys translate_off
`library("U12","Core")
// synopsys translate_on
U21AddDecode U12
(
	.ADDR(BUS1564),
	.AS(AS),
	.DCOR0CNTHIGHr(DCOR0CNTHIGHr),
	.DCOR0CNTLOWr(DCOR0CNTLOWr),
	.DCOR0THRESHIGHr(DCOR0THRESHIGHr),
	.DCOR0THRESLOWr(DCOR0THRESLOWr),
	.DCOR1CNTHIGHr(DCOR1CNTHIGHr),
	.DCOR1CNTLOWr(DCOR1CNTLOWr),
	.DCOR1THRESHIGHr(DCOR1THRESHIGHr),
	.DCOR1THRESLOWr(DCOR1THRESLOWr),
	.DCORCONFIGr(DCORCONFIGr),
	.DCORENCCTLw(DCORENCCTLw),
	.DCORENCPWRr(DCORENCPWRr),
	.DCORENCPWRw(DCORENCPWRw),
	.DCORI2CCNTr(DCORI2CCNTr),
	.DCORIEw(DCORIEw),
	.DCORIFGr(DCORIFGr),
	.DCORIFGw(DCORIFGw),
	.DCORLIMITSr(DCORLIMITSr),
	.DCORLINTr(DCORLINTr),
	.DCOROUTw(DCOROUTw),
	.DCORSENSORw(DCORSENSORw),
	.RD(RD),
	.WR(WR)
);



assign GPIO9 = ~(TmpEn) & PWM3;


assign GPIO10 = ~(TmpEn) & PWM4;


// synopsys translate_off
`library("U2","Core")
// synopsys translate_on
Interface U2
(
	.AD(AD),
	.ADDR(BUS1564),
	.AS(AS),
	.ASleading(NET4826),
	.Mclk(Mclk),
	.RD(RD),
	.Reset(Reset),
	.WR(WR),
	.inDATA(inDATA),
	.outDATA(outDATA)
);



// synopsys translate_off
`library("U3","Core")
// synopsys translate_on
Interrupt U3
(
	.BusInt(INTbus),
	.DCORIEw(DCORIEw),
	.DCORIFGr(DCORIFGr),
	.Homed0(NET2482),
	.Homed1(NET2493),
	.I2Cint(TP12),
	.INT(INT),
	.LSwitchInt(NET2575),
	.Mclk(Mclk),
	.PWRint(NET2528),
	.Reset(Reset),
	.TP(TP21),
	.Thres0(Tfound0),
	.Thres1(NET2512),
	.inDATA(inDATA),
	.outDATA(outDATA)
);



// synopsys translate_off
`library("U4","Core")
// synopsys translate_on
PWRreg U4
(
	.DCORENCPWRr(DCORENCPWRr),
	.DCORENCPWRw(DCORENCPWRw),
	.DCORIFGr(DCORIFGr),
	.DCORIFGw(DCORIFGw),
	.Enc033ctl(),
	.Enc033flg(Dangling_Input_Signal),
	.Enc05ctl(Enc05ctrl),
	.Enc05flg(Enc05FLG),
	.Enc133ctl(),
	.Enc133flg(Dangling_Input_Signal),
	.Enc15ctl(Enc15ctrl),
	.Enc15flg(Enc15FLG),
	.Hme033ctl(Latch033ctrl),
	.Hme033flg(Latch033FLG),
	.Hme05ctl(Home05ctrl),
	.Hme05flg(Home05FLG),
	.Hme133ctl(Latch133ctrl),
	.Hme133flg(Latch133FLG),
	.Hme15ctl(Home15ctrl),
	.Hme15flg(Home15FLG),
	.Mclk(Mclk),
	.PWRint(NET2528),
	.Reset(Reset),
	.inDATA(inDATA),
	.outDATA(outDATA)
);



// synopsys translate_off
`library("U5","Core")
// synopsys translate_on
Lswitch U5
(
	.Brake0(Brake0),
	.Brake1(Brake1),
	.DCORIFGw(DCORIFGw),
	.DCORLIMITSr(DCORLIMITSr),
	.DCORLINTr(DCORLINTr),
	.DIR0(NET10542),
	.DIR1(NET10533),
	.FLS0(FLS0),
	.FLS1(FLS1),
	.Home0(Home0),
	.Home1(Home1),
	.LIFG(inDATA[4]),
	.LSwitchInt(NET2575),
	.Mclk(Mclk),
	.RLS0(RLS0),
	.RLS1(RLS1),
	.Reset(Reset),
	.fBRK0(fBRK0),
	.fBRK1(fBRK1),
	.outDATA(outDATA)
);



// synopsys translate_off
`library("U6","Core")
// synopsys translate_on
I2CAddress U6
(
	.DCORCONFIGr(DCORCONFIGr),
	.I2CS(I2CS),
	.MotorIn0(GP_Motor0_0),
	.MotorIn1(GP_Motor1_0),
	.outDATA(outDATA)
);



// synopsys translate_off
`library("U7","Core")
// synopsys translate_on
PWMcontrol U7
(
	.Brake1(Brake0),
	.Brake2(Brake1),
	.DIR1(NET10542),
	.DIR2(NET10533),
	.FLS0(FLS0),
	.FLS1(FLS1),
	.HBRK1(fBRK0),
	.HBRK2(fBRK1),
	.MTRpwr(MTRpwr),
	.PAH1(PAH0),
	.PAH2(PAH1),
	.PAL1(PAL0),
	.PAL2(PAL1),
	.PBH1(PBH0),
	.PBH2(PBH1),
	.PBL1(PBL0),
	.PBL2(PBL1),
	.PWM0_out(PWM0_out),
	.PWM1(PWM1),
	.PWM1_out(PWM1_out),
	.PWM2(PWM2),
	.RLS0(RLS0),
	.RLS1(RLS1),
	.fBRK1(fBRK0),
	.fBRK2(fBRK1)
);



// synopsys translate_off
`library("U8","Core")
// synopsys translate_on
Sensor U8
(
	.DCORSENSORw(DCORSENSORw),
	.MReset(MReset),
	.Mclk(Mclk),
	.PresEn(PresEn),
	.PresSlct(PresSlct),
	.Reset(Reset),
	.TmpEn(TmpEn),
	.TmpSlct(TmpSlct),
	.inDATA(inDATA[3:0])
);



// synopsys translate_off
`library("U9","Core")
// synopsys translate_on
MISCouts U9
(
	.DCOROUTw(DCOROUTw),
	.GP_Motor0_1(GP_Motor0_1),
	.GP_Motor1_1(GP_Motor1_1),
	.LED1(LED1),
	.LED2(LED2),
	.LED3(LED3),
	.LED4(LED4),
	.LED5(LED5),
	.LightSense(LightSense),
	.MReset(MReset),
	.MTRpwr(MTRpwr),
	.MTRpwrn(MTRpwrn),
	.Mclk(Mclk),
	.Reset(Reset),
	.inDATA(inDATA)
);



// ----------- Terminals assignment --------//
//	       ---- Input terminals ---         //
assign NET10037 = PWM5;
assign NET10533 = DIR1;
assign NET10542 = DIR0;

//		   ---- Output terminals ---        //
assign DIR0_out = NET10542;
assign DIR1_out = NET10533;
assign GPIO8 = NET10037;
assign TP26 = Tfound0;

endmodule