U21.rptC:/Xilinx/10.1/ISE/xpla3/data/xcr3384xl.chpU21.mfd

INFO:Cpld - Inferring BUFG constraint for signal 'Mclk' based upon the LOC constraint 'P127'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.Cpld:987 - An internal tristate buffer 'outDATA<0>\$WA4' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<5>\$WA3' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<4>\$WA3' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<3>\$WA3' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<2>\$WA3' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<1>\$WA3' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<0>\$WA3' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<7>\$WA3' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<6>\$WA3' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<6>\$WA2' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<2>\$WA2' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<0>\$WA5' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<2>\$WA5' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<3>\$WA5' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<4>\$WA5' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<5>\$WA5' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<6>\$WA5' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<7>\$WA5' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<0>\$WA1' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<1>\$WA1' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<2>\$WA1' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<3>\$WA1' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<4>\$WA1' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<5>\$WA1' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<6>\$WA1' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<7>\$WA1' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<4>\$WA4' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<7>\$WA4' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<3>\$WA2' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<7>\$WA2' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<0>\$WA6' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<1>\$WA6' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<2>\$WA6' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<3>\$WA6' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<4>\$WA6' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<5>\$WA6' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<6>\$WA6' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<7>\$WA6' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<2>\$WA0' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<3>\$WA0' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<5>\$WA0' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<6>\$WA0' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<0>\$WA0' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<1>\$WA0' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<4>\$WA0' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<7>\$WA0' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<1>\$WA5' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<0>\$WA2' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<1>\$WA2' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<4>\$WA2' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<5>\$WA2' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<3>\$WA4' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<2>\$WA4' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<1>\$WA4' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<6>\$WA4' is detected. The logic is being translated to a mux implementation.Cpld:987 - An internal tristate buffer 'outDATA<5>\$WA4' is detected. The logic is being translated to a mux implementation.