[Project]
Current Flow=Multivendor
VCS=0
version=1
Current Config=compile

[Configurations]
compile=rvalve

[Library]
rvalve=.\rvalve.LIB

[$LibMap$]
rvalve=.
Active_lib=XC9500
xilinxun=XC9500
UnlinkedDesignLibrary=XC9500
DESIGNS=XC9500

[Settings]
SYNTH_TOOL=MV_XST101
IMPL_TOOL=MV_ISE101
CSYNTH_TOOL=<none>
PHYSSYNTH_TOOL=<none>
FLOW_TYPE=HDL
LANGUAGE=VERILOG
FLOWTOOLS=IMPL_WITH_SYNTH
ON_SERVERFARM_SYNTH=0
ON_SERVERFARM_IMPL=0
ON_SERVERFARM_SIM=0
DVM_DISPLAY=NO
VerilogDirsChanged=1
REFRESH_FLOW=1
FAMILY=Xilinx10x COOLRUNNER
RUN_MODE_SYNTH=0

[IMPLEMENTATION]
UCF=
FLOW_STEPS_RESET=0

[Verilog Library]
XC9500=

[IMPLEMENTATION_XILINX10]
impl_opt(dont_run_translate)=0
impl_opt(dont_run_map)=0
impl_opt(dont_run_place)=0
impl_opt(dont_run_trace)=0
impl_opt(dont_run_simulation)=0
impl_opt(dont_run_fit)=0
impl_opt(dont_run_bitgen)=1

[Folders]
Name3=Makefiles
Directory3=C:\Documents and Settings\rawa\Desktop\dwarf_fpgas\rvalve\
Extension3=mak
Name4=Memory
Directory4=C:\Documents and Settings\rawa\Desktop\dwarf_fpgas\rvalve\src
Extension4=mem;mif;hex
Name5=Dll Libraries
Directory5=C:\Documents and Settings\rawa\Desktop\dwarf_fpgas\rvalve\
Extension5=dll
Name6=PDF
Directory6=C:\Documents and Settings\rawa\Desktop\dwarf_fpgas\rvalve\
Extension6=pdf
Name7=HTML
Directory7=C:\Documents and Settings\rawa\Desktop\dwarf_fpgas\rvalve\
Extension7=