true true false 0 My Computer/VI Server My Computer/VI Server true true false NI-cRIO9022-014C9009 134.89.11.103 TARGET_TYPE,RT;OS,VxWorks;CPU,PowerPC; 901x true 5000 1000 2 14 false 300 80 60 100 10000 0 0 false true true /c/ni-rt/startup/startup.rtexe true +* false /c/ni-rt/startup true true +* false true 3363 Main Application Instance/VI Server Main Application Instance/VI Server +* true true false false /c/ni-rt/system/www/www.log 80 /c/ni-rt/system/www c+* 60 +* PqVr/ifkAQh+lVrdPIykXlFvg12GhhQFR8H9cUhphgg=:pTe9HRlQuMfJxAG6QCGq7UvoUpJzAzWGKy5SbZ+roSU= 15 VxWorks-PPC603 fpga RIO0 cRIO-9111 false {024E22DA-5B04-4A4A-B923-B19526CC2B4B}resource=/crio_Mod2/AI22;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{030DE470-C1E5-4FF2-AA2D-AAABF0FDE410}resource=/crio_Mod2/AI16;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{0A1AEEF9-2D5A-4D14-A023-1BD750F30B67}resource=/crio_Mod3/DO7:0;0;ReadMethodType=u8;WriteMethodType=u8{0DC35E8F-25E5-4129-909A-BB3D50522BF5}NI 9478,Slot 3,1,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.kInitCurrentLimitSel="01010101010101010101010101010101",cRIOModule.kInitLimitA=60,cRIOModule.kInitLimitAFloat=1.200000E+0,cRIOModule.kInitLimitB=60,cRIOModule.kInitLimitBFloat=1.200000E+0,cRIOModule.kInitRefreshPeriod=0{1078F998-1B96-4FB8-9F59-E92A46B6E2A9}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7:0;0;ReadMethodType=u8;WriteMethodType=u8{10D531DD-F496-4B24-B165-627631896280}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO3:0;0;ReadMethodType=u8;WriteMethodType=u8{164A8260-6B5E-4416-8C0B-742ADE546E51}resource=/crio_Mod3/DO12;0;ReadMethodType=bool;WriteMethodType=bool{17F28F52-09E9-4D22-BA32-3509A3480E68}resource=/crio_Mod3/DO1;0;ReadMethodType=bool;WriteMethodType=bool{18D028E1-E126-4627-A045-7924B261F079}resource=/crio_Mod2/AI10;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{1B6B6789-293A-4CAD-9AF5-1D2D67E22FC7}resource=/crio_Mod2/AI12;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{2056F40B-C1A2-4D1E-B1AB-AD671677EE77}resource=/Scan Clock;0;ReadMethodType=bool{20858CCA-3ECF-4CC3-BB1C-7B81782EFC7E}"NumberOfElements=1023;DataType=7;Type=2;ReadArbs=Arbitrate if Multiple Requestors Only;WriteArbs=Arbitrate if Multiple Requestors Only;Implementation=2;DMA FIFO;FxpWordLength=32;FxpIntWordLength=32;FxpSigned=FALSE;FxpMin=0.000000;FxpMax=4294967295.000000;FxpDelta=1.000000"{28D917F8-7799-4604-A538-E5272B01AC36}resource=/crio_Mod2/Trig;0;ReadMethodType=bool{2B04A038-AB88-42D3-88C5-41124051708E}resource=/crio_Mod3/DO11;0;ReadMethodType=bool;WriteMethodType=bool{2FAFD885-1E59-472A-804F-42489AE7269C}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO2;0;ReadMethodType=bool;WriteMethodType=bool{30623B7C-1E55-4C3F-ADBF-2D3948305F2E}resource=/crio_Mod3/DO10;0;ReadMethodType=bool;WriteMethodType=bool{32874CA9-06F7-4893-BCBA-863223B97FD9}resource=/crio_Mod3/DO15:0;0;ReadMethodType=u16;WriteMethodType=u16{3C43D10D-B02F-4BF1-AA34-8796DEF19AAA}resource=/crio_Mod3/DO13;0;ReadMethodType=bool;WriteMethodType=bool{3CA4D5F1-9745-469D-A611-F9D685C598D5}resource=/crio_Mod2/AI15;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{3EC3D396-F39A-4A5D-8E50-194E5D44F816}resource=/crio_Mod2/AI30;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{3F5F715E-7526-465B-AB10-18884DCA81DE}NI 9401,Slot 1,1,cRIOModule.DIO3_0InitialDir=0,cRIOModule.DIO7_4InitialDir=0,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.NumSyncRegs=11111111{43BAD0BD-9590-4D37-BAF0-9AA74B299144}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO1;0;ReadMethodType=bool;WriteMethodType=bool{4678579D-8E1C-46B6-907B-63394A02CB12}resource=/Chassis Temperature;0;ReadMethodType=i16{494CC46B-A5C3-4C08-9B94-F37318B24AA2}resource=/crio_Mod3/DO2;0;ReadMethodType=bool;WriteMethodType=bool{4BDF0ED6-01C6-483F-BC16-71704FD6AFE2}resource=/crio_Mod2/AI4;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{4EC62D5C-A1CE-4133-8F46-339B03E7FBF1}resource=/crio_Mod2/AI26;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{545EE9FA-9E8A-4BE4-A558-E117DA7D1625}resource=/crio_Mod2/AI0;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{58290FF0-9156-481D-AC1E-C2A6A71BDAFD}resource=/crio_Mod2/AI31;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{589A42F3-33CE-4714-B14F-F4C2DD78C9EF}resource=/crio_Mod2/AI19;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{5935BF44-4DA0-4768-A30D-15E908235A10}resource=/crio_Mod2/DI0;0;ReadMethodType=bool{5FA8F5AB-C02F-4583-AF2F-BD1E86E7B625}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO5;0;ReadMethodType=bool;WriteMethodType=bool{61AF83FA-F26C-441A-9282-B44194329897}resource=/crio_Mod2/AI6;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{63924415-57FC-4307-A2EB-144B7682D027}resource=/crio_Mod2/AI17;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{67CBF636-7B5E-4522-8A69-374FD4B6FA0E}resource=/crio_Mod3/DO6;0;ReadMethodType=bool;WriteMethodType=bool{68C18890-26ED-4E65-B5C4-77C155F96E50}resource=/crio_Mod3/DO8;0;ReadMethodType=bool;WriteMethodType=bool{6A44EE80-6807-40F5-9254-DB6C73F138AF}resource=/crio_Mod2/AI20;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{6AFF307F-EB5B-4B2C-8ECD-BEE65787958A}resource=/crio_Mod2/AI14;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{6C7ED327-E136-48FB-9C6F-C5874B031746}resource=/crio_Mod2/AI3;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{6F257944-6054-44FE-A738-A95F20CD70FB}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO3;0;ReadMethodType=bool;WriteMethodType=bool{702E9115-B120-4EA3-8C0A-5E20FCC9BA84}resource=/FPGA LED;0;ReadMethodType=bool;WriteMethodType=bool{79C8DE6F-1F39-4D73-975F-503FAA57CDF6}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO6;0;ReadMethodType=bool;WriteMethodType=bool{7C47D646-EB86-4EB1-A8A8-0F098873247B}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO0;0;ReadMethodType=bool;WriteMethodType=bool{83C2AD2D-CB71-4A5A-807F-E59095EC57EE}resource=/crio_Mod3/DO15;0;ReadMethodType=bool;WriteMethodType=bool{84666718-FF3F-4A9B-8D5D-DF94DDE15F1E}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO4;0;ReadMethodType=bool;WriteMethodType=bool{897AB7E4-33DD-4437-8318-8BDA4262A678}NI 9205,Slot 2,1,cRIOModule.AI0.TerminalMode=0,cRIOModule.AI0.VoltageRange=0,cRIOModule.AI1.TerminalMode=0,cRIOModule.AI1.VoltageRange=0,cRIOModule.AI10.TerminalMode=0,cRIOModule.AI10.VoltageRange=0,cRIOModule.AI11.TerminalMode=0,cRIOModule.AI11.VoltageRange=0,cRIOModule.AI12.TerminalMode=0,cRIOModule.AI12.VoltageRange=0,cRIOModule.AI13.TerminalMode=0,cRIOModule.AI13.VoltageRange=0,cRIOModule.AI14.TerminalMode=0,cRIOModule.AI14.VoltageRange=0,cRIOModule.AI15.TerminalMode=0,cRIOModule.AI15.VoltageRange=0,cRIOModule.AI16.TerminalMode=0,cRIOModule.AI16.VoltageRange=0,cRIOModule.AI17.TerminalMode=0,cRIOModule.AI17.VoltageRange=0,cRIOModule.AI18.TerminalMode=0,cRIOModule.AI18.VoltageRange=0,cRIOModule.AI19.TerminalMode=0,cRIOModule.AI19.VoltageRange=0,cRIOModule.AI2.TerminalMode=0,cRIOModule.AI2.VoltageRange=0,cRIOModule.AI20.TerminalMode=0,cRIOModule.AI20.VoltageRange=0,cRIOModule.AI21.TerminalMode=0,cRIOModule.AI21.VoltageRange=0,cRIOModule.AI22.TerminalMode=0,cRIOModule.AI22.VoltageRange=0,cRIOModule.AI23.TerminalMode=0,cRIOModule.AI23.VoltageRange=0,cRIOModule.AI24.TerminalMode=0,cRIOModule.AI24.VoltageRange=0,cRIOModule.AI25.TerminalMode=0,cRIOModule.AI25.VoltageRange=0,cRIOModule.AI26.TerminalMode=0,cRIOModule.AI26.VoltageRange=0,cRIOModule.AI27.TerminalMode=0,cRIOModule.AI27.VoltageRange=0,cRIOModule.AI28.TerminalMode=0,cRIOModule.AI28.VoltageRange=0,cRIOModule.AI29.TerminalMode=0,cRIOModule.AI29.VoltageRange=0,cRIOModule.AI3.TerminalMode=0,cRIOModule.AI3.VoltageRange=0,cRIOModule.AI30.TerminalMode=0,cRIOModule.AI30.VoltageRange=0,cRIOModule.AI31.TerminalMode=0,cRIOModule.AI31.VoltageRange=0,cRIOModule.AI4.TerminalMode=0,cRIOModule.AI4.VoltageRange=0,cRIOModule.AI5.TerminalMode=0,cRIOModule.AI5.VoltageRange=0,cRIOModule.AI6.TerminalMode=0,cRIOModule.AI6.VoltageRange=0,cRIOModule.AI7.TerminalMode=0,cRIOModule.AI7.VoltageRange=0,cRIOModule.AI8.TerminalMode=0,cRIOModule.AI8.VoltageRange=0,cRIOModule.AI9.TerminalMode=0,cRIOModule.AI9.VoltageRange=0,cRIOModule.EnableCalProperties=false,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.MinConvTime=8.000000E+0{8B77B965-764C-455A-A2A2-78ABABA55500}ResourceName=40 MHz Onboard Clock;TopSignalConnect=Clk40;ClockSignalName=Clk40;MinFreq=40000000.000000;MaxFreq=40000000.000000;VariableFreq=0;NomFreq=40000000.000000;PeakPeriodJitter=250.000000;MinDutyCycle=50.000000;MaxDutyCycle=50.000000;Accuracy=100.000000;RunTime=0;SpreadSpectrum=0;GenericDataHash=D41D8CD98F00B204E9800998ECF8427E{8D6D2DD4-B6B4-493D-8060-D9245A851C8B}resource=/crio_Mod2/AI8;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{8DB75514-94AD-4D1C-BDEB-98FABCE08DA4}resource=/crio_Mod3/DO9;0;ReadMethodType=bool;WriteMethodType=bool{91B77A76-5B6E-41F6-957F-791014F95681}resource=/crio_Mod2/AI29;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{94143789-82FE-40C8-BE29-024A69EED0A0}resource=/crio_Mod2/AI2;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{94935804-39FA-43F7-9B18-F858EE38862F}resource=/crio_Mod3/DO5;0;ReadMethodType=bool;WriteMethodType=bool{97EF4AD9-5071-41B8-93E8-9048DEB92A49}resource=/Sleep;0;ReadMethodType=bool;WriteMethodType=bool{9947E50E-DB3E-45D9-85AF-8385B2DD0CBA}resource=/crio_Mod3/DO0;0;ReadMethodType=bool;WriteMethodType=bool{AE9F47BE-1153-4B0C-8A51-CB326B2F9FC4}resource=/crio_Mod2/AI27;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{B06F1D1F-DDB3-436A-82C0-9B32C8E6B316}resource=/crio_Mod2/AI1;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{BB85F88C-D363-4797-9642-4EDB358EFDFB}resource=/crio_Mod2/AI24;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C4DC6EE4-0A00-459B-9E82-83598A70E9BF}resource=/crio_Mod3/DO15:8;0;ReadMethodType=u8;WriteMethodType=u8{C5954D11-8F4B-41B9-A2E5-42E1FB2E1D0F}resource=/crio_Mod2/AI18;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C5E3BC9C-03A9-488A-98A0-044151FD2889}resource=/crio_Mod3/DO3;0;ReadMethodType=bool;WriteMethodType=bool{C73A093C-F1ED-412A-A842-7D54495202BA}resource=/crio_Mod2/AI28;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C90BBFF6-AAA9-4A8F-BEC5-0DA59CA48E0C}resource=/crio_Mod2/AI9;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C91FD4B3-E9B0-4883-AC82-88DBEA528420}resource=/crio_Mod2/AI21;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C9A6421C-AA75-4BAE-95CC-56D73990655B}resource=/crio_Mod3/DO7;0;ReadMethodType=bool;WriteMethodType=bool{CB304054-EDA0-419E-B944-DE81CFFB534D}resource=/System Reset;0;ReadMethodType=bool;WriteMethodType=bool{CC8C6C74-6A72-4509-918E-F9B11F7C8A88}resource=/crio_Mod3/DO14;0;ReadMethodType=bool;WriteMethodType=bool{D40936B2-170E-424E-A374-7F98D3F59A12}resource=/crio_Mod2/AI25;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{D7F0C0D5-FF6D-4939-8B89-410E6E527F51}resource=/crio_Mod2/AI7;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{EE3B69FB-E467-4D9C-93F9-8593DBE3FA2E}resource=/crio_Mod2/DO0;0;WriteMethodType=bool{F12329EB-B509-4BF2-A8FA-371F59289883}resource=/crio_Mod2/AI23;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{F5DD91EB-66C5-48DF-9A4C-49CFFE92AA2E}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7;0;ReadMethodType=bool;WriteMethodType=bool{F619AB38-B4BB-4929-B8C0-7676B1B63512}resource=/crio_Mod2/AI13;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{F858BD94-1D7D-4BB9-A784-5F1FF26A6EFC}resource=/crio_Mod2/AI5;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{FD0FB82B-FD78-4F9B-B3BE-CC13590932B9}resource=/crio_Mod3/DO4;0;ReadMethodType=bool;WriteMethodType=bool{FD52D146-7C91-473A-97DB-136C5C9B3D1A}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7:4;0;ReadMethodType=u8;WriteMethodType=u8{FE942702-359C-48A9-A76B-E86F5B704156}resource=/crio_Mod2/AI11;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlcRIO-9111/Clk40/falseTARGET_TYPEFPGA 40 MHz Onboard ClockResourceName=40 MHz Onboard Clock;TopSignalConnect=Clk40;ClockSignalName=Clk40;MinFreq=40000000.000000;MaxFreq=40000000.000000;VariableFreq=0;NomFreq=40000000.000000;PeakPeriodJitter=250.000000;MinDutyCycle=50.000000;MaxDutyCycle=50.000000;Accuracy=100.000000;RunTime=0;SpreadSpectrum=0;GenericDataHash=D41D8CD98F00B204E9800998ECF8427EChassis Temperatureresource=/Chassis Temperature;0;ReadMethodType=i16cRIO-9111/Clk40/falseTARGET_TYPEFPGADMA FIFO"NumberOfElements=1023;DataType=7;Type=2;ReadArbs=Arbitrate if Multiple Requestors Only;WriteArbs=Arbitrate if Multiple Requestors Only;Implementation=2;DMA FIFO;FxpWordLength=32;FxpIntWordLength=32;FxpSigned=FALSE;FxpMin=0.000000;FxpMax=4294967295.000000;FxpDelta=1.000000"FPGA LEDresource=/FPGA LED;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO0ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO0;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO1ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO1;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO2ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO2;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO3:0ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO3:0;0;ReadMethodType=u8;WriteMethodType=u8Mod1/DIO3ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO3;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO4ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO4;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO5ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO5;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO6ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO6;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO7:0ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7:0;0;ReadMethodType=u8;WriteMethodType=u8Mod1/DIO7:4ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7:4;0;ReadMethodType=u8;WriteMethodType=u8Mod1/DIO7ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7;0;ReadMethodType=bool;WriteMethodType=boolMod1NI 9401,Slot 1,1,cRIOModule.DIO3_0InitialDir=0,cRIOModule.DIO7_4InitialDir=0,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.NumSyncRegs=11111111Mod2/AI0resource=/crio_Mod2/AI0;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI10resource=/crio_Mod2/AI10;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI11resource=/crio_Mod2/AI11;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI12resource=/crio_Mod2/AI12;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI13resource=/crio_Mod2/AI13;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI14resource=/crio_Mod2/AI14;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI15resource=/crio_Mod2/AI15;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI16resource=/crio_Mod2/AI16;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI17resource=/crio_Mod2/AI17;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI18resource=/crio_Mod2/AI18;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI19resource=/crio_Mod2/AI19;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI1resource=/crio_Mod2/AI1;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI20resource=/crio_Mod2/AI20;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI21resource=/crio_Mod2/AI21;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI22resource=/crio_Mod2/AI22;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI23resource=/crio_Mod2/AI23;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI24resource=/crio_Mod2/AI24;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI25resource=/crio_Mod2/AI25;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI26resource=/crio_Mod2/AI26;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI27resource=/crio_Mod2/AI27;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI28resource=/crio_Mod2/AI28;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI29resource=/crio_Mod2/AI29;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI2resource=/crio_Mod2/AI2;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI30resource=/crio_Mod2/AI30;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI31resource=/crio_Mod2/AI31;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI3resource=/crio_Mod2/AI3;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI4resource=/crio_Mod2/AI4;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI5resource=/crio_Mod2/AI5;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI6resource=/crio_Mod2/AI6;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI7resource=/crio_Mod2/AI7;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI8resource=/crio_Mod2/AI8;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI9resource=/crio_Mod2/AI9;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/DI0resource=/crio_Mod2/DI0;0;ReadMethodType=boolMod2/DO0resource=/crio_Mod2/DO0;0;WriteMethodType=boolMod2/Trigresource=/crio_Mod2/Trig;0;ReadMethodType=boolMod2NI 9205,Slot 2,1,cRIOModule.AI0.TerminalMode=0,cRIOModule.AI0.VoltageRange=0,cRIOModule.AI1.TerminalMode=0,cRIOModule.AI1.VoltageRange=0,cRIOModule.AI10.TerminalMode=0,cRIOModule.AI10.VoltageRange=0,cRIOModule.AI11.TerminalMode=0,cRIOModule.AI11.VoltageRange=0,cRIOModule.AI12.TerminalMode=0,cRIOModule.AI12.VoltageRange=0,cRIOModule.AI13.TerminalMode=0,cRIOModule.AI13.VoltageRange=0,cRIOModule.AI14.TerminalMode=0,cRIOModule.AI14.VoltageRange=0,cRIOModule.AI15.TerminalMode=0,cRIOModule.AI15.VoltageRange=0,cRIOModule.AI16.TerminalMode=0,cRIOModule.AI16.VoltageRange=0,cRIOModule.AI17.TerminalMode=0,cRIOModule.AI17.VoltageRange=0,cRIOModule.AI18.TerminalMode=0,cRIOModule.AI18.VoltageRange=0,cRIOModule.AI19.TerminalMode=0,cRIOModule.AI19.VoltageRange=0,cRIOModule.AI2.TerminalMode=0,cRIOModule.AI2.VoltageRange=0,cRIOModule.AI20.TerminalMode=0,cRIOModule.AI20.VoltageRange=0,cRIOModule.AI21.TerminalMode=0,cRIOModule.AI21.VoltageRange=0,cRIOModule.AI22.TerminalMode=0,cRIOModule.AI22.VoltageRange=0,cRIOModule.AI23.TerminalMode=0,cRIOModule.AI23.VoltageRange=0,cRIOModule.AI24.TerminalMode=0,cRIOModule.AI24.VoltageRange=0,cRIOModule.AI25.TerminalMode=0,cRIOModule.AI25.VoltageRange=0,cRIOModule.AI26.TerminalMode=0,cRIOModule.AI26.VoltageRange=0,cRIOModule.AI27.TerminalMode=0,cRIOModule.AI27.VoltageRange=0,cRIOModule.AI28.TerminalMode=0,cRIOModule.AI28.VoltageRange=0,cRIOModule.AI29.TerminalMode=0,cRIOModule.AI29.VoltageRange=0,cRIOModule.AI3.TerminalMode=0,cRIOModule.AI3.VoltageRange=0,cRIOModule.AI30.TerminalMode=0,cRIOModule.AI30.VoltageRange=0,cRIOModule.AI31.TerminalMode=0,cRIOModule.AI31.VoltageRange=0,cRIOModule.AI4.TerminalMode=0,cRIOModule.AI4.VoltageRange=0,cRIOModule.AI5.TerminalMode=0,cRIOModule.AI5.VoltageRange=0,cRIOModule.AI6.TerminalMode=0,cRIOModule.AI6.VoltageRange=0,cRIOModule.AI7.TerminalMode=0,cRIOModule.AI7.VoltageRange=0,cRIOModule.AI8.TerminalMode=0,cRIOModule.AI8.VoltageRange=0,cRIOModule.AI9.TerminalMode=0,cRIOModule.AI9.VoltageRange=0,cRIOModule.EnableCalProperties=false,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.MinConvTime=8.000000E+0Mod3/DO0resource=/crio_Mod3/DO0;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO10resource=/crio_Mod3/DO10;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO11resource=/crio_Mod3/DO11;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO12resource=/crio_Mod3/DO12;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO13resource=/crio_Mod3/DO13;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO14resource=/crio_Mod3/DO14;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO15:0resource=/crio_Mod3/DO15:0;0;ReadMethodType=u16;WriteMethodType=u16Mod3/DO15:8resource=/crio_Mod3/DO15:8;0;ReadMethodType=u8;WriteMethodType=u8Mod3/DO15resource=/crio_Mod3/DO15;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO1resource=/crio_Mod3/DO1;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO2resource=/crio_Mod3/DO2;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO3resource=/crio_Mod3/DO3;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO4resource=/crio_Mod3/DO4;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO5resource=/crio_Mod3/DO5;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO6resource=/crio_Mod3/DO6;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO7:0resource=/crio_Mod3/DO7:0;0;ReadMethodType=u8;WriteMethodType=u8Mod3/DO7resource=/crio_Mod3/DO7;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO8resource=/crio_Mod3/DO8;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO9resource=/crio_Mod3/DO9;0;ReadMethodType=bool;WriteMethodType=boolMod3NI 9478,Slot 3,1,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.kInitCurrentLimitSel="01010101010101010101010101010101",cRIOModule.kInitLimitA=60,cRIOModule.kInitLimitAFloat=1.200000E+0,cRIOModule.kInitLimitB=60,cRIOModule.kInitLimitBFloat=1.200000E+0,cRIOModule.kInitRefreshPeriod=0Scan Clockresource=/Scan Clock;0;ReadMethodType=boolSleepresource=/Sleep;0;ReadMethodType=bool;WriteMethodType=boolSystem Resetresource=/System Reset;0;ReadMethodType=bool;WriteMethodType=bool cRIO-9111/Clk40/falseTARGET_TYPEFPGA 4 RIO0 cRIO-9111 40 MHz Onboard Clock true /Chassis Temperature {4678579D-8E1C-46B6-907B-63394A02CB12} /Sleep {97EF4AD9-5071-41B8-93E8-9048DEB92A49} /System Reset {CB304054-EDA0-419E-B944-DE81CFFB534D} /FPGA LED {702E9115-B120-4EA3-8C0A-5E20FCC9BA84} /Scan Clock {2056F40B-C1A2-4D1E-B1AB-AD671677EE77} NeverArbitrate /crio_Mod1/DIO0 {7C47D646-EB86-4EB1-A8A8-0F098873247B} NeverArbitrate /crio_Mod1/DIO1 {43BAD0BD-9590-4D37-BAF0-9AA74B299144} NeverArbitrate /crio_Mod1/DIO2 {2FAFD885-1E59-472A-804F-42489AE7269C} NeverArbitrate /crio_Mod1/DIO3 {6F257944-6054-44FE-A738-A95F20CD70FB} NeverArbitrate /crio_Mod1/DIO4 {84666718-FF3F-4A9B-8D5D-DF94DDE15F1E} NeverArbitrate /crio_Mod1/DIO5 {5FA8F5AB-C02F-4583-AF2F-BD1E86E7B625} NeverArbitrate /crio_Mod1/DIO6 {79C8DE6F-1F39-4D73-975F-503FAA57CDF6} NeverArbitrate /crio_Mod1/DIO7 {F5DD91EB-66C5-48DF-9A4C-49CFFE92AA2E} NeverArbitrate /crio_Mod1/DIO3:0 {10D531DD-F496-4B24-B165-627631896280} NeverArbitrate /crio_Mod1/DIO7:4 {FD52D146-7C91-473A-97DB-136C5C9B3D1A} NeverArbitrate /crio_Mod1/DIO7:0 {1078F998-1B96-4FB8-9F59-E92A46B6E2A9} /crio_Mod2/AI0 {545EE9FA-9E8A-4BE4-A558-E117DA7D1625} /crio_Mod2/AI1 {B06F1D1F-DDB3-436A-82C0-9B32C8E6B316} /crio_Mod2/AI2 {94143789-82FE-40C8-BE29-024A69EED0A0} /crio_Mod2/AI3 {6C7ED327-E136-48FB-9C6F-C5874B031746} /crio_Mod2/AI4 {4BDF0ED6-01C6-483F-BC16-71704FD6AFE2} /crio_Mod2/AI5 {F858BD94-1D7D-4BB9-A784-5F1FF26A6EFC} /crio_Mod2/AI6 {61AF83FA-F26C-441A-9282-B44194329897} /crio_Mod2/AI7 {D7F0C0D5-FF6D-4939-8B89-410E6E527F51} /crio_Mod2/AI8 {8D6D2DD4-B6B4-493D-8060-D9245A851C8B} /crio_Mod2/AI9 {C90BBFF6-AAA9-4A8F-BEC5-0DA59CA48E0C} /crio_Mod2/AI10 {18D028E1-E126-4627-A045-7924B261F079} /crio_Mod2/AI11 {FE942702-359C-48A9-A76B-E86F5B704156} /crio_Mod2/AI12 {1B6B6789-293A-4CAD-9AF5-1D2D67E22FC7} /crio_Mod2/AI13 {F619AB38-B4BB-4929-B8C0-7676B1B63512} /crio_Mod2/AI14 {6AFF307F-EB5B-4B2C-8ECD-BEE65787958A} /crio_Mod2/AI15 {3CA4D5F1-9745-469D-A611-F9D685C598D5} /crio_Mod2/AI16 {030DE470-C1E5-4FF2-AA2D-AAABF0FDE410} /crio_Mod2/AI17 {63924415-57FC-4307-A2EB-144B7682D027} /crio_Mod2/AI18 {C5954D11-8F4B-41B9-A2E5-42E1FB2E1D0F} /crio_Mod2/AI19 {589A42F3-33CE-4714-B14F-F4C2DD78C9EF} /crio_Mod2/AI20 {6A44EE80-6807-40F5-9254-DB6C73F138AF} /crio_Mod2/AI21 {C91FD4B3-E9B0-4883-AC82-88DBEA528420} /crio_Mod2/AI22 {024E22DA-5B04-4A4A-B923-B19526CC2B4B} /crio_Mod2/AI23 {F12329EB-B509-4BF2-A8FA-371F59289883} /crio_Mod2/AI24 {BB85F88C-D363-4797-9642-4EDB358EFDFB} /crio_Mod2/AI25 {D40936B2-170E-424E-A374-7F98D3F59A12} /crio_Mod2/AI26 {4EC62D5C-A1CE-4133-8F46-339B03E7FBF1} /crio_Mod2/AI27 {AE9F47BE-1153-4B0C-8A51-CB326B2F9FC4} /crio_Mod2/AI28 {C73A093C-F1ED-412A-A842-7D54495202BA} /crio_Mod2/AI29 {91B77A76-5B6E-41F6-957F-791014F95681} /crio_Mod2/AI30 {3EC3D396-F39A-4A5D-8E50-194E5D44F816} /crio_Mod2/AI31 {58290FF0-9156-481D-AC1E-C2A6A71BDAFD} /crio_Mod2/Trig {28D917F8-7799-4604-A538-E5272B01AC36} /crio_Mod2/DI0 {5935BF44-4DA0-4768-A30D-15E908235A10} /crio_Mod2/DO0 {EE3B69FB-E467-4D9C-93F9-8593DBE3FA2E} /crio_Mod3/DO0 {9947E50E-DB3E-45D9-85AF-8385B2DD0CBA} /crio_Mod3/DO1 {17F28F52-09E9-4D22-BA32-3509A3480E68} /crio_Mod3/DO2 {494CC46B-A5C3-4C08-9B94-F37318B24AA2} /crio_Mod3/DO3 {C5E3BC9C-03A9-488A-98A0-044151FD2889} /crio_Mod3/DO4 {FD0FB82B-FD78-4F9B-B3BE-CC13590932B9} /crio_Mod3/DO5 {94935804-39FA-43F7-9B18-F858EE38862F} /crio_Mod3/DO6 {67CBF636-7B5E-4522-8A69-374FD4B6FA0E} /crio_Mod3/DO7 {C9A6421C-AA75-4BAE-95CC-56D73990655B} /crio_Mod3/DO8 {68C18890-26ED-4E65-B5C4-77C155F96E50} /crio_Mod3/DO9 {8DB75514-94AD-4D1C-BDEB-98FABCE08DA4} /crio_Mod3/DO10 {30623B7C-1E55-4C3F-ADBF-2D3948305F2E} /crio_Mod3/DO11 {2B04A038-AB88-42D3-88C5-41124051708E} /crio_Mod3/DO12 {164A8260-6B5E-4416-8C0B-742ADE546E51} /crio_Mod3/DO13 {3C43D10D-B02F-4BF1-AA34-8796DEF19AAA} /crio_Mod3/DO14 {CC8C6C74-6A72-4509-918E-F9B11F7C8A88} /crio_Mod3/DO15 {83C2AD2D-CB71-4A5A-807F-E59095EC57EE} /crio_Mod3/DO7:0 {0A1AEEF9-2D5A-4D14-A023-1BD750F30B67} /crio_Mod3/DO15:8 {C4DC6EE4-0A00-459B-9E82-83598A70E9BF} /crio_Mod3/DO15:0 {32874CA9-06F7-4893-BCBA-863223B97FD9} 1 1 7 false "NumberOfElements=1023;DataType=7;Type=2;ReadArbs=Arbitrate if Multiple Requestors Only;WriteArbs=Arbitrate if Multiple Requestors Only;Implementation=2;DMA FIFO;FxpWordLength=32;FxpIntWordLength=32;FxpSigned=FALSE;FxpMin=0.000000;FxpMax=4294967295.000000;FxpDelta=1.000000" true true ##"A)A!!!!U!$E!Q`````Q2/97VF!!!+1!=&2'6Q>'A!.1$R!!!!!!!!!!%92GFG<V^%982B6(FQ:5.P<H2S<WQO9X2M!".!!AJ%982B)&>J:(2I!!!R!0%!!!!!!!!!!2*';7:P8U2J=G6D>'FP<CZD>'Q!&5!$$5:*2E^%;8*F9X2J<WY!-!$R!!!!!!!!!!%42GFG<V^*4V.U=G&U:7>Z,G.U<!!51!%,35]A5X2S982F:XE!%E!Q`````QB73%2-4G&N:1!!1!$RPAH!FA!!!!%:2GFG<V^"=G*0=(2J<WZT5X2S;7ZH,G.U<!!?1$$`````%&*F971A18*C)%^Q>'FP<H-!!%!!]<Y*Q*9!!!!"'5:J:G^@18*C4X"U;7^O=V.U=GFO:SZD>'Q!(E!Q`````R&8=GFU:3""=G)A4X"U;7^O=Q!L!0%!!!!!!!!!!2"';7:P8UVF<62Z='5O9X2M!"&!!AB315UA>(FQ:1!!%%!(#U2.13"$;'&O<G6M!!R!)1:8=GFU:4]!!!J!)16-<W.B<!"&!0'`[U5V!!!!!1Z';7:P8V.U982F,G.U<!!N1&!!$!!!!!%!!A!$!!1!"1!'!!=!#!!*!!I!#QJ';7:P)&.U982F!!!"!!Q!!!!)2%V")%:*2E]!!!0`!!1!!!!!!1!!!$&%45&B2EF'4V]S-$%R-4-S.45S-D9Z-TAS-$ER/45U/41R/49R.4%S-4-R-$%R/$EZ!!!!%U^Q>'FN;8JF)%:P=C"4;7ZH<'5!!!!44X"U;7VJ?G5A2G^S)&.J<G>M:1!#!!!!!!%!!!!!!! true 9 {20858CCA-3ECF-4CC3-BB1C-7B81782EFC7E} 2 false 1023 2 {024E22DA-5B04-4A4A-B923-B19526CC2B4B}resource=/crio_Mod2/AI22;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{030DE470-C1E5-4FF2-AA2D-AAABF0FDE410}resource=/crio_Mod2/AI16;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{0A1AEEF9-2D5A-4D14-A023-1BD750F30B67}resource=/crio_Mod3/DO7:0;0;ReadMethodType=u8;WriteMethodType=u8{0DC35E8F-25E5-4129-909A-BB3D50522BF5}NI 9478,Slot 3,1,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.kInitCurrentLimitSel="01010101010101010101010101010101",cRIOModule.kInitLimitA=60,cRIOModule.kInitLimitAFloat=1.200000E+0,cRIOModule.kInitLimitB=60,cRIOModule.kInitLimitBFloat=1.200000E+0,cRIOModule.kInitRefreshPeriod=0{1078F998-1B96-4FB8-9F59-E92A46B6E2A9}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7:0;0;ReadMethodType=u8;WriteMethodType=u8{10D531DD-F496-4B24-B165-627631896280}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO3:0;0;ReadMethodType=u8;WriteMethodType=u8{164A8260-6B5E-4416-8C0B-742ADE546E51}resource=/crio_Mod3/DO12;0;ReadMethodType=bool;WriteMethodType=bool{17F28F52-09E9-4D22-BA32-3509A3480E68}resource=/crio_Mod3/DO1;0;ReadMethodType=bool;WriteMethodType=bool{18D028E1-E126-4627-A045-7924B261F079}resource=/crio_Mod2/AI10;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{1B6B6789-293A-4CAD-9AF5-1D2D67E22FC7}resource=/crio_Mod2/AI12;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{2056F40B-C1A2-4D1E-B1AB-AD671677EE77}resource=/Scan Clock;0;ReadMethodType=bool{20858CCA-3ECF-4CC3-BB1C-7B81782EFC7E}"NumberOfElements=1023;DataType=7;Type=2;ReadArbs=Arbitrate if Multiple Requestors Only;WriteArbs=Arbitrate if Multiple Requestors Only;Implementation=2;DMA FIFO;FxpWordLength=32;FxpIntWordLength=32;FxpSigned=FALSE;FxpMin=0.000000;FxpMax=4294967295.000000;FxpDelta=1.000000"{28D917F8-7799-4604-A538-E5272B01AC36}resource=/crio_Mod2/Trig;0;ReadMethodType=bool{2B04A038-AB88-42D3-88C5-41124051708E}resource=/crio_Mod3/DO11;0;ReadMethodType=bool;WriteMethodType=bool{2FAFD885-1E59-472A-804F-42489AE7269C}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO2;0;ReadMethodType=bool;WriteMethodType=bool{30623B7C-1E55-4C3F-ADBF-2D3948305F2E}resource=/crio_Mod3/DO10;0;ReadMethodType=bool;WriteMethodType=bool{32874CA9-06F7-4893-BCBA-863223B97FD9}resource=/crio_Mod3/DO15:0;0;ReadMethodType=u16;WriteMethodType=u16{3C43D10D-B02F-4BF1-AA34-8796DEF19AAA}resource=/crio_Mod3/DO13;0;ReadMethodType=bool;WriteMethodType=bool{3CA4D5F1-9745-469D-A611-F9D685C598D5}resource=/crio_Mod2/AI15;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{3EC3D396-F39A-4A5D-8E50-194E5D44F816}resource=/crio_Mod2/AI30;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{3F5F715E-7526-465B-AB10-18884DCA81DE}NI 9401,Slot 1,1,cRIOModule.DIO3_0InitialDir=0,cRIOModule.DIO7_4InitialDir=0,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.NumSyncRegs=11111111{43BAD0BD-9590-4D37-BAF0-9AA74B299144}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO1;0;ReadMethodType=bool;WriteMethodType=bool{4678579D-8E1C-46B6-907B-63394A02CB12}resource=/Chassis Temperature;0;ReadMethodType=i16{494CC46B-A5C3-4C08-9B94-F37318B24AA2}resource=/crio_Mod3/DO2;0;ReadMethodType=bool;WriteMethodType=bool{4BDF0ED6-01C6-483F-BC16-71704FD6AFE2}resource=/crio_Mod2/AI4;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{4EC62D5C-A1CE-4133-8F46-339B03E7FBF1}resource=/crio_Mod2/AI26;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{545EE9FA-9E8A-4BE4-A558-E117DA7D1625}resource=/crio_Mod2/AI0;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{58290FF0-9156-481D-AC1E-C2A6A71BDAFD}resource=/crio_Mod2/AI31;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{589A42F3-33CE-4714-B14F-F4C2DD78C9EF}resource=/crio_Mod2/AI19;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{5935BF44-4DA0-4768-A30D-15E908235A10}resource=/crio_Mod2/DI0;0;ReadMethodType=bool{5FA8F5AB-C02F-4583-AF2F-BD1E86E7B625}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO5;0;ReadMethodType=bool;WriteMethodType=bool{61AF83FA-F26C-441A-9282-B44194329897}resource=/crio_Mod2/AI6;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{63924415-57FC-4307-A2EB-144B7682D027}resource=/crio_Mod2/AI17;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{67CBF636-7B5E-4522-8A69-374FD4B6FA0E}resource=/crio_Mod3/DO6;0;ReadMethodType=bool;WriteMethodType=bool{68C18890-26ED-4E65-B5C4-77C155F96E50}resource=/crio_Mod3/DO8;0;ReadMethodType=bool;WriteMethodType=bool{6A44EE80-6807-40F5-9254-DB6C73F138AF}resource=/crio_Mod2/AI20;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{6AFF307F-EB5B-4B2C-8ECD-BEE65787958A}resource=/crio_Mod2/AI14;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{6C7ED327-E136-48FB-9C6F-C5874B031746}resource=/crio_Mod2/AI3;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{6F257944-6054-44FE-A738-A95F20CD70FB}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO3;0;ReadMethodType=bool;WriteMethodType=bool{702E9115-B120-4EA3-8C0A-5E20FCC9BA84}resource=/FPGA LED;0;ReadMethodType=bool;WriteMethodType=bool{79C8DE6F-1F39-4D73-975F-503FAA57CDF6}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO6;0;ReadMethodType=bool;WriteMethodType=bool{7C47D646-EB86-4EB1-A8A8-0F098873247B}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO0;0;ReadMethodType=bool;WriteMethodType=bool{83C2AD2D-CB71-4A5A-807F-E59095EC57EE}resource=/crio_Mod3/DO15;0;ReadMethodType=bool;WriteMethodType=bool{84666718-FF3F-4A9B-8D5D-DF94DDE15F1E}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO4;0;ReadMethodType=bool;WriteMethodType=bool{897AB7E4-33DD-4437-8318-8BDA4262A678}NI 9205,Slot 2,1,cRIOModule.AI0.TerminalMode=0,cRIOModule.AI0.VoltageRange=0,cRIOModule.AI1.TerminalMode=0,cRIOModule.AI1.VoltageRange=0,cRIOModule.AI10.TerminalMode=0,cRIOModule.AI10.VoltageRange=0,cRIOModule.AI11.TerminalMode=0,cRIOModule.AI11.VoltageRange=0,cRIOModule.AI12.TerminalMode=0,cRIOModule.AI12.VoltageRange=0,cRIOModule.AI13.TerminalMode=0,cRIOModule.AI13.VoltageRange=0,cRIOModule.AI14.TerminalMode=0,cRIOModule.AI14.VoltageRange=0,cRIOModule.AI15.TerminalMode=0,cRIOModule.AI15.VoltageRange=0,cRIOModule.AI16.TerminalMode=0,cRIOModule.AI16.VoltageRange=0,cRIOModule.AI17.TerminalMode=0,cRIOModule.AI17.VoltageRange=0,cRIOModule.AI18.TerminalMode=0,cRIOModule.AI18.VoltageRange=0,cRIOModule.AI19.TerminalMode=0,cRIOModule.AI19.VoltageRange=0,cRIOModule.AI2.TerminalMode=0,cRIOModule.AI2.VoltageRange=0,cRIOModule.AI20.TerminalMode=0,cRIOModule.AI20.VoltageRange=0,cRIOModule.AI21.TerminalMode=0,cRIOModule.AI21.VoltageRange=0,cRIOModule.AI22.TerminalMode=0,cRIOModule.AI22.VoltageRange=0,cRIOModule.AI23.TerminalMode=0,cRIOModule.AI23.VoltageRange=0,cRIOModule.AI24.TerminalMode=0,cRIOModule.AI24.VoltageRange=0,cRIOModule.AI25.TerminalMode=0,cRIOModule.AI25.VoltageRange=0,cRIOModule.AI26.TerminalMode=0,cRIOModule.AI26.VoltageRange=0,cRIOModule.AI27.TerminalMode=0,cRIOModule.AI27.VoltageRange=0,cRIOModule.AI28.TerminalMode=0,cRIOModule.AI28.VoltageRange=0,cRIOModule.AI29.TerminalMode=0,cRIOModule.AI29.VoltageRange=0,cRIOModule.AI3.TerminalMode=0,cRIOModule.AI3.VoltageRange=0,cRIOModule.AI30.TerminalMode=0,cRIOModule.AI30.VoltageRange=0,cRIOModule.AI31.TerminalMode=0,cRIOModule.AI31.VoltageRange=0,cRIOModule.AI4.TerminalMode=0,cRIOModule.AI4.VoltageRange=0,cRIOModule.AI5.TerminalMode=0,cRIOModule.AI5.VoltageRange=0,cRIOModule.AI6.TerminalMode=0,cRIOModule.AI6.VoltageRange=0,cRIOModule.AI7.TerminalMode=0,cRIOModule.AI7.VoltageRange=0,cRIOModule.AI8.TerminalMode=0,cRIOModule.AI8.VoltageRange=0,cRIOModule.AI9.TerminalMode=0,cRIOModule.AI9.VoltageRange=0,cRIOModule.EnableCalProperties=false,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.MinConvTime=8.000000E+0{8B77B965-764C-455A-A2A2-78ABABA55500}ResourceName=40 MHz Onboard Clock;TopSignalConnect=Clk40;ClockSignalName=Clk40;MinFreq=40000000.000000;MaxFreq=40000000.000000;VariableFreq=0;NomFreq=40000000.000000;PeakPeriodJitter=250.000000;MinDutyCycle=50.000000;MaxDutyCycle=50.000000;Accuracy=100.000000;RunTime=0;SpreadSpectrum=0;GenericDataHash=D41D8CD98F00B204E9800998ECF8427E{8D6D2DD4-B6B4-493D-8060-D9245A851C8B}resource=/crio_Mod2/AI8;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{8DB75514-94AD-4D1C-BDEB-98FABCE08DA4}resource=/crio_Mod3/DO9;0;ReadMethodType=bool;WriteMethodType=bool{91B77A76-5B6E-41F6-957F-791014F95681}resource=/crio_Mod2/AI29;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{94143789-82FE-40C8-BE29-024A69EED0A0}resource=/crio_Mod2/AI2;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{94935804-39FA-43F7-9B18-F858EE38862F}resource=/crio_Mod3/DO5;0;ReadMethodType=bool;WriteMethodType=bool{97EF4AD9-5071-41B8-93E8-9048DEB92A49}resource=/Sleep;0;ReadMethodType=bool;WriteMethodType=bool{9947E50E-DB3E-45D9-85AF-8385B2DD0CBA}resource=/crio_Mod3/DO0;0;ReadMethodType=bool;WriteMethodType=bool{AE9F47BE-1153-4B0C-8A51-CB326B2F9FC4}resource=/crio_Mod2/AI27;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{B06F1D1F-DDB3-436A-82C0-9B32C8E6B316}resource=/crio_Mod2/AI1;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{BB85F88C-D363-4797-9642-4EDB358EFDFB}resource=/crio_Mod2/AI24;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C4DC6EE4-0A00-459B-9E82-83598A70E9BF}resource=/crio_Mod3/DO15:8;0;ReadMethodType=u8;WriteMethodType=u8{C5954D11-8F4B-41B9-A2E5-42E1FB2E1D0F}resource=/crio_Mod2/AI18;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C5E3BC9C-03A9-488A-98A0-044151FD2889}resource=/crio_Mod3/DO3;0;ReadMethodType=bool;WriteMethodType=bool{C73A093C-F1ED-412A-A842-7D54495202BA}resource=/crio_Mod2/AI28;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C90BBFF6-AAA9-4A8F-BEC5-0DA59CA48E0C}resource=/crio_Mod2/AI9;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C91FD4B3-E9B0-4883-AC82-88DBEA528420}resource=/crio_Mod2/AI21;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{C9A6421C-AA75-4BAE-95CC-56D73990655B}resource=/crio_Mod3/DO7;0;ReadMethodType=bool;WriteMethodType=bool{CB304054-EDA0-419E-B944-DE81CFFB534D}resource=/System Reset;0;ReadMethodType=bool;WriteMethodType=bool{CC8C6C74-6A72-4509-918E-F9B11F7C8A88}resource=/crio_Mod3/DO14;0;ReadMethodType=bool;WriteMethodType=bool{D40936B2-170E-424E-A374-7F98D3F59A12}resource=/crio_Mod2/AI25;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{D7F0C0D5-FF6D-4939-8B89-410E6E527F51}resource=/crio_Mod2/AI7;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{EE3B69FB-E467-4D9C-93F9-8593DBE3FA2E}resource=/crio_Mod2/DO0;0;WriteMethodType=bool{F12329EB-B509-4BF2-A8FA-371F59289883}resource=/crio_Mod2/AI23;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{F5DD91EB-66C5-48DF-9A4C-49CFFE92AA2E}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7;0;ReadMethodType=bool;WriteMethodType=bool{F619AB38-B4BB-4929-B8C0-7676B1B63512}resource=/crio_Mod2/AI13;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{F858BD94-1D7D-4BB9-A784-5F1FF26A6EFC}resource=/crio_Mod2/AI5;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctl{FD0FB82B-FD78-4F9B-B3BE-CC13590932B9}resource=/crio_Mod3/DO4;0;ReadMethodType=bool;WriteMethodType=bool{FD52D146-7C91-473A-97DB-136C5C9B3D1A}ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7:4;0;ReadMethodType=u8;WriteMethodType=u8{FE942702-359C-48A9-A76B-E86F5B704156}resource=/crio_Mod2/AI11;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlcRIO-9111/Clk40/falseTARGET_TYPEFPGA 40 MHz Onboard ClockResourceName=40 MHz Onboard Clock;TopSignalConnect=Clk40;ClockSignalName=Clk40;MinFreq=40000000.000000;MaxFreq=40000000.000000;VariableFreq=0;NomFreq=40000000.000000;PeakPeriodJitter=250.000000;MinDutyCycle=50.000000;MaxDutyCycle=50.000000;Accuracy=100.000000;RunTime=0;SpreadSpectrum=0;GenericDataHash=D41D8CD98F00B204E9800998ECF8427EChassis Temperatureresource=/Chassis Temperature;0;ReadMethodType=i16cRIO-9111/Clk40/falseTARGET_TYPEFPGADMA FIFO"NumberOfElements=1023;DataType=7;Type=2;ReadArbs=Arbitrate if Multiple Requestors Only;WriteArbs=Arbitrate if Multiple Requestors Only;Implementation=2;DMA FIFO;FxpWordLength=32;FxpIntWordLength=32;FxpSigned=FALSE;FxpMin=0.000000;FxpMax=4294967295.000000;FxpDelta=1.000000"FPGA LEDresource=/FPGA LED;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO0ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO0;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO1ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO1;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO2ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO2;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO3:0ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO3:0;0;ReadMethodType=u8;WriteMethodType=u8Mod1/DIO3ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO3;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO4ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO4;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO5ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO5;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO6ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO6;0;ReadMethodType=bool;WriteMethodType=boolMod1/DIO7:0ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7:0;0;ReadMethodType=u8;WriteMethodType=u8Mod1/DIO7:4ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7:4;0;ReadMethodType=u8;WriteMethodType=u8Mod1/DIO7ArbitrationForOutputData=NeverArbitrate;resource=/crio_Mod1/DIO7;0;ReadMethodType=bool;WriteMethodType=boolMod1NI 9401,Slot 1,1,cRIOModule.DIO3_0InitialDir=0,cRIOModule.DIO7_4InitialDir=0,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.NumSyncRegs=11111111Mod2/AI0resource=/crio_Mod2/AI0;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI10resource=/crio_Mod2/AI10;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI11resource=/crio_Mod2/AI11;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI12resource=/crio_Mod2/AI12;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI13resource=/crio_Mod2/AI13;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI14resource=/crio_Mod2/AI14;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI15resource=/crio_Mod2/AI15;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI16resource=/crio_Mod2/AI16;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI17resource=/crio_Mod2/AI17;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI18resource=/crio_Mod2/AI18;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI19resource=/crio_Mod2/AI19;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI1resource=/crio_Mod2/AI1;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI20resource=/crio_Mod2/AI20;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI21resource=/crio_Mod2/AI21;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI22resource=/crio_Mod2/AI22;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI23resource=/crio_Mod2/AI23;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI24resource=/crio_Mod2/AI24;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI25resource=/crio_Mod2/AI25;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI26resource=/crio_Mod2/AI26;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI27resource=/crio_Mod2/AI27;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI28resource=/crio_Mod2/AI28;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI29resource=/crio_Mod2/AI29;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI2resource=/crio_Mod2/AI2;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI30resource=/crio_Mod2/AI30;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI31resource=/crio_Mod2/AI31;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI3resource=/crio_Mod2/AI3;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI4resource=/crio_Mod2/AI4;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI5resource=/crio_Mod2/AI5;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI6resource=/crio_Mod2/AI6;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI7resource=/crio_Mod2/AI7;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI8resource=/crio_Mod2/AI8;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/AI9resource=/crio_Mod2/AI9;0;ReadMethodType=vi.lib\LabVIEW Targets\FPGA\cRIO\shared\nicrio_FXP_Controls\nicrio_FXP_S_26_5.ctlMod2/DI0resource=/crio_Mod2/DI0;0;ReadMethodType=boolMod2/DO0resource=/crio_Mod2/DO0;0;WriteMethodType=boolMod2/Trigresource=/crio_Mod2/Trig;0;ReadMethodType=boolMod2NI 9205,Slot 2,1,cRIOModule.AI0.TerminalMode=0,cRIOModule.AI0.VoltageRange=0,cRIOModule.AI1.TerminalMode=0,cRIOModule.AI1.VoltageRange=0,cRIOModule.AI10.TerminalMode=0,cRIOModule.AI10.VoltageRange=0,cRIOModule.AI11.TerminalMode=0,cRIOModule.AI11.VoltageRange=0,cRIOModule.AI12.TerminalMode=0,cRIOModule.AI12.VoltageRange=0,cRIOModule.AI13.TerminalMode=0,cRIOModule.AI13.VoltageRange=0,cRIOModule.AI14.TerminalMode=0,cRIOModule.AI14.VoltageRange=0,cRIOModule.AI15.TerminalMode=0,cRIOModule.AI15.VoltageRange=0,cRIOModule.AI16.TerminalMode=0,cRIOModule.AI16.VoltageRange=0,cRIOModule.AI17.TerminalMode=0,cRIOModule.AI17.VoltageRange=0,cRIOModule.AI18.TerminalMode=0,cRIOModule.AI18.VoltageRange=0,cRIOModule.AI19.TerminalMode=0,cRIOModule.AI19.VoltageRange=0,cRIOModule.AI2.TerminalMode=0,cRIOModule.AI2.VoltageRange=0,cRIOModule.AI20.TerminalMode=0,cRIOModule.AI20.VoltageRange=0,cRIOModule.AI21.TerminalMode=0,cRIOModule.AI21.VoltageRange=0,cRIOModule.AI22.TerminalMode=0,cRIOModule.AI22.VoltageRange=0,cRIOModule.AI23.TerminalMode=0,cRIOModule.AI23.VoltageRange=0,cRIOModule.AI24.TerminalMode=0,cRIOModule.AI24.VoltageRange=0,cRIOModule.AI25.TerminalMode=0,cRIOModule.AI25.VoltageRange=0,cRIOModule.AI26.TerminalMode=0,cRIOModule.AI26.VoltageRange=0,cRIOModule.AI27.TerminalMode=0,cRIOModule.AI27.VoltageRange=0,cRIOModule.AI28.TerminalMode=0,cRIOModule.AI28.VoltageRange=0,cRIOModule.AI29.TerminalMode=0,cRIOModule.AI29.VoltageRange=0,cRIOModule.AI3.TerminalMode=0,cRIOModule.AI3.VoltageRange=0,cRIOModule.AI30.TerminalMode=0,cRIOModule.AI30.VoltageRange=0,cRIOModule.AI31.TerminalMode=0,cRIOModule.AI31.VoltageRange=0,cRIOModule.AI4.TerminalMode=0,cRIOModule.AI4.VoltageRange=0,cRIOModule.AI5.TerminalMode=0,cRIOModule.AI5.VoltageRange=0,cRIOModule.AI6.TerminalMode=0,cRIOModule.AI6.VoltageRange=0,cRIOModule.AI7.TerminalMode=0,cRIOModule.AI7.VoltageRange=0,cRIOModule.AI8.TerminalMode=0,cRIOModule.AI8.VoltageRange=0,cRIOModule.AI9.TerminalMode=0,cRIOModule.AI9.VoltageRange=0,cRIOModule.EnableCalProperties=false,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.MinConvTime=8.000000E+0Mod3/DO0resource=/crio_Mod3/DO0;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO10resource=/crio_Mod3/DO10;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO11resource=/crio_Mod3/DO11;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO12resource=/crio_Mod3/DO12;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO13resource=/crio_Mod3/DO13;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO14resource=/crio_Mod3/DO14;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO15:0resource=/crio_Mod3/DO15:0;0;ReadMethodType=u16;WriteMethodType=u16Mod3/DO15:8resource=/crio_Mod3/DO15:8;0;ReadMethodType=u8;WriteMethodType=u8Mod3/DO15resource=/crio_Mod3/DO15;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO1resource=/crio_Mod3/DO1;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO2resource=/crio_Mod3/DO2;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO3resource=/crio_Mod3/DO3;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO4resource=/crio_Mod3/DO4;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO5resource=/crio_Mod3/DO5;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO6resource=/crio_Mod3/DO6;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO7:0resource=/crio_Mod3/DO7:0;0;ReadMethodType=u8;WriteMethodType=u8Mod3/DO7resource=/crio_Mod3/DO7;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO8resource=/crio_Mod3/DO8;0;ReadMethodType=bool;WriteMethodType=boolMod3/DO9resource=/crio_Mod3/DO9;0;ReadMethodType=bool;WriteMethodType=boolMod3NI 9478,Slot 3,1,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.kInitCurrentLimitSel="01010101010101010101010101010101",cRIOModule.kInitLimitA=60,cRIOModule.kInitLimitAFloat=1.200000E+0,cRIOModule.kInitLimitB=60,cRIOModule.kInitLimitBFloat=1.200000E+0,cRIOModule.kInitRefreshPeriod=0Scan Clockresource=/Scan Clock;0;ReadMethodType=boolSleepresource=/Sleep;0;ReadMethodType=bool;WriteMethodType=boolSystem Resetresource=/System Reset;0;ReadMethodType=bool;WriteMethodType=bool O:\PortTestTool-V2\LabviewVI\FPGA Bitfiles\FIFOTest.lvproj_FPGA Target_Basic DMA (FPGA).vi.lvbitx {8B77B965-764C-455A-A2A2-78ABABA55500} ResourceName=40 MHz Onboard Clock;TopSignalConnect=Clk40;ClockSignalName=Clk40;MinFreq=40000000.000000;MaxFreq=40000000.000000;VariableFreq=0;NomFreq=40000000.000000;PeakPeriodJitter=250.000000;MinDutyCycle=50.000000;MaxDutyCycle=50.000000;Accuracy=100.000000;RunTime=0;SpreadSpectrum=0;GenericDataHash=D41D8CD98F00B204E9800998ECF8427E 100 Clk40 50 40000000 50 40000000 40000000 250 40 MHz Onboard Clock false Clk40 false true 4 1 Slot 1 false true NI 9401 0 0 11111111 {3F5F715E-7526-465B-AB10-18884DCA81DE} 1 Slot 2 false false NI 9205 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 false 8.000000E+0 {897AB7E4-33DD-4437-8318-8BDA4262A678} 1 Slot 3 false false NI 9478 "01010101010101010101010101010101" 60 1.200000E+0 60 1.200000E+0 0 {0DC35E8F-25E5-4129-909A-BB3D50522BF5} {2185D3E0-B785-4F92-A76B-5D00D930DBB6}resource=/crio_Analog Input Module/AI0;0;ReadMethodType=i16{6D544BD9-023D-43CE-9AED-AA4DF2C08516}NI 9201,Slot 1,0,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.MinConvTime=2.000000{EA068E54-7D64-4692-A52D-30170E64DF3A}"NumberOfElements=1023;DataType=7;Type=2;ReadArbs=Arbitrate if Multiple Requestors Only;WriteArbs=Arbitrate if Multiple Requestors Only;Implementation=2;DMA FIFO;FxpWordLength=32;FxpIntWordLength=32;FxpSigned=FALSE;FxpMin=0.000000;FxpMax=4294967295.000000;FxpDelta=1.000000"cRIO-9101//falseTARGET_TYPEFPGA AI0resource=/crio_Analog Input Module/AI0;0;ReadMethodType=i16Analog Input ModuleNI 9201,Slot 1,0,cRIOModule.EnableHsInput=false,cRIOModule.EnableHsOutput=false,cRIOModule.MinConvTime=2.000000cRIO-9101//falseTARGET_TYPEFPGADMA FIFO"NumberOfElements=1023;DataType=7;Type=2;ReadArbs=Arbitrate if Multiple Requestors Only;WriteArbs=Arbitrate if Multiple Requestors Only;Implementation=2;DMA FIFO;FxpWordLength=32;FxpIntWordLength=32;FxpSigned=FALSE;FxpMin=0.000000;FxpMax=4294967295.000000;FxpDelta=1.000000" true