// Signals daisy chain configuration functions
// *******************************************
// for some signals in Tortola, there are several possible pad input sources.
// these functions deal with each of those, assuring that everry mux in the way
// from pad to signal gets the select value you need it to get.
// the functions are in format of daisy_chain_<signal>_via_<PAD_NAME>.
// where <signal> is the signal you need, and <PAD_NAME> is the pad you want to use as input.
// the function enables the proper mode for the desired pad, and disables the coresponding
// modes in contesting pads.
// note that the function might also turn off HW modes for contesting pads, so more pads
// might be affected.
// for example, daisy_chain_ipp_ind_otg_data_4_via_RXD1 will put USBOTG_DATA4 out of functional
// mode, put RXD1 in alternate mode, and will also lower pgp_usb_common so to disable RI_DCE1
// HW access. This will also affect DCD_DCE1, as pgp_usb_common is the control signal for its
// HW mode as well.
//
// contact: giladb, RM96492, FIL
 

#include "functions.h"
#include "gp_reg_setting.h"
//#define GPIO 0x1
#define FUNC 0x2
#define ALT1 0x4
#define ALT2 0x8

WORD position(WORD byte_in_sw_mux) { //helper function
    switch (byte_in_sw_mux) {
        case 0: return 0x1;
        case 1: return 0x100;
        case 2: return 0x10000;
        case 3: return 0x1000000;
    }
}
      
void daisy_chain_ipp_cspi1_clk_in_via_CSPI1_SCLK() {
reg32_write_mask(CSPI1_SCLK_SW_MUX_REG,0xffffffff,FUNC*position(CSPI1_SCLK_BYTE_IN_SW_MUX));
reg32_write_mask(DSR_DCE1_SW_MUX_REG,0x00000000,ALT1*position(DSR_DCE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_cspi1_clk_in_via_DSR_DCE1() {
reg32_write_mask(CSPI1_SCLK_SW_MUX_REG,0x00000000,FUNC*position(CSPI1_SCLK_BYTE_IN_SW_MUX));
reg32_write_mask(DSR_DCE1_SW_MUX_REG,0xffffffff,ALT1*position(DSR_DCE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_cspi1_ind_dataready_b_via_CSPI1_SPI_RDY() {
reg32_write_mask(CSPI1_SPI_RDY_SW_MUX_REG,0xffffffff,FUNC*position(CSPI1_SPI_RDY_BYTE_IN_SW_MUX));
reg32_write_mask(RI_DCE1_SW_MUX_REG,0x00000000,ALT1*position(RI_DCE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_cspi1_ind_dataready_b_via_RI_DCE1() {
reg32_write_mask(CSPI1_SPI_RDY_SW_MUX_REG,0x00000000,FUNC*position(CSPI1_SPI_RDY_BYTE_IN_SW_MUX));
reg32_write_mask(RI_DCE1_SW_MUX_REG,0xffffffff,ALT1*position(RI_DCE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_cspi1_ind_miso_via_CSPI1_MISO() {
reg32_write_mask(CSPI1_MISO_SW_MUX_REG,0xffffffff,FUNC*position(CSPI1_MISO_BYTE_IN_SW_MUX));
pgp_cspi_bb_disable;
}

void daisy_chain_ipp_cspi1_ind_miso_via_DSR_DTE1() {
reg32_write_mask(CSPI1_MISO_SW_MUX_REG,0x00000000,FUNC*position(CSPI1_MISO_BYTE_IN_SW_MUX));
pgp_cspi_bb_enable;
}

void daisy_chain_ipp_cspi1_ind_mosi_via_CSPI1_MOSI() {
reg32_write_mask(CSPI1_MOSI_SW_MUX_REG,0xffffffff,FUNC*position(CSPI1_MOSI_BYTE_IN_SW_MUX));
pgp_cspi_bb_disable;
}

void daisy_chain_ipp_cspi1_ind_mosi_via_DTR_DTE1() {
reg32_write_mask(CSPI1_MOSI_SW_MUX_REG,0x00000000,FUNC*position(CSPI1_MOSI_BYTE_IN_SW_MUX));
pgp_cspi_bb_enable;
}

void daisy_chain_ipp_cspi1_ind_ss0_b_via_CSPI1_SS0() {
reg32_write_mask(CSPI1_SS0_SW_MUX_REG,0xffffffff,FUNC*position(CSPI1_SS0_BYTE_IN_SW_MUX));
pgp_cspi_bb_disable;
}

void daisy_chain_ipp_cspi1_ind_ss0_b_via_RI_DTE1() {
reg32_write_mask(CSPI1_SS0_SW_MUX_REG,0x00000000,FUNC*position(CSPI1_SS0_BYTE_IN_SW_MUX));
pgp_cspi_bb_enable;
}

void daisy_chain_ipp_cspi1_ind_ss1_b_via_CSPI1_SS1() {
reg32_write_mask(CSPI1_SS1_SW_MUX_REG,0xffffffff,FUNC*position(CSPI1_SS1_BYTE_IN_SW_MUX));
pgp_cspi_bb_disable;
}

void daisy_chain_ipp_cspi1_ind_ss1_b_via_DCD_DTE1() {
reg32_write_mask(CSPI1_SS1_SW_MUX_REG,0x00000000,FUNC*position(CSPI1_SS1_BYTE_IN_SW_MUX));
pgp_cspi_bb_enable;
}

void daisy_chain_ipp_cspi1_ind_ss2_b_via_CSPI1_SS2() {
reg32_write_mask(CSPI1_SS2_SW_MUX_REG,0xffffffff,FUNC*position(CSPI1_SS2_BYTE_IN_SW_MUX));
pgp_cspi_bb_disable;
}

void daisy_chain_ipp_cspi1_ind_ss2_b_via_DTR_DCE2() {
reg32_write_mask(CSPI1_SS2_SW_MUX_REG,0x00000000,FUNC*position(CSPI1_SS2_BYTE_IN_SW_MUX));
pgp_cspi_bb_enable;
}

void daisy_chain_ipp_cspi1_ind_ss3_b_via_CSPI2_SS1() {
reg32_write_mask(DCD_DCE1_SW_MUX_REG,0x00000000,ALT1*position(DCD_DCE1_BYTE_IN_SW_MUX));
reg32_write_mask(CSPI2_SS1_SW_MUX_REG,0xffffffff,ALT2*position(CSPI2_SS1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_cspi1_ind_ss3_b_via_DCD_DCE1() {
reg32_write_mask(DCD_DCE1_SW_MUX_REG,0xffffffff,ALT1*position(DCD_DCE1_BYTE_IN_SW_MUX));
reg32_write_mask(CSPI2_SS1_SW_MUX_REG,0x00000000,ALT2*position(CSPI2_SS1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_i2c2_scl_in_via_RI_DTE1() {
reg32_write_mask(CSPI2_MOSI_SW_MUX_REG,0x00000000,ALT1*position(CSPI2_MOSI_BYTE_IN_SW_MUX));
reg32_write_mask(RI_DTE1_SW_MUX_REG,0xffffffff,ALT2*position(RI_DTE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_i2c2_scl_in_via_CSPI2_MOSI() {
reg32_write_mask(CSPI2_MOSI_SW_MUX_REG,0xffffffff,ALT1*position(CSPI2_MOSI_BYTE_IN_SW_MUX));
reg32_write_mask(RI_DTE1_SW_MUX_REG,0x00000000,ALT2*position(RI_DTE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_i2c2_sda_in_via_DCD_DTE1() {
reg32_write_mask(CSPI2_MISO_SW_MUX_REG,0x00000000,ALT1*position(CSPI2_MISO_BYTE_IN_SW_MUX));
reg32_write_mask(DCD_DTE1_SW_MUX_REG,0xffffffff,ALT2*position(DCD_DTE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_i2c2_sda_in_via_CSPI2_MISO() {
reg32_write_mask(CSPI2_MISO_SW_MUX_REG,0xffffffff,ALT1*position(CSPI2_MISO_BYTE_IN_SW_MUX));
reg32_write_mask(DCD_DTE1_SW_MUX_REG,0x00000000,ALT2*position(DCD_DTE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_ind_dispb_sd_d_via_SD_D_IO() {
reg32_write_mask(SD_D_IO_SW_MUX_REG,0xffffffff,FUNC*position(SD_D_IO_BYTE_IN_SW_MUX));
reg32_write_mask(ATA_RESET_B_SW_MUX_REG,0x00000000,ALT1*position(ATA_RESET_B_BYTE_IN_SW_MUX));
reg32_write_mask(SD_D_I_SW_MUX_REG,0x00000000,ALT2*position(SD_D_I_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_ind_dispb_sd_d_via_SD_D_I() {
reg32_write_mask(SD_D_IO_SW_MUX_REG,0x00000000,FUNC*position(SD_D_IO_BYTE_IN_SW_MUX));
reg32_write_mask(ATA_RESET_B_SW_MUX_REG,0x00000000,ALT1*position(ATA_RESET_B_BYTE_IN_SW_MUX));
reg32_write_mask(SD_D_I_SW_MUX_REG,0xffffffff,ALT2*position(SD_D_I_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_ind_dispb_sd_d_via_ATA_RESET_B() {
reg32_write_mask(SD_D_IO_SW_MUX_REG,0x00000000,FUNC*position(SD_D_IO_BYTE_IN_SW_MUX));
reg32_write_mask(ATA_RESET_B_SW_MUX_REG,0xffffffff,ALT1*position(ATA_RESET_B_BYTE_IN_SW_MUX));
reg32_write_mask(SD_D_I_SW_MUX_REG,0x00000000,ALT2*position(SD_D_I_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_ind_firi_rxd_via_RXD2() {
pgp_firi_enable;
}

void daisy_chain_ipp_ind_otg_data_3_via_USBOTG_DATA3() {
reg32_write_mask(USBOTG_DATA3_SW_MUX_REG,0xffffffff,FUNC*position(USBOTG_DATA3_BYTE_IN_SW_MUX));
pgp_usb_4wire_disable;
}

void daisy_chain_ipp_ind_otg_data_3_via_DSR_DCE1() {
reg32_write_mask(USBOTG_DATA3_SW_MUX_REG,0x00000000,FUNC*position(USBOTG_DATA3_BYTE_IN_SW_MUX));
pgp_usb_4wire_enable;
}

void daisy_chain_ipp_ind_otg_data_4_via_RXD1() {
reg32_write_mask(USBOTG_DATA4_SW_MUX_REG,0x00000000,FUNC*position(USBOTG_DATA4_BYTE_IN_SW_MUX));
reg32_write_mask(RXD1_SW_MUX_REG,0xffffffff,ALT1*position(RXD1_BYTE_IN_SW_MUX));
pgp_usb_common_disable;
}

void daisy_chain_ipp_ind_otg_data_4_via_RI_DCE1() {
reg32_write_mask(USBOTG_DATA4_SW_MUX_REG,0x00000000,FUNC*position(USBOTG_DATA4_BYTE_IN_SW_MUX));
reg32_write_mask(RXD1_SW_MUX_REG,0x00000000,ALT1*position(RXD1_BYTE_IN_SW_MUX));
pgp_usb_common_enable;
}

void daisy_chain_ipp_ind_otg_data_4_via_USBOTG_DATA4() {
reg32_write_mask(USBOTG_DATA4_SW_MUX_REG,0xffffffff,FUNC*position(USBOTG_DATA4_BYTE_IN_SW_MUX));
reg32_write_mask(RXD1_SW_MUX_REG,0x00000000,ALT1*position(RXD1_BYTE_IN_SW_MUX));
pgp_usb_common_disable;
}

void daisy_chain_ipp_ind_otg_data_5_via_USBOTG_DATA5() {
reg32_write_mask(USBOTG_DATA5_SW_MUX_REG,0xffffffff,FUNC*position(USBOTG_DATA5_BYTE_IN_SW_MUX));
pgp_usb_common_disable;
}

void daisy_chain_ipp_ind_otg_data_5_via_DCD_DCE1() {
reg32_write_mask(USBOTG_DATA5_SW_MUX_REG,0x00000000,FUNC*position(USBOTG_DATA5_BYTE_IN_SW_MUX));
pgp_usb_common_enable;
}

void daisy_chain_ipp_ind_uh2_data_2_via_NFWE_B() {
reg32_write_mask(PC_VS2_SW_MUX_REG,0x00000000,ALT1*position(PC_VS2_BYTE_IN_SW_MUX));
reg32_write_mask(NFWE_B_SW_MUX_REG,0xffffffff,ALT2*position(NFWE_B_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_2_via_PC_VS2() {
reg32_write_mask(PC_VS2_SW_MUX_REG,0xffffffff,ALT1*position(PC_VS2_BYTE_IN_SW_MUX));
reg32_write_mask(NFWE_B_SW_MUX_REG,0x00000000,ALT2*position(NFWE_B_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_2_via_STXD3() {
reg32_write_mask(PC_VS2_SW_MUX_REG,0x00000000,ALT1*position(PC_VS2_BYTE_IN_SW_MUX));
reg32_write_mask(NFWE_B_SW_MUX_REG,0x00000000,ALT2*position(NFWE_B_BYTE_IN_SW_MUX));
pgp_uh2_enable;
}

void daisy_chain_ipp_ind_uh2_data_3_via_NFRE_B() {
reg32_write_mask(PC_BVD1_SW_MUX_REG,0x00000000,ALT1*position(PC_BVD1_BYTE_IN_SW_MUX));
reg32_write_mask(NFRE_B_SW_MUX_REG,0xffffffff,ALT2*position(NFRE_B_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_3_via_PC_BVD1() {
reg32_write_mask(PC_BVD1_SW_MUX_REG,0xffffffff,ALT1*position(PC_BVD1_BYTE_IN_SW_MUX));
reg32_write_mask(NFRE_B_SW_MUX_REG,0x00000000,ALT2*position(NFRE_B_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_3_via_SRXD3() {
reg32_write_mask(PC_BVD1_SW_MUX_REG,0x00000000,ALT1*position(PC_BVD1_BYTE_IN_SW_MUX));
reg32_write_mask(NFRE_B_SW_MUX_REG,0x00000000,ALT2*position(NFRE_B_BYTE_IN_SW_MUX));
pgp_uh2_enable;
}

void daisy_chain_ipp_ind_uh2_data_4_via_NFALE() {
reg32_write_mask(PC_BVD2_SW_MUX_REG,0x00000000,ALT1*position(PC_BVD2_BYTE_IN_SW_MUX));
reg32_write_mask(NFALE_SW_MUX_REG,0xffffffff,ALT2*position(NFALE_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_4_via_PC_BVD2() {
reg32_write_mask(PC_BVD2_SW_MUX_REG,0xffffffff,ALT1*position(PC_BVD2_BYTE_IN_SW_MUX));
reg32_write_mask(NFALE_SW_MUX_REG,0x00000000,ALT2*position(NFALE_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_4_via_SCK3() {
reg32_write_mask(PC_BVD2_SW_MUX_REG,0x00000000,ALT1*position(PC_BVD2_BYTE_IN_SW_MUX));
reg32_write_mask(NFALE_SW_MUX_REG,0x00000000,ALT2*position(NFALE_BYTE_IN_SW_MUX));
pgp_uh2_enable;
}

void daisy_chain_ipp_ind_uh2_data_5_via_NFCLE() {
reg32_write_mask(PC_RST_SW_MUX_REG,0x00000000,ALT1*position(PC_RST_BYTE_IN_SW_MUX));
reg32_write_mask(NFCLE_SW_MUX_REG,0xffffffff,ALT2*position(NFCLE_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_5_via_PC_RST() {
reg32_write_mask(PC_RST_SW_MUX_REG,0xffffffff,ALT1*position(PC_RST_BYTE_IN_SW_MUX));
reg32_write_mask(NFCLE_SW_MUX_REG,0x00000000,ALT2*position(NFCLE_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_5_via_SFS3() {
reg32_write_mask(PC_RST_SW_MUX_REG,0x00000000,ALT1*position(PC_RST_BYTE_IN_SW_MUX));
reg32_write_mask(NFCLE_SW_MUX_REG,0x00000000,ALT2*position(NFCLE_BYTE_IN_SW_MUX));
pgp_uh2_enable;
}

void daisy_chain_ipp_ind_uh2_data_6_via_IOIS16() {
reg32_write_mask(IOIS16_SW_MUX_REG,0xffffffff,ALT1*position(IOIS16_BYTE_IN_SW_MUX));
reg32_write_mask(NFWP_B_SW_MUX_REG,0x00000000,ALT2*position(NFWP_B_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_6_via_STXD6() {
reg32_write_mask(IOIS16_SW_MUX_REG,0x00000000,ALT1*position(IOIS16_BYTE_IN_SW_MUX));
reg32_write_mask(NFWP_B_SW_MUX_REG,0x00000000,ALT2*position(NFWP_B_BYTE_IN_SW_MUX));
pgp_uh2_enable;
}

void daisy_chain_ipp_ind_uh2_data_6_via_NFWP_B() {
reg32_write_mask(IOIS16_SW_MUX_REG,0x00000000,ALT1*position(IOIS16_BYTE_IN_SW_MUX));
reg32_write_mask(NFWP_B_SW_MUX_REG,0xffffffff,ALT2*position(NFWP_B_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_7_via_NFCE_B() {
reg32_write_mask(PC_RW_B_SW_MUX_REG,0x00000000,ALT1*position(PC_RW_B_BYTE_IN_SW_MUX));
reg32_write_mask(NFCE_B_SW_MUX_REG,0xffffffff,ALT2*position(NFCE_B_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_7_via_PC_RW_B() {
reg32_write_mask(PC_RW_B_SW_MUX_REG,0xffffffff,ALT1*position(PC_RW_B_BYTE_IN_SW_MUX));
reg32_write_mask(NFCE_B_SW_MUX_REG,0x00000000,ALT2*position(NFCE_B_BYTE_IN_SW_MUX));
pgp_uh2_disable;
}

void daisy_chain_ipp_ind_uh2_data_7_via_SRXD6() {
reg32_write_mask(PC_RW_B_SW_MUX_REG,0x00000000,ALT1*position(PC_RW_B_BYTE_IN_SW_MUX));
reg32_write_mask(NFCE_B_SW_MUX_REG,0x00000000,ALT2*position(NFCE_B_BYTE_IN_SW_MUX));
pgp_uh2_enable;
}

void daisy_chain_ipp_ind_wp_via_IOIS16() {
reg32_write_mask(IOIS16_SW_MUX_REG,0xffffffff,FUNC*position(IOIS16_BYTE_IN_SW_MUX));
reg32_write_mask(NFWP_B_SW_MUX_REG,0x00000000,ALT1*position(NFWP_B_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_ind_wp_via_NFWP_B() {
reg32_write_mask(IOIS16_SW_MUX_REG,0x00000000,FUNC*position(IOIS16_BYTE_IN_SW_MUX));
reg32_write_mask(NFWP_B_SW_MUX_REG,0xffffffff,ALT1*position(NFWP_B_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart1_rts_b_via_RTS1() {
reg32_write_mask(RTS1_SW_MUX_REG,0xffffffff,FUNC*position(RTS1_BYTE_IN_SW_MUX));
reg32_write_mask(DCD_DCE1_SW_MUX_REG,0x00000000,ALT2*position(DCD_DCE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart1_rts_b_via_DCD_DCE1() {
reg32_write_mask(RTS1_SW_MUX_REG,0x00000000,FUNC*position(RTS1_BYTE_IN_SW_MUX));
reg32_write_mask(DCD_DCE1_SW_MUX_REG,0xffffffff,ALT2*position(DCD_DCE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart1_rxd_mux_via_RXD1() {
reg32_write_mask(RXD1_SW_MUX_REG,0xffffffff,FUNC*position(RXD1_BYTE_IN_SW_MUX));
reg32_write_mask(RI_DCE1_SW_MUX_REG,0x00000000,ALT2*position(RI_DCE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart1_rxd_mux_via_RI_DCE1() {
reg32_write_mask(RXD1_SW_MUX_REG,0x00000000,FUNC*position(RXD1_BYTE_IN_SW_MUX));
reg32_write_mask(RI_DCE1_SW_MUX_REG,0xffffffff,ALT2*position(RI_DCE1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart3_rts_b_via_CSPI1_SCLK() {
reg32_write_mask(CSPI3_SCLK_SW_MUX_REG,0x00000000,ALT1*position(CSPI3_SCLK_BYTE_IN_SW_MUX));
reg32_write_mask(CSPI1_SCLK_SW_MUX_REG,0xffffffff,ALT2*position(CSPI1_SCLK_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart3_rts_b_via_CSPI3_SCLK() {
reg32_write_mask(CSPI3_SCLK_SW_MUX_REG,0xffffffff,ALT1*position(CSPI3_SCLK_BYTE_IN_SW_MUX));
reg32_write_mask(CSPI1_SCLK_SW_MUX_REG,0x00000000,ALT2*position(CSPI1_SCLK_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart3_rxd_mux_via_CSPI1_MOSI() {
reg32_write_mask(CSPI3_MOSI_SW_MUX_REG,0x00000000,ALT1*position(CSPI3_MOSI_BYTE_IN_SW_MUX));
reg32_write_mask(CSPI1_MOSI_SW_MUX_REG,0xffffffff,ALT2*position(CSPI1_MOSI_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart3_rxd_mux_via_CSPI3_MOSI() {
reg32_write_mask(CSPI3_MOSI_SW_MUX_REG,0xffffffff,ALT1*position(CSPI3_MOSI_BYTE_IN_SW_MUX));
reg32_write_mask(CSPI1_MOSI_SW_MUX_REG,0x00000000,ALT2*position(CSPI1_MOSI_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart4_rts_b_via_USBOTG_DATA5() {
reg32_write_mask(ATA_CS1_SW_MUX_REG,0x00000000,ALT1*position(ATA_CS1_BYTE_IN_SW_MUX));
reg32_write_mask(USBOTG_DATA5_SW_MUX_REG,0xffffffff,ALT2*position(USBOTG_DATA5_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart4_rts_b_via_ATA_CS1() {
reg32_write_mask(ATA_CS1_SW_MUX_REG,0xffffffff,ALT1*position(ATA_CS1_BYTE_IN_SW_MUX));
reg32_write_mask(USBOTG_DATA5_SW_MUX_REG,0x00000000,ALT2*position(USBOTG_DATA5_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart4_rxd_mux_via_USBOTG_DATA3() {
reg32_write_mask(ATA_CS0_SW_MUX_REG,0x00000000,ALT1*position(ATA_CS0_BYTE_IN_SW_MUX));
reg32_write_mask(USBOTG_DATA3_SW_MUX_REG,0xffffffff,ALT2*position(USBOTG_DATA3_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart4_rxd_mux_via_ATA_CS0() {
reg32_write_mask(ATA_CS0_SW_MUX_REG,0xffffffff,ALT1*position(ATA_CS0_BYTE_IN_SW_MUX));
reg32_write_mask(USBOTG_DATA3_SW_MUX_REG,0x00000000,ALT2*position(USBOTG_DATA3_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart5_rts_b_via_PC_VS2() {
reg32_write_mask(USBH2_CLK_SW_MUX_REG,0x00000000,ALT1*position(USBH2_CLK_BYTE_IN_SW_MUX));
reg32_write_mask(PC_VS2_SW_MUX_REG,0xffffffff,ALT2*position(PC_VS2_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart5_rts_b_via_USBH2_CLK() {
reg32_write_mask(USBH2_CLK_SW_MUX_REG,0xffffffff,ALT1*position(USBH2_CLK_BYTE_IN_SW_MUX));
reg32_write_mask(PC_VS2_SW_MUX_REG,0x00000000,ALT2*position(PC_VS2_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart5_rxd_mux_via_PC_BVD1() {
reg32_write_mask(USBH2_DIR_SW_MUX_REG,0x00000000,ALT1*position(USBH2_DIR_BYTE_IN_SW_MUX));
reg32_write_mask(PC_BVD1_SW_MUX_REG,0xffffffff,ALT2*position(PC_BVD1_BYTE_IN_SW_MUX));
}

void daisy_chain_ipp_uart5_rxd_mux_via_USBH2_DIR() {
reg32_write_mask(USBH2_DIR_SW_MUX_REG,0xffffffff,ALT1*position(USBH2_DIR_BYTE_IN_SW_MUX));
reg32_write_mask(PC_BVD1_SW_MUX_REG,0x00000000,ALT2*position(PC_BVD1_BYTE_IN_SW_MUX));
}