//------------------------------------------------------------------------------
//
//  Copyright (C) 2007, Freescale Semiconductor, Inc. All Rights Reserved.
//  THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS
//  AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT
//
//------------------------------------------------------------------------------
//
//  File:  adc.h
//
//  local header file.
//
//------------------------------------------------------------------------------
#ifdef PLAT_PMC
#include <pmcdisplay.h>
#endif
#include "display_vf.h"

#ifndef __ADC_H__
#define __ADC_H__

#ifdef __cplusplus
extern "C" {
#endif

//------------------------------------------------------------------------------
// Defines

#define LCD_CONTRAST_MIN            0x00000000
#define LCD_CONTRAST_MAX            0x000000FF
#define LCD_CONTRAST_DEFAULT        0x0000007F
#define LCD_CONTRAST_STEP           0x00000001


// Panel Command Opcodes

//Espon smart LCD L5F30xxxT00 commands
#define CMD_NOP                     0x00  //NOP
#define CMD_RDID                    0x04  //RDID
#define CMD_SLPIN                   0x10  //SLPIN
#define CMD_SLPOUT                  0x11  //SPLOUT
#define CMD_NORON                   0x13  //NORON
#define CMD_GAMSET                  0x26  //GAMSET
#define CMD_DISOFF                  0x28  //DISOFF
#define CMD_DISON                   0x29  //DISON
#define CMD_CASET                   0x2A  //CASET
#define CMD_RASET                   0x2B  //RASET
#define CMD_RAMWR                   0x2C  //RAMWR
#define CMD_RAMRD                   0x2E  //RAMRD
#define CMD_PTLAR                   0x30  //PTLAR
#define CMD_SCRLAR                  0x33  //SCRLAR
#define CMD_TEON                    0x35  //TEON
#define CMD_MADCTL                  0x36  //MADCTL
#define CMD_VSCSAD                  0x37  //VSCSAD
#define CMD_IDMOFF                  0x38  //IDMOFF
#define CMD_COLMOD                  0x3A  //COLMOD
#define CMD_PFR1                    0x3C  //PFR1
#define CMD_PFR2                    0x3D  //PFR2
#define CMD_PFR3                    0x3E  //PFR3
#define CMD_MTPLOAD                 0xDE  //MTPLOAD

#define CMD_TEST                    0xFB  //TEST
#define CMD_FRMCTR1                 0xB1  //FRMCTR1
#define CMD_FRMCTR2                 0xB2  //FRMCTR2
#define CMD_FRMCTR3                 0xB3  //FRMCTR3
#define CMD_INVCTR                  0xB4  //INVCTR
#define CMD_DISSET5                 0xB6  //DISSET5
#define CMD_PWCTR1                  0xC0  //PWCTR1
#define CMD_PWCTR2                  0xC1  //PWCTR2
#define CMD_PWCTR3                  0xC2  //PWCTR3
#define CMD_PWCTR4                  0xC3  //PWCTR4
#define CMD_PWCTR5                  0xC4  //PWCTR5
#define CMD_VMCTR1                  0xC5  //VMCTR1
#define CMD_VMCTR2                  0xC6  //VMCTR2
#define CMD_RDID1                   0xDA  //RDID1
#define CMD_RDID2                   0xDB  //RDID2
#define CMD_RDID3                   0xDC  //RDID3
#define CMD_GMCTRP1                 0xE0  //GMCTRP1
#define CMD_GMCTRP2                 0xE0  //GMCTRP2
#define CMD_GMCTRN1                 0xE1  //GMCTRN1
#define CMD_VSYNCOUT                0xBC  //VSYNCOUT
#define CMD_GCSET                   0x26  //GCSET
#define CMD_OSC                     0xF2  //OSC
#define CMD_DLC                     0xF8  //DLC


//Define template command opcodes
#define RD_DATA                     0x0
#define RD_ACK                      0x1
#define RD_WAIT                     0x2
#define WR_XADDR                    0x3
#define WR_YADDR                    0x4
#define WR_ADDR                     0x5
#define WR_CMND                     0x6
#define WR_DATA                     0x7

//Define template flow control commands
#define SINGLE_STEP                 0x0
#define PAUSE                       0x1
#define STOP                        0x2

#define ATM_ADDR_RANGE              0x20
#define ADBM_ADDR_RANGE             0x40

#define TEMPLATE_BUF_SIZE           32

#define RGB_666_FORMAT              0
#define RGB_565_FORMAT              1
#define RGB_444_FORMAT              2

//-----------------------------------------------------------------------------
// Types

// Field structure for Template commands
typedef struct
{
    unsigned Data:24,
             Opcode:3,
             FlowControl:2,
             RS:1,
             Reserved:2;
} TEMPLATE_CMD_REG_FIELDS;

// Register data union for TEMPLATE_CMD
typedef union
{
    TEMPLATE_CMD_REG_FIELDS reg;
    unsigned int data;
} TEMPLATE_CMD_REG;

//Post-Processing Data Width for RGB format
typedef enum ADC_SOURCE_ENUM
{
    ADC_SOURCE_SYS1 = 0,
    ADC_SOURCE_SYS2,
    ADC_SOURCE_PP,
    ADC_SOURCE_PRP
} ADC_SOURCE;

//------------------------------------------------------------------------------
// Functions


UINT32  InitializeADC(PANEL_INFO *currentPanel, int bpp);
void    EnableADC(void);
void    DisableADC(void);
void    ADCSetSrcBuffer(PHYSICAL_ADDRESS *pAddr);
void    ADCConfigDMA(PRECT rectangle, int bpp, int stride);
void    ADCStartDMA();
void    ADCEnableDMA();
void    ADCWriteConf(ADC_SOURCE);
void    ADCClearConf();
void    ADCDisableDMA();
void    ADCSetOffset(ADC_SOURCE src, LONG xPos, LONG yPos);
void    ADCWaitForVSync();
void    ADCEnableModules();
void    ADCDisableModules();
void    ADCWriteCommand(UINT32 dispNum, BOOL b_cmd_data, UINT32 cmd, UINT32* data, UINT32 numParams);



BOOL    ADCDisplayIsBusy();
void    ADCDisplayWaitForNotBusy();

#ifdef __cplusplus
}
#endif

#endif // __ADC_H__
