// // Copyright (c) Microsoft Corporation. All rights reserved. // // // Use of this source code is subject to the terms of the Microsoft end-user // license agreement (EULA) under which you licensed this SOFTWARE PRODUCT. // If you did not accept the terms of the EULA, you are not authorized to use // this source code. For a copy of the EULA, please see the LICENSE.RTF on your // install media. // //------------------------------------------------------------------------------ // // Copyright (C) 2004-2006, Freescale Semiconductor, Inc. All Rights Reserved. // THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS // AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT // //------------------------------------------------------------------------------ // // Header: bsp_gpio.h // // Provides GPIO interrupt and IO pin configuration macro specific i.MX31 Zoom Litekit. // //------------------------------------------------------------------------------ #ifndef __BSP_GPIO_H__ #define __BSP_GPIO_H__ #if __cplusplus extern "C" { #endif // GPIO ports number definition, only GPIO1, GPIO2 & GPIO3 3 ports. #define GPIO_PORT_MAX 3 #define DDK_IOMUX_SETTING(TYPE, mux) DDK_IOMUX_ ## TYPE ## _ ## mux #define GPIO_IOMUX_MCU1_0(TYPE) DDK_IOMUX_SETTING(TYPE, GPIO1_0) #define GPIO_IOMUX_MCU1_1(TYPE) DDK_IOMUX_SETTING(TYPE, GPIO1_1) #define GPIO_IOMUX_MCU1_2(TYPE) DDK_IOMUX_SETTING(TYPE, GPIO1_2) #define GPIO_IOMUX_MCU1_3(TYPE) DDK_IOMUX_SETTING(TYPE, GPIO1_3) #define GPIO_IOMUX_MCU1_4(TYPE) DDK_IOMUX_SETTING(TYPE, GPIO1_4) #define GPIO_IOMUX_MCU1_5(TYPE) DDK_IOMUX_SETTING(TYPE, GPIO1_5) #define GPIO_IOMUX_MCU1_6(TYPE) DDK_IOMUX_SETTING(TYPE, GPIO1_6) #define GPIO_IOMUX_MCU1_7(TYPE) DDK_IOMUX_SETTING(TYPE, CAPTURE) #define GPIO_IOMUX_MCU1_8(TYPE) DDK_IOMUX_SETTING(TYPE, COMPARE) #define GPIO_IOMUX_MCU1_9(TYPE) DDK_IOMUX_SETTING(TYPE, PWMO) #define GPIO_IOMUX_MCU1_10(TYPE) DDK_IOMUX_SETTING(TYPE, NFWE_B) #define GPIO_IOMUX_MCU1_11(TYPE) DDK_IOMUX_SETTING(TYPE, NFRE_B) #define GPIO_IOMUX_MCU1_12(TYPE) DDK_IOMUX_SETTING(TYPE, NFALE) #define GPIO_IOMUX_MCU1_13(TYPE) DDK_IOMUX_SETTING(TYPE, NFCLE) #define GPIO_IOMUX_MCU1_14(TYPE) DDK_IOMUX_SETTING(TYPE, NFWP_B) #define GPIO_IOMUX_MCU1_15(TYPE) DDK_IOMUX_SETTING(TYPE, NFCE_B) #define GPIO_IOMUX_MCU1_16(TYPE) DDK_IOMUX_SETTING(TYPE, NFRB) #define GPIO_IOMUX_MCU1_17(TYPE) DDK_IOMUX_SETTING(TYPE, STXD3) #define GPIO_IOMUX_MCU1_18(TYPE) DDK_IOMUX_SETTING(TYPE, SRXD3) #define GPIO_IOMUX_MCU1_19(TYPE) DDK_IOMUX_SETTING(TYPE, STXD4) #define GPIO_IOMUX_MCU1_20(TYPE) DDK_IOMUX_SETTING(TYPE, SRXD4) #define GPIO_IOMUX_MCU1_21(TYPE) DDK_IOMUX_SETTING(TYPE, STXD5) #define GPIO_IOMUX_MCU1_22(TYPE) DDK_IOMUX_SETTING(TYPE, SRXD5) #define GPIO_IOMUX_MCU1_23(TYPE) DDK_IOMUX_SETTING(TYPE, STXD6) #define GPIO_IOMUX_MCU1_24(TYPE) DDK_IOMUX_SETTING(TYPE, SRXD6) #define GPIO_IOMUX_MCU1_25(TYPE) DDK_IOMUX_SETTING(TYPE, SCK6) #define GPIO_IOMUX_MCU1_26(TYPE) DDK_IOMUX_SETTING(TYPE, SFS6) #define GPIO_IOMUX_MCU1_27(TYPE) DDK_IOMUX_SETTING(TYPE, RXD2) #define GPIO_IOMUX_MCU1_28(TYPE) DDK_IOMUX_SETTING(TYPE, TXD2) #define GPIO_IOMUX_MCU1_29(TYPE) DDK_IOMUX_SETTING(TYPE, USB_PWR) #define GPIO_IOMUX_MCU1_30(TYPE) DDK_IOMUX_SETTING(TYPE, USB_OC) #define GPIO_IOMUX_MCU1_31(TYPE) DDK_IOMUX_SETTING(TYPE, USB_BYP) #define GPIO_IOMUX_MCU2_0(TYPE) DDK_IOMUX_SETTING(TYPE, SVEN0) #define GPIO_IOMUX_MCU2_1(TYPE) DDK_IOMUX_SETTING(TYPE, STX0) #define GPIO_IOMUX_MCU2_2(TYPE) DDK_IOMUX_SETTING(TYPE, SRX0) #define GPIO_IOMUX_MCU2_3(TYPE) DDK_IOMUX_SETTING(TYPE, SIMPD0) #define GPIO_IOMUX_MCU2_4(TYPE) DDK_IOMUX_SETTING(TYPE, RXD1) #define GPIO_IOMUX_MCU2_5(TYPE) DDK_IOMUX_SETTING(TYPE, TXD1) #define GPIO_IOMUX_MCU2_6(TYPE) DDK_IOMUX_SETTING(TYPE, RTS1) #define GPIO_IOMUX_MCU2_7(TYPE) DDK_IOMUX_SETTING(TYPE, CTS1) #define GPIO_IOMUX_MCU2_8(TYPE) DDK_IOMUX_SETTING(TYPE, DTR_DCE1) #define GPIO_IOMUX_MCU2_9(TYPE) DDK_IOMUX_SETTING(TYPE, DSR_DCE1) #define GPIO_IOMUX_MCU2_10(TYPE) DDK_IOMUX_SETTING(TYPE, RI_DCE1) #define GPIO_IOMUX_MCU2_11(TYPE) DDK_IOMUX_SETTING(TYPE, DCD_DCE1) #define GPIO_IOMUX_MCU2_12(TYPE) DDK_IOMUX_SETTING(TYPE, DTR_DTE1) #define GPIO_IOMUX_MCU2_13(TYPE) DDK_IOMUX_SETTING(TYPE, DSR_DTE1) #define GPIO_IOMUX_MCU2_14(TYPE) DDK_IOMUX_SETTING(TYPE, RI_DTE1) #define GPIO_IOMUX_MCU2_15(TYPE) DDK_IOMUX_SETTING(TYPE, DCD_DTE1) #define GPIO_IOMUX_MCU2_16(TYPE) DDK_IOMUX_SETTING(TYPE, DTR_DCE2) #define GPIO_IOMUX_MCU2_17(TYPE) DDK_IOMUX_SETTING(TYPE, BATT_LINE) #define GPIO_IOMUX_MCU2_18(TYPE) DDK_IOMUX_SETTING(TYPE, KEY_ROW4) #define GPIO_IOMUX_MCU2_19(TYPE) DDK_IOMUX_SETTING(TYPE, KEY_ROW5) #define GPIO_IOMUX_MCU2_20(TYPE) DDK_IOMUX_SETTING(TYPE, KEY_ROW6) #define GPIO_IOMUX_MCU2_21(TYPE) DDK_IOMUX_SETTING(TYPE, KEY_ROW7) #define GPIO_IOMUX_MCU2_22(TYPE) DDK_IOMUX_SETTING(TYPE, KEY_COL4) #define GPIO_IOMUX_MCU2_23(TYPE) DDK_IOMUX_SETTING(TYPE, KEY_COL5) #define GPIO_IOMUX_MCU2_24(TYPE) DDK_IOMUX_SETTING(TYPE, KEY_COL6) #define GPIO_IOMUX_MCU2_25(TYPE) DDK_IOMUX_SETTING(TYPE, KEY_COL7) #define GPIO_IOMUX_MCU2_26(TYPE) DDK_IOMUX_SETTING(TYPE, SD1_CMD) #define GPIO_IOMUX_MCU2_27(TYPE) DDK_IOMUX_SETTING(TYPE, SD1_CLK) #define GPIO_IOMUX_MCU2_28(TYPE) DDK_IOMUX_SETTING(TYPE, SD1_DATA0) #define GPIO_IOMUX_MCU2_29(TYPE) DDK_IOMUX_SETTING(TYPE, SD1_DATA1) #define GPIO_IOMUX_MCU2_30(TYPE) DDK_IOMUX_SETTING(TYPE, SD1_DATA2) #define GPIO_IOMUX_MCU2_31(TYPE) DDK_IOMUX_SETTING(TYPE, SD1_DATA3) #define GPIO_IOMUX_MCU3_0(TYPE) DDK_IOMUX_SETTING(TYPE, GPIO3_0) #define GPIO_IOMUX_MCU3_1(TYPE) DDK_IOMUX_SETTING(TYPE, GPIO3_1) #define GPIO_IOMUX_MCU3_2(TYPE) DDK_IOMUX_SETTING(TYPE, SCLK0) #define GPIO_IOMUX_MCU3_3(TYPE) DDK_IOMUX_SETTING(TYPE, SRST0) #define GPIO_IOMUX_MCU3_4(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D4) #define GPIO_IOMUX_MCU3_5(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D5) #define GPIO_IOMUX_MCU3_6(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D6) #define GPIO_IOMUX_MCU3_7(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D7) #define GPIO_IOMUX_MCU3_8(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D8) #define GPIO_IOMUX_MCU3_9(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D9) #define GPIO_IOMUX_MCU3_10(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D10) #define GPIO_IOMUX_MCU3_11(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D11) #define GPIO_IOMUX_MCU3_12(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D12) #define GPIO_IOMUX_MCU3_13(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D13) #define GPIO_IOMUX_MCU3_14(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D14) #define GPIO_IOMUX_MCU3_15(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_D15) #define GPIO_IOMUX_MCU3_16(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_MCLK) #define GPIO_IOMUX_MCU3_17(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_VSYNC) #define GPIO_IOMUX_MCU3_18(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_HSYNC) #define GPIO_IOMUX_MCU3_19(TYPE) DDK_IOMUX_SETTING(TYPE, CSI_PIXCLK) #define GPIO_IOMUX_MCU3_20(TYPE) DDK_IOMUX_SETTING(TYPE, SD_D_I) #define GPIO_IOMUX_MCU3_21(TYPE) DDK_IOMUX_SETTING(TYPE, SD_D_IO) #define GPIO_IOMUX_MCU3_22(TYPE) DDK_IOMUX_SETTING(TYPE, SD_D_CLK) #define GPIO_IOMUX_MCU3_23(TYPE) DDK_IOMUX_SETTING(TYPE, LCS0) #define GPIO_IOMUX_MCU3_24(TYPE) DDK_IOMUX_SETTING(TYPE, LCS1) #define GPIO_IOMUX_MCU3_25(TYPE) DDK_IOMUX_SETTING(TYPE, SER_RS) #define GPIO_IOMUX_MCU3_26(TYPE) DDK_IOMUX_SETTING(TYPE, ATA_CS0) #define GPIO_IOMUX_MCU3_27(TYPE) DDK_IOMUX_SETTING(TYPE, ATA_CS1) #define GPIO_IOMUX_MCU3_28(TYPE) DDK_IOMUX_SETTING(TYPE, ATA_DIOR) #define GPIO_IOMUX_MCU3_29(TYPE) DDK_IOMUX_SETTING(TYPE, ATA_DIOW) #define GPIO_IOMUX_MCU3_30(TYPE) DDK_IOMUX_SETTING(TYPE, ATA_DMACK) #define GPIO_IOMUX_MCU3_31(TYPE) DDK_IOMUX_SETTING(TYPE, ATA_RESET_B) //------------------------------------------------------------------------------ // // GPIO configuration setting macros: // // These configuration setting macros are used to fill in the DDK_GPIO_CFG // structure. Each set of macros is defined for a certain module/function. // Each set a macros is identified via an unique name. ie // // MACRO settings // GPIO__PORT A / B / C / D / E / F // GPIO__CONFIG_TYPE PRI / ALT / MODULEIO / INT / IO // GPIO__MASK set to 1 for pins used (for PRI, ALT and INT only) // GPIO__IN_MASK set to 1 for input pins (for MODULEIO and IO only) // GPIO__OUT_MASK set to 1 for output pins (for MODULEIO and IO only) // GPIO__IN_DEST AOUT / BOUT / MAX (for MODULEIO only, sets input pin dest) // GPIO__OUT_SOURCE AIN / BIN / CIN / MAX (for MODULEIO only, sets output pin source) // GPIO__PIN 0 to 31 (For INTR, IO only) // GPIO__INT_TYPE HIGH_LEVEL / RISE_EDGE / LOW_LEVEL / FALL_EDGE (for INT only) // // NOTES: // 1) "MAX" means non applicable. // 2) (PRI, ALT, MODULEIO) are defined here as these are chip specific. // 3) (INT and IO macros) are defined in bsp_gpio.h since these are BSP // specific. // //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Board GPIO Setting //------------------------------------------------------------------------------ // System ******************************************************************* // uP_nWAKEUP pin GPIO1_25(A11) #define GPIO_uP_nWAKEUP_PORT GPIO_PORT(1) #define GPIO_uP_nWAKEUP_PIN 25 //#define GPIO_uP_nWAKEUP_MASK GPIO_PIN_MASK(GPIO_uP_nWAKEUP_PIN) //#define GPIO_uP_nWAKEUP_CONFIG_TYPE INT #define GPIO_uP_nWAKEUP_INT_TYPE FALL_EDGE // uP_SW_nRESET pin GPIO2_9(A11) #define GPIO_uP_SW_nRESET_PORT GPIO_PORT(2) #define GPIO_uP_SW_nRESET_PIN 9 // PMIC ********************************************************************* // PMIC_LOWBATT_INT pin GPIO1_2(C20) #define GPIO_PMIC_LOWBATT_INT_PORT GPIO_PORT(1) #define GPIO_PMIC_LOWBATT_INT_PIN 2 // PMIC_PRIINT pin GPIO1_3(F25) #define GPIO_PMIC_PRIINT_PORT GPIO_PORT(1) #define GPIO_PMIC_PRIINT_PIN 3 #define GPIO_PMIC_PRIINT_INT_TYPE HIGH_LEVEL // PMIC_PWRRDY pin GPIO1_5(B24) #define GPIO_PMIC_PWRRDY_PORT GPIO_PORT(1) #define GPIO_PMIC_PWRRDY_PIN 5 // PMIC_USEROFF pin GPIO3_1(H26) #define GPIO_PMIC_USEROFF_PORT GPIO_PORT(3) #define GPIO_PMIC_USEROFF_PIN 1 // GPIO ********************************************************************* // uP_GPIO_0 pin GPIO1_8(G18) #define GPIO_uP_GPIO_0_PORT GPIO_PORT(1) #define GPIO_uP_GPIO_0_PIN 8 // uP_GPIO_1 pin GPIO1_7(A22) #define GPIO_uP_GPIO_1_PORT GPIO_PORT(1) #define GPIO_uP_GPIO_1_PIN 7 // uP_GPIO_2 pin GPIO2_10(F11) #define GPIO_uP_GPIO_2_PORT GPIO_PORT(2) #define GPIO_uP_GPIO_2_PIN 10 // uP_GPIO_3 pin GPIO1_31(A9) #define GPIO_uP_GPIO_3_PORT GPIO_PORT(1) #define GPIO_uP_GPIO_3_PIN 31 // uP_GPIO_4 pin GPIO1_30(C10) #define GPIO_uP_GPIO_4_PORT GPIO_PORT(1) #define GPIO_uP_GPIO_4_PIN 30 // uP_GPIO_5 pin GPIO1_29(B10) #define GPIO_uP_GPIO_5_PORT GPIO_PORT(1) #define GPIO_uP_GPIO_5_PIN 29 // uP_GPIO_6 pin GPIO2_18(G14) #define GPIO_uP_GPIO_6_PORT GPIO_PORT(2) #define GPIO_uP_GPIO_6_PIN 18 // uP_GPIO_7 pin GPIO2_19(B16) #define GPIO_uP_GPIO_7_PORT GPIO_PORT(2) #define GPIO_uP_GPIO_7_PIN 19 // uP_nIRQx -- Interrupt **************************************************** // uP_nIRQA pin GPIO1_4(F19) #define GPIO_uP_nIRQA_PORT GPIO_PORT(1) #define GPIO_uP_nIRQA_PIN 4 #define GPIO_uP_nIRQA_INT_TYPE LOW_LEVEL // uP_nIRQB pin GPIO3_0(K21) #define GPIO_uP_nIRQB_PORT GPIO_PORT(3) #define GPIO_uP_nIRQB_PIN 0 #define GPIO_uP_nIRQB_INT_TYPE LOW_LEVEL // uP_nIRQC pin GPIO1_6(A23) #define GPIO_uP_nIRQC_PORT GPIO_PORT(1) #define GPIO_uP_nIRQC_PIN 6 #define GPIO_uP_nIRQC_INT_TYPE LOW_LEVEL // uP_nIRQD pin GPIO2_11(B12) #define GPIO_uP_nIRQD_PORT GPIO_PORT(2) #define GPIO_uP_nIRQD_PIN 11 #define GPIO_uP_nIRQD_INT_TYPE LOW_LEVEL // Ethernet ***************************************************************** // WRLAN_nINT pin GPIO1_26(T3) #define GPIO_WRLAN_nINT_PORT GPIO_PORT(1) #define GPIO_WRLAN_nINT_PIN 26 #define GPIO_WRLAN_nINT_INT_TYPE LOW_LEVEL // CompactFlash ************************************************************* // PCC_POWER_nEN pin GPIO3_24(P21) #define GPIO_PCC_POWER_nEN_PORT GPIO_PORT(3) #define GPIO_PCC_POWER_nEN_PIN 24 // PCC_PCMCIA_nEN pin GPIO2_25(A18) #define GPIO_PCC_PCMCIA_nEN_PORT GPIO_PORT(2) #define GPIO_PCC_PCMCIA_nEN_PIN 25 // USB ********************************************************************** // USBHSH_nCS pin GPIO2_8(C11) #define GPIO_USBHSH_nCS_PORT GPIO_PORT(2) #define GPIO_USBHSH_nCS_PIN 8 // USBOTG_nCS pin GPIO2_16(F12) #define GPIO_USBOTG_nCS_PORT GPIO_PORT(2) #define GPIO_USBOTG_nCS_PIN 16 // LCD ********************************************************************** // LCD_PANEL_PWR pin GPIO3_22(P24) #define GPIO_LCD_PANEL_PWR_PORT GPIO_PORT(3) #define GPIO_LCD_PANEL_PWR_PIN 22 // LCD_DON pin GPIO3_21(P25) #define GPIO_LCD_DON_PORT GPIO_PORT(3) #define GPIO_LCD_DON_PIN 21 // Backlight **************************************************************** // LCD_BACKLIGHT_PWR pin GPIO3_20(N20) #define GPIO_LCD_BACKLIGHT_PWR_PORT GPIO_PORT(3) #define GPIO_LCD_BACKLIGHT_PWR_PIN 20 //------------------------------------------------------------------------------ // GPIO PinName Macro Definition //------------------------------------------------------------------------------ #define GPIO_PORT(port) port #define GPIO_INT_TYPE(type) GPIO_ICR_ ## type #define GPIO_PIN2_VAL(val, pin) ((val) << (((pin) % 16) * 2)) #define IRQ_GPIO_Px_xx(Port, Pin) IRQ_GPIO_P ## Port ## _ ## Pin #define GET_GPIOPINNAME(PINNAME, Pxxx) GPIO_ ## PINNAME ## _ ## Pxxx #define GET_GPIOPINNAME_PORT(PINNAME) GET_GPIOPINNAME(PINNAME, PORT) #define GET_GPIOPINNAME_PORTINDEX(PINNAME) (GET_GPIOPINNAME(PINNAME, PORT) - 1) #define GET_GPIOPINNAME_PIN(PINNAME) GET_GPIOPINNAME(PINNAME, PIN) #define GET_GPIOPINNAME_MASK(PINNAME) (1 << GET_GPIOPINNAME_PIN(PINNAME)) #define GET_GPIOPINNAME_MASK2(PINNAME) (3 << ((GET_GPIOPINNAME_PIN(PINNAME) % 16) * 2)) #define GPIO_INT_TYPE_EXTEND(INT_TYPE) GPIO_INT_TYPE(INT_TYPE) #define GET_GPIOPINNAME_INT(PINNAME) GPIO_INT_TYPE_EXTEND(GET_GPIOPINNAME(PINNAME, INT_TYPE)) #define GET_GPIOPINNAME_IRQ(PINNAME) IRQ_GPIO_Pxy(GET_GPIOPINNAME_PORT(PINNAME), GET_GPIOPINNAME_PIN(PINNAME)) #define GET_GPIOSPINNAME_ISLOW(ppGPIO, PINNAME) ((INREG32(&ppGPIO[GET_GPIOPINNAME_PORTINDEX(PINNAME)]->PSR) & GET_GPIOPINNAME_MASK(PINNAME)) == 0) #define GET_GPIOPINNAME_ISLOW(pGPIO, PINNAME) ((INREG32(&((pGPIO)->PSR)) & GET_GPIOPINNAME_MASK(PINNAME)) == 0) #define SET_GPIOSPINNAME_LOW(ppGPIO, PINNAME) { INSREG32(&ppGPIO[GET_GPIOPINNAME_PORTINDEX(PINNAME)]->DR, GET_GPIOPINNAME_MASK(PINNAME), 0); } #define SET_GPIOPINNAME_LOW(pGPIO, PINNAME) { INSREG32(&((pGPIO)->DR), GET_GPIOPINNAME_MASK(PINNAME), 0); } #define SET_GPIOSPINNAME_HIGH(ppGPIO, PINNAME) { INSREG32(&ppGPIO[GET_GPIOPINNAME_PORTINDEX(PINNAME)]->DR, GET_GPIOPINNAME_MASK(PINNAME), GET_GPIOPINNAME_MASK(PINNAME)); } #define SET_GPIOPINNAME_HIGH(pGPIO, PINNAME) { INSREG32(&((pGPIO)->DR), GET_GPIOPINNAME_MASK(PINNAME), GET_GPIOPINNAME_MASK(PINNAME)); } #define OAL_IOMUX_INTR_PINNAME(pGPIO, PINNAME) OAL_IOMUX_INTR_PIN(pGPIO, GET_GPIOPINNAME_PORT(PINNAME), GET_GPIOPINNAME_PIN(PINNAME), GET_GPIOPINNAME_INT(PINNAME)) #define CONFIG_GPIOSPINNAME_INPUT(ppGPIO, PINNAME) INSREG32(&ppGPIO[GET_GPIOPINNAME_PORTINDEX(PINNAME)]->GDIR, GET_GPIOPINNAME_MASK(PINNAME), GPIO_PIN_VAL(GPIO_GDIR_INPUT, GET_GPIOPINNAME_PIN(PINNAME))) #define CONFIG_GPIOPINNAME_INPUT(pGPIO, PINNAME) INSREG32(&((pGPIO)->GDIR), GET_GPIOPINNAME_MASK(PINNAME), GPIO_PIN_VAL(GPIO_GDIR_INPUT, GET_GPIOPINNAME_PIN(PINNAME))) #define CONFIG_GPIOSPINNAME_OUTPUT(ppGPIO, PINNAME) INSREG32(&ppGPIO[GET_GPIOPINNAME_PORTINDEX(PINNAME)]->GDIR, GET_GPIOPINNAME_MASK(PINNAME), GPIO_PIN_VAL(GPIO_GDIR_OUTPUT, GET_GPIOPINNAME_PIN(PINNAME))) #define CONFIG_GPIOPINNAME_OUTPUT(pGPIO, PINNAME) INSREG32(&((pGPIO)->GDIR), GET_GPIOPINNAME_MASK(PINNAME), GPIO_PIN_VAL(GPIO_GDIR_OUTPUT, GET_GPIOPINNAME_PIN(PINNAME))) #define CONFIG_GPIOSPINNAME_INTTYPE(ppGPIO, PINNAME) INSREG32((((DWORD)&ppGPIO[GET_GPIOPINNAME_PORTINDEX(PINNAME)]->ICR1)+(GET_GPIOPINNAME_PIN(PINNAME)<16?0:4)), GET_GPIOPINNAME_MASK2(PINNAME), GPIO_PIN2_VAL(GET_GPIOPINNAME_INT(PINNAME), GET_GPIOPINNAME_PIN(PINNAME))) #define CONFIG_GPIOPINNAME_INTTYPE(pGPIO, PINNAME) INSREG32((((DWORD)&((pGPIO)->ICR1))+(GET_GPIOPINNAME_PIN(PINNAME)<16?0:4)), GET_GPIOPINNAME_MASK2(PINNAME), GPIO_PIN2_VAL(GET_GPIOPINNAME_INT(PINNAME), GET_GPIOPINNAME_PIN(PINNAME))) #if 0 #define CONFIG_GPIOSPINNAME_INTERRUPT(ppGPIO, PINNAME) { CONFIG_GPIOSPINNAME_INPUT(ppGPIO, PINNAME); \ CONFIG_GPIOSPINNAME_INTTYPE(ppGPIO, PINNAME); \ g_oalGpioTranslate[GET_GPIOPINNAME_PORTINDEX(PINNAME)][GET_GPIOPINNAME_PIN(PINNAME)] = GET_GPIOPINNAME_IRQ(PINNAME); } #else #define CONFIG_GPIOSPINNAME_INTERRUPT(ppGPIO, PINNAME) { CONFIG_GPIOSPINNAME_INPUT(ppGPIO, PINNAME); \ CONFIG_GPIOSPINNAME_INTTYPE(ppGPIO, PINNAME); } #endif // IOMUX definition #define GPIOPINNAME2IOMUX_MCUx_xx_EXTEND(PORT, PIN, TYPE) GPIOPINNAME2IOMUX_MCUx_xx_EXTEND2(PORT, PIN, TYPE) #define GPIOPINNAME2IOMUX_MCUx_xx_EXTEND2(PORT, PIN, TYPE) GPIO_IOMUX_MCU ## PORT ## _ ## PIN ## (TYPE) #define GPIOPINNAME2IOMUX_MCUx_xx(PINNAME, TYPE) GPIOPINNAME2IOMUX_MCUx_xx_EXTEND(GET_GPIOPINNAME_PORT(PINNAME), GET_GPIOPINNAME_PIN(PINNAME), TYPE) #define CONFIG_GPIOPINNAME_MUX(pIOMUX, PINNAME) OAL_IOMUX_SET_MUX(pIOMUX, GPIOPINNAME2IOMUX_MCUx_xx(PINNAME, PIN), DDK_IOMUX_OUT_GPIO, DDK_IOMUX_IN_GPIO) #define CONFIG_GPIOPINNAME_PAD(pIOMUX, PINNAME) OAL_IOMUX_SET_PAD(pIOMUX, GPIOPINNAME2IOMUX_MCUx_xx(PINNAME, PAD), DDK_IOMUX_PAD_SLEW_SLOW, DDK_IOMUX_PAD_DRIVE_NORMAL, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_SCHMITT, DDK_IOMUX_PAD_PULL_UP_100K) #define DDK_GPIO_PORTx_EXTEND(PORT) DDK_GPIO_PORTx_EXTEND2(PORT) #define DDK_GPIO_PORTx_EXTEND2(PORT) DDK_GPIO_PORT ## PORT #define GET_GPIOPINNAME_DDKPORT(PINNAME) DDK_GPIO_PORTx_EXTEND(GET_GPIOPINNAME_PORT(PINNAME)) #define GET_GPIOPINNAME_DDKPIN(PINNAME) GET_GPIOPINNAME_PIN(PINNAME) #define GET_GPIOPINNAME_DDKIOMUX(PINNAME, TYPE) GPIOPINNAME2IOMUX_MCUx_xx(PINNAME, TYPE) #define DDK_GPIO_INTTYPEx_EXTEND(INTTYPE) DDK_GPIO_INTTYPEx_EXTEND2(INTTYPE) #define DDK_GPIO_INTTYPEx_EXTEND2(INTTYPE) DDK_GPIO_INTR_ ## INTTYPE #define GET_GPIOPINNAME_DDKINTTYPE(PINNAME) DDK_GPIO_INTTYPEx_EXTEND(GET_GPIOPINNAME(PINNAME, INT_TYPE)) #define GPIO_DDKIomuxSetPinMux(PINNAME) DDKIomuxSetPinMux(GET_GPIOPINNAME_DDKIOMUX(PINNAME, PIN), DDK_IOMUX_OUT_GPIO, DDK_IOMUX_IN_GPIO) #define GPIO_DDKIomuxSetPadConfig(PINNAME) DDKIomuxSetPadConfig(GET_GPIOPINNAME_DDKIOMUX(PINNAME, PAD), DDK_IOMUX_PAD_SLEW_SLOW, DDK_IOMUX_PAD_DRIVE_NORMAL, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_SCHMITT, DDK_IOMUX_PAD_PULL_UP_100K) #define GPIO_DDKGpioSetConfig(PINNAME, DIR, INT) DDKGpioSetConfig(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME), DDK_GPIO_DIR_ ## DIR, INT) #define GPIO_DDKGpioSetConfigIntSetting(PINNAME, GPIODIR, INT) DDKGpioSetConfig(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME), DDK_GPIO_ ## GPIODIR, INT) #define GPIO_DDKGpioSetConfigIntType(PINNAME, GPIODIR) DDKGpioSetConfig(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME), DDK_GPIO_ ## GPIODIR, GET_GPIOPINNAME_DDKINTTYPE(PINNAME)) #define GPIO_DDKGpioSetConfigIntNone(PINNAME, GPIODIR) DDKGpioSetConfig(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME), DDK_GPIO_ ## GPIODIR, DDK_GPIO_INTR_NONE) #define GPIO_DDKGpioClearIntrPin(PINNAME) DDKGpioClearIntrPin(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME)) #define GPIO_DDKGpioBindIrq(PINNAME) DDKGpioBindIrq(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME), GET_GPIOPINNAME_IRQ(PINNAME)) #define GPIO_DDKGpioUnbindIrq(PINNAME) DDKGpioUnbindIrq(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME)) #define GPIO_DDKGpioWriteDataPinHigh(PINNAME) DDKGpioWriteDataPin(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME), 1) #define GPIO_DDKGpioWriteDataPinLow(PINNAME) DDKGpioWriteDataPin(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME), 0) #define GPIO_DDKGpioReadIntrPin(PINNAME, pStatus) DDKGpioReadIntrPin(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME), pStatus) #define GPIO_DDKGpioReadIntr(PINNAME, Mask, pStatus) DDKGpioReadIntr(GET_GPIOPINNAME_DDKPORT(PINNAME), Mask, pStatus) #define GPIO_DDKGpioReadDataPin(PINNAME, pData) DDKGpioReadDataPin(GET_GPIOPINNAME_DDKPORT(PINNAME), GET_GPIOPINNAME_DDKPIN(PINNAME), pData) #define GPIO_DDKGpioReadData(PINNAME, Mask, pData) DDKGpioReadData(GET_GPIOPINNAME_DDKPORT(PINNAME), Mask, pData) #ifdef __cplusplus } #endif #endif // __BSP_GPIO_H__