//------------------------------------------------------------------------------ // // Copyright (c) Microsoft Corporation. All rights reserved. // // // Use of this source code is subject to the terms of the Microsoft end-user // license agreement (EULA) under which you licensed this SOFTWARE PRODUCT. // If you did not accept the terms of the EULA, you are not authorized to use // this source code. For a copy of the EULA, please see the LICENSE.RTF on your // install media. // //------------------------------------------------------------------------------ // // Copyright (C) 2004-2007, Freescale Semiconductor, Inc. All Rights Reserved. // THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS // AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT // //------------------------------------------------------------------------------ // // File: image_cfg.h // // Defines configuration parameters used to create the NK and Bootloader // program images. // //------------------------------------------------------------------------------ #ifndef __IMAGE_CFG_H #define __IMAGE_CFG_H #if __cplusplus extern "C" { #endif //------------------------------------------------------------------------------ // RESTRICTION // // This file is a configuration file. It should ONLY contain simple #define // directives defining constants. This file is included by other files that // only support simple substitutions. // //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // NAMING CONVENTION // // The IMAGE_ naming convention ... // // IMAGE__
__[OFFSET|SIZE|START|END] // // - WINCE, BOOT, SHARE //
- section name: user defined // - the memory device the block resides on // OFFSET - number of bytes from memory device start address // SIZE - maximum size of the block // START - start address of block (device address + offset) // END - end address of block (start address + size - 1) // //------------------------------------------------------------------------------ #define IMAGE_BOOT_RAM_PA_START CSP_BASE_MEM_PA_CSD0 #define IMAGE_BOOT_NOR_PA_START CSP_BASE_MEM_PA_CS0 #define IMAGE_WINCE_CODE_RAM_CA_START ((DWORD)OALPAtoVA(IMAGE_BOOT_RAM_PA_START, TRUE) + 0x00200000) //------------------------------------------------------------------------------ // Internal RAM Mapping (16K) #define IMAGE_WINCE_IRAM_PA_START CSP_BASE_MEM_PA_IRAM #define IMAGE_WINCE_IRAM_SIZE (16*1024) // 256 bytes reserved for DVFC codespace #define IMAGE_WINCE_DVFC_IRAM_OFFSET (0) #define IMAGE_WINCE_DVFC_IRAM_PA_START (IMAGE_WINCE_IRAM_PA_START+IMAGE_WINCE_DVFC_IRAM_OFFSET) #define IMAGE_WINCE_DVFC_IRAM_SIZE (256) // 4K minus 256 bytes reserved for SDMA data structures #define IMAGE_WINCE_DDKSDMA_IRAM_OFFSET (IMAGE_WINCE_DVFC_IRAM_OFFSET+IMAGE_WINCE_DVFC_IRAM_SIZE) #define IMAGE_WINCE_DDKSDMA_IRAM_PA_START (IMAGE_WINCE_IRAM_PA_START+IMAGE_WINCE_DDKSDMA_IRAM_OFFSET) #define IMAGE_WINCE_DDKSDMA_IRAM_SIZE (4*1024-IMAGE_WINCE_DVFC_IRAM_SIZE) // 12K reserved for internal audio buffers #define IMAGE_WINCE_AUDIO_IRAM_OFFSET (IMAGE_WINCE_DDKSDMA_IRAM_OFFSET+IMAGE_WINCE_DDKSDMA_IRAM_SIZE) #define IMAGE_WINCE_AUDIO_IRAM_PA_START (IMAGE_WINCE_IRAM_PA_START+IMAGE_WINCE_AUDIO_IRAM_OFFSET) #define IMAGE_WINCE_AUDIO_IRAM_SIZE (12*1024) //------------------------------------------------------------------------------ // RAM image defines #define IMAGE_BOOT_RAMDEV_RAM_PA_START CSP_BASE_MEM_PA_CSD0 // 128MB RAM CSD0 #define IMAGE_BOOT_RAMDEV_RAM_SIZE (128*1024*1024) #define IMAGE_BOOT_RAMDEV_RAM_PA_END (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_RAMDEV_RAM_SIZE-1) #define IMAGE_SHARE_ARGS_RAM_OFFSET 0 #define IMAGE_SHARE_ARGS_RAM_PA_START (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_SHARE_ARGS_RAM_OFFSET) #define IMAGE_SHARE_ARGS_UA_START OALPAtoVA(IMAGE_SHARE_ARGS_RAM_PA_START, FALSE) #define IMAGE_SHARE_ARGS_RAM_SIZE (4*1024) #define IMAGE_WINCE_CSPDDK_RAM_OFFSET (IMAGE_SHARE_ARGS_RAM_OFFSET+IMAGE_SHARE_ARGS_RAM_SIZE) #define IMAGE_WINCE_CSPDDK_RAM_PA_START (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_WINCE_CSPDDK_RAM_OFFSET) #define IMAGE_WINCE_CSPDDK_RAM_SIZE (32*1024) #define IMAGE_WINCE_DDKSDMA_RAM_PA_START (IMAGE_WINCE_CSPDDK_RAM_PA_START) #define IMAGE_WINCE_DDKSDMA_RAM_SIZE (16*1024) #define IMAGE_WINCE_DDKCLK_RAM_PA_START (IMAGE_WINCE_CSPDDK_RAM_PA_START+IMAGE_WINCE_DDKSDMA_RAM_SIZE) #define IMAGE_WINCE_DDKCLK_RAM_UA_START OALPAtoVA(IMAGE_WINCE_DDKCLK_RAM_PA_START, FALSE) #define IMAGE_WINCE_DDKCLK_RAM_SIZE (16*1024) #define IMAGE_BOOT_XLDR_RAM_OFFSET (IMAGE_SHARE_ARGS_RAM_OFFSET+IMAGE_SHARE_ARGS_RAM_SIZE) #define IMAGE_BOOT_XLDR_RAM_START (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_XLDR_RAM_OFFSET) #define IMAGE_BOOT_XLDR_RAM_SIZE (2*1024) #define IMAGE_BOOT_STACK_RAM_OFFSET (IMAGE_BOOT_XLDR_RAM_OFFSET+IMAGE_BOOT_XLDR_RAM_SIZE) #define IMAGE_BOOT_STACK_RAM_START (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_STACK_RAM_OFFSET) #define IMAGE_BOOT_STACK_RAM_SIZE (232*1024) #define IMAGE_BOOT_BOOTPT_RAM_OFFSET (IMAGE_BOOT_STACK_RAM_OFFSET+IMAGE_BOOT_STACK_RAM_SIZE) #define IMAGE_BOOT_BOOTPT_RAM_PA_START (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_BOOTPT_RAM_OFFSET) #define IMAGE_BOOT_BOOTPT_RAM_SIZE (16*1024) #define IMAGE_BOOT_BOOTPT_RAM_PA_END (IMAGE_BOOT_BOOTPT_RAM_PA_START+IMAGE_BOOT_BOOTPT_RAM_SIZE-1) #define IMAGE_BOOT_BOOTIMAGE_RAM_OFFSET (IMAGE_BOOT_BOOTPT_RAM_OFFSET+IMAGE_BOOT_BOOTPT_RAM_SIZE) #define IMAGE_BOOT_BOOTIMAGE_RAM_PA_START (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_BOOTIMAGE_RAM_OFFSET) #define IMAGE_BOOT_BOOTIMAGE_RAM_SIZE (256*1024) #define IMAGE_BOOT_BOOTIMAGE_RAM_PA_END (IMAGE_BOOT_BOOTIMAGE_RAM_PA_START+IMAGE_BOOT_BOOTIMAGE_RAM_SIZE-1) #define IMAGE_BOOT_NANDCACHE_RAM_OFFSET IMAGE_BOOT_BOOTIMAGE_RAM_OFFSET #define IMAGE_BOOT_NANDCACHE_RAM_START IMAGE_BOOT_BOOTIMAGE_RAM_PA_START #define IMAGE_BOOT_NANDCACHE_RAM_SIZE IMAGE_BOOT_BOOTIMAGE_RAM_SIZE #define IMAGE_BOOT_IPLIMAGE_RAM_OFFSET (IMAGE_BOOT_BOOTIMAGE_RAM_OFFSET+IMAGE_BOOT_BOOTIMAGE_RAM_SIZE) #define IMAGE_BOOT_IPLIMAGE_RAM_START (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_IPLIMAGE_RAM_OFFSET) #define IMAGE_BOOT_IPLIMAGE_SIZE (256*1024) #define IMAGE_BOOT_NKIMAGE_RAM_OFFSET (0x200000) #define IMAGE_BOOT_NKIMAGE_RAM_PA_START (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_NKIMAGE_RAM_OFFSET) #define IMAGE_BOOT_NKIMAGE_RAM_SIZE (IMAGE_BOOT_RAMDEV_RAM_SIZE-IMAGE_BOOT_NKIMAGE_RAM_OFFSET) #define IMAGE_BOOT_NKIMAGE_RAM_PA_END (IMAGE_BOOT_NKIMAGE_RAM_PA_START+IMAGE_BOOT_NKIMAGE_RAM_SIZE-1) // PP internal working buffer, code buffer #define IMAGE_WINCE_PP_RAM_OFFSET (0x9000) #define IMAGE_WINCE_PP_RAM_PA_START (CSP_BASE_MEM_PA_CSD0+IMAGE_WINCE_PP_RAM_OFFSET) #define IMAGE_WINCE_PP_RAM_SIZE (1.6*1024*1024) // IPU internal working buffer, code buffer #define IMAGE_WINCE_IPU_RAM_OFFSET (0x7700000) #define IMAGE_WINCE_IPU_RAM_PA_START (CSP_BASE_MEM_PA_CSD0+IMAGE_WINCE_IPU_RAM_OFFSET) #define IMAGE_WINCE_IPU_RAM_SIZE (9*1024*1024) //------------------------------------------------------------------------------ // NOR flash image defines #define IMAGE_BOOT_NORDEV_NOR_PA_START CSP_BASE_MEM_PA_CS0 // 32MB NOR flash on CS0 #define IMAGE_BOOT_NORDEV_NOR_SIZE (32*1024*1024) #define IMAGE_BOOT_NORDEV_NOR_PA_END (IMAGE_BOOT_NORDEV_NOR_PA_START+IMAGE_BOOT_NORDEV_NOR_SIZE-1) #define IMAGE_BOOT_BOOTIMAGE_NOR_OFFSET (0) #define IMAGE_BOOT_BOOTIMAGE_NOR_PA_START (IMAGE_BOOT_NORDEV_NOR_PA_START+IMAGE_BOOT_BOOTIMAGE_NOR_OFFSET) #define IMAGE_BOOT_BOOTIMAGE_NOR_SIZE (256*1024) #define IMAGE_BOOT_BOOTIMAGE_NOR_PA_END (IMAGE_BOOT_BOOTIMAGE_NOR_PA_START+IMAGE_BOOT_BOOTIMAGE_NOR_SIZE-1) // Last 128K of NOR reserved for boot configuration #define IMAGE_BOOT_BOOTCFG_NOR_SIZE (128*1024) #define IMAGE_BOOT_BOOTCFG_NOR_OFFSET (IMAGE_BOOT_NORDEV_NOR_SIZE-IMAGE_BOOT_BOOTCFG_NOR_SIZE) #define IMAGE_BOOT_BOOTCFG_NOR_PA_START (IMAGE_BOOT_NORDEV_NOR_PA_START+IMAGE_BOOT_BOOTCFG_NOR_OFFSET) #define IMAGE_BOOT_BOOTCFG_NOR_PA_END (IMAGE_BOOT_BOOTCFG_NOR_PA_START+IMAGE_BOOT_BOOTCFG_NOR_SIZE-1) #define IMAGE_BOOT_NKIMAGE_NOR_OFFSET (IMAGE_BOOT_BOOTIMAGE_NOR_OFFSET+IMAGE_BOOT_BOOTIMAGE_NOR_SIZE) #define IMAGE_BOOT_NKIMAGE_NOR_PA_START (IMAGE_BOOT_NORDEV_NOR_PA_START+IMAGE_BOOT_NKIMAGE_NOR_OFFSET) #define IMAGE_BOOT_NKIMAGE_NOR_SIZE (IMAGE_BOOT_NORDEV_NOR_SIZE-IMAGE_BOOT_BOOTIMAGE_NOR_SIZE-IMAGE_BOOT_BOOTCFG_NOR_SIZE) #define IMAGE_BOOT_NKIMAGE_NOR_PA_END (IMAGE_BOOT_NKIMAGE_NOR_PA_START+IMAGE_BOOT_NKIMAGE_NOR_SIZE-1) //------------------------------------------------------------------------------ // NAND flash image defines // NOTE: EBOOT assumes these NAND regions are block-aligned // Define a special unused SOC address range that can be used to detect when an // image is destined for NAND flash #define IMAGE_BOOT_NANDDEV_NAND_PA_START CSP_BASE_REG_PA_NANDFC // 128MB NAND flash on NFC #define IMAGE_BOOT_NANDDEV_NAND_SIZE (128*1024*1024) #define IMAGE_BOOT_NANDDEV_NAND_PA_END (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_NANDDEV_NAND_SIZE-1) #define IMAGE_BOOT_XLDRIMAGE_NAND_OFFSET (0) #define IMAGE_BOOT_XLDRIMAGE_NAND_PA_START (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_XLDRIMAGE_NAND_OFFSET) #define IMAGE_BOOT_XLDRIMAGE_NAND_SIZE (128*1024) #define IMAGE_BOOT_XLDRIMAGE_NAND_PA_END (IMAGE_BOOT_XLDRIMAGE_NAND_PA_START+IMAGE_BOOT_XLDRIMAGE_NAND_SIZE-1U) #define IMAGE_BOOT_BOOTIMAGE_NAND_OFFSET (IMAGE_BOOT_XLDRIMAGE_NAND_OFFSET+IMAGE_BOOT_XLDRIMAGE_NAND_SIZE) #define IMAGE_BOOT_BOOTIMAGE_NAND_PA_START (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_BOOTIMAGE_NAND_OFFSET) #define IMAGE_BOOT_BOOTIMAGE_NAND_SIZE (256*1024) #define IMAGE_BOOT_BOOTIMAGE_NAND_PA_END (IMAGE_BOOT_BOOTIMAGE_NAND_PA_START+IMAGE_BOOT_BOOTIMAGE_NAND_SIZE-1U) #define IMAGE_BOOT_IPLIMAGE_NAND_OFFSET (IMAGE_BOOT_BOOTIMAGE_NAND_OFFSET+IMAGE_BOOT_BOOTIMAGE_NAND_SIZE) #define IMAGE_BOOT_IPLIMAGE_NAND_PA_START (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_IPLIMAGE_NAND_OFFSET) #define IMAGE_BOOT_IPLIMAGE_NAND_SIZE (256*1024) #define IMAGE_BOOT_IPLIMAGE_NAND_PA_END (IMAGE_BOOT_IPLIMAGE_NAND_PA_START+IMAGE_BOOT_IPLIMAGE_NAND_SIZE-1) #define IMAGE_BOOT_NKIMAGE_NAND_OFFSET (IMAGE_BOOT_IPLIMAGE_NAND_OFFSET+IMAGE_BOOT_IPLIMAGE_NAND_SIZE) #define IMAGE_BOOT_NKIMAGE_NAND_PA_START (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_NKIMAGE_NAND_OFFSET) #define IMAGE_BOOT_NKIMAGE_NAND_SIZE (60*1024*1024) #define IMAGE_BOOT_NKIMAGE_NAND_PA_END (IMAGE_BOOT_NKIMAGE_NAND_PA_START+IMAGE_BOOT_NKIMAGE_NAND_SIZE-1) // DIO (for Windows Mobile) and NK (for WinCE) will occupy the same region in NAND #define IMAGE_BOOT_DIOIMAGE_NAND_OFFSET IMAGE_BOOT_NKIMAGE_NAND_OFFSET #define IMAGE_BOOT_DIOIMAGE_NAND_PA_START IMAGE_BOOT_NKIMAGE_NAND_PA_START #define IMAGE_BOOT_DIOIMAGE_NAND_SIZE (128*1024*1024 - 128*1024 - 256*1024 - 256*1024 - 128*1024) #define IMAGE_BOOT_DIOIMAGE_NAND_PA_END (IMAGE_BOOT_NKIMAGE_NAND_PA_START+IMAGE_BOOT_NKIMAGE_NAND_SIZE-1) // Last 128K of NAND reserved for boot configuration #define IMAGE_BOOT_BOOTCFG_NAND_SIZE (128*1024) #define IMAGE_BOOT_BOOTCFG_NAND_OFFSET (IMAGE_BOOT_NANDDEV_NAND_SIZE-IMAGE_BOOT_BOOTCFG_NAND_SIZE) #define IMAGE_BOOT_BOOTCFG_NAND_PA_START (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_BOOTCFG_NAND_OFFSET) #define IMAGE_BOOT_BOOTCFG_NAND_PA_END (IMAGE_BOOT_BOOTCFG_NAND_PA_START+IMAGE_BOOT_BOOTCFG_NAND_SIZE-1) //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ #if __cplusplus } #endif #endif