; ; Copyright (c) Microsoft Corporation. All rights reserved. ; ; ; Use of this source code is subject to the terms of the Microsoft end-user ; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT. ; If you did not accept the terms of the EULA, you are not authorized to use ; this source code. For a copy of the EULA, please see the LICENSE.RTF on your ; install media. ; ;------------------------------------------------------------------------------ ; ; Copyright (C) 2004-2007, Freescale Semiconductor, Inc. All Rights Reserved. ; THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS ; AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT ; ;------------------------------------------------------------------------------ ; ; File: image_cfg.inc ; ; Defines configuration parameters used to create the NK and Bootloader ; program images. ; ;------------------------------------------------------------------------------ IF !:DEF: image_cfg_inc image_cfg_inc EQU 1 ;;------------------------------------------------------------------------------ ;; RESTRICTION ;; ;; This file is a configuration file. It should ONLY contain simple #define ;; directives defining constants. This file is included by other files that ;; only support simple substitutions. ;; ;;------------------------------------------------------------------------------ ;;------------------------------------------------------------------------------ ;; NAMING CONVENTION ;; ;; The IMAGE_ naming convention ... ;; ;; IMAGE__
__[OFFSET|SIZE|START|END] ;; ;; - WINCE, BOOT, SHARE ;;
- section name: user defined ;; - the memory device the block resides on ;; OFFSET - number of bytes from memory device start address ;; SIZE - maximum size of the block ;; START - start address of block (device address + offset) ;; END - end address of block (start address + size - 1) ;; ;;------------------------------------------------------------------------------ ;;------------------------------------------------------------------------------ ;; Internal RAM Mapping (16K) IMAGE_WINCE_IRAM_PA_START EQU CSP_BASE_MEM_PA_IRAM IMAGE_WINCE_IRAM_SIZE EQU (16*1024) ;; 256 bytes reserved for DVFC codespace IMAGE_WINCE_DVFC_IRAM_OFFSET EQU (0) IMAGE_WINCE_DVFC_IRAM_PA_START EQU (IMAGE_WINCE_IRAM_PA_START+IMAGE_WINCE_DVFC_IRAM_OFFSET) IMAGE_WINCE_DVFC_IRAM_SIZE EQU (256) ;; 4K minus 256 bytes reserved for SDMA data structures IMAGE_WINCE_DDKSDMA_IRAM_OFFSET EQU (IMAGE_WINCE_DVFC_IRAM_OFFSET+IMAGE_WINCE_DVFC_IRAM_SIZE) IMAGE_WINCE_DDKSDMA_IRAM_PA_START EQU (IMAGE_WINCE_IRAM_PA_START+IMAGE_WINCE_DDKSDMA_IRAM_OFFSET) IMAGE_WINCE_DDKSDMA_IRAM_SIZE EQU (4*1024-IMAGE_WINCE_DVFC_IRAM_SIZE) ;; 12K reserved for internal audio buffers IMAGE_WINCE_AUDIO_IRAM_OFFSET EQU (IMAGE_WINCE_DDKSDMA_IRAM_OFFSET+IMAGE_WINCE_DDKSDMA_IRAM_SIZE) IMAGE_WINCE_AUDIO_IRAM_PA_START EQU (IMAGE_WINCE_IRAM_PA_START+IMAGE_WINCE_AUDIO_IRAM_OFFSET) IMAGE_WINCE_AUDIO_IRAM_SIZE EQU (12*1024) ;;------------------------------------------------------------------------------ ;; RAM image defines IMAGE_BOOT_RAMDEV_RAM_PA_START EQU CSP_BASE_MEM_PA_CSD0 ;; 128MB RAM CSD0 IMAGE_BOOT_RAMDEV_RAM_UA_START EQU (0xA8000000) IMAGE_BOOT_RAMDEV_RAM_CA_START EQU (0x88000000) IMAGE_BOOT_RAMDEV_RAM_SIZE EQU (128*1024*1024) IMAGE_BOOT_RAMDEV_RAM_PA_END EQU (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_RAMDEV_RAM_SIZE-1) IMAGE_SHARE_ARGS_RAM_OFFSET EQU (0) IMAGE_SHARE_ARGS_RAM_PA_START EQU (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_SHARE_ARGS_RAM_OFFSET) IMAGE_SHARE_ARGS_RAM_UA_START EQU (IMAGE_BOOT_RAMDEV_RAM_UA_START+IMAGE_SHARE_ARGS_RAM_OFFSET) IMAGE_SHARE_ARGS_RAM_SIZE EQU (4*1024) IMAGE_BOOT_XLDR_RAM_OFFSET EQU (IMAGE_SHARE_ARGS_RAM_OFFSET+IMAGE_SHARE_ARGS_RAM_SIZE) IMAGE_BOOT_XLDR_RAM_START EQU (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_XLDR_RAM_OFFSET) IMAGE_BOOT_XLDR_RAM_SIZE EQU (2*1024) IMAGE_BOOT_STACK_RAM_OFFSET EQU (IMAGE_BOOT_XLDR_RAM_OFFSET+IMAGE_BOOT_XLDR_RAM_SIZE) IMAGE_BOOT_STACK_RAM_SIZE EQU (234*1024) ;; Stack grows downward. Start must be at top of reserved region. IMAGE_BOOT_STACK_RAM_PA_START EQU (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_STACK_RAM_OFFSET+IMAGE_BOOT_STACK_RAM_SIZE) IMAGE_BOOT_STACK_RAM_CA_START EQU (IMAGE_BOOT_RAMDEV_RAM_CA_START+IMAGE_BOOT_STACK_RAM_OFFSET+IMAGE_BOOT_STACK_RAM_SIZE) IMAGE_BOOT_BOOTPT_RAM_OFFSET EQU (IMAGE_BOOT_STACK_RAM_OFFSET+IMAGE_BOOT_STACK_RAM_SIZE) IMAGE_BOOT_BOOTPT_RAM_PA_START EQU (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_BOOTPT_RAM_OFFSET) IMAGE_BOOT_BOOTPT_RAM_SIZE EQU (16*1024) IMAGE_BOOT_BOOTPT_RAM_PA_END EQU (IMAGE_BOOT_BOOTPT_RAM_PA_START+IMAGE_BOOT_BOOTPT_RAM_SIZE-1) IMAGE_BOOT_BOOTIMAGE_RAM_OFFSET EQU (IMAGE_BOOT_BOOTPT_RAM_OFFSET+IMAGE_BOOT_BOOTPT_RAM_SIZE) IMAGE_BOOT_BOOTIMAGE_RAM_PA_START EQU (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_BOOTIMAGE_RAM_OFFSET) IMAGE_BOOT_BOOTIMAGE_RAM_SIZE EQU (256*1024) IMAGE_BOOT_BOOTIMAGE_RAM_PA_END EQU (IMAGE_BOOT_BOOTIMAGE_RAM_PA_START+IMAGE_BOOT_BOOTIMAGE_RAM_SIZE-1) IMAGE_BOOT_NANDCACHE_RAM_OFFSET EQU IMAGE_BOOT_BOOTIMAGE_RAM_OFFSET IMAGE_BOOT_NANDCACHE_RAM_START EQU IMAGE_BOOT_BOOTIMAGE_RAM_PA_START IMAGE_BOOT_NANDCACHE_RAM_SIZE EQU IMAGE_BOOT_BOOTIMAGE_RAM_SIZE IMAGE_BOOT_IPLIMAGE_RAM_OFFSET EQU (IMAGE_BOOT_BOOTIMAGE_RAM_OFFSET+IMAGE_BOOT_BOOTIMAGE_RAM_SIZE) IMAGE_BOOT_IPLIMAGE_RAM_START EQU (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_IPLIMAGE_RAM_OFFSET) IMAGE_BOOT_IPLIMAGE_SIZE EQU (256*1024) IMAGE_BOOT_NKIMAGE_RAM_OFFSET EQU (0x200000) IMAGE_BOOT_NKIMAGE_RAM_PA_START EQU (IMAGE_BOOT_RAMDEV_RAM_PA_START+IMAGE_BOOT_NKIMAGE_RAM_OFFSET) IMAGE_BOOT_NKIMAGE_RAM_SIZE EQU (IMAGE_BOOT_RAMDEV_RAM_SIZE-IMAGE_BOOT_NKIMAGE_RAM_OFFSET) IMAGE_BOOT_NKIMAGE_RAM_PA_END EQU (IMAGE_BOOT_NKIMAGE_RAM_PA_START+IMAGE_BOOT_NKIMAGE_RAM_SIZE-1) ;;------------------------------------------------------------------------------ ;; NOR flash image defines IMAGE_BOOT_NORDEV_NOR_PA_START EQU CSP_BASE_MEM_PA_CS0 ;; 32MB NOR flash on CS0 IMAGE_BOOT_NORDEV_NOR_SIZE EQU (32*1024*1024) IMAGE_BOOT_NORDEV_NOR_PA_END EQU (IMAGE_BOOT_NORDEV_NOR_PA_START+IMAGE_BOOT_NORDEV_NOR_SIZE-1) IMAGE_BOOT_BOOTIMAGE_NOR_OFFSET EQU (0) IMAGE_BOOT_BOOTIMAGE_NOR_PA_START EQU (IMAGE_BOOT_NORDEV_NOR_PA_START+IMAGE_BOOT_BOOTIMAGE_NOR_OFFSET) IMAGE_BOOT_BOOTIMAGE_NOR_SIZE EQU (256*1024) IMAGE_BOOT_BOOTIMAGE_NOR_PA_END EQU (IMAGE_BOOT_BOOTIMAGE_NOR_PA_START+IMAGE_BOOT_BOOTIMAGE_NOR_SIZE-1) ;; Last 128K of NOR reserved for boot configuration IMAGE_BOOT_BOOTCFG_NOR_SIZE EQU (128*1024) IMAGE_BOOT_BOOTCFG_NOR_OFFSET EQU (IMAGE_BOOT_NORDEV_NOR_SIZE-IMAGE_BOOT_BOOTCFG_NOR_SIZE) IMAGE_BOOT_BOOTCFG_NOR_PA_START EQU (IMAGE_BOOT_NORDEV_NOR_PA_START+IMAGE_BOOT_BOOTCFG_NOR_OFFSET) IMAGE_BOOT_BOOTCFG_NOR_PA_END EQU (IMAGE_BOOT_BOOTCFG_NOR_PA_START+IMAGE_BOOT_BOOTCFG_NOR_SIZE-1) IMAGE_BOOT_NKIMAGE_NOR_OFFSET EQU (IMAGE_BOOT_BOOTIMAGE_NOR_OFFSET+IMAGE_BOOT_BOOTIMAGE_NOR_SIZE) IMAGE_BOOT_NKIMAGE_NOR_PA_START EQU (IMAGE_BOOT_NORDEV_NOR_PA_START+IMAGE_BOOT_NKIMAGE_NOR_OFFSET) IMAGE_BOOT_NKIMAGE_NOR_SIZE EQU (IMAGE_BOOT_NORDEV_NOR_SIZE-IMAGE_BOOT_BOOTIMAGE_NOR_SIZE-IMAGE_BOOT_BOOTCFG_NOR_SIZE) IMAGE_BOOT_NKIMAGE_NOR_PA_END EQU (IMAGE_BOOT_NKIMAGE_NOR_PA_START+IMAGE_BOOT_NKIMAGE_NOR_SIZE-1) ;;------------------------------------------------------------------------------ ;; NAND flash image defines ;; NOTE: EBOOT assumes these NAND regions are block-aligned ;; Define a special unused SOC address range that can be used to detect when an ;; image is destined for NAND flash IMAGE_BOOT_NANDDEV_NAND_PA_START EQU CSP_BASE_REG_PA_NANDFC ;; 128MB NAND flash on NFC IMAGE_BOOT_NANDDEV_NAND_SIZE EQU (128*1024*1024) IMAGE_BOOT_NANDDEV_NAND_PA_END EQU (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_NANDDEV_NAND_SIZE-1) IMAGE_BOOT_XLDRIMAGE_NAND_OFFSET EQU (0) IMAGE_BOOT_XLDRIMAGE_NAND_PA_START EQU (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_XLDRIMAGE_NAND_OFFSET) IMAGE_BOOT_XLDRIMAGE_NAND_SIZE EQU (128*1024) IMAGE_BOOT_XLDRIMAGE_NAND_PA_END EQU (IMAGE_BOOT_XLDRIMAGE_NAND_PA_START+IMAGE_BOOT_XLDRIMAGE_NAND_SIZE-1) IMAGE_BOOT_BOOTIMAGE_NAND_OFFSET EQU (IMAGE_BOOT_XLDRIMAGE_NAND_OFFSET+IMAGE_BOOT_XLDRIMAGE_NAND_SIZE) IMAGE_BOOT_BOOTIMAGE_NAND_PA_START EQU (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_BOOTIMAGE_NAND_OFFSET) IMAGE_BOOT_BOOTIMAGE_NAND_SIZE EQU (256*1024) IMAGE_BOOT_BOOTIMAGE_NAND_PA_END EQU (IMAGE_BOOT_BOOTIMAGE_NAND_PA_START+IMAGE_BOOT_BOOTIMAGE_NAND_SIZE-1) IMAGE_BOOT_IPLIMAGE_NAND_OFFSET EQU (IMAGE_BOOT_BOOTIMAGE_NAND_OFFSET+IMAGE_BOOT_BOOTIMAGE_NAND_SIZE) IMAGE_BOOT_IPLIMAGE_NAND_PA_START EQU (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_IPLIMAGE_NAND_OFFSET) IMAGE_BOOT_IPLIMAGE_NAND_SIZE EQU (256*1024) IMAGE_BOOT_IPLIMAGE_NAND_PA_END EQU (IMAGE_BOOT_IPLIMAGE_NAND_PA_START+IMAGE_BOOT_IPLIMAGE_NAND_SIZE-1) IMAGE_BOOT_NKIMAGE_NAND_OFFSET EQU (IMAGE_BOOT_IPLIMAGE_NAND_OFFSET+IMAGE_BOOT_IPLIMAGE_NAND_SIZE) IMAGE_BOOT_NKIMAGE_NAND_PA_START EQU (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_NKIMAGE_NAND_OFFSET) IMAGE_BOOT_NKIMAGE_NAND_SIZE EQU (60*1024*1024) IMAGE_BOOT_NKIMAGE_NAND_PA_END EQU (IMAGE_BOOT_NKIMAGE_NAND_PA_START+IMAGE_BOOT_NKIMAGE_NAND_SIZE-1) IMAGE_BOOT_DIOIMAGE_NAND_OFFSET EQU IMAGE_BOOT_NKIMAGE_NAND_OFFSET IMAGE_BOOT_DIOIMAGE_NAND_PA_START EQU IMAGE_BOOT_NKIMAGE_NAND_PA_START IMAGE_BOOT_DIOIMAGE_NAND_SIZE EQU (128*1024*1024 - 128*1024 - 256*1024 - 256*1024 - 128*1024) IMAGE_BOOT_DIOIMAGE_NAND_PA_END EQU (IMAGE_BOOT_NKIMAGE_NAND_PA_START+IMAGE_BOOT_NKIMAGE_NAND_SIZE-1) ;; Last 128K of NAND reserved for boot configuration IMAGE_BOOT_BOOTCFG_NAND_SIZE EQU (128*1024) IMAGE_BOOT_BOOTCFG_NAND_OFFSET EQU (IMAGE_BOOT_NANDDEV_NAND_SIZE-IMAGE_BOOT_BOOTCFG_NAND_SIZE) IMAGE_BOOT_BOOTCFG_NAND_PA_START EQU (IMAGE_BOOT_NANDDEV_NAND_PA_START+IMAGE_BOOT_BOOTCFG_NAND_OFFSET) IMAGE_BOOT_BOOTCFG_NAND_PA_END EQU (IMAGE_BOOT_BOOTCFG_NAND_PA_START+IMAGE_BOOT_BOOTCFG_NAND_SIZE-1) ;;------------------------------------------------------------------------------ ENDIF END