#pragma once
#include "resource.h"

struct CFGDATA
{
	int	sampleRate,
		numSamples,
		numPhones,
		numRecords,
		numFiles,
		sleepPeriod;
};

extern void SetPowerState( BOOL state );
extern void InitPSP( VOID );
extern int dwReadSSP( unsigned int* ptr, int numSamples );
extern bool ReadConfig( CFGDATA& configData );
extern bool SimData( int numSamples, int sampleRate, int* pData );
extern void CreateFilename( char fileName[80], BOOL Flash );
extern void GoToSleep( int sleepTime );
extern double iToDW( unsigned int iValue );
extern void MapRegisters( VOID );
extern int WriteToFlash( unsigned int* data, int numValues);
extern int WriteToUSBDisk( unsigned int* data, int numValues);

LPVOID MapAddress(DWORD baseAddress);
void UnmapAddress(LPVOID address);

#define USB_BASE		0x4C000000
#define UHCCOMS_OFFSET	0x08
#define UHCRHS_OFFSET	0x50
#define UHCHR_OFFSET	0x64

#define CKEN_BASE		0x41300004

#define AC97_BASE		0x40500000
#define AC97GCR_OFFSET	0x0C
#define AC97GSR_OFFSET	0x1C
#define AC97x26_OFFSET	0x24C

#define SSP3_BASE		0x41900000
#define SSCR0_3_OFFSET	0x00
#define SSCR1_3_OFFSET	0x0004		
#define SSSR_3_OFFSET	0x0008		
#define SSITR_3_OFFSET	0x000C		
#define SSDR_3_OFFSET	0x0010		
#define SSTO_3_OFFSET	0x0028		
#define SSPSP_3_OFFSET	0x002C		
#define SSTSA_3_OFFSET	0x0030		
#define SSRSA_3_OFFSET	0x0034	
#define SSTSS_3_OFFSET	0x0038	
#define SSACD_3_OFFSET	0x003C

#define GPIO_BASE		0x40E00000
#define GPLR0_OFFSET	0x00		// level register 0
#define GPLR1_OFFSET	0x04		// level register 1
#define GPLR2_OFFSET	0x08		// level register 2
#define GPLR3_OFFSET	0x0100		// level register 2
#define GPDR0_OFFSET	0x0C		// direction register 0
#define GPDR1_OFFSET	0x10		// direction register 1
#define GPDR2_OFFSET	0x14		// direction register 2
#define GPDR3_OFFSET	0x010C		// direction register 2
#define GPSR0_OFFSET	0x18		// set register 0
#define GPSR1_OFFSET	0x1C		// set register 1
#define GPSR2_OFFSET	0x20		// set register 2
#define GPSR3_OFFSET	0x0118		// set register 2
#define GPCR0_OFFSET	0x24		// clear register 0
#define GPCR1_OFFSET	0x28		// clear register 1
#define GPCR2_OFFSET	0x2C		// clear register 2
#define GPCR3_OFFSET	0x0124		// clear register 2
#define GAFR0_L_OFFSET	0x54		// alt. fxn register 1
#define GAFR0_U_OFFSET	0x58		// alt. fxn register 2
#define GAFR1_L_OFFSET	0x5C		// alt. fxn register 1
#define GAFR1_U_OFFSET	0x60		// alt. fxn register 2
#define GAFR2_L_OFFSET	0x64		// alt. fxn register 1
#define GAFR2_U_OFFSET	0x68		// alt. fxn register 2
#define GAFR3_L_OFFSET	0x6C		// alt. fxn register 1
#define GAFR3_U_OFFSET	0x70		// alt. fxn register 2