<?xml version="1.0"?>
<!DOCTYPE Document SYSTEM "C:\xilinx_webpack\data\xml\Power\pwrXPLATopo.dtd">
<Document Version="0" Module="shutter_top" Date="Dec 31 13:41:15 2001" Device="XCR3064XL-6CS48">
<!--  Generator="cpldfit" -->
<Net NNm="a_in" IoT="in" Loc="FB2_14"/>
<Net NNm="a_quad" IoT="in" Loc="FB1_2"/>
<Net NNm="b_in" IoT="in" Loc="FB2_15"/>
<Net NNm="b_quad" IoT="in" Loc="FB1_1"/>
<Net NNm="c_in" IoT="in" Loc="FB3_2"/>
<Net NNm="clear_n" IoT="in" Loc="FB3_4"/>
<Net NNm="clk" IoT="in" ClkT="G"/>
<Net NNm="d_in" IoT="in" Loc="FB3_7"/>
<Net NNm="read_n" IoT="in" Loc="FB3_9"/>
<Net NNm="a_out" IoT="out" Loc="FB2_3"/>
<Net NNm="b_out" IoT="out" Loc="FB2_8"/>
<Net NNm="c_out" IoT="out" Loc="FB2_10"/>
<Net NNm="d_out" IoT="out" Loc="FB2_11"/>
<Net NNm="cpu_data&lt;0&gt;" IoT="bidi" Loc="FB1_6"/>
<Net NNm="cpu_data&lt;1&gt;" IoT="bidi" Loc="FB1_8"/>
<Net NNm="cpu_data&lt;2&gt;" IoT="bidi" Loc="FB1_10"/>
<Net NNm="cpu_data&lt;3&gt;" IoT="bidi" Loc="FB1_11"/>
<Net NNm="cpu_data&lt;4&gt;" IoT="bidi" Loc="FB1_14"/>
<Net NNm="cpu_data&lt;5&gt;" IoT="bidi" Loc="FB1_15"/>
<Net NNm="cpu_data&lt;6&gt;" IoT="bidi" Loc="FB2_1"/>
<Net NNm="cpu_data&lt;7&gt;" IoT="bidi" Loc="FB2_2"/>
<Net NNm="UCT0" IoT="none" ClkT="U"/>
<Net NNm="UCT1" IoT="none" ClkT="U"/>
<Net NNm="PT_VCC" IoT="none"/>
<Net NNm="PT_GND" IoT="none"/>
<Lb Nm="FB1">
 <LbT Nm="FB1_PT0" PtT="CT">
  <LbTO NNm="FB1_PT0"/>
  <!-- clear_n_p -->
  <LbTI NNm="FB3_4_P"/>
 </LbT>
 <LbT Nm="FB1_PT1" PtT="CT">
  <LbTO NNm="FB1_PT1"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N123_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- N124_n -->
  <LbTI NNm="FB1_13_N"/>
  <!-- N122_n -->
  <LbTI NNm="FB1_7_N"/>
 </LbT>
 <LbT Nm="FB1_PT2" PtT="CT">
  <LbTO NNm="FB1_PT2"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N123_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- N124_n -->
  <LbTI NNm="FB1_13_N"/>
  <!-- N122_n -->
  <LbTI NNm="FB1_7_N"/>
 </LbT>
 <LbT Nm="FB1_PT3" PtT="CT">
  <LbTO NNm="FB1_PT3"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N123_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- N124_n -->
  <LbTI NNm="FB1_13_N"/>
  <!-- N122_n -->
  <LbTI NNm="FB1_7_N"/>
  <!-- N125_n -->
  <LbTI NNm="FB1_9_N"/>
 </LbT>
 <LbT Nm="FB1_PT4" PtT="CT">
  <LbTO NNm="FB1_PT4"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
 </LbT>
 <LbT Nm="FB1_PT5" PtT="CT">
  <LbTO NNm="FB1_PT5"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N123_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- N124_n -->
  <LbTI NNm="FB1_13_N"/>
  <!-- N122_n -->
  <LbTI NNm="FB1_7_N"/>
  <!-- N125_n -->
  <LbTI NNm="FB1_9_N"/>
 </LbT>
 <LbT Nm="FB1_PT6" PtT="CT">
  <LbTO NNm="FB1_PT6"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N123_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- N122_n -->
  <LbTI NNm="FB1_7_N"/>
 </LbT>
 <LbT Nm="FB1_PT7" PtT="UCT">
  <LbTO NNm="FB1_PT7"/>
  <!-- N133_n -->
  <LbTI NNm="FB2_7_N"/>
 </LbT>
 <LbT Nm="FB1_PT8" PtT="0">
  <LbTO NNm="FB1_PT8"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N123_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- N122_n -->
  <LbTI NNm="FB1_7_N"/>
 </LbT>
 <LbT Nm="FB1_PT9" PtT="CLK">
  <LbTO NNm="FB1_PT9"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- N122_n -->
  <LbTI NNm="FB1_7_N"/>
 </LbT>
 <LbT Nm="FB1_PT10" PtT="0">
  <LbTO NNm="FB1_PT10"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- N122_n -->
  <LbTI NNm="FB1_7_N"/>
 </LbT>
 <LbT Nm="FB1_PT11" PtT="CLK">
  <LbTO NNm="FB1_PT11"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
 </LbT>
 <LbT Nm="FB1_PT12" PtT="0">
  <LbTO NNm="FB1_PT12"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
 </LbT>
 <LbT Nm="FB1_PT13" PtT="CLK">
  <LbTO NNm="FB1_PT13"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT14" PtT="0">
  <LbTO NNm="FB1_PT14"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT15" PtT="CLK">
  <LbTO NNm="FB1_PT15"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
 </LbT>
 <LbT Nm="FB1_PT16" PtT="0">
  <LbTO NNm="FB1_PT16"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N163_n -->
  <LbTI NNm="FB2_16_N"/>
 </LbT>
 <LbT Nm="FB1_PT18" PtT="0">
  <LbTO NNm="FB1_PT18"/>
  <!-- N119_n -->
  <LbTI NNm="FB1_3_N"/>
 </LbT>
 <LbT Nm="FB1_PT22" PtT="0">
  <LbTO NNm="FB1_PT22"/>
  <!-- N120_n -->
  <LbTI NNm="FB1_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT26" PtT="0">
  <LbTO NNm="FB1_PT26"/>
  <!-- N121_n -->
  <LbTI NNm="FB1_5_N"/>
 </LbT>
 <LbT Nm="FB1_PT28" PtT="0">
  <LbTO NNm="FB1_PT28"/>
  <!-- N122_n -->
  <LbTI NNm="FB1_7_N"/>
 </LbT>
 <LbT Nm="FB1_PT34" PtT="0">
  <LbTO NNm="FB1_PT34"/>
  <!-- N123_n -->
  <LbTI NNm="FB1_12_N"/>
 </LbT>
 <LbT Nm="FB1_PT36" PtT="0">
  <LbTO NNm="FB1_PT36"/>
  <!-- N124_n -->
  <LbTI NNm="FB1_13_N"/>
 </LbT>
 <Mc Nm="FB1_1">
  <FBMux Nm="FB1_1_N">
   <MuxCon NNm="FB1_1_N" Port="Z"/>
   <MuxCon NNm="FB1_1_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_1_P">
   <MuxCon NNm="FB1_1_P" Port="Z"/>
   <MuxCon NNm="FB1_1_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_1_I">
   <BufCon NNm="FB1_1_I" Port="Z"/>
   <BufCon NNm="b_quad" Port="I"/>
  </InBuf>
  <DFlop Nm="FB1_1_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_1_I" Port="D"/>
   <FlopCon NNm="FB1_1_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_2">
  <FBMux Nm="FB1_2_N">
   <MuxCon NNm="FB1_2_N" Port="Z"/>
   <MuxCon NNm="FB1_2_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_2_P">
   <MuxCon NNm="FB1_2_P" Port="Z"/>
   <MuxCon NNm="FB1_2_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_2_I">
   <BufCon NNm="FB1_2_I" Port="Z"/>
   <BufCon NNm="a_quad" Port="I"/>
  </InBuf>
  <DFlop Nm="FB1_2_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_2_I" Port="D"/>
   <FlopCon NNm="FB1_2_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_3">
  <FBMux Nm="FB1_3_N">
   <MuxCon NNm="FB1_3_N" Port="Z"/>
   <MuxCon NNm="FB1_3_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_3_P">
   <MuxCon NNm="FB1_3_P" Port="Z"/>
   <MuxCon NNm="FB1_3_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_3_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="FB1_PT0" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_3_D" Port="D"/>
   <FlopCon NNm="FB1_3_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB1_3_OR">
   <OrCon NNm="FB1_PT18" Port="I"/>
   <OrCon NNm="FB1_3_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB1_4">
  <FBMux Nm="FB1_4_N">
   <MuxCon NNm="FB1_4_N" Port="Z"/>
   <MuxCon NNm="FB1_4_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_4_P">
   <MuxCon NNm="FB1_4_P" Port="Z"/>
   <MuxCon NNm="FB1_4_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_4_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="FB1_PT0" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_4_D" Port="D"/>
   <FlopCon NNm="FB1_4_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB1_4_OR">
   <OrCon NNm="FB1_PT15" Port="I"/>
   <OrCon NNm="FB1_PT16" Port="I"/>
   <OrCon NNm="FB1_4_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB1_5">
  <FBMux Nm="FB1_5_N">
   <MuxCon NNm="FB1_5_N" Port="Z"/>
   <MuxCon NNm="FB1_5_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_5_P">
   <MuxCon NNm="FB1_5_P" Port="Z"/>
   <MuxCon NNm="FB1_5_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_5_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="FB1_PT0" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_5_D" Port="D"/>
   <FlopCon NNm="FB1_5_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB1_5_OR">
   <OrCon NNm="FB1_PT13" Port="I"/>
   <OrCon NNm="FB1_PT14" Port="I"/>
   <OrCon NNm="FB1_5_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB1_6">
  <FBMux Nm="FB1_6_N">
   <MuxCon NNm="FB1_6_N" Port="Z"/>
   <MuxCon NNm="FB1_6_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_6_P">
   <MuxCon NNm="FB1_6_P" Port="Z"/>
   <MuxCon NNm="FB1_6_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_6_I">
   <BufCon NNm="FB1_6_I" Port="Z"/>
   <BufCon NNm="cpu_data&lt;0&gt;" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB1_6_O">
   <BufCon NNm="cpu_data&lt;0&gt;" Port="Z"/>
   <BufCon NNm="FB1_6_Q" Port="I"/>
   <BufCon NNm="UCT1" Port="OE"/>
  </OutBuf>
  <DFlop Nm="FB1_6_FF">
   <FlopCon NNm="UCT0" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT18" Port="D"/>
   <FlopCon NNm="FB1_6_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_7">
  <FBMux Nm="FB1_7_N">
   <MuxCon NNm="FB1_7_N" Port="Z"/>
   <MuxCon NNm="FB1_7_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_7_P">
   <MuxCon NNm="FB1_7_P" Port="Z"/>
   <MuxCon NNm="FB1_7_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_7_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="FB1_PT0" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_7_D" Port="D"/>
   <FlopCon NNm="FB1_7_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB1_7_OR">
   <OrCon NNm="FB1_PT11" Port="I"/>
   <OrCon NNm="FB1_PT12" Port="I"/>
   <OrCon NNm="FB1_7_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB1_8">
  <FBMux Nm="FB1_8_N">
   <MuxCon NNm="FB1_8_N" Port="Z"/>
   <MuxCon NNm="FB1_8_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_8_P">
   <MuxCon NNm="FB1_8_P" Port="Z"/>
   <MuxCon NNm="FB1_8_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_8_I">
   <BufCon NNm="FB1_8_I" Port="Z"/>
   <BufCon NNm="cpu_data&lt;1&gt;" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB1_8_O">
   <BufCon NNm="cpu_data&lt;1&gt;" Port="Z"/>
   <BufCon NNm="FB1_8_Q" Port="I"/>
   <BufCon NNm="UCT1" Port="OE"/>
  </OutBuf>
  <DFlop Nm="FB1_8_FF">
   <FlopCon NNm="UCT0" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT22" Port="D"/>
   <FlopCon NNm="FB1_8_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_9">
  <FBMux Nm="FB1_9_N">
   <MuxCon NNm="FB1_9_N" Port="Z"/>
   <MuxCon NNm="FB1_9_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_9_P">
   <MuxCon NNm="FB1_9_P" Port="Z"/>
   <MuxCon NNm="FB1_9_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_9_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="FB1_PT0" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_9_D" Port="D"/>
   <FlopCon NNm="FB1_9_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB1_9_OR">
   <OrCon NNm="FB1_PT1" Port="I"/>
   <OrCon NNm="FB1_PT2" Port="I"/>
   <OrCon NNm="FB1_9_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB1_10">
  <FBMux Nm="FB1_10_N">
   <MuxCon NNm="FB1_10_N" Port="Z"/>
   <MuxCon NNm="FB1_10_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_10_P">
   <MuxCon NNm="FB1_10_P" Port="Z"/>
   <MuxCon NNm="FB1_10_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_10_I">
   <BufCon NNm="FB1_10_I" Port="Z"/>
   <BufCon NNm="cpu_data&lt;2&gt;" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB1_10_O">
   <BufCon NNm="cpu_data&lt;2&gt;" Port="Z"/>
   <BufCon NNm="FB1_10_Q" Port="I"/>
   <BufCon NNm="UCT1" Port="OE"/>
  </OutBuf>
  <DFlop Nm="FB1_10_FF">
   <FlopCon NNm="UCT0" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT26" Port="D"/>
   <FlopCon NNm="FB1_10_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_11">
  <FBMux Nm="FB1_11_N">
   <MuxCon NNm="FB1_11_N" Port="Z"/>
   <MuxCon NNm="FB1_11_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_11_P">
   <MuxCon NNm="FB1_11_P" Port="Z"/>
   <MuxCon NNm="FB1_11_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_11_I">
   <BufCon NNm="FB1_11_I" Port="Z"/>
   <BufCon NNm="cpu_data&lt;3&gt;" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB1_11_O">
   <BufCon NNm="cpu_data&lt;3&gt;" Port="Z"/>
   <BufCon NNm="FB1_11_Q" Port="I"/>
   <BufCon NNm="UCT1" Port="OE"/>
  </OutBuf>
  <DFlop Nm="FB1_11_FF">
   <FlopCon NNm="UCT0" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT28" Port="D"/>
   <FlopCon NNm="FB1_11_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_12">
  <FBMux Nm="FB1_12_N">
   <MuxCon NNm="FB1_12_N" Port="Z"/>
   <MuxCon NNm="FB1_12_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_12_P">
   <MuxCon NNm="FB1_12_P" Port="Z"/>
   <MuxCon NNm="FB1_12_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_12_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="FB1_PT0" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_12_D" Port="D"/>
   <FlopCon NNm="FB1_12_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB1_12_OR">
   <OrCon NNm="FB1_PT9" Port="I"/>
   <OrCon NNm="FB1_PT10" Port="I"/>
   <OrCon NNm="FB1_12_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB1_13">
  <FBMux Nm="FB1_13_N">
   <MuxCon NNm="FB1_13_N" Port="Z"/>
   <MuxCon NNm="FB1_13_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_13_P">
   <MuxCon NNm="FB1_13_P" Port="Z"/>
   <MuxCon NNm="FB1_13_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_13_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="FB1_PT0" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_13_D" Port="D"/>
   <FlopCon NNm="FB1_13_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB1_13_OR">
   <OrCon NNm="FB1_PT6" Port="I"/>
   <OrCon NNm="FB1_PT8" Port="I"/>
   <OrCon NNm="FB1_13_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB1_14">
  <FBMux Nm="FB1_14_N">
   <MuxCon NNm="FB1_14_N" Port="Z"/>
   <MuxCon NNm="FB1_14_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_14_P">
   <MuxCon NNm="FB1_14_P" Port="Z"/>
   <MuxCon NNm="FB1_14_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_14_I">
   <BufCon NNm="FB1_14_I" Port="Z"/>
   <BufCon NNm="cpu_data&lt;4&gt;" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB1_14_O">
   <BufCon NNm="cpu_data&lt;4&gt;" Port="Z"/>
   <BufCon NNm="FB1_14_Q" Port="I"/>
   <BufCon NNm="UCT1" Port="OE"/>
  </OutBuf>
  <DFlop Nm="FB1_14_FF">
   <FlopCon NNm="UCT0" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT34" Port="D"/>
   <FlopCon NNm="FB1_14_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_15">
  <FBMux Nm="FB1_15_N">
   <MuxCon NNm="FB1_15_N" Port="Z"/>
   <MuxCon NNm="FB1_15_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_15_P">
   <MuxCon NNm="FB1_15_P" Port="Z"/>
   <MuxCon NNm="FB1_15_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_15_I">
   <BufCon NNm="FB1_15_I" Port="Z"/>
   <BufCon NNm="cpu_data&lt;5&gt;" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB1_15_O">
   <BufCon NNm="cpu_data&lt;5&gt;" Port="Z"/>
   <BufCon NNm="FB1_15_Q" Port="I"/>
   <BufCon NNm="UCT1" Port="OE"/>
  </OutBuf>
  <DFlop Nm="FB1_15_FF">
   <FlopCon NNm="UCT0" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT36" Port="D"/>
   <FlopCon NNm="FB1_15_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_16">
  <FBMux Nm="FB1_16_N">
   <MuxCon NNm="FB1_16_N" Port="Z"/>
   <MuxCon NNm="FB1_16_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_16_P">
   <MuxCon NNm="FB1_16_P" Port="Z"/>
   <MuxCon NNm="FB1_16_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_16_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="FB1_PT0" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_16_D" Port="D"/>
   <FlopCon NNm="FB1_16_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB1_16_OR">
   <OrCon NNm="FB1_PT3" Port="I"/>
   <OrCon NNm="FB1_PT5" Port="I"/>
   <OrCon NNm="FB1_16_D" Port="Z"/>
  </Or>
 </Mc>
 <SDot Nm="UCT0">
  <SDotO NNm="UCT0"/>
  <SDotI NNm="FB1_PT7"/>
 </SDot>
 <SDot Nm="UCT1">
  <SDotO NNm="UCT1"/>
  <SDotI NNm="FB1_PT7"/>
 </SDot>
</Lb>
<Lb Nm="FB2">
 <LbT Nm="FB2_PT0" PtT="CT">
  <LbTO NNm="FB2_PT0"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N130_n -->
  <LbTI NNm="FB1_2_N"/>
  <!-- N127_n -->
  <LbTI NNm="FB2_9_N"/>
  <!-- N128_n -->
  <LbTI NNm="FB2_12_N"/>
  <!-- N129_n -->
  <LbTI NNm="FB1_1_N"/>
 </LbT>
 <LbT Nm="FB2_PT1" PtT="CT">
  <LbTO NNm="FB2_PT1"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N130_n -->
  <LbTI NNm="FB1_2_N"/>
  <!-- N127_n -->
  <LbTI NNm="FB2_9_N"/>
  <!-- N128_n -->
  <LbTI NNm="FB2_12_N"/>
  <!-- N129_n -->
  <LbTI NNm="FB1_1_N"/>
 </LbT>
 <LbT Nm="FB2_PT2" PtT="CT">
  <LbTO NNm="FB2_PT2"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N127_n -->
  <LbTI NNm="FB2_9_N"/>
 </LbT>
 <LbT Nm="FB2_PT3" PtT="CT">
  <LbTO NNm="FB2_PT3"/>
  <!-- N131_n -->
  <LbTI NNm="FB2_13_N"/>
  <!-- N128_n -->
  <LbTI NNm="FB2_12_N"/>
 </LbT>
 <LbT Nm="FB2_PT4" PtT="CT">
  <LbTO NNm="FB2_PT4"/>
  <!-- N130_n -->
  <LbTI NNm="FB1_2_N"/>
  <!-- N127_n -->
  <LbTI NNm="FB2_9_N"/>
  <!-- N128_n -->
  <LbTI NNm="FB2_12_N"/>
 </LbT>
 <LbT Nm="FB2_PT8" PtT="0">
  <LbTO NNm="FB2_PT8"/>
  <!-- N125_n -->
  <LbTI NNm="FB1_9_N"/>
 </LbT>
 <LbT Nm="FB2_PT10" PtT="0">
  <LbTO NNm="FB2_PT10"/>
  <!-- N126_n -->
  <LbTI NNm="FB1_16_N"/>
 </LbT>
 <LbT Nm="FB2_PT12" PtT="0">
  <LbTO NNm="FB2_PT12"/>
  <!-- b_in_p -->
  <LbTI NNm="FB2_15_P"/>
  <!-- a_in_p -->
  <LbTI NNm="FB2_14_P"/>
 </LbT>
 <LbT Nm="FB2_PT18" PtT="0">
  <LbTO NNm="FB2_PT18"/>
  <!-- read_n_p -->
  <LbTI NNm="FB3_9_P"/>
 </LbT>
 <LbT Nm="FB2_PT20" PtT="0">
  <LbTO NNm="FB2_PT20"/>
  <!-- N162_n -->
  <LbTI NNm="FB2_6_N"/>
 </LbT>
 <LbT Nm="FB2_PT22" PtT="0">
  <LbTO NNm="FB2_PT22"/>
  <!-- b_in_p -->
  <LbTI NNm="FB2_15_P"/>
  <!-- a_in_p -->
  <LbTI NNm="FB2_14_P"/>
 </LbT>
 <LbT Nm="FB2_PT24" PtT="0">
  <LbTO NNm="FB2_PT24"/>
  <!-- N129_n -->
  <LbTI NNm="FB1_1_N"/>
 </LbT>
 <LbT Nm="FB2_PT26" PtT="0">
  <LbTO NNm="FB2_PT26"/>
  <!-- d_in_p -->
  <LbTI NNm="FB3_7_P"/>
  <!-- c_in_p -->
  <LbTI NNm="FB3_2_P"/>
 </LbT>
 <LbT Nm="FB2_PT28" PtT="0">
  <LbTO NNm="FB2_PT28"/>
  <!-- d_in_p -->
  <LbTI NNm="FB3_7_P"/>
  <!-- c_in_p -->
  <LbTI NNm="FB3_2_P"/>
 </LbT>
 <LbT Nm="FB2_PT30" PtT="0">
  <LbTO NNm="FB2_PT30"/>
  <!-- N130_n -->
  <LbTI NNm="FB1_2_N"/>
 </LbT>
 <Mc Nm="FB2_1">
  <FBMux Nm="FB2_1_N">
   <MuxCon NNm="FB2_1_N" Port="Z"/>
   <MuxCon NNm="FB2_1_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_1_P">
   <MuxCon NNm="FB2_1_P" Port="Z"/>
   <MuxCon NNm="FB2_1_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB2_1_I">
   <BufCon NNm="FB2_1_I" Port="Z"/>
   <BufCon NNm="cpu_data&lt;6&gt;" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB2_1_O">
   <BufCon NNm="cpu_data&lt;6&gt;" Port="Z"/>
   <BufCon NNm="FB2_1_Q" Port="I"/>
   <BufCon NNm="UCT1" Port="OE"/>
  </OutBuf>
  <DFlop Nm="FB2_1_FF">
   <FlopCon NNm="UCT0" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB2_PT8" Port="D"/>
   <FlopCon NNm="FB2_1_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB2_2">
  <FBMux Nm="FB2_2_N">
   <MuxCon NNm="FB2_2_N" Port="Z"/>
   <MuxCon NNm="FB2_2_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_2_P">
   <MuxCon NNm="FB2_2_P" Port="Z"/>
   <MuxCon NNm="FB2_2_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB2_2_I">
   <BufCon NNm="FB2_2_I" Port="Z"/>
   <BufCon NNm="cpu_data&lt;7&gt;" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB2_2_O">
   <BufCon NNm="cpu_data&lt;7&gt;" Port="Z"/>
   <BufCon NNm="FB2_2_Q" Port="I"/>
   <BufCon NNm="UCT1" Port="OE"/>
  </OutBuf>
  <DFlop Nm="FB2_2_FF">
   <FlopCon NNm="UCT0" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB2_PT10" Port="D"/>
   <FlopCon NNm="FB2_2_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB2_3">
  <FBMux Nm="FB2_3_N">
   <MuxCon NNm="FB2_3_N" Port="Z"/>
   <MuxCon NNm="FB2_PT12" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_3_P">
   <MuxCon NNm="FB2_3_P" Port="Z"/>
   <MuxCon NNm="FB2_3_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB2_3_I">
   <BufCon NNm="FB2_3_I" Port="Z"/>
   <BufCon NNm="a_out" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB2_3_O">
   <BufCon NNm="a_out" Port="Z"/>
   <BufCon NNm="FB2_PT12" Port="I"/>
   <BufCon NNm="PT_VCC" Port="OE"/>
  </OutBuf>
 </Mc>
 <Mc Nm="FB2_6">
  <FBMux Nm="FB2_6_N">
   <MuxCon NNm="FB2_6_N" Port="Z"/>
   <MuxCon NNm="FB2_6_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_6_P">
   <MuxCon NNm="FB2_6_P" Port="Z"/>
   <MuxCon NNm="FB2_6_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB2_6_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB2_PT18" Port="D"/>
   <FlopCon NNm="FB2_6_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB2_7">
  <FBMux Nm="FB2_7_N">
   <MuxCon NNm="FB2_7_N" Port="Z"/>
   <MuxCon NNm="FB2_7_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_7_P">
   <MuxCon NNm="FB2_7_P" Port="Z"/>
   <MuxCon NNm="FB2_7_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB2_7_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB2_PT20" Port="D"/>
   <FlopCon NNm="FB2_7_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB2_8">
  <FBMux Nm="FB2_8_N">
   <MuxCon NNm="FB2_8_N" Port="Z"/>
   <MuxCon NNm="FB2_PT22" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_8_P">
   <MuxCon NNm="FB2_8_P" Port="Z"/>
   <MuxCon NNm="FB2_8_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB2_8_I">
   <BufCon NNm="FB2_8_I" Port="Z"/>
   <BufCon NNm="b_out" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB2_8_O">
   <BufCon NNm="b_out" Port="Z"/>
   <BufCon NNm="FB2_PT22" Port="I"/>
   <BufCon NNm="PT_VCC" Port="OE"/>
  </OutBuf>
 </Mc>
 <Mc Nm="FB2_9">
  <FBMux Nm="FB2_9_N">
   <MuxCon NNm="FB2_9_N" Port="Z"/>
   <MuxCon NNm="FB2_9_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_9_P">
   <MuxCon NNm="FB2_9_P" Port="Z"/>
   <MuxCon NNm="FB2_9_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB2_9_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB2_PT24" Port="D"/>
   <FlopCon NNm="FB2_9_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB2_10">
  <FBMux Nm="FB2_10_N">
   <MuxCon NNm="FB2_10_N" Port="Z"/>
   <MuxCon NNm="FB2_PT26" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_10_P">
   <MuxCon NNm="FB2_10_P" Port="Z"/>
   <MuxCon NNm="FB2_10_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB2_10_I">
   <BufCon NNm="FB2_10_I" Port="Z"/>
   <BufCon NNm="c_out" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB2_10_O">
   <BufCon NNm="c_out" Port="Z"/>
   <BufCon NNm="FB2_PT26" Port="I"/>
   <BufCon NNm="PT_VCC" Port="OE"/>
  </OutBuf>
 </Mc>
 <Mc Nm="FB2_11">
  <FBMux Nm="FB2_11_N">
   <MuxCon NNm="FB2_11_N" Port="Z"/>
   <MuxCon NNm="FB2_PT28" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_11_P">
   <MuxCon NNm="FB2_11_P" Port="Z"/>
   <MuxCon NNm="FB2_11_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB2_11_I">
   <BufCon NNm="FB2_11_I" Port="Z"/>
   <BufCon NNm="d_out" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB2_11_O">
   <BufCon NNm="d_out" Port="Z"/>
   <BufCon NNm="FB2_PT28" Port="I"/>
   <BufCon NNm="PT_VCC" Port="OE"/>
  </OutBuf>
 </Mc>
 <Mc Nm="FB2_12">
  <FBMux Nm="FB2_12_N">
   <MuxCon NNm="FB2_12_N" Port="Z"/>
   <MuxCon NNm="FB2_12_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_12_P">
   <MuxCon NNm="FB2_12_P" Port="Z"/>
   <MuxCon NNm="FB2_12_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB2_12_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB2_PT30" Port="D"/>
   <FlopCon NNm="FB2_12_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB2_13">
  <FBMux Nm="FB2_13_N">
   <MuxCon NNm="FB2_13_N" Port="Z"/>
   <MuxCon NNm="FB2_13_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_13_P">
   <MuxCon NNm="FB2_13_P" Port="Z"/>
   <MuxCon NNm="FB2_13_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB2_13_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB2_13_D" Port="D"/>
   <FlopCon NNm="FB2_13_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB2_13_OR">
   <OrCon NNm="FB2_PT2" Port="I"/>
   <OrCon NNm="FB2_PT3" Port="I"/>
   <OrCon NNm="FB2_PT4" Port="I"/>
   <OrCon NNm="FB2_13_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB2_14">
  <FBMux Nm="FB2_14_N">
   <MuxCon NNm="FB2_14_N" Port="Z"/>
   <MuxCon NNm="FB2_14_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_14_P">
   <MuxCon NNm="FB2_14_P" Port="Z"/>
   <MuxCon NNm="FB2_14_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB2_14_I">
   <BufCon NNm="FB2_14_I" Port="Z"/>
   <BufCon NNm="a_in" Port="I"/>
  </InBuf>
 </Mc>
 <Mc Nm="FB2_15">
  <FBMux Nm="FB2_15_N">
   <MuxCon NNm="FB2_15_N" Port="Z"/>
   <MuxCon NNm="FB2_15_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_15_P">
   <MuxCon NNm="FB2_15_P" Port="Z"/>
   <MuxCon NNm="FB2_15_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB2_15_I">
   <BufCon NNm="FB2_15_I" Port="Z"/>
   <BufCon NNm="b_in" Port="I"/>
  </InBuf>
 </Mc>
 <Mc Nm="FB2_16">
  <FBMux Nm="FB2_16_N">
   <MuxCon NNm="FB2_16_N" Port="Z"/>
   <MuxCon NNm="FB2_16_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB2_16_P">
   <MuxCon NNm="FB2_16_P" Port="Z"/>
   <MuxCon NNm="FB2_16_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB2_16_FF">
   <FlopCon NNm="clk" Port="CLK"/>
   <FlopCon NNm="PT_GND" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB2_16_D" Port="D"/>
   <FlopCon NNm="FB2_16_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB2_16_OR">
   <OrCon NNm="FB2_PT0" Port="I"/>
   <OrCon NNm="FB2_PT1" Port="I"/>
   <OrCon NNm="FB2_16_D" Port="Z"/>
  </Or>
 </Mc>
</Lb>
<Lb Nm="FB3">
 <Mc Nm="FB3_2">
  <FBMux Nm="FB3_2_N">
   <MuxCon NNm="FB3_2_N" Port="Z"/>
   <MuxCon NNm="FB3_2_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB3_2_P">
   <MuxCon NNm="FB3_2_P" Port="Z"/>
   <MuxCon NNm="FB3_2_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB3_2_I">
   <BufCon NNm="FB3_2_I" Port="Z"/>
   <BufCon NNm="c_in" Port="I"/>
  </InBuf>
 </Mc>
 <Mc Nm="FB3_4">
  <FBMux Nm="FB3_4_N">
   <MuxCon NNm="FB3_4_N" Port="Z"/>
   <MuxCon NNm="FB3_4_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB3_4_P">
   <MuxCon NNm="FB3_4_P" Port="Z"/>
   <MuxCon NNm="FB3_4_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB3_4_I">
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   <BufCon NNm="clear_n" Port="I"/>
  </InBuf>
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   <MuxCon NNm="FB3_7_N" Port="Z"/>
   <MuxCon NNm="FB3_7_Q" Port="I"/>
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  <MCMux Nm="FB3_7_P">
   <MuxCon NNm="FB3_7_P" Port="Z"/>
   <MuxCon NNm="FB3_7_I" Port="I"/>
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  <InBuf Nm="FB3_7_I">
   <BufCon NNm="FB3_7_I" Port="Z"/>
   <BufCon NNm="d_in" Port="I"/>
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   <MuxCon NNm="FB3_9_N" Port="Z"/>
   <MuxCon NNm="FB3_9_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB3_9_P">
   <MuxCon NNm="FB3_9_P" Port="Z"/>
   <MuxCon NNm="FB3_9_I" Port="I"/>
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  <InBuf Nm="FB3_9_I">
   <BufCon NNm="FB3_9_I" Port="Z"/>
   <BufCon NNm="read_n" Port="I"/>
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</Lb>
</Document>
