\t (00:00:00) allegro 17.2 S010 Windows SPB 64-bit Edition
\t (00:00:00)     Journal start - Tue Sep 05 14:17:53 2017
\t (00:00:00)         Host=LONO User=craig Pid=4252 CPUs=24
\t (00:00:00) CmdLine= C:\Cadence\SPB_17.2\tools\bin\allegro.exe
\t (00:00:00) 
   (00:00:00) Loading axlcore.cxt 
\t (00:00:01) Opening existing design...
\i (00:00:03) fillin yes 
\w (00:00:03)  Design outline not created.
\d (00:00:03) Design opened: C:/AA project data/orcaddata/oasis5/O5 boards MX470 initial release/O5 mother MX470 board initial release/O5 mother board MX470 initial release.brd
\i (00:00:03) trapsize 4267
\i (00:00:03) trapsize 4382
\i (00:00:03) trapsize 4382
\i (00:00:03) etchedit 
\i (00:00:04) zoom in 1 
\i (00:00:04) setwindow pcb
\i (00:00:04) zoom in -144.48 1680.30
\i (00:00:04) trapsize 2191
\i (00:00:04) zoom in 1 
\i (00:00:04) setwindow pcb
\i (00:00:04) zoom in -144.48 1680.30
\i (00:00:04) trapsize 1096
\i (00:00:05) zoom in 1 
\i (00:00:05) setwindow pcb
\i (00:00:05) zoom in 434.01 1851.22
\i (00:00:05) trapsize 548
\i (00:00:05) zoom in 1 
\i (00:00:05) setwindow pcb
\i (00:00:05) zoom in 434.01 1851.22
\i (00:00:05) trapsize 274
\i (00:00:06) zoom in 1 
\i (00:00:06) setwindow pcb
\i (00:00:06) zoom in 740.78 1875.33
\i (00:00:06) trapsize 137
\i (00:00:07) zoom out 1 
\i (00:00:07) setwindow pcb
\i (00:00:07) zoom out 740.79 1873.96
\i (00:00:07) trapsize 274
\i (00:00:09) zoom out 1 
\i (00:00:09) setwindow pcb
\i (00:00:09) zoom out 1124.25 1944.09
\i (00:00:09) trapsize 548
\i (00:00:11) roam start
\i (00:00:11) roam x 32
\i (00:00:11) roam y -64
\i (00:00:11) roam y -16
\i (00:00:11) roam x 16
\i (00:00:11) roam y -16
\i (00:00:11) roam y -16
\i (00:00:11) roam x 64
\i (00:00:11) roam y -16
\i (00:00:11) roam x 64
\i (00:00:11) roam y -16
\i (00:00:11) roam x 16
\i (00:00:11) roam x 32
\i (00:00:11) roam y -16
\i (00:00:12) roam x 32
\i (00:00:12) roam y -16
\i (00:00:12) roam x 16
\i (00:00:12) roam y 16
\i (00:00:12) roam end
\i (00:00:24) QtSignal CVPLayerGrid CVPBoxAllTop clicked false
\i (00:00:28) setwindow form.find
\i (00:00:28) FORM find symbols YES 
\i (00:00:29) FORM find symbols NO 
\i (00:00:34) setwindow form.mini
\i (00:00:34) FORM mini class REF DES 
\i (00:00:36) FORM mini subclass DISPLAY_BOTTOM 
\i (00:00:37) FORM mini subcolor 1 
\i (00:00:39) FORM mini subcolor 0 
\i (00:00:40) FORM mini subcolor 1 
\i (00:00:45) FORM mini subclass ASSEMBLY_BOTTOM 
\i (00:00:46) FORM mini subcolor 1 
\i (00:00:48) setwindow pcb
\i (00:00:48) zoom in 1 
\i (00:00:48) setwindow pcb
\i (00:00:48) zoom in 919.35 2144.83
\i (00:00:48) trapsize 274
\i (00:00:49) zoom in 1 
\i (00:00:49) setwindow pcb
\i (00:00:49) zoom in 919.35 2144.84
\i (00:00:49) trapsize 137
\i (00:00:53) roam start
\i (00:00:53) roam x 80
\i (00:00:53) roam y 16
\i (00:00:53) roam x 96
\i (00:00:53) roam y 48
\i (00:00:53) roam x 64
\i (00:00:53) roam y 32
\i (00:00:53) roam x 48
\i (00:00:53) roam y 32
\i (00:00:53) roam end
\i (00:01:06) change 
\i (00:01:10) setwindow form.mini
\i (00:01:10) FORM mini change_class REF DES 
\i (00:01:16) FORM mini text_block 3 
\i (00:01:18) setwindow pcb
\i (00:01:18) pick grid 1034.40 2041.84
\t (00:01:18) last pick:  1035.00 2040.00
\t (00:01:18) No DRC errors detected.
\t (00:01:18) Changed 1 items out of 1 items found.
\i (00:01:22) Esc 
\i (00:01:23) Esc 
\i (00:01:24) pick grid 1169.98 2127.57
\t (00:01:24) last pick:  1170.00 2130.00
\i (00:01:27) zoom out 1 
\i (00:01:28) setwindow pcb
\i (00:01:28) zoom out 1108.08 2094.43
\i (00:01:28) trapsize 274
\i (00:01:28) zoom in 1 
\i (00:01:28) setwindow pcb
\i (00:01:28) zoom in 1108.07 2094.43
\i (00:01:28) trapsize 137
\i (00:01:32) QtSignal CVPLayerGrid CVPBoxAllTop clicked true
\i (00:04:05) exit 
\e (00:04:05) Do you want to save the changes you made to O5 mother board MX470 initial release.brd?
\i (00:04:06) fillin yes 
\t (00:04:07)     Journal end - Tue Sep 05 14:21:59 2017
